|
42 | 42 | * \endcode |
43 | 43 | */ |
44 | 44 |
|
45 | | -#ifdef THRUST_RDC_ENABLED |
| 45 | +#if defined(CUB_DETAIL_CDPv1) |
46 | 46 |
|
47 | | -// seq_impl unused. |
| 47 | +// Special case for NVCC -- need to inform the device path about the kernels |
| 48 | +// that are launched from the host path. |
| 49 | +#if defined(__CUDACC__) && defined(__CUDA_ARCH__) |
| 50 | + |
| 51 | +// seq_impl only used on platforms that do not support device synchronization. |
48 | 52 | #define THRUST_CDP_DISPATCH(par_impl, seq_impl) \ |
49 | | - NV_IF_TARGET(NV_ANY_TARGET, par_impl, par_impl) |
| 53 | + if (false) \ |
| 54 | + { /* Without this, the device pass won't compile any kernels. */ \ |
| 55 | + NV_IF_TARGET(NV_ANY_TARGET, par_impl); \ |
| 56 | + } \ |
| 57 | + NV_DISPATCH_TARGET(NV_PROVIDES_SM_90, seq_impl, NV_ANY_TARGET, par_impl) |
50 | 58 |
|
51 | | -#else // THRUST_RDC_ENABLED |
| 59 | +#else // NVCC device pass |
| 60 | + |
| 61 | +// seq_impl only used on platforms that do not support device synchronization. |
| 62 | +#define THRUST_CDP_DISPATCH(par_impl, seq_impl) \ |
| 63 | + NV_DISPATCH_TARGET(NV_PROVIDES_SM_90, seq_impl, NV_ANY_TARGET, par_impl) |
| 64 | + |
| 65 | +#endif // NVCC device pass |
| 66 | + |
| 67 | +#else // CDPv1 unavailable. Always fallback to serial on device: |
52 | 68 |
|
53 | 69 | // Special case for NVCC -- need to inform the device path about the kernels |
54 | 70 | // that are launched from the host path. |
|
62 | 78 | } \ |
63 | 79 | NV_IF_TARGET(NV_IS_HOST, par_impl, seq_impl) |
64 | 80 |
|
65 | | -#else // NVCC device pass |
| 81 | +#else // !(NVCC device pass): |
66 | 82 |
|
67 | 83 | #define THRUST_CDP_DISPATCH(par_impl, seq_impl) \ |
68 | 84 | NV_IF_TARGET(NV_IS_HOST, par_impl, seq_impl) |
69 | 85 |
|
70 | 86 | #endif // NVCC device pass |
71 | 87 |
|
72 | | -#endif // THRUST_RDC_ENABLED |
| 88 | +#endif // CDP version |
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