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matborzyszkowskiigcbot
matborzyszkowski
authored and
igcbot
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Add subgroup_block_prefetch functions to cth_pre_release file
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‎IGC/BiFModule/Languages/OpenCL/PreRelease/opencl_cth_pre_release.h‎

Lines changed: 368 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3294,8 +3294,12 @@ uint8 intel_subgroup_block_read_transform_u16_k16(
32943294
__global void* base_address, int width, int height, int pitch, int2 coord);
32953295
uint8 intel_subgroup_block_read_transpose_u32_k8(
32963296
__global void* base_address, int width, int height, int pitch, int2 coord);
3297+
uint16 intel_subgroup_block_read_transpose_u32_k16(
3298+
__global void* base_address, int width, int height, int pitch, int2 coord);
32973299
ulong4 intel_subgroup_block_read_transpose_u64_k4(
32983300
__global void* base_address, int width, int height, int pitch, int2 coord);
3301+
ulong8 intel_subgroup_block_read_transpose_u64_k8(
3302+
__global void* base_address, int width, int height, int pitch, int2 coord);
32993303

33003304
#endif //defined(cl_intel_subgroup_extended_block_read)
33013305

@@ -3315,6 +3319,370 @@ typedef enum
33153319
} intel_read_cache_control;
33163320
#endif // READ_CACHE_CONTROL_TYPE
33173321

3322+
uint16 intel_subgroup_block_read_cacheopts_transpose_u32_k16(
3323+
__global void* base_address,
3324+
int width,
3325+
int height,
3326+
int pitch,
3327+
int2 coord,
3328+
intel_read_cache_control cache_control);
3329+
ulong8 intel_subgroup_block_read_cacheopts_transpose_u64_k8(
3330+
__global void* base_address,
3331+
int width,
3332+
int height,
3333+
int pitch,
3334+
int2 coord,
3335+
intel_read_cache_control cache_control);
3336+
void intel_subgroup_block_prefetch_transpose_u32_k16(
3337+
__global void* base_address,
3338+
int width,
3339+
int height,
3340+
int pitch,
3341+
int2 coord,
3342+
intel_read_cache_control cache_control);
3343+
void intel_subgroup_block_prefetch_transpose_u64_k8(
3344+
__global void* base_address,
3345+
int width,
3346+
int height,
3347+
int pitch,
3348+
int2 coord,
3349+
intel_read_cache_control cache_control);
3350+
void intel_subgroup_block_prefetch_u8_m1k64v4(
3351+
__global void* base_address,
3352+
int width,
3353+
int height,
3354+
int pitch,
3355+
int2 coord,
3356+
intel_read_cache_control cache_control);
3357+
void intel_subgroup_block_prefetch_u8_m1k128v2(
3358+
__global void* base_address,
3359+
int width,
3360+
int height,
3361+
int pitch,
3362+
int2 coord,
3363+
intel_read_cache_control cache_control);
3364+
void intel_subgroup_block_prefetch_u8_m1k256v1(
3365+
__global void* base_address,
3366+
int width,
3367+
int height,
3368+
int pitch,
3369+
int2 coord,
3370+
intel_read_cache_control cache_control);
3371+
void intel_subgroup_block_prefetch_u8_m2k64v4(
3372+
__global void* base_address,
3373+
int width,
3374+
int height,
3375+
int pitch,
3376+
int2 coord,
3377+
intel_read_cache_control cache_control);
3378+
void intel_subgroup_block_prefetch_u8_m2k128v2(
3379+
__global void* base_address,
3380+
int width,
3381+
int height,
3382+
int pitch,
3383+
int2 coord,
3384+
intel_read_cache_control cache_control);
3385+
void intel_subgroup_block_prefetch_u8_m2k256v1(
3386+
__global void* base_address,
3387+
int width,
3388+
int height,
3389+
int pitch,
3390+
int2 coord,
3391+
intel_read_cache_control cache_control);
3392+
void intel_subgroup_block_prefetch_u8_m4k64v4(
3393+
__global void* base_address,
3394+
int width,
3395+
int height,
3396+
int pitch,
3397+
int2 coord,
3398+
intel_read_cache_control cache_control);
3399+
void intel_subgroup_block_prefetch_u8_m4k128v2(
3400+
__global void* base_address,
3401+
int width,
3402+
int height,
3403+
int pitch,
3404+
int2 coord,
3405+
intel_read_cache_control cache_control);
3406+
void intel_subgroup_block_prefetch_u8_m4k256v1(
3407+
__global void* base_address,
3408+
int width,
3409+
int height,
3410+
int pitch,
3411+
int2 coord,
3412+
intel_read_cache_control cache_control);
3413+
void intel_subgroup_block_prefetch_u8_m8k64v4(
3414+
__global void* base_address,
3415+
int width,
3416+
int height,
3417+
int pitch,
3418+
int2 coord,
3419+
intel_read_cache_control cache_control);
3420+
void intel_subgroup_block_prefetch_u8_m8k128v2(
3421+
__global void* base_address,
3422+
int width,
3423+
int height,
3424+
int pitch,
3425+
int2 coord,
3426+
intel_read_cache_control cache_control);
3427+
void intel_subgroup_block_prefetch_u8_m8k256v1(
3428+
__global void* base_address,
3429+
int width,
3430+
int height,
3431+
int pitch,
3432+
int2 coord,
3433+
intel_read_cache_control cache_control);
3434+
void intel_subgroup_block_prefetch_u16_m1k32v4(
3435+
__global void* base_address,
3436+
int width,
3437+
int height,
3438+
int pitch,
3439+
int2 coord,
3440+
intel_read_cache_control cache_control);
3441+
void intel_subgroup_block_prefetch_u16_m1k64v2(
3442+
__global void* base_address,
3443+
int width,
3444+
int height,
3445+
int pitch,
3446+
int2 coord,
3447+
intel_read_cache_control cache_control);
3448+
void intel_subgroup_block_prefetch_u16_m1k128v1(
3449+
__global void* base_address,
3450+
int width,
3451+
int height,
3452+
int pitch,
3453+
int2 coord,
3454+
intel_read_cache_control cache_control);
3455+
void intel_subgroup_block_prefetch_u16_m2k32v4(
3456+
__global void* base_address,
3457+
int width,
3458+
int height,
3459+
int pitch,
3460+
int2 coord,
3461+
intel_read_cache_control cache_control);
3462+
void intel_subgroup_block_prefetch_u16_m2k64v2(
3463+
__global void* base_address,
3464+
int width,
3465+
int height,
3466+
int pitch,
3467+
int2 coord,
3468+
intel_read_cache_control cache_control);
3469+
void intel_subgroup_block_prefetch_u16_m2k128v1(
3470+
__global void* base_address,
3471+
int width,
3472+
int height,
3473+
int pitch,
3474+
int2 coord,
3475+
intel_read_cache_control cache_control);
3476+
void intel_subgroup_block_prefetch_u16_m4k32v4(
3477+
__global void* base_address,
3478+
int width,
3479+
int height,
3480+
int pitch,
3481+
int2 coord,
3482+
intel_read_cache_control cache_control);
3483+
void intel_subgroup_block_prefetch_u16_m4k64v2(
3484+
__global void* base_address,
3485+
int width,
3486+
int height,
3487+
int pitch,
3488+
int2 coord,
3489+
intel_read_cache_control cache_control);
3490+
void intel_subgroup_block_prefetch_u16_m4k128v1(
3491+
__global void* base_address,
3492+
int width,
3493+
int height,
3494+
int pitch,
3495+
int2 coord,
3496+
intel_read_cache_control cache_control);
3497+
void intel_subgroup_block_prefetch_u16_m8k32v4(
3498+
__global void* base_address,
3499+
int width,
3500+
int height,
3501+
int pitch,
3502+
int2 coord,
3503+
intel_read_cache_control cache_control);
3504+
void intel_subgroup_block_prefetch_u16_m8k64v2(
3505+
__global void* base_address,
3506+
int width,
3507+
int height,
3508+
int pitch,
3509+
int2 coord,
3510+
intel_read_cache_control cache_control);
3511+
void intel_subgroup_block_prefetch_u16_m8k128v1(
3512+
__global void* base_address,
3513+
int width,
3514+
int height,
3515+
int pitch,
3516+
int2 coord,
3517+
intel_read_cache_control cache_control);
3518+
void intel_subgroup_block_prefetch_u32_m1k16v4(
3519+
__global void* base_address,
3520+
int width,
3521+
int height,
3522+
int pitch,
3523+
int2 coord,
3524+
intel_read_cache_control cache_control);
3525+
void intel_subgroup_block_prefetch_u32_m1k32v2(
3526+
__global void* base_address,
3527+
int width,
3528+
int height,
3529+
int pitch,
3530+
int2 coord,
3531+
intel_read_cache_control cache_control);
3532+
void intel_subgroup_block_prefetch_u32_m1k64v1(
3533+
__global void* base_address,
3534+
int width,
3535+
int height,
3536+
int pitch,
3537+
int2 coord,
3538+
intel_read_cache_control cache_control);
3539+
void intel_subgroup_block_prefetch_u32_m2k16v4(
3540+
__global void* base_address,
3541+
int width,
3542+
int height,
3543+
int pitch,
3544+
int2 coord,
3545+
intel_read_cache_control cache_control);
3546+
void intel_subgroup_block_prefetch_u32_m2k32v2(
3547+
__global void* base_address,
3548+
int width,
3549+
int height,
3550+
int pitch,
3551+
int2 coord,
3552+
intel_read_cache_control cache_control);
3553+
void intel_subgroup_block_prefetch_u32_m2k64v1(
3554+
__global void* base_address,
3555+
int width,
3556+
int height,
3557+
int pitch,
3558+
int2 coord,
3559+
intel_read_cache_control cache_control);
3560+
void intel_subgroup_block_prefetch_u32_m4k16v4(
3561+
__global void* base_address,
3562+
int width,
3563+
int height,
3564+
int pitch,
3565+
int2 coord,
3566+
intel_read_cache_control cache_control);
3567+
void intel_subgroup_block_prefetch_u32_m4k32v2(
3568+
__global void* base_address,
3569+
int width,
3570+
int height,
3571+
int pitch,
3572+
int2 coord,
3573+
intel_read_cache_control cache_control);
3574+
void intel_subgroup_block_prefetch_u32_m4k64v1(
3575+
__global void* base_address,
3576+
int width,
3577+
int height,
3578+
int pitch,
3579+
int2 coord,
3580+
intel_read_cache_control cache_control);
3581+
void intel_subgroup_block_prefetch_u32_m8k16v4(
3582+
__global void* base_address,
3583+
int width,
3584+
int height,
3585+
int pitch,
3586+
int2 coord,
3587+
intel_read_cache_control cache_control);
3588+
void intel_subgroup_block_prefetch_u32_m8k32v2(
3589+
__global void* base_address,
3590+
int width,
3591+
int height,
3592+
int pitch,
3593+
int2 coord,
3594+
intel_read_cache_control cache_control);
3595+
void intel_subgroup_block_prefetch_u32_m8k64v1(
3596+
__global void* base_address,
3597+
int width,
3598+
int height,
3599+
int pitch,
3600+
int2 coord,
3601+
intel_read_cache_control cache_control);
3602+
void intel_subgroup_block_prefetch_u64_m1k8v4(
3603+
__global void* base_address,
3604+
int width,
3605+
int height,
3606+
int pitch,
3607+
int2 coord,
3608+
intel_read_cache_control cache_control);
3609+
void intel_subgroup_block_prefetch_u64_m1k16v2(
3610+
__global void* base_address,
3611+
int width,
3612+
int height,
3613+
int pitch,
3614+
int2 coord,
3615+
intel_read_cache_control cache_control);
3616+
void intel_subgroup_block_prefetch_u64_m1k32v1(
3617+
__global void* base_address,
3618+
int width,
3619+
int height,
3620+
int pitch,
3621+
int2 coord,
3622+
intel_read_cache_control cache_control);
3623+
void intel_subgroup_block_prefetch_u64_m2k8v4(
3624+
__global void* base_address,
3625+
int width,
3626+
int height,
3627+
int pitch,
3628+
int2 coord,
3629+
intel_read_cache_control cache_control);
3630+
void intel_subgroup_block_prefetch_u64_m2k16v2(
3631+
__global void* base_address,
3632+
int width,
3633+
int height,
3634+
int pitch,
3635+
int2 coord,
3636+
intel_read_cache_control cache_control);
3637+
void intel_subgroup_block_prefetch_u64_m2k32v1(
3638+
__global void* base_address,
3639+
int width,
3640+
int height,
3641+
int pitch,
3642+
int2 coord,
3643+
intel_read_cache_control cache_control);
3644+
void intel_subgroup_block_prefetch_u64_m4k8v4(
3645+
__global void* base_address,
3646+
int width,
3647+
int height,
3648+
int pitch,
3649+
int2 coord,
3650+
intel_read_cache_control cache_control);
3651+
void intel_subgroup_block_prefetch_u64_m4k16v2(
3652+
__global void* base_address,
3653+
int width,
3654+
int height,
3655+
int pitch,
3656+
int2 coord,
3657+
intel_read_cache_control cache_control);
3658+
void intel_subgroup_block_prefetch_u64_m4k32v1(
3659+
__global void* base_address,
3660+
int width,
3661+
int height,
3662+
int pitch,
3663+
int2 coord,
3664+
intel_read_cache_control cache_control);
3665+
void intel_subgroup_block_prefetch_u64_m8k8v4(
3666+
__global void* base_address,
3667+
int width,
3668+
int height,
3669+
int pitch,
3670+
int2 coord,
3671+
intel_read_cache_control cache_control);
3672+
void intel_subgroup_block_prefetch_u64_m8k16v2(
3673+
__global void* base_address,
3674+
int width,
3675+
int height,
3676+
int pitch,
3677+
int2 coord,
3678+
intel_read_cache_control cache_control);
3679+
void intel_subgroup_block_prefetch_u64_m8k32v1(
3680+
__global void* base_address,
3681+
int width,
3682+
int height,
3683+
int pitch,
3684+
int2 coord,
3685+
intel_read_cache_control cache_control);
33183686
ushort2 intel_subgroup_block_read_cacheopts_u8_m1k32v2(
33193687
__global void* base_address,
33203688
int width,

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