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Commits on May 27, 2023

• Update README.md

  TimRudy

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• Update README.md

  TimRudy

  committed
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Commits on May 10, 2023

• Update README.md banner image

  TimRudy

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• Update tests/README.md

  TimRudy

  committed
  1968855

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Commits on May 9, 2023

• Update tests/README.md, add coverage file

  TimRudy

  committed
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Commits on May 4, 2023

• Update README.md and add tests/README.md

  TimRudy

  committed
  4a25276

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Commits on Feb 6, 2023

• Improve .ice component sizing, layout, pin names

  TimRudy

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  a805332

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Commits on Jan 26, 2023

• Add .ice packaged device UART01-V combining 3 sub-modules

  TimRudy

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Commits on Jan 6, 2023

• Update test results

  TimRudy

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  efc504e

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• Fix edge case bug in the transition from stop to start

  TimRudy

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  453e51c

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Commits on Jan 4, 2023

• Add test results

  TimRudy

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  cee44e1

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• Fix err output during the transition to start

  TimRudy

  committed
  5b8197b

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• Fix sampling to be in the exact middle of start signal

  TimRudy

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  627ce97

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Commits on Dec 23, 2022

• Add stronger condition to recognize start

  TimRudy

  committed
  356e326

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• Improve the code by using shift register, not indexed access

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  TimRudy

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Commits on Dec 18, 2022

• Simplify because one state variable not actually needed

  TimRudy

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  fc64e75

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• Reorder variables

  TimRudy

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  a6324c6

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• Add test benches and fix bugs

  TimRudy

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Commits on Dec 10, 2022

• Simplify code where there is wrap-around

  TimRudy

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  f35f66b

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• Add test benches and fix bugs

  TimRudy

  committed
  85f0085

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• Reduce time to recognize start in IDLE

  TimRudy

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  bd2ffdb

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Commits on Dec 9, 2022

• Add test benches and fix bugs

  

  TimRudy

  authored and

  Tim Rudy

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Commits on Dec 6, 2022

• Change variable naming convention

  

  Tim Rudy

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  Tim Rudy

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  7bf61a9

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• Initial files

  

  Tim Rudy

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  Tim Rudy

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  b75e5e4

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Commits on Dec 2, 2022

• Initial commit

  TimRudy

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  9cf55d1

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