Add Linux riscv64 HWCAP defines

From https://elixir.bootlin.com/linux/latest/source/arch/riscv/include/uapi/asm/hwcap.h

Signed-off-by: Xeonacid <[email protected]>

Author: Xeonacid

libc-test/build.rs

@@ -3407,7 +3407,7 @@ fn test_linux(target: &str) {
     // Include linux headers at the end:
     headers! {
         cfg:
-        [loongarch64]: "asm/hwcap.h",
+        [loongarch64 || riscv64]: "asm/hwcap.h",
         "asm/mman.h",
         [gnu]: "linux/aio_abi.h",
         "linux/can.h",

libc-test/semver/linux-riscv64gc.txt

@@ -71,3 +71,10 @@ TIOCSRS485
 flock64
 fsblkcnt64_t
 fsfilcnt64_t
+COMPAT_HWCAP_ISA_I
+COMPAT_HWCAP_ISA_M
+COMPAT_HWCAP_ISA_A
+COMPAT_HWCAP_ISA_F
+COMPAT_HWCAP_ISA_D
+COMPAT_HWCAP_ISA_C
+COMPAT_HWCAP_ISA_V

src/unix/linux_like/linux/gnu/b64/riscv64/mod.rs

@@ -540,6 +540,14 @@ pub const REG_A0: usize = 10;
 pub const REG_S2: usize = 18;
 pub const REG_NARGS: usize = 8;
 
+pub const COMPAT_HWCAP_ISA_I: ::c_ulong = 1 << (b'I' - b'A');
+pub const COMPAT_HWCAP_ISA_M: ::c_ulong = 1 << (b'M' - b'A');
+pub const COMPAT_HWCAP_ISA_A: ::c_ulong = 1 << (b'A' - b'A');
+pub const COMPAT_HWCAP_ISA_F: ::c_ulong = 1 << (b'F' - b'A');
+pub const COMPAT_HWCAP_ISA_D: ::c_ulong = 1 << (b'D' - b'A');
+pub const COMPAT_HWCAP_ISA_C: ::c_ulong = 1 << (b'C' - b'A');
+pub const COMPAT_HWCAP_ISA_V: ::c_ulong = 1 << (b'V' - b'A');
+
 pub const SYS_read: ::c_long = 63;
 pub const SYS_write: ::c_long = 64;
 pub const SYS_close: ::c_long = 57;