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GD32F1 MCU Protocol Analysis

Overview

This directory contains research and documentation for reverse engineering the communication protocol between the Allwinner A33 main processor and the GigaDevice GD32F103VCT6 microcontroller in the 3irobotix CRL-200S vacuum robot.

Implementation: This protocol has been fully implemented in VacuumTiger as part of the CRL-200S driver.

📚 Protocol Documentation

Primary (Verified)

Supporting Documentation

Implementation

Hardware Details

GD32F103VCT6 MCU

  • Core: ARM Cortex-M3 @ 108 MHz
  • RAM: 48 KB
  • Flash: 256 KB
  • Location: U1 on motherboard
  • Datasheet: GigaDevice GD32F103

Allwinner A33 SoC

  • Core: ARM Cortex-A7 Quad-Core
  • Interfaces: 5x UART, 4x I2C (TWI), SPI, PWM
  • Location: U23 on motherboard
  • Datasheet: Allwinner A33

Communication Interface (VERIFIED)

Protocol: UART (verified via serial MITM capture)

  • Port: /dev/ttyS3 (UART3 on A33)
  • Baud Rate: 115200
  • Format: 8N1 (8 data bits, no parity, 1 stop bit)
  • Mode: Bidirectional (A33↔GD32)
  • Packet Format: FA FB [LEN] [CMD] [DATA...] [CRC]

See Connection Evidence for hardware connection analysis.

References

Hardware

Software