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jkotasjakobbotsch
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Fix use of uninitialized memory for Vector3 constants (#74857)
* Fix use of uninitialized memory for Vector3 constants Co-authored-by: Jakob Botsch Nielsen <Jakob.botsch.nielsen@gmail.com>
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3 files changed

+23
-5
lines changed

3 files changed

+23
-5
lines changed

src/coreclr/jit/codegenarm64.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2412,8 +2412,14 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
24122412
// Get a temp integer register to compute long address.
24132413
regNumber addrReg = tree->GetSingleTempReg();
24142414

2415-
simd16_t constValue = vecCon->gtSimd16Val;
2416-
CORINFO_FIELD_HANDLE hnd = emit->emitSimd16Const(constValue);
2415+
simd16_t constValue = {};
2416+
2417+
if (vecCon->TypeIs(TYP_SIMD12))
2418+
memcpy(&constValue, &vecCon->gtSimd12Val, sizeof(simd12_t));
2419+
else
2420+
constValue = vecCon->gtSimd16Val;
2421+
2422+
CORINFO_FIELD_HANDLE hnd = emit->emitSimd16Const(constValue);
24172423

24182424
emit->emitIns_R_C(INS_ldr, attr, targetReg, addrReg, hnd, 0);
24192425
}

src/coreclr/jit/codegenxarch.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -561,8 +561,14 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
561561
case TYP_SIMD12:
562562
case TYP_SIMD16:
563563
{
564-
simd16_t constValue = vecCon->gtSimd16Val;
565-
CORINFO_FIELD_HANDLE hnd = emit->emitSimd16Const(constValue);
564+
simd16_t constValue = {};
565+
566+
if (vecCon->TypeIs(TYP_SIMD12))
567+
memcpy(&constValue, &vecCon->gtSimd12Val, sizeof(simd12_t));
568+
else
569+
constValue = vecCon->gtSimd16Val;
570+
571+
CORINFO_FIELD_HANDLE hnd = emit->emitSimd16Const(constValue);
566572

567573
emit->emitIns_R_C(ins_Load(targetType), attr, targetReg, hnd, 0);
568574
break;

src/coreclr/jit/instr.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -765,7 +765,13 @@ CodeGen::OperandDesc CodeGen::genOperandDesc(GenTree* op)
765765
case TYP_SIMD12:
766766
case TYP_SIMD16:
767767
{
768-
simd16_t constValue = op->AsVecCon()->gtSimd16Val;
768+
simd16_t constValue = {};
769+
770+
if (op->TypeIs(TYP_SIMD12))
771+
memcpy(&constValue, &op->AsVecCon()->gtSimd12Val, sizeof(simd12_t));
772+
else
773+
constValue = op->AsVecCon()->gtSimd16Val;
774+
769775
return OperandDesc(emit->emitSimd16Const(constValue));
770776
}
771777

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