From 76c0d0766a7d88f34107858993973cbc7a6f8955 Mon Sep 17 00:00:00 2001 From: Tanner Gooding Date: Thu, 2 Jun 2022 12:58:24 -0700 Subject: [PATCH 1/3] Ensure that GT_CNS_VEC is handled in LinearScan::isMatchingConstant --- src/coreclr/jit/lsra.cpp | 7 +++++++ src/coreclr/jit/lsraxarch.cpp | 1 + 2 files changed, 8 insertions(+) diff --git a/src/coreclr/jit/lsra.cpp b/src/coreclr/jit/lsra.cpp index deb97db21bc43a..38921927f20913 100644 --- a/src/coreclr/jit/lsra.cpp +++ b/src/coreclr/jit/lsra.cpp @@ -2695,6 +2695,7 @@ bool LinearScan::isMatchingConstant(RegRecord* physRegRecord, RefPosition* refPo } break; } + case GT_CNS_DBL: { // For floating point constants, the values must be identical, not simply compare @@ -2706,6 +2707,12 @@ bool LinearScan::isMatchingConstant(RegRecord* physRegRecord, RefPosition* refPo } break; } + + case GT_CNS_VEC: + { + return GenTreeVecCon::Equals(refPosition->treeNode->AsVecCon(), otherTreeNode->AsVecCon()); + } + default: break; } diff --git a/src/coreclr/jit/lsraxarch.cpp b/src/coreclr/jit/lsraxarch.cpp index f85ad2aa72b926..5386ed5769558c 100644 --- a/src/coreclr/jit/lsraxarch.cpp +++ b/src/coreclr/jit/lsraxarch.cpp @@ -147,6 +147,7 @@ int LinearScan::BuildNode(GenTree* tree) case GT_CNS_INT: case GT_CNS_LNG: case GT_CNS_DBL: + case GT_CNS_VEC: { srcCount = 0; assert(dstCount == 1); From fe98a78060ff32f44f54b5c45996b3cac50945b2 Mon Sep 17 00:00:00 2001 From: Tanner Gooding Date: Thu, 2 Jun 2022 13:48:19 -0700 Subject: [PATCH 2/3] Ensure an Arm64 assert includes GT_CNS_VEC --- src/coreclr/jit/codegenarmarch.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/codegenarmarch.cpp b/src/coreclr/jit/codegenarmarch.cpp index a486b59f496466..2c9585ddb382b3 100644 --- a/src/coreclr/jit/codegenarmarch.cpp +++ b/src/coreclr/jit/codegenarmarch.cpp @@ -144,7 +144,7 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode) if (treeNode->IsReuseRegVal()) { // For now, this is only used for constant nodes. - assert((treeNode->OperGet() == GT_CNS_INT) || (treeNode->OperGet() == GT_CNS_DBL)); + assert((treeNode->OperGet() == GT_CNS_INT) || (treeNode->OperGet() == GT_CNS_DBL) || (treeNode->OperGet() == GT_CNS_VEC)); JITDUMP(" TreeNode is marked ReuseReg\n"); return; } From 0e08fd7588ff481aca9bb9d53f2b5aabff0adebb Mon Sep 17 00:00:00 2001 From: Tanner Gooding Date: Thu, 2 Jun 2022 15:34:58 -0700 Subject: [PATCH 3/3] Update src/coreclr/jit/codegenarmarch.cpp Co-authored-by: Egor Bogatov --- src/coreclr/jit/codegenarmarch.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/codegenarmarch.cpp b/src/coreclr/jit/codegenarmarch.cpp index 2c9585ddb382b3..a706893053fd57 100644 --- a/src/coreclr/jit/codegenarmarch.cpp +++ b/src/coreclr/jit/codegenarmarch.cpp @@ -144,7 +144,7 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode) if (treeNode->IsReuseRegVal()) { // For now, this is only used for constant nodes. - assert((treeNode->OperGet() == GT_CNS_INT) || (treeNode->OperGet() == GT_CNS_DBL) || (treeNode->OperGet() == GT_CNS_VEC)); + assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL, GT_CNS_VEC)); JITDUMP(" TreeNode is marked ReuseReg\n"); return; }