Skip to content

Commit 3e3869d

Browse files
committed
Rename
1 parent 64e6e4b commit 3e3869d

File tree

12 files changed

+83
-80
lines changed

12 files changed

+83
-80
lines changed

esp-hal/CHANGELOG.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
1313
- Added `set_priority` to the `DmaChannel` trait on GDMA devices (#2403, #2526)
1414
- Added `into_async` and `into_blocking` functions for `ParlIoTxOnly`, `ParlIoRxOnly` (#2526)
1515
- ESP32-C6, H2, S3: Added `split` function to the `DmaChannel` trait. (#2526, #2532)
16-
- DMA: `CompatibleWith` traits and `ChannelFor` type aliasses to improve usability. (#2532)
16+
- DMA: `PeripheralDmaChannel` type aliasses and `DmaChannelFor` traits to improve usability. (#2532)
1717

1818
### Changed
1919

esp-hal/MIGRATING-0.22.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ fn new_foo<'d, T, CH>(
6666
)
6767
where
6868
T: SomePeripheralInstance,
69-
CH: CompatibleWith<T>,
69+
CH: DmaChannelFor<T>,
7070
{
7171
// Optionally: dma_channel.set_priority(DmaPriority::Priority2);
7272

@@ -84,7 +84,7 @@ If you are writing a driver and need to store a channel in a structure, you can
8484
```diff
8585
struct Aes<'d> {
8686
- channel: ChannelTx<'d, Blocking, <AES as DmaEligible>::Dma>,
87-
+ channel: ChannelTx<'d, Blocking, TxChannelFor<AES>>,
87+
+ channel: ChannelTx<'d, Blocking, PeripheralTxChannel<AES>>,
8888
}
8989
```
9090

esp-hal/src/aes/mod.rs

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -240,17 +240,17 @@ pub mod dma {
240240
Channel,
241241
ChannelRx,
242242
ChannelTx,
243-
CompatibleWith,
244243
DescriptorChain,
245244
DmaChannelFor,
246245
DmaDescriptor,
247246
DmaPeripheral,
248247
DmaTransferRxTx,
248+
PeripheralDmaChannel,
249+
PeripheralRxChannel,
250+
PeripheralTxChannel,
249251
ReadBuffer,
250252
Rx,
251-
RxChannelFor,
252253
Tx,
253-
TxChannelFor,
254254
WriteBuffer,
255255
},
256256
peripheral::Peripheral,
@@ -281,7 +281,7 @@ pub mod dma {
281281
/// The underlying [`Aes`](super::Aes) driver
282282
pub aes: super::Aes<'d>,
283283

284-
channel: Channel<'d, Blocking, DmaChannelFor<AES>>,
284+
channel: Channel<'d, Blocking, PeripheralDmaChannel<AES>>,
285285
rx_chain: DescriptorChain,
286286
tx_chain: DescriptorChain,
287287
}
@@ -295,7 +295,7 @@ pub mod dma {
295295
tx_descriptors: &'static mut [DmaDescriptor],
296296
) -> AesDma<'d>
297297
where
298-
CH: CompatibleWith<AES>,
298+
CH: DmaChannelFor<AES>,
299299
{
300300
let channel = Channel::new(channel.map(|ch| ch.degrade()));
301301
channel.runtime_ensure_compatible(&self.aes);
@@ -331,7 +331,7 @@ pub mod dma {
331331
}
332332

333333
impl<'d> DmaSupportTx for AesDma<'d> {
334-
type TX = ChannelTx<'d, Blocking, TxChannelFor<AES>>;
334+
type TX = ChannelTx<'d, Blocking, PeripheralTxChannel<AES>>;
335335

336336
fn tx(&mut self) -> &mut Self::TX {
337337
&mut self.channel.tx
@@ -343,7 +343,7 @@ pub mod dma {
343343
}
344344

345345
impl<'d> DmaSupportRx for AesDma<'d> {
346-
type RX = ChannelRx<'d, Blocking, RxChannelFor<AES>>;
346+
type RX = ChannelRx<'d, Blocking, PeripheralRxChannel<AES>>;
347347

348348
fn rx(&mut self) -> &mut Self::RX {
349349
&mut self.channel.rx

esp-hal/src/dma/mod.rs

Lines changed: 19 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1587,11 +1587,11 @@ macro_rules! impl_dma_eligible {
15871587
}
15881588

15891589
/// Helper type to get the DMA (Rx and Tx) channel for a peripheral.
1590-
pub type DmaChannelFor<T> = <T as DmaEligible>::Dma;
1590+
pub type PeripheralDmaChannel<T> = <T as DmaEligible>::Dma;
15911591
/// Helper type to get the DMA Rx channel for a peripheral.
1592-
pub type RxChannelFor<T> = <DmaChannelFor<T> as DmaChannel>::Rx;
1592+
pub type PeripheralRxChannel<T> = <PeripheralDmaChannel<T> as DmaChannel>::Rx;
15931593
/// Helper type to get the DMA Tx channel for a peripheral.
1594-
pub type TxChannelFor<T> = <DmaChannelFor<T> as DmaChannel>::Tx;
1594+
pub type PeripheralTxChannel<T> = <PeripheralDmaChannel<T> as DmaChannel>::Tx;
15951595

15961596
#[doc(hidden)]
15971597
pub trait DmaRxChannel:
@@ -1676,7 +1676,7 @@ impl<DEG: DmaChannel> DmaChannelConvert<DEG> for DEG {
16761676
/// ```rust,no_run
16771677
#[doc = crate::before_snippet!()]
16781678
/// use esp_hal::spi::master::{Spi, SpiDma, Config, Instance as SpiInstance};
1679-
/// use esp_hal::dma::CompatibleWith;
1679+
/// use esp_hal::dma::DmaChannelFor;
16801680
/// use esp_hal::peripheral::Peripheral;
16811681
/// use esp_hal::Blocking;
16821682
/// use esp_hal::dma::Dma;
@@ -1687,7 +1687,7 @@ impl<DEG: DmaChannel> DmaChannelConvert<DEG> for DEG {
16871687
/// ) -> SpiDma<'d, Blocking, S>
16881688
/// where
16891689
/// S: SpiInstance,
1690-
/// CH: CompatibleWith<S> + 'd,
1690+
/// CH: DmaChannelFor<S> + 'd,
16911691
/// {
16921692
/// spi.with_dma(channel)
16931693
/// }
@@ -1704,41 +1704,44 @@ impl<DEG: DmaChannel> DmaChannelConvert<DEG> for DEG {
17041704
/// let spi_dma = configures_spi_dma(spi, dma_channel);
17051705
/// # }
17061706
/// ```
1707-
pub trait CompatibleWith<P: DmaEligible>: DmaChannel + DmaChannelConvert<DmaChannelFor<P>> {}
1708-
impl<P, CH> CompatibleWith<P> for CH
1707+
pub trait DmaChannelFor<P: DmaEligible>:
1708+
DmaChannel + DmaChannelConvert<PeripheralDmaChannel<P>>
1709+
{
1710+
}
1711+
impl<P, CH> DmaChannelFor<P> for CH
17091712
where
17101713
P: DmaEligible,
1711-
CH: DmaChannel + DmaChannelConvert<DmaChannelFor<P>>,
1714+
CH: DmaChannel + DmaChannelConvert<PeripheralDmaChannel<P>>,
17121715
{
17131716
}
17141717

17151718
/// Trait implemented for the RX half of split DMA channels that are compatible
17161719
/// with a particular peripheral. Accepts complete DMA channels or split halves.
17171720
///
1718-
/// This trait is similar in use to [`CompatibleWith`].
1721+
/// This trait is similar in use to [`DmaChannelFor`].
17191722
///
17201723
/// You can use this in places where a peripheral driver would expect a
17211724
/// `DmaRxChannel` implementation.
1722-
pub trait RxCompatibleWith<P: DmaEligible>: DmaChannelConvert<RxChannelFor<P>> {}
1723-
impl<P, RX> RxCompatibleWith<P> for RX
1725+
pub trait RxChannelFor<P: DmaEligible>: DmaChannelConvert<PeripheralRxChannel<P>> {}
1726+
impl<P, RX> RxChannelFor<P> for RX
17241727
where
17251728
P: DmaEligible,
1726-
RX: DmaChannelConvert<RxChannelFor<P>>,
1729+
RX: DmaChannelConvert<PeripheralRxChannel<P>>,
17271730
{
17281731
}
17291732

17301733
/// Trait implemented for the TX half of split DMA channels that are compatible
17311734
/// with a particular peripheral. Accepts complete DMA channels or split halves.
17321735
///
1733-
/// This trait is similar in use to [`CompatibleWith`].
1736+
/// This trait is similar in use to [`DmaChannelFor`].
17341737
///
17351738
/// You can use this in places where a peripheral driver would expect a
17361739
/// `DmaTxChannel` implementation.
1737-
pub trait TxCompatibleWith<PER: DmaEligible>: DmaChannelConvert<TxChannelFor<PER>> {}
1738-
impl<P, TX> TxCompatibleWith<P> for TX
1740+
pub trait TxChannelFor<PER: DmaEligible>: DmaChannelConvert<PeripheralTxChannel<PER>> {}
1741+
impl<P, TX> TxChannelFor<P> for TX
17391742
where
17401743
P: DmaEligible,
1741-
TX: DmaChannelConvert<TxChannelFor<P>>,
1744+
TX: DmaChannelConvert<PeripheralTxChannel<P>>,
17421745
{
17431746
}
17441747

esp-hal/src/i2s/master.rs

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,6 @@ use crate::{
8080
Channel,
8181
ChannelRx,
8282
ChannelTx,
83-
CompatibleWith,
8483
DescriptorChain,
8584
DmaChannelFor,
8685
DmaDescriptor,
@@ -90,11 +89,12 @@ use crate::{
9089
DmaTransferRxCircular,
9190
DmaTransferTx,
9291
DmaTransferTxCircular,
92+
PeripheralDmaChannel,
93+
PeripheralRxChannel,
94+
PeripheralTxChannel,
9395
ReadBuffer,
9496
Rx,
95-
RxChannelFor,
9697
Tx,
97-
TxChannelFor,
9898
WriteBuffer,
9999
},
100100
gpio::interconnect::PeripheralOutput,
@@ -271,7 +271,7 @@ where
271271
standard: Standard,
272272
data_format: DataFormat,
273273
sample_rate: impl Into<fugit::HertzU32>,
274-
channel: PeripheralRef<'d, DmaChannelFor<T>>,
274+
channel: PeripheralRef<'d, PeripheralDmaChannel<T>>,
275275
rx_descriptors: &'static mut [DmaDescriptor],
276276
tx_descriptors: &'static mut [DmaDescriptor],
277277
) -> Self {
@@ -377,7 +377,7 @@ impl<'d> I2s<'d, Blocking> {
377377
tx_descriptors: &'static mut [DmaDescriptor],
378378
) -> Self
379379
where
380-
CH: CompatibleWith<AnyI2s>,
380+
CH: DmaChannelFor<AnyI2s>,
381381
{
382382
Self::new_typed(
383383
i2s.map_into(),
@@ -408,7 +408,7 @@ where
408408
tx_descriptors: &'static mut [DmaDescriptor],
409409
) -> Self
410410
where
411-
CH: CompatibleWith<T>,
411+
CH: DmaChannelFor<T>,
412412
{
413413
crate::into_ref!(i2s);
414414
Self::new_internal(
@@ -463,7 +463,7 @@ where
463463
DmaMode: Mode,
464464
{
465465
i2s: PeripheralRef<'d, T>,
466-
tx_channel: ChannelTx<'d, DmaMode, TxChannelFor<T>>,
466+
tx_channel: ChannelTx<'d, DmaMode, PeripheralTxChannel<T>>,
467467
tx_chain: DescriptorChain,
468468
_guard: PeripheralGuard,
469469
}
@@ -497,7 +497,7 @@ where
497497
T: RegisterAccess,
498498
DmaMode: Mode,
499499
{
500-
type TX = ChannelTx<'d, DmaMode, TxChannelFor<T>>;
500+
type TX = ChannelTx<'d, DmaMode, PeripheralTxChannel<T>>;
501501

502502
fn tx(&mut self) -> &mut Self::TX {
503503
&mut self.tx_channel
@@ -596,7 +596,7 @@ where
596596
DmaMode: Mode,
597597
{
598598
i2s: PeripheralRef<'d, T>,
599-
rx_channel: ChannelRx<'d, DmaMode, RxChannelFor<T>>,
599+
rx_channel: ChannelRx<'d, DmaMode, PeripheralRxChannel<T>>,
600600
rx_chain: DescriptorChain,
601601
_guard: PeripheralGuard,
602602
}
@@ -630,7 +630,7 @@ where
630630
T: RegisterAccess,
631631
DmaMode: Mode,
632632
{
633-
type RX = ChannelRx<'d, DmaMode, RxChannelFor<T>>;
633+
type RX = ChannelRx<'d, DmaMode, PeripheralRxChannel<T>>;
634634

635635
fn rx(&mut self) -> &mut Self::RX {
636636
&mut self.rx_channel
@@ -766,7 +766,7 @@ mod private {
766766
M: Mode,
767767
{
768768
pub i2s: PeripheralRef<'d, T>,
769-
pub tx_channel: ChannelTx<'d, M, TxChannelFor<T>>,
769+
pub tx_channel: ChannelTx<'d, M, PeripheralTxChannel<T>>,
770770
pub descriptors: &'static mut [DmaDescriptor],
771771
pub(crate) guard: PeripheralGuard,
772772
}
@@ -826,7 +826,7 @@ mod private {
826826
M: Mode,
827827
{
828828
pub i2s: PeripheralRef<'d, T>,
829-
pub rx_channel: ChannelRx<'d, M, RxChannelFor<T>>,
829+
pub rx_channel: ChannelRx<'d, M, PeripheralRxChannel<T>>,
830830
pub descriptors: &'static mut [DmaDescriptor],
831831
pub(crate) guard: PeripheralGuard,
832832
}

esp-hal/src/i2s/parallel.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -46,13 +46,13 @@ use crate::{
4646
asynch::DmaTxFuture,
4747
Channel,
4848
ChannelTx,
49-
CompatibleWith,
49+
DmaChannelFor,
5050
DmaEligible,
5151
DmaError,
5252
DmaPeripheral,
5353
DmaTxBuffer,
54+
PeripheralTxChannel,
5455
Tx,
55-
TxChannelFor,
5656
},
5757
gpio::{
5858
interconnect::{OutputConnection, PeripheralOutput},
@@ -178,7 +178,7 @@ where
178178
I: Instance,
179179
{
180180
instance: PeripheralRef<'d, I>,
181-
tx_channel: ChannelTx<'d, DM, TxChannelFor<I>>,
181+
tx_channel: ChannelTx<'d, DM, PeripheralTxChannel<I>>,
182182
_guard: PeripheralGuard,
183183
}
184184

@@ -192,7 +192,7 @@ impl<'d> I2sParallel<'d, Blocking> {
192192
clock_pin: impl Peripheral<P = impl PeripheralOutput> + 'd,
193193
) -> Self
194194
where
195-
CH: CompatibleWith<AnyI2s>,
195+
CH: DmaChannelFor<AnyI2s>,
196196
{
197197
Self::new_typed(i2s.map_into(), channel, frequency, pins, clock_pin)
198198
}
@@ -211,7 +211,7 @@ where
211211
clock_pin: impl Peripheral<P = impl PeripheralOutput> + 'd,
212212
) -> Self
213213
where
214-
CH: CompatibleWith<I>,
214+
CH: DmaChannelFor<I>,
215215
{
216216
crate::into_ref!(i2s);
217217
crate::into_mapped_ref!(clock_pin);

esp-hal/src/lcd_cam/cam.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ use fugit::HertzU32;
6767

6868
use crate::{
6969
clock::Clocks,
70-
dma::{ChannelRx, DmaError, DmaPeripheral, DmaRxBuffer, Rx, RxChannelFor, RxCompatibleWith},
70+
dma::{ChannelRx, DmaError, DmaPeripheral, DmaRxBuffer, PeripheralRxChannel, Rx, RxChannelFor},
7171
gpio::{
7272
interconnect::{PeripheralInput, PeripheralOutput},
7373
InputSignal,
@@ -123,7 +123,7 @@ pub struct Cam<'d> {
123123
/// Represents the camera interface with DMA support.
124124
pub struct Camera<'d> {
125125
lcd_cam: PeripheralRef<'d, LCD_CAM>,
126-
rx_channel: ChannelRx<'d, Blocking, RxChannelFor<LCD_CAM>>,
126+
rx_channel: ChannelRx<'d, Blocking, PeripheralRxChannel<LCD_CAM>>,
127127
_guard: GenericPeripheralGuard<{ system::Peripheral::LcdCam as u8 }>,
128128
}
129129

@@ -136,7 +136,7 @@ impl<'d> Camera<'d> {
136136
frequency: HertzU32,
137137
) -> Self
138138
where
139-
CH: RxCompatibleWith<LCD_CAM>,
139+
CH: RxChannelFor<LCD_CAM>,
140140
P: RxPins,
141141
{
142142
let rx_channel = ChannelRx::new(channel.map(|ch| ch.degrade()));

esp-hal/src/lcd_cam/lcd/dpi.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -106,7 +106,7 @@ use fugit::HertzU32;
106106

107107
use crate::{
108108
clock::Clocks,
109-
dma::{ChannelTx, DmaError, DmaPeripheral, DmaTxBuffer, Tx, TxChannelFor, TxCompatibleWith},
109+
dma::{ChannelTx, DmaError, DmaPeripheral, DmaTxBuffer, PeripheralTxChannel, Tx, TxChannelFor},
110110
gpio::{interconnect::PeripheralOutput, Level, OutputSignal},
111111
lcd_cam::{
112112
calculate_clkm,
@@ -123,7 +123,7 @@ use crate::{
123123
/// Represents the RGB LCD interface.
124124
pub struct Dpi<'d, DM: Mode> {
125125
lcd_cam: PeripheralRef<'d, LCD_CAM>,
126-
tx_channel: ChannelTx<'d, Blocking, TxChannelFor<LCD_CAM>>,
126+
tx_channel: ChannelTx<'d, Blocking, PeripheralTxChannel<LCD_CAM>>,
127127
_mode: PhantomData<DM>,
128128
}
129129

@@ -139,7 +139,7 @@ where
139139
config: Config,
140140
) -> Self
141141
where
142-
CH: TxCompatibleWith<LCD_CAM>,
142+
CH: TxChannelFor<LCD_CAM>,
143143
{
144144
let tx_channel = ChannelTx::new(channel.map(|ch| ch.degrade()));
145145
let lcd_cam = lcd.lcd_cam;

0 commit comments

Comments
 (0)