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feat: Update rx-tx order in embassy_interrupt_spi_dma tests
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hil-test/tests/embassy_interrupt_spi_dma.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,11 @@ macro_rules! mk_static {
4949
async fn interrupt_driven_task(spi: SpiDma<'static, SPI3, DmaChannel1, FullDuplexMode, Async>) {
5050
let mut ticker = Ticker::every(Duration::from_millis(1));
5151

52-
let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(128);
53-
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
52+
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(128);
5453
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
54+
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
5555

56-
let mut spi = spi.with_buffers(dma_tx_buf, dma_rx_buf);
56+
let mut spi = spi.with_buffers(dma_rx_buf, dma_tx_buf);
5757

5858
loop {
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let mut buffer: [u8; 8] = [0; 8];
@@ -95,13 +95,13 @@ mod test {
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}
9696
}
9797

98-
let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(1024);
99-
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
98+
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(1024);
10099
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
100+
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
101101

102102
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0, &clocks)
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.with_dma(dma_channel1.configure_for_async(false, DmaPriority::Priority0))
104-
.with_buffers(dma_tx_buf, dma_rx_buf);
104+
.with_buffers(dma_rx_buf, dma_tx_buf);
105105

106106
let spi2 = Spi::new(peripherals.SPI3, 100.kHz(), SpiMode::Mode0, &clocks)
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.with_dma(dma_channel2.configure_for_async(false, DmaPriority::Priority0));

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