diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 40cc1fb20e8..6eb5c387f83 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -52,7 +52,7 @@ jobs:
run: cd esp-hal-smartled/ && cargo +nightly check --features=esp32h2
# Check all Xtensa targets:
- name: check (esp32)
- run: cd esp-hal-smartled/ && cargo +esp check --features=esp32,xtal_40mhz
+ run: cd esp-hal-smartled/ && cargo +esp check --features=esp32,xtal-40mhz
- name: check (esp32s2)
run: cd esp-hal-smartled/ && cargo +esp check --features=esp32s2
- name: check (esp32s3)
@@ -110,7 +110,7 @@ jobs:
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,defmt
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
- name: check esp32-hal (psram)
- run: cd esp32-hal/ && cargo check --example=psram --features=psram_2m --release # This example requires release!
+ run: cd esp32-hal/ && cargo check --example=psram --features=psram-2m --release # This example requires release!
# Ensure documentation can be built
- name: rustdoc
run: cd esp32-hal/ && cargo doc --features=eh1
@@ -398,7 +398,7 @@ jobs:
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,defmt
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
- name: check esp32s2-hal (psram)
- run: cd esp32s2-hal/ && cargo check --example=psram --features=psram_2m --release # This example requires release!
+ run: cd esp32s2-hal/ && cargo check --example=psram --features=psram-2m --release # This example requires release!
# Ensure documentation can be built
- name: rustdoc
run: cd esp32s2-hal/ && cargo doc --features=eh1
@@ -465,8 +465,8 @@ jobs:
- name: check esp32s3-hal (octal psram and psram)
run: | # This examples require release!
cd esp32s3-hal/
- cargo check --example=octal_psram --features=opsram_2m --release
- cargo check --example=psram --features=psram_2m --release
+ cargo check --example=octal_psram --features=opsram-2m --release
+ cargo check --example=psram --features=psram-2m --release
- name: check esp32s3-hal (embassy, log/defmt)
run: |
cd esp32s3-hal/
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 952c89039cd..d566b054a2d 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -29,7 +29,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- Bumped MSRV to 1.67 (#798)
- Optimised multi-core critical section implementation (#797)
-- Unified the ESP32's and ESP32-C2's xtal frequency features (#831)
### Fixed
@@ -54,6 +53,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- `Alarm::interrupt_clear` is now `Alarm::clear_interrupt` to be consistent (#812)
- The `PeripheralClockControl` struct is no longer public, drivers no longer take this as a parameter (#817)
- Unify the system peripheral, `SYSTEM`, `DPORT` and `PCR` are now all exposed as `SYSTEM` (#832).
+- Unified the ESP32's and ESP32-C2's xtal frequency features (#831)
+- Replace any underscores in feature names with dashes (#833)
## [0.12.0]
diff --git a/esp-hal-common/Cargo.toml b/esp-hal-common/Cargo.toml
index 44e0a28622e..31531fe0a4d 100644
--- a/esp-hal-common/Cargo.toml
+++ b/esp-hal-common/Cargo.toml
@@ -77,18 +77,18 @@ esp32s2 = ["xtensa", "esp32s2/rt", "procmacros/esp32s2", "xtensa-lx/esp32s2", "x
esp32s3 = ["xtensa", "esp32s3/rt", "procmacros/esp32s3", "xtensa-lx/esp32s3", "xtensa-lx-rt/esp32s3", "usb-otg"]
# Crystal frequency selection (ESP32 and ESP32-C2 only!)
-xtal_26mhz = []
-xtal_40mhz = []
+xtal-26mhz = []
+xtal-40mhz = []
# PSRAM support
-psram_2m = []
-psram_4m = []
-psram_8m = []
+psram-2m = []
+psram-4m = []
+psram-8m = []
# Octal RAM support
-opsram_2m = []
-opsram_4m = []
-opsram_8m = []
+opsram-2m = []
+opsram-4m = []
+opsram-8m = []
# USB OTG support (ESP32-S2 and ESP32-S3 only! Enabled by default)
usb-otg = ["esp-synopsys-usb-otg", "usb-device"]
diff --git a/esp-hal-common/build.rs b/esp-hal-common/build.rs
index bc9eea9a6d2..947f3923322 100644
--- a/esp-hal-common/build.rs
+++ b/esp-hal-common/build.rs
@@ -102,7 +102,7 @@ fn main() {
// frequencies:
#[cfg(any(feature = "esp32", feature = "esp32c2"))]
{
- assert_unique_used_features!("xtal_26mhz", "xtal_40mhz");
+ assert_unique_used_features!("xtal-26mhz", "xtal-40mhz");
}
// NOTE: update when adding new device support!
@@ -152,7 +152,7 @@ fn main() {
// Check PSRAM features are only given if the target supports PSRAM
if !&device.symbols.contains(&String::from("psram"))
- && (cfg!(feature = "psram_2m") || cfg!(feature = "psram_4m") || cfg!(feature = "psram_8m"))
+ && (cfg!(feature = "psram-2m") || cfg!(feature = "psram-4m") || cfg!(feature = "psram-8m"))
{
panic!("The target does not support PSRAM");
}
diff --git a/esp-hal-common/src/clock/mod.rs b/esp-hal-common/src/clock/mod.rs
index 43f44d2f493..c02a6d16f5a 100644
--- a/esp-hal-common/src/clock/mod.rs
+++ b/esp-hal-common/src/clock/mod.rs
@@ -294,7 +294,7 @@ impl<'d> ClockControl<'d> {
pub fn boot_defaults(
clock_control: impl Peripheral + 'd,
) -> ClockControl<'d> {
- #[cfg(feature = "xtal_40mhz")]
+ #[cfg(feature = "xtal-40mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
@@ -306,7 +306,7 @@ impl<'d> ClockControl<'d> {
},
};
- #[cfg(feature = "xtal_26mhz")]
+ #[cfg(feature = "xtal-26mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
@@ -326,9 +326,9 @@ impl<'d> ClockControl<'d> {
) -> ClockControl<'d> {
// like NuttX use 40M hardcoded - if it turns out to be a problem
// we will take care then
- #[cfg(feature = "xtal_40mhz")]
+ #[cfg(feature = "xtal-40mhz")]
let xtal_freq = XtalClock::RtcXtalFreq40M;
- #[cfg(feature = "xtal_26mhz")]
+ #[cfg(feature = "xtal-26mhz")]
let xtal_freq = XtalClock::RtcXtalFreq26M;
let pll_freq = match cpu_clock_speed {
CpuClock::Clock80MHz => PllClock::Pll320MHz,
@@ -368,7 +368,7 @@ impl<'d> ClockControl<'d> {
pub fn boot_defaults(
clock_control: impl Peripheral
+ 'd,
) -> ClockControl<'d> {
- #[cfg(feature = "xtal_40mhz")]
+ #[cfg(feature = "xtal-40mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
@@ -378,7 +378,7 @@ impl<'d> ClockControl<'d> {
},
};
- #[cfg(feature = "xtal_26mhz")]
+ #[cfg(feature = "xtal-26mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
@@ -395,9 +395,9 @@ impl<'d> ClockControl<'d> {
cpu_clock_speed: CpuClock,
) -> ClockControl<'d> {
let apb_freq;
- #[cfg(feature = "xtal_40mhz")]
+ #[cfg(feature = "xtal-40mhz")]
let xtal_freq = XtalClock::RtcXtalFreq40M;
- #[cfg(feature = "xtal_26mhz")]
+ #[cfg(feature = "xtal-26mhz")]
let xtal_freq = XtalClock::RtcXtalFreq26M;
let pll_freq = PllClock::Pll480MHz;
diff --git a/esp-hal-common/src/rtc_cntl/rtc/esp32.rs b/esp-hal-common/src/rtc_cntl/rtc/esp32.rs
index a7e63625aa7..189899dcb81 100644
--- a/esp-hal-common/src/rtc_cntl/rtc/esp32.rs
+++ b/esp-hal-common/src/rtc_cntl/rtc/esp32.rs
@@ -9,12 +9,12 @@ use crate::{
pub(crate) fn init() {}
pub(crate) fn configure_clock() {
- #[cfg(feature = "xtal_40mhz")]
+ #[cfg(feature = "xtal-40mhz")]
assert!(matches!(
RtcClock::get_xtal_freq(),
XtalClock::RtcXtalFreq40M
));
- #[cfg(feature = "xtal_26mhz")]
+ #[cfg(feature = "xtal-26mhz")]
assert!(
matches!(RtcClock::get_xtal_freq(), XtalClock::RtcXtalFreq26M),
"Did you flash the right bootloader configured for 26Mhz xtal?"
diff --git a/esp-hal-common/src/rtc_cntl/rtc/esp32c2.rs b/esp-hal-common/src/rtc_cntl/rtc/esp32c2.rs
index 5af89122831..194d17176e9 100644
--- a/esp-hal-common/src/rtc_cntl/rtc/esp32c2.rs
+++ b/esp-hal-common/src/rtc_cntl/rtc/esp32c2.rs
@@ -56,12 +56,12 @@ pub(crate) fn init() {
}
pub(crate) fn configure_clock() {
- #[cfg(feature = "xtal_40mhz")]
+ #[cfg(feature = "xtal-40mhz")]
assert!(matches!(
RtcClock::get_xtal_freq(),
XtalClock::RtcXtalFreq40M
));
- #[cfg(feature = "xtal_26mhz")]
+ #[cfg(feature = "xtal-26mhz")]
assert!(
matches!(RtcClock::get_xtal_freq(), XtalClock::RtcXtalFreq26M),
"Did you flash the right bootloader configured for 26MHz xtal?"
diff --git a/esp-hal-common/src/soc/esp32/psram.rs b/esp-hal-common/src/soc/esp32/psram.rs
index c20350a8eee..c2b09b8f604 100644
--- a/esp-hal-common/src/soc/esp32/psram.rs
+++ b/esp-hal-common/src/soc/esp32/psram.rs
@@ -26,11 +26,11 @@ pub fn psram_vaddr_start() -> usize {
}
cfg_if::cfg_if! {
- if #[cfg(feature = "psram_2m")] {
+ if #[cfg(feature = "psram-2m")] {
const PSRAM_SIZE: u32 = 2;
- } else if #[cfg(feature = "psram_4m")] {
+ } else if #[cfg(feature = "psram-4m")] {
const PSRAM_SIZE: u32 = 4;
- } else if #[cfg(feature = "psram_8m")] {
+ } else if #[cfg(feature = "psram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else {
const PSRAM_SIZE: u32 = 0;
@@ -41,13 +41,13 @@ pub const PSRAM_BYTES: usize = PSRAM_SIZE as usize * 1024 * 1024;
pub const PSRAM_VADDR_START: usize = PSRAM_VADDR as usize;
-#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
+#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral
) {
utils::psram_init();
utils::s_mapping(PSRAM_VADDR, PSRAM_BYTES as u32);
}
-#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
+#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub(crate) mod utils {
use procmacros::ram;
diff --git a/esp-hal-common/src/soc/esp32s2/psram.rs b/esp-hal-common/src/soc/esp32s2/psram.rs
index 05dbe0f96b9..015c46c3d13 100644
--- a/esp-hal-common/src/soc/esp32s2/psram.rs
+++ b/esp-hal-common/src/soc/esp32s2/psram.rs
@@ -22,11 +22,11 @@ pub fn psram_vaddr_start() -> usize {
}
cfg_if::cfg_if! {
- if #[cfg(feature = "psram_2m")] {
+ if #[cfg(feature = "psram-2m")] {
const PSRAM_SIZE: u32 = 2;
- } else if #[cfg(feature = "psram_4m")] {
+ } else if #[cfg(feature = "psram-4m")] {
const PSRAM_SIZE: u32 = 4;
- } else if #[cfg(feature = "psram_8m")] {
+ } else if #[cfg(feature = "psram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else {
const PSRAM_SIZE: u32 = 0;
@@ -37,7 +37,7 @@ pub const PSRAM_BYTES: usize = PSRAM_SIZE as usize * 1024 * 1024;
pub const PSRAM_VADDR_START: usize = PSRAM_VADDR as usize;
-#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
+#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral
) {
#[allow(unused)]
enum CacheLayout {
@@ -138,7 +138,7 @@ pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral
usize {
}
cfg_if::cfg_if! {
- if #[cfg(feature = "psram_2m")] {
+ if #[cfg(feature = "psram-2m")] {
const PSRAM_SIZE: u32 = 2;
- } else if #[cfg(feature = "psram_4m")] {
+ } else if #[cfg(feature = "psram-4m")] {
const PSRAM_SIZE: u32 = 4;
- } else if #[cfg(feature = "psram_8m")] {
+ } else if #[cfg(feature = "psram-8m")] {
const PSRAM_SIZE: u32 = 8;
- } else if #[cfg(feature = "opsram_2m")] {
+ } else if #[cfg(feature = "opsram-2m")] {
const PSRAM_SIZE: u32 = 2;
- } else if #[cfg(feature = "opsram_4m")] {
+ } else if #[cfg(feature = "opsram-4m")] {
const PSRAM_SIZE: u32 = 4;
- } else if #[cfg(feature = "opsram_8m")] {
+ } else if #[cfg(feature = "opsram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else {
const PSRAM_SIZE: u32 = 0;
@@ -46,12 +46,12 @@ pub const PSRAM_BYTES: usize = PSRAM_SIZE as usize * 1024 * 1024;
///
/// Currently only QSPI is supported.
#[cfg(any(
- feature = "psram_2m",
- feature = "psram_4m",
- feature = "psram_8m",
- feature = "opsram_2m",
- feature = "opsram_4m",
- feature = "opsram_8m"
+ feature = "psram-2m",
+ feature = "psram-4m",
+ feature = "psram-8m",
+ feature = "opsram-2m",
+ feature = "opsram-4m",
+ feature = "opsram-8m"
))]
pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral
) {
const CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE: u32 = 0x4000;
@@ -160,7 +160,7 @@ pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral
Vec {
}
fn check_features() {
- if cfg!(feature = "xtal_40mhz") && cfg!(feature = "xtal_26mhz") {
+ if cfg!(feature = "xtal-40mhz") && cfg!(feature = "xtal-26mhz") {
panic!("Only one xtal speed feature can be selected");
}
}
diff --git a/esp32-hal/src/lib.rs b/esp32-hal/src/lib.rs
index 5174682ac8e..9be22b1bb72 100644
--- a/esp32-hal/src/lib.rs
+++ b/esp32-hal/src/lib.rs
@@ -26,18 +26,18 @@
//! - `embassy-time-timg0` - Enable the [embassy] time driver using the `TIMG0`
//! peripheral
//! - `log` - enable log output using the `log` crate
-//! - `psram_2m` - Use externally connected PSRAM (2MB)
-//! - `psram_4m` - Use externally connected PSRAM (4MB)
-//! - `psram_8m` - Use externally connected PSRAM (8MB)
+//! - `psram-2m` - Use externally connected PSRAM (2MB)
+//! - `psram-4m` - Use externally connected PSRAM (4MB)
+//! - `psram-8m` - Use externally connected PSRAM (8MB)
//! - `rt` - Runtime support
//! - `ufmt` - Implement the [`ufmt_write::uWrite`] trait for the UART driver
//! - `vectored` - Enable interrupt vectoring
-//! - `xtal_26mhz` - The target device uses a 26MHz crystal
-//! - `xtal_40mhz` - The target device uses a 40MHz crystal
+//! - `xtal-26mhz` - The target device uses a 26MHz crystal
+//! - `xtal-40mhz` - The target device uses a 40MHz crystal
//!
//! #### Default Features
//!
-//! The `rt`, `vectored`, and `xtal_40mhz` features are enabled by default.
+//! The `rt`, `vectored`, and `xtal-40mhz` features are enabled by default.
//!
//! [embedded-hal-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-hal-async
//! [embedded-io-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-io-async
diff --git a/esp32c2-hal/Cargo.toml b/esp32c2-hal/Cargo.toml
index e12eaf5cc02..76810760d63 100644
--- a/esp32c2-hal/Cargo.toml
+++ b/esp32c2-hal/Cargo.toml
@@ -49,7 +49,7 @@ p192 = {version = "0.13.0", default-features = false, features = ["
p256 = {version = "0.13.2", default-features = false, features = ["arithmetic"] }
[features]
-default = ["rt", "vectored", "xtal_40mhz"]
+default = ["rt", "vectored", "xtal-40mhz"]
async = ["esp-hal-common/async"]
debug = ["esp-hal-common/debug"]
defmt = ["esp-hal-common/defmt"]
@@ -61,8 +61,8 @@ log = ["esp-hal-common/log"]
rt = []
ufmt = ["esp-hal-common/ufmt"]
vectored = ["esp-hal-common/vectored"]
-xtal_26mhz = ["esp-hal-common/xtal_26mhz"]
-xtal_40mhz = ["esp-hal-common/xtal_40mhz"]
+xtal-26mhz = ["esp-hal-common/xtal-26mhz"]
+xtal-40mhz = ["esp-hal-common/xtal-40mhz"]
# Embassy support
embassy = ["esp-hal-common/embassy"]
diff --git a/esp32c2-hal/build.rs b/esp32c2-hal/build.rs
index 73eef4729fd..9a6b64fd9f7 100644
--- a/esp32c2-hal/build.rs
+++ b/esp32c2-hal/build.rs
@@ -67,7 +67,7 @@ fn main() {
}
fn check_features() {
- if cfg!(feature = "xtal_40mhz") && cfg!(feature = "xtal_26mhz") {
+ if cfg!(feature = "xtal-40mhz") && cfg!(feature = "xtal-26mhz") {
panic!("Only one xtal speed feature can be selected");
}
}
diff --git a/esp32c2-hal/src/lib.rs b/esp32c2-hal/src/lib.rs
index 601ed68d7a0..3c4a57578fa 100644
--- a/esp32c2-hal/src/lib.rs
+++ b/esp32c2-hal/src/lib.rs
@@ -27,12 +27,12 @@
//! - `ufmt` - Implement the [`ufmt_write::uWrite`] trait for the UART and USB
//! Serial JTAG drivers
//! - `vectored` - Enable interrupt vectoring
-//! - `xtal_26mhz` - The target device uses a 26MHz crystal
-//! - `xtal_40mhz` - The target device uses a 40MHz crystal
+//! - `xtal-26mhz` - The target device uses a 26MHz crystal
+//! - `xtal-40mhz` - The target device uses a 40MHz crystal
//!
//! #### Default Features
//!
-//! The `rt`, `vectored`, and `xtal_40mhz` features are enabled by default.
+//! The `rt`, `vectored`, and `xtal-40mhz` features are enabled by default.
//!
//! [embedded-hal-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-hal-async
//! [embedded-io-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-io-async
diff --git a/esp32s2-hal/Cargo.toml b/esp32s2-hal/Cargo.toml
index 37ab34eabbb..e4d26d596c7 100644
--- a/esp32s2-hal/Cargo.toml
+++ b/esp32s2-hal/Cargo.toml
@@ -76,9 +76,9 @@ embassy-executor-thread = ["esp-hal-common/embassy-executor-thread"]
# PSRAM support
psram = []
-psram_2m = ["esp-hal-common/psram_2m", "psram"]
-psram_4m = ["esp-hal-common/psram_4m", "psram"]
-psram_8m = ["esp-hal-common/psram_8m", "psram"]
+psram-2m = ["esp-hal-common/psram-2m", "psram"]
+psram-4m = ["esp-hal-common/psram-4m", "psram"]
+psram-8m = ["esp-hal-common/psram-8m", "psram"]
[profile.release]
debug = true
@@ -109,7 +109,7 @@ required-features = ["embassy", "embassy-executor-thread", "async"]
[[example]]
name = "psram"
-required-features = ["psram_2m"]
+required-features = ["psram-2m"]
[[example]]
name = "embassy_serial"
diff --git a/esp32s2-hal/src/lib.rs b/esp32s2-hal/src/lib.rs
index 7c27871eddf..5801095538b 100644
--- a/esp32s2-hal/src/lib.rs
+++ b/esp32s2-hal/src/lib.rs
@@ -20,9 +20,9 @@
//! - `embassy-time-timg0` - Enable the [embassy] time driver using the `TIMG0`
//! peripheral
//! - `log` - enable log output using the `log` crate
-//! - `psram_2m` - Use externally connected PSRAM (2MB)
-//! - `psram_4m` - Use externally connected PSRAM (4MB)
-//! - `psram_8m` - Use externally connected PSRAM (8MB)
+//! - `psram-2m` - Use externally connected PSRAM (2MB)
+//! - `psram-4m` - Use externally connected PSRAM (4MB)
+//! - `psram-8m` - Use externally connected PSRAM (8MB)
//! - `rt` - Runtime support
//! - `ufmt` - Implement the [`ufmt_write::uWrite`] trait for the UART driver
//! - `vectored` - Enable interrupt vectoring
diff --git a/esp32s3-hal/Cargo.toml b/esp32s3-hal/Cargo.toml
index eef19752300..3e9f12af870 100644
--- a/esp32s3-hal/Cargo.toml
+++ b/esp32s3-hal/Cargo.toml
@@ -76,14 +76,14 @@ embassy-executor-thread = ["esp-hal-common/embassy-executor-thread"]
# PSRAM support
psram = []
-psram_2m = ["esp-hal-common/psram_2m", "psram"]
-psram_4m = ["esp-hal-common/psram_4m", "psram"]
-psram_8m = ["esp-hal-common/psram_8m", "psram"]
+psram-2m = ["esp-hal-common/psram-2m", "psram"]
+psram-4m = ["esp-hal-common/psram-4m", "psram"]
+psram-8m = ["esp-hal-common/psram-8m", "psram"]
# Octal RAM support
-opsram_2m = ["esp-hal-common/opsram_2m", "psram"]
-opsram_4m = ["esp-hal-common/opsram_4m", "psram"]
-opsram_8m = ["esp-hal-common/opsram_8m", "psram"]
+opsram-2m = ["esp-hal-common/opsram-2m", "psram"]
+opsram-4m = ["esp-hal-common/opsram-4m", "psram"]
+opsram-8m = ["esp-hal-common/opsram-8m", "psram"]
[profile.release]
debug = true
@@ -122,11 +122,11 @@ required-features = ["embassy", "embassy-executor-thread", "async"]
[[example]]
name = "psram"
-required-features = ["psram_2m"]
+required-features = ["psram-2m"]
[[example]]
name = "octal_psram"
-required-features = ["opsram_2m"]
+required-features = ["opsram-2m"]
[[example]]
name = "embassy_serial"
diff --git a/esp32s3-hal/src/lib.rs b/esp32s3-hal/src/lib.rs
index f754bdd07d0..ea3cb6ac756 100644
--- a/esp32s3-hal/src/lib.rs
+++ b/esp32s3-hal/src/lib.rs
@@ -25,12 +25,12 @@
//! - `embassy-time-timg0` - Enable the [embassy] time driver using the `TIMG0`
//! peripheral
//! - `log` - enable log output using the `log` crate
-//! - `opsram_2m` - Use externally connected Octal PSRAM (2MB)
-//! - `opsram_4m` - Use externally connected Octal PSRAM (4MB)
-//! - `opsram_8m` - Use externally connected Octal PSRAM (8MB)
-//! - `psram_2m` - Use externally connected PSRAM (2MB)
-//! - `psram_4m` - Use externally connected PSRAM (4MB)
-//! - `psram_8m` - Use externally connected PSRAM (8MB)
+//! - `opsram-2m` - Use externally connected Octal PSRAM (2MB)
+//! - `opsram-4m` - Use externally connected Octal PSRAM (4MB)
+//! - `opsram-8m` - Use externally connected Octal PSRAM (8MB)
+//! - `psram-2m` - Use externally connected PSRAM (2MB)
+//! - `psram-4m` - Use externally connected PSRAM (4MB)
+//! - `psram-8m` - Use externally connected PSRAM (8MB)
//! - `rt` - Runtime support
//! - `ufmt` - Implement the [`ufmt_write::uWrite`] trait for the UART driver
//! - `vectored` - Enable interrupt vectoring