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Add filenames in vhier --xml cells, update vhier --inputs format
1 parent d6cccae commit 928b0be

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3 files changed

+21
-15
lines changed

3 files changed

+21
-15
lines changed

Changes

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,8 @@ indicates the contributor was also the author of the fix; Thanks!
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* Verilog-Perl 3.473 devel
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9+
**** Add filenames in vhier --xml cells.
10+
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**** Fix duplicates in vhier --includes. [Gregory Pierce]
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t/85_vhier_xml.out

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
11
<vhier>
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<cells>
3-
<cell name="v_hier_top" submodname="v_hier_top" hier="v_hier_top">
4-
<cell name="recursive" submodname="v_recursive" hier="v_hier_top.recursive">
3+
<cell name="v_hier_top" submodname="v_hier_top" hier="v_hier_top" filename="verilog/v_hier_top.v">
4+
<cell name="recursive" submodname="v_recursive" hier="v_hier_top.recursive" filename="verilog/v_recursive.v">
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</cell>
6-
<cell name="sub" submodname="v_hier_sub" hier="v_hier_top.sub">
7-
<cell name="subsub0" submodname="v_hier_subsub" hier="v_hier_top.sub.subsub0">
6+
<cell name="sub" submodname="v_hier_sub" hier="v_hier_top.sub" filename="verilog/v_hier_sub.v">
7+
<cell name="subsub0" submodname="v_hier_subsub" hier="v_hier_top.sub.subsub0" filename="verilog/v_hier_subsub.v">
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</cell>
9-
<cell name="subsub2" submodname="v_hier_subsub" hier="v_hier_top.sub.subsub2">
9+
<cell name="subsub2" submodname="v_hier_subsub" hier="v_hier_top.sub.subsub2" filename="verilog/v_hier_subsub.v">
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</cell>
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</cell>
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</cell>
@@ -25,8 +25,9 @@
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<file>verilog/v_recursive.v</file>
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</input_files>
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<includes>
28-
<file>verilog/v_hier_top.v</file>
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<inc>v_hier_inc.vh</inc>
28+
<file name="verilog/v_hier_top.v">
29+
<inc name="v_hier_inc.vh" />
30+
</file>
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</includes>
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<missing_modules>
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<module name="missing" />

vhier

Lines changed: 11 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -204,11 +204,12 @@ sub vhier {
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$fh->print(" <includes>\n") if $Opt_Xml;
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foreach my $filename (sort keys %{$Opt->includes}) {
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$fh->print(" $filename\n") if !$Opt_Xml;
207-
$fh->print(" <file>$filename</file>\n") if $Opt_Xml;
207+
$fh->print(" <file name=\"$filename\">\n") if $Opt_Xml;
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foreach my $incname (sort keys %{$Opt->{includes}{$filename}}) {
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$fh->print(" $incname\n") if !$Opt_Xml;
210-
$fh->print(" <inc>$incname</inc>\n") if $Opt_Xml;
210+
$fh->print(" <inc name=\"$incname\" />\n") if $Opt_Xml;
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}
212+
$fh->print(" </file>\n") if $Opt_Xml;
212213
}
213214
$fh->print(" </includes>\n") if $Opt_Xml;
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}
@@ -347,12 +348,14 @@ sub show_hier {
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my $instance = $parcell ? $parcell->name : $name;
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# print the mod instance
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$Opt_Xml ?
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$fh->printf("%s<cell name=\"%s\" submodname=\"%s\" hier=\"%s\">\n",
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$indent, $parcell ? $parcell->name : $name, $name, $hier) :
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$Opt_Instance ?
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$fh->printf("%s%s %s\n", $indent, $instance, $name) :
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$fh->printf("%s%s\n", $indent, $name);
351+
$fh->printf("%s<cell name=\"%s\" submodname=\"%s\" hier=\"%s\" filename=\"%s\">\n",
352+
$indent, ($parcell ? $parcell->name : $name), $name, $hier,
353+
$mod->filename)
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if $Opt_Xml;
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$fh->printf("%s%s %s\n", $indent, $instance, $name)
356+
if !$Opt_Xml && $Opt_Instance;
357+
$fh->printf("%s%s\n", $indent, $name)
358+
if !$Opt_Xml && !$Opt_Instance;
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357360
# print the design hierarchy of each cell in mod
358361
my $i = 0;

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