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n230: Cleaned up miniSAS connector interface
- Exposed pins as inout SW controllable GPIOs - Removed TEST target - Cleaned up XDCs
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11 files changed

+282
-877
lines changed

11 files changed

+282
-877
lines changed

usrp3/top/n230/Makefile

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -33,17 +33,13 @@ post_build = @\
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all: N230 ##(Default target)
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N230: ##USRP N230 default production image
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$(call vivado_build,SAFE_MODE=0 TEST_MODE=0)
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$(call vivado_build,SAFE_MODE=0)
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$(call post_build,)
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N230_SAFE: ##USRP N230 failsafe image
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$(call vivado_build,SAFE_MODE=1 TEST_MODE=0)
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$(call vivado_build,SAFE_MODE=1)
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$(call post_build,_SAFE)
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N230_TEST: ##USRP N230 test image
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$(call vivado_build,SAFE_MODE=0 TEST_MODE=1)
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$(call post_build,_TEST)
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clean: ##Clean up all target build outputs.
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@echo "Cleaning targets..."
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@rm -rf build-N230*
@@ -63,4 +59,4 @@ help: ##Show this help message.
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##-----------------
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##GUI=1 Launch the build in the Vivado GUI.
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.PHONY: all clean cleanall help N230 N230_SAFE N230_TEST
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.PHONY: all clean cleanall help N230 N230_SAFE

usrp3/top/n230/Makefile.n230.inc

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@@ -42,7 +42,6 @@ n230_core.v \
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zpu_subsystem.v \
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n230_ext_sram_fifo.v \
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n230_zpu_config.vhd \
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n230_test_jesd204_if.v \
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eth_jesd_gtp_phy.v \
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n230.xdc \
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timing.xdc \
@@ -72,9 +71,6 @@ EXTRA_DEFS = DELETE_FORMAT_CONVERSION
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ifeq (1,$(SAFE_MODE))
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EXTRA_DEFS += SAFE_IMAGE
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endif
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ifeq (1,$(TEST_MODE))
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EXTRA_DEFS += TEST_JESD204_IF
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endif
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# Git Hash
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SHORT_HASH=$(addprefix GIT_HASH=,$(shell $(BASE_DIR)/../tools/scripts/git-hash.sh))
@@ -86,7 +82,6 @@ SHORT_HASH=$(addprefix GIT_HASH=,$(shell $(BASE_DIR)/../tools/scripts/git-hash.s
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VERILOG_DEFS=$(EXTRA_DEFS) $(SHORT_HASH)
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export SAFE_MODE=$(SAFE_MODE)
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export TEST_MODE=$(TEST_MODE)
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# DESIGN_SRCS and VERILOG_DEFS must be defined
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bin: .prereqs $$(DESIGN_SRCS) ip

usrp3/top/n230/build_n230.tcl

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@@ -6,7 +6,6 @@ source $::env(VIV_TOOLS_DIR)/scripts/viv_utils.tcl
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source $::env(VIV_TOOLS_DIR)/scripts/viv_strategies.tcl
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set safe_image $env(SAFE_MODE)
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set test_image $env(TEST_MODE)
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# STEP#1: Create project, add sources, refresh IP
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vivado_utils::initialize_project

usrp3/top/n230/jesd204.xdc

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