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Guard with flag instead of target feature
Created using spr 1.3.4
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ilovepi committed Jun 24, 2024
commit a5f2150cbbc6504a3d898b993b7a5d7a388a715f
11 changes: 9 additions & 2 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14,12 +14,20 @@
#include "RISCVBaseInfo.h"
#include "RISCVMCTargetDesc.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/RISCVAttributes.h"
#include "llvm/TargetParser/RISCVISAInfo.h"

using namespace llvm;

// This option controls wether or not we emit ELF attributes for ABI features,
// like RISC-V atomics or X3 usage.
static cl::opt<bool>
RiscvAbiAttr("riscv-abi-attributes",
cl::desc("Enable emitting RISC-V ELF attributes for ABI features"),
cl::init(false), cl::Hidden);
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remove cl::init(false)

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done


RISCVTargetStreamer::RISCVTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}

void RISCVTargetStreamer::finish() { finishAttributeSection(); }
Expand Down Expand Up @@ -76,8 +84,7 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI,
emitTextAttribute(RISCVAttrs::ARCH, ISAInfo->toString());
}

if (STI.hasFeature(RISCV::FeatureAbiAttributes) &&
STI.hasFeature(RISCV::FeatureStdExtA)) {
if (RiscvAbiAttr && STI.hasFeature(RISCV::FeatureStdExtA)) {
unsigned AtomicABITag = STI.hasFeature(RISCV::FeatureTrailingSeqCstFence)
? RISCVAttrs::RISCVAtomicAbiTag::AtomicABI::A6S
: RISCVAttrs::RISCVAtomicAbiTag::AtomicABI::A6C;
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3 changes: 0 additions & 3 deletions llvm/lib/Target/RISCV/RISCVFeatures.td
Original file line number Diff line number Diff line change
Expand Up @@ -1247,9 +1247,6 @@ def FeatureTrailingSeqCstFence : SubtargetFeature<"seq-cst-trailing-fence",
"true",
"Enable trailing fence for seq-cst store.">;

def FeatureAbiAttributes : SubtargetFeature<"abi-attr", "EnableAbiAttributes",
"true", "Enable emitting RISC-V ABI attributes">;

def FeatureUnalignedScalarMem
: SubtargetFeature<"unaligned-scalar-mem", "EnableUnalignedScalarMem",
"true", "Has reasonably performant unaligned scalar "
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5 changes: 3 additions & 2 deletions llvm/test/CodeGen/RISCV/attributes.ll
Original file line number Diff line number Diff line change
Expand Up @@ -135,8 +135,9 @@
; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefixes=CHECK,RV64M %s
; RUN: llc -mtriple=riscv64 -mattr=+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64ZMMUL %s
; RUN: llc -mtriple=riscv64 -mattr=+m,+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64MZMMUL %s
; RUN: llc -mtriple=riscv64 -mattr=+a,+abi-attr %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6C %s
; RUN: llc -mtriple=riscv64 -mattr=+a,+seq-cst-trailing-fence,+abi-attr %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6S %s
; RUN: llc -mtriple=riscv64 -mattr=+a --riscv-abi-attributes %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6C %s
; RUN: llc -mtriple=riscv64 -mattr=+a,+seq-cst-trailing-fence --riscv-abi-attributes %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6S %s
; RUN: llc -mtriple=riscv64 -mattr=+b %s -o - | FileCheck --check-prefixes=CHECK,RV64B %s
; RUN: llc -mtriple=riscv64 -mattr=+f %s -o - | FileCheck --check-prefixes=CHECK,RV64F %s
; RUN: llc -mtriple=riscv64 -mattr=+d %s -o - | FileCheck --check-prefixes=CHECK,RV64D %s
; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefixes=CHECK,RV64C %s
Expand Down
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