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Fix parameter type = struct.
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-28
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6 files changed

+69
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‎Changes‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,8 @@ indicates the contributor was also the author of the fix; Thanks!
66

77
* Verilog-Perl 3.475 devel
88

9+
**** Fix parameter type = struct. [Nathan Chrisman]
10+
911

1012
* Verilog-Perl 3.474 2020-10-29
1113

‎Parser/VParseBison.y‎

Lines changed: 32 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -53,15 +53,22 @@
5353
#define NEWSTRING(text) (string((text)))
5454
#define SPACED(a,b) ((a)+(((a)=="" || (b)=="")?"":" ")+(b))
5555

56+
#define VARS_PUSH() { GRAMMARP->m_varStack.push_back(GRAMMARP->m_var); }
57+
#define VARS_POP() { GRAMMARP->m_var = GRAMMARP->m_varStack.back(); GRAMMARP->m_varStack.pop_back(); }
58+
5659
#define VARRESET_LIST(decl) { GRAMMARP->pinNum(1); VARRESET(); VARDECL(decl); } // Start of pinlist
5760
#define VARRESET_NONLIST(decl) { GRAMMARP->pinNum(0); VARRESET(); VARDECL(decl); } // Not in a pinlist
5861
#define VARRESET() { VARDECL(""); VARIO(""); VARNET(""); VARDTYPE(""); } // Start of one variable decl
5962

6063
// VARDECL("") indicates inside a port list or IO list and we shouldn't declare the variable
61-
#define VARDECL(type) { GRAMMARP->m_varDecl = (type); } // genvar, parameter, localparam
62-
#define VARIO(type) { GRAMMARP->m_varIO = (type); } // input, output, inout, ref, const ref
63-
#define VARNET(type) { GRAMMARP->m_varNet = (type); } // supply*,wire,tri
64-
#define VARDTYPE(type) { GRAMMARP->m_varDType = (type); } // "signed", "int", etc
64+
#define VARDECL(type) \
65+
{ GRAMMARP->m_var.m_decl = (type); } // genvar, parameter, localparam
66+
#define VARIO(type) \
67+
{ GRAMMARP->m_var.m_io = (type); } // input, output, inout, ref, const ref
68+
#define VARNET(type) \
69+
{ GRAMMARP->m_var.m_net = (type); } // supply*,wire,tri
70+
#define VARDTYPE(type) \
71+
{ GRAMMARP->m_var.m_dtype = (type); } // "signed", "int", etc
6572

6673
#define PINNUMINC() { GRAMMARP->pinNumInc(); }
6774

@@ -70,26 +77,27 @@
7077

7178
enum net_idx {NI_NETNAME = 0, NI_MSB, NI_LSB};
7279

73-
static void VARDONE(VFileLine* fl, const string& name, const string& array, const string& value) {
74-
if (GRAMMARP->m_varIO!="" && GRAMMARP->m_varDecl=="") GRAMMARP->m_varDecl="port";
75-
if (GRAMMARP->m_varDecl!="") {
76-
PARSEP->varCb(fl, GRAMMARP->m_varDecl, name, PARSEP->symObjofUpward(), GRAMMARP->m_varNet,
77-
GRAMMARP->m_varDType, array, value);
80+
static void VARDONE(VFileLine * fl, const string& name, const string& array, const string& value) {
81+
if (GRAMMARP->m_var.m_io != "" && GRAMMARP->m_var.m_decl == "")
82+
GRAMMARP->m_var.m_decl = "port";
83+
if (GRAMMARP->m_var.m_decl != "") {
84+
PARSEP->varCb(fl, GRAMMARP->m_var.m_decl, name, PARSEP->symObjofUpward(),
85+
GRAMMARP->m_var.m_net, GRAMMARP->m_var.m_dtype, array, value);
7886
}
79-
if (GRAMMARP->m_varIO!="" || GRAMMARP->pinNum()) {
80-
PARSEP->portCb(fl, name, PARSEP->symObjofUpward(),
81-
GRAMMARP->m_varIO, GRAMMARP->m_varDType, array, GRAMMARP->pinNum());
87+
if (GRAMMARP->m_var.m_io != "" || GRAMMARP->pinNum()) {
88+
PARSEP->portCb(fl, name, PARSEP->symObjofUpward(), GRAMMARP->m_var.m_io,
89+
GRAMMARP->m_var.m_dtype, array, GRAMMARP->pinNum());
8290
}
83-
if (GRAMMARP->m_varDType == "type") {
84-
PARSEP->syms().replaceInsert(VAstType::TYPE,name);
91+
if (GRAMMARP->m_var.m_dtype == "type") {
92+
PARSEP->syms().replaceInsert(VAstType::TYPE, name);
8593
}
8694
}
8795

8896
static void VARDONETYPEDEF(VFileLine* fl, const string& name, const string& type, const string& array) {
8997
VARRESET(); VARDECL("typedef"); VARDTYPE(type);
9098
VARDONE(fl,name,array,"");
9199
// TYPE shouldn't override a more specific node type, as often is forward reference
92-
PARSEP->syms().replaceInsert(VAstType::TYPE,name);
100+
PARSEP->syms().replaceInsert(VAstType::TYPE, name);
93101
}
94102

95103
static void parse_net_constants(VFileLine* fl, VParseHashElem nets[][3]) {
@@ -1543,8 +1551,11 @@ struct_union_memberList: // IEEE: { struct_union_member }
15431551
;
15441552

15451553
struct_union_member: // ==IEEE: struct_union_member
1546-
random_qualifierE data_type_or_void { VARRESET_NONLIST("member"); VARDTYPE(SPACED($1,$2)); }
1547-
/*cont*/ list_of_variable_decl_assignments ';' { }
1554+
random_qualifierE data_type_or_void
1555+
{ VARS_PUSH(); // Structs can be recursive, or under a parameter typs
1556+
VARRESET_NONLIST("member"); VARDTYPE(SPACED($1,$2)); }
1557+
/*cont*/ list_of_variable_decl_assignments ';'
1558+
{ VARS_POP(); }
15481559
;
15491560

15501561
list_of_variable_decl_assignments: // ==IEEE: list_of_variable_decl_assignments
@@ -1739,12 +1750,12 @@ data_declarationVarFrontClass: // IEEE: part of data_declaration (for class_prop
17391750
// // VARRESET called before this rule
17401751
// // yCONST is removed, added to memberQual rules
17411752
// // implicit_type expanded into /*empty*/ or "signingE rangeList"
1742-
yVAR lifetimeE data_type { VARDECL("var"); VARDTYPE(SPACED(GRAMMARP->m_varDType,$3)); }
1743-
| yVAR lifetimeE { VARDECL("var"); VARDTYPE(GRAMMARP->m_varDType); }
1744-
| yVAR lifetimeE signingE rangeList { VARDECL("var"); VARDTYPE(SPACED(GRAMMARP->m_varDType,SPACED($3,$4))); }
1753+
yVAR lifetimeE data_type { VARDECL("var"); VARDTYPE(SPACED(GRAMMARP->m_var.m_dtype, $3)); }
1754+
| yVAR lifetimeE { VARDECL("var"); VARDTYPE(GRAMMARP->m_var.m_dtype); }
1755+
| yVAR lifetimeE signingE rangeList { VARDECL("var"); VARDTYPE(SPACED(GRAMMARP->m_var.m_dtype, SPACED($3, $4))); }
17451756
//
17461757
// // Expanded: "constE lifetimeE data_type"
1747-
| /**/ data_typeVar { VARDECL("var"); VARDTYPE(SPACED(GRAMMARP->m_varDType,$1)); }
1758+
| /**/ data_typeVar { VARDECL("var"); VARDTYPE(SPACED(GRAMMARP->m_var.m_dtype, $1)); }
17481759
// // lifetime is removed, added to memberQual rules to avoid conflict
17491760
// // yCONST is removed, added to memberQual rules to avoid conflict
17501761
// // = class_new is in variable_decl_assignment

‎Parser/VParseGrammar.h‎

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,14 @@ struct VParseNet {
5454
: m_name(net), m_msb(""), m_lsb("") {}
5555
};
5656

57+
struct VParseVar {
58+
string m_decl;
59+
string m_net;
60+
string m_io;
61+
string m_dtype;
62+
string m_range;
63+
};
64+
5765
//============================================================================
5866
// We can't use bison's %union as the string type doesn't fit in a union.
5967
// It's fine to use a struct though!
@@ -74,11 +82,8 @@ class VParseGrammar {
7482

7583
public: // Only for VParseBison
7684
int m_pinNum; ///< Pin number being parsed
77-
string m_varDecl;
78-
string m_varNet;
79-
string m_varIO;
80-
string m_varDType;
81-
string m_varRange;
85+
86+
VParseVar m_var;
8287

8388
string m_cellMod;
8489
bool m_cellParam;
@@ -93,6 +98,7 @@ class VParseGrammar {
9398

9499
deque<VParseGPin> m_pinStack;
95100
deque<VParseNet> m_portStack;
101+
deque<VParseVar> m_varStack;
96102

97103
public: // But for internal use only
98104
static VParseGrammar* staticGrammarp() { return s_grammarp; }

‎t/35_sigparser.out‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -947,7 +947,7 @@ verilog/parser_sv.v:348: VAR 'parameter' 'P1' 'module' '' 'logic [31:0]' '[3:0]
947947
verilog/parser_sv.v:348: COMMENT '// unpacked array'
948948
verilog/parser_sv.v:349: VAR 'member' 'ecc' 'struct' '' 'logic' '' ''
949949
verilog/parser_sv.v:349: VAR 'member' 'data' 'struct' '' 'logic [7:0]' '' ''
950-
verilog/parser_sv.v:349: VAR 'member' 'memsig' 'module' '' 'struct' '' ''
950+
verilog/parser_sv.v:349: VAR 'net' 'memsig' 'module' 'wire' 'struct' '' ''
951951
verilog/parser_sv.v:350: ENDMODULE 'endmodule'
952952
verilog/parser_sv.v:352: MODULE 'module' 'not_a_bug315' undef '0'
953953
verilog/parser_sv.v:353: VAR 'typedef' 'supply_net_t' 'module' '' 'int' '' ''
@@ -1035,6 +1035,14 @@ verilog/parser_sv.v:417: PORT 'ifmp' 'module' '' '' '' '1'
10351035
verilog/parser_sv.v:418: INSTANT 'if_bug777' 'ifmp' ''
10361036
verilog/parser_sv.v:418: ENDCELL ''
10371037
verilog/parser_sv.v:419: ENDMODULE 'endmodule'
1038+
verilog/parser_sv.v:421: MODULE 'module' 'bug_param_struct' undef '0'
1039+
verilog/parser_sv.v:422: VAR 'parameter' 'ROWS' 'module' '' 'int' '' '2'
1040+
verilog/parser_sv.v:422: PORT 'ROWS' 'module' '' 'int' '' '1'
1041+
verilog/parser_sv.v:423: VAR 'member' 'row_id' 'struct' '' 'logic [ROWS-1:0]' '' ''
1042+
verilog/parser_sv.v:423: VAR 'parameter' 'data_t' 'module' '' 'type' '' 'struct'
1043+
verilog/parser_sv.v:424: VAR 'port' 'd' 'module' '' 'data_t' '' ''
1044+
verilog/parser_sv.v:424: PORT 'd' 'module' 'input' 'data_t' '' '1'
1045+
verilog/parser_sv.v:425: ENDMODULE 'endmodule'
10381046
verilog/parser_sv09.v:001: COMMENT '// 1800-2009 mantis1769'
10391047
verilog/parser_sv09.v:002: MODULE 'module' 'mantis1769' undef '0'
10401048
verilog/parser_sv09.v:002: VAR 'parameter' 'N' 'module' '' '' '' '1'

‎t/35_sigparser_ps.out‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -990,7 +990,7 @@ verilog/parser_sv.v:348: VAR 'parameter' 'P1' 'module' '' 'logic [31:0]' '[3:0]
990990
verilog/parser_sv.v:348: COMMENT '// unpacked array'
991991
verilog/parser_sv.v:349: VAR 'member' 'ecc' 'struct' '' 'logic' '' ''
992992
verilog/parser_sv.v:349: VAR 'member' 'data' 'struct' '' 'logic [7:0]' '' ''
993-
verilog/parser_sv.v:349: VAR 'member' 'memsig' 'module' '' 'struct' '' ''
993+
verilog/parser_sv.v:349: VAR 'net' 'memsig' 'module' 'wire' 'struct' '' ''
994994
verilog/parser_sv.v:350: ENDMODULE 'endmodule'
995995
verilog/parser_sv.v:352: MODULE 'module' 'not_a_bug315' undef '0'
996996
verilog/parser_sv.v:353: VAR 'typedef' 'supply_net_t' 'module' '' 'int' '' ''
@@ -1078,6 +1078,14 @@ verilog/parser_sv.v:417: PORT 'ifmp' 'module' '' '' '' '1'
10781078
verilog/parser_sv.v:418: INSTANT 'if_bug777' 'ifmp' ''
10791079
verilog/parser_sv.v:418: ENDCELL ''
10801080
verilog/parser_sv.v:419: ENDMODULE 'endmodule'
1081+
verilog/parser_sv.v:421: MODULE 'module' 'bug_param_struct' undef '0'
1082+
verilog/parser_sv.v:422: VAR 'parameter' 'ROWS' 'module' '' 'int' '' '2'
1083+
verilog/parser_sv.v:422: PORT 'ROWS' 'module' '' 'int' '' '1'
1084+
verilog/parser_sv.v:423: VAR 'member' 'row_id' 'struct' '' 'logic [ROWS-1:0]' '' ''
1085+
verilog/parser_sv.v:423: VAR 'parameter' 'data_t' 'module' '' 'type' '' 'struct'
1086+
verilog/parser_sv.v:424: VAR 'port' 'd' 'module' '' 'data_t' '' ''
1087+
verilog/parser_sv.v:424: PORT 'd' 'module' 'input' 'data_t' '' '1'
1088+
verilog/parser_sv.v:425: ENDMODULE 'endmodule'
10811089
verilog/parser_sv09.v:001: COMMENT '// 1800-2009 mantis1769'
10821090
verilog/parser_sv09.v:002: MODULE 'module' 'mantis1769' undef '0'
10831091
verilog/parser_sv09.v:002: VAR 'parameter' 'N' 'module' '' '' '' '1'

‎verilog/parser_sv.v‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -417,3 +417,9 @@ endmodule
417417
module bug868 (ifmp);
418418
if_bug777.master ifmp;
419419
endmodule
420+
421+
module bug_param_struct
422+
#(int ROWS = 2,
423+
type data_t = struct packed { logic [ROWS-1:0] row_id; })
424+
(input data_t d);
425+
endmodule

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