devel release

wsnyder · wsnyder · commit e19ed7330c27 · 2020-10-18T10:28:19.000-04:00
diff --git a/Changes b/Changes
@@ -4,6 +4,9 @@ The contributors that suggested a given feature are shown in [].  [by ...]
 indicates the contributor was also the author of the fix; Thanks!
 
 
+* Verilog-Perl 3.473 devel
+
+
 * Verilog-Perl 3.472 2020-10-18
 
 ***   Add vhier --includes. [Gregory Pierce]
diff --git a/EditFiles.pm b/EditFiles.pm
@@ -13,7 +13,7 @@ use vars qw($VERSION $Debug);
 ######################################################################
 #### Configuration Section
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 #######################################################################
 # CONSTRUCTORS
diff --git a/Getopt.pm b/Getopt.pm
@@ -16,7 +16,7 @@ use Cwd;
 ######################################################################
 #### Configuration Section
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 # Basenames we should ignore when recursing directories,
 # Because they contain large files of no relevance
diff --git a/Language.pm b/Language.pm
@@ -151,7 +151,7 @@ use Carp;
 ######################################################################
 #### Configuration Section
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 #### Internal Variables
diff --git a/META.yml b/META.yml
@@ -1,6 +1,6 @@
 --- #YAML:1.0
 name:         Verilog-Perl
-version:      3.472
+version:      3.473
 version_from: Language.pm
 abstract:     Verilog language utilities and parsing
 license:      perl
diff --git a/Netlist.pm b/Netlist.pm
@@ -14,7 +14,7 @@ use base qw(Verilog::Netlist::Subclass);
 use strict;
 use vars qw($Debug $Verbose $VERSION);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 #### Error Handling
diff --git a/Netlist/Cell.pm b/Netlist/Cell.pm
@@ -11,7 +11,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Cell::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::Cell::Struct'
diff --git a/Netlist/ContAssign.pm b/Netlist/ContAssign.pm
@@ -11,7 +11,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::ContAssign::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::ContAssign::Struct'
diff --git a/Netlist/Defparam.pm b/Netlist/Defparam.pm
@@ -11,7 +11,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Defparam::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::Defparam::Struct'
diff --git a/Netlist/File.pm b/Netlist/File.pm
@@ -12,7 +12,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::File::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::File::Struct'
diff --git a/Netlist/Interface.pm b/Netlist/Interface.pm
@@ -14,7 +14,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Interface::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::Interface::Struct'
diff --git a/Netlist/Logger.pm b/Netlist/Logger.pm
@@ -7,7 +7,7 @@ require Exporter;
 use vars qw($VERSION);
 use strict;
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 # We don't use Verilog::Netlist::Subclass, as this is called from it!
 
diff --git a/Netlist/ModPort.pm b/Netlist/ModPort.pm
@@ -12,7 +12,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::ModPort::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::ModPort::Struct'
diff --git a/Netlist/Module.pm b/Netlist/Module.pm
@@ -17,7 +17,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Module::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('new',
 	'Verilog::Netlist::Module::Struct'
diff --git a/Netlist/Net.pm b/Netlist/Net.pm
@@ -11,7 +11,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Net::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 my %_Type_Widths = (
     'bit'	=> 1,
diff --git a/Netlist/Pin.pm b/Netlist/Pin.pm
@@ -17,7 +17,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Pin::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('_new_base',
 	'Verilog::Netlist::Pin::Struct'
diff --git a/Netlist/Port.pm b/Netlist/Port.pm
@@ -11,7 +11,7 @@ use strict;
 @ISA = qw(Verilog::Netlist::Port::Struct
 	Verilog::Netlist::Subclass);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 structs('_new_base',
 	'Verilog::Netlist::Port::Struct'
diff --git a/Netlist/Subclass.pm b/Netlist/Subclass.pm
@@ -12,7 +12,7 @@ use base qw(Exporter);
 use vars qw($VERSION @EXPORT);
 use strict;
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 @EXPORT = qw(structs);
 
 # Maybe in the future.  For now all users of this must do it themselves
diff --git a/Parser/Parser.pm b/Parser/Parser.pm
@@ -14,7 +14,7 @@ use base qw(DynaLoader);
 use strict;
 use vars qw($VERSION $Debug);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 #$Debug sets the default value for debug.  You're better off with the object method though.
 
diff --git a/Parser/SigParser.pm b/Parser/SigParser.pm
@@ -14,7 +14,7 @@ use base qw(Verilog::Parser);
 ######################################################################
 #### Configuration Section
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 our @_Callback_Names = qw(
   attribute
diff --git a/Parser/bisonpre b/Parser/bisonpre
@@ -9,7 +9,7 @@ use Pod::Usage;
 use strict;
 use vars qw($Debug $VERSION);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 our $Self;
 
diff --git a/Parser/callbackgen b/Parser/callbackgen
@@ -14,7 +14,7 @@ use vars qw($Debug $VERSION);
 require "../Language.pm";
 package main;
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 # xs_manual=>1,   -> The .xs file makes the handler itself
 
diff --git a/Preproc/Preproc.pm b/Preproc/Preproc.pm
@@ -11,7 +11,7 @@ use base qw(DynaLoader);
 use strict;
 use vars qw($VERSION);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 #### Configuration Section
diff --git a/Std.pm b/Std.pm
@@ -14,7 +14,7 @@ use vars qw($VERSION);
 ######################################################################
 #### Configuration Section
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 #######################################################################
 # It's a PITRA to have pure datafiles get installed properly, so we have
diff --git a/vhier b/vhier
@@ -17,7 +17,7 @@ use Verilog::Getopt;
 use strict;
 use vars qw($Debug $VERSION);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 # main
diff --git a/vpassert b/vpassert
@@ -36,7 +36,7 @@ use vars qw ($VERSION $Debug $Opt %Vpassert_Conversions
 	     %Files %Files_Read
 	     %File_Dest
 	     );
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 # configuration
diff --git a/vppreproc b/vppreproc
@@ -16,7 +16,7 @@ use Verilog::Getopt;
 use strict;
 use vars qw($Debug $VERSION);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 # main
diff --git a/vrename b/vrename
@@ -23,7 +23,7 @@ use vars qw($VERSION %Vrename_Dont_Crypt %Vrename_Left_Edge_Define
 	    $Debug $Opt_Xref $Opt_Crypt $Opt_Crypt_All $Opt_Write $Opt_Keywords
 	    @Files);
 
-$VERSION = '3.472';
+$VERSION = '3.473';
 
 ######################################################################
 
