diff --git a/.config/dotnet-tools.json b/.config/dotnet-tools.json
index 46b66cb1b67def..51d9b2432e848f 100644
--- a/.config/dotnet-tools.json
+++ b/.config/dotnet-tools.json
@@ -3,16 +3,22 @@
"isRoot": true,
"tools": {
"coverlet.console": {
- "version": "1.7.0",
+ "version": "1.7.1",
"commands": [
"coverlet"
]
},
"dotnet-reportgenerator-globaltool": {
- "version": "4.5.2",
+ "version": "4.5.8",
"commands": [
"reportgenerator"
]
+ },
+ "microsoft.dotnet.xharness.cli": {
+ "version": "1.0.0-prerelease.20271.3",
+ "commands": [
+ "xharness"
+ ]
}
}
}
diff --git a/.editorconfig b/.editorconfig
index 6c6dcb40761745..28e3eaba64e83b 100644
--- a/.editorconfig
+++ b/.editorconfig
@@ -155,6 +155,7 @@ csharp_space_between_square_brackets = false
# Analyzers
dotnet_code_quality.ca1802.api_surface = private, internal
+dotnet_code_quality.CA2208.api_surface = public
# C++ Files
[*.{cpp,h,in}]
@@ -165,6 +166,9 @@ indent_brace_style = Allman
[*.{csproj,vbproj,vcxproj,vcxproj.filters,proj,nativeproj,locproj}]
indent_size = 2
+[*.{csproj,vbproj,proj,nativeproj,locproj}]
+charset = utf-8
+
# Xml build files
[*.builds]
indent_size = 2
diff --git a/.github/ISSUE_TEMPLATE/01_bug_report.md b/.github/ISSUE_TEMPLATE/01_bug_report.md
new file mode 100644
index 00000000000000..ddca1a08888f50
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/01_bug_report.md
@@ -0,0 +1,41 @@
+---
+name: Bug report
+about: Create a report to help us improve
+title: ''
+labels: ''
+assignees: ''
+
+---
+
+
+
+### Description
+
+
+
+### Configuration
+
+
+
+### Regression?
+
+
+
+### Other information
+
+
diff --git a/.github/ISSUE_TEMPLATE/02_api_proposal.md b/.github/ISSUE_TEMPLATE/02_api_proposal.md
new file mode 100644
index 00000000000000..4ba85d6256ab52
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/02_api_proposal.md
@@ -0,0 +1,52 @@
+---
+name: API proposal
+about: Propose a change to the public API surface
+title: ''
+labels: api-suggestion
+assignees: ''
+
+---
+
+## Background and Motivation
+
+
+
+## Proposed API
+
+
+
+## Usage Examples
+
+
+
+## Alternative Designs
+
+
+
+## Risks
+
+
diff --git a/.github/ISSUE_TEMPLATE/03_performance_issue.md b/.github/ISSUE_TEMPLATE/03_performance_issue.md
new file mode 100644
index 00000000000000..6da186f0453df1
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/03_performance_issue.md
@@ -0,0 +1,50 @@
+---
+name: Performance issue
+about: Report a performance problem or regression
+title: ''
+labels: 'tenet-performance'
+assignees: ''
+
+---
+
+
+
+### Description
+
+
+
+### Configuration
+
+
+
+### Regression?
+
+
+
+### Data
+
+
+
+### Analysis
+
+
diff --git a/.github/ISSUE_TEMPLATE/04_blank_issue.md b/.github/ISSUE_TEMPLATE/04_blank_issue.md
new file mode 100644
index 00000000000000..d1429bfd4c1d90
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/04_blank_issue.md
@@ -0,0 +1,8 @@
+---
+name: Blank issue
+about: Something that doesn't fit the other categories
+title: ''
+labels: ''
+assignees: ''
+
+---
diff --git a/.github/ISSUE_TEMPLATE/config.yml b/.github/ISSUE_TEMPLATE/config.yml
new file mode 100644
index 00000000000000..54d8c5740bad6c
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/config.yml
@@ -0,0 +1,20 @@
+blank_issues_enabled: true
+contact_links:
+ - name: Issue with ASP.NET Core
+ url: https://github.com/dotnet/aspnetcore/issues/new/choose
+ about: Please open issues relating to ASP.NET Core in dotnet/aspnetcore.
+ - name: Issue with .NET SDK
+ url: https://github.com/dotnet/sdk/issues/new/choose
+ about: Please open issues relating to the .NET SDK in dotnet/sdk.
+ - name: Issue with Entity Framework
+ url: https://github.com/dotnet/efcore/issues/new/choose
+ about: Please open issues relating to Entity Framework in dotnet/efcore.
+ - name: Issue with Roslyn compiler
+ url: https://github.com/dotnet/roslyn/issues/new/choose
+ about: Please open issues relating to the Roslyn .NET compiler in dotnet/roslyn.
+ - name: Issue with Windows Forms
+ url: https://github.com/dotnet/winforms/issues/new/choose
+ about: Please open issues relating to Windows Forms in dotnet/winforms.
+ - name: Issue with WPF
+ url: https://github.com/dotnet/wpf/issues/new/choose
+ about: Please open issues relating to WPF in dotnet/wpf.
diff --git a/.gitignore b/.gitignore
index a9a3cae8e94553..88165cf3073fd2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -348,3 +348,6 @@ linker
# ln -s $(pwd)/src/libraries/Common/src src/coreclr/src/System.Private.CoreLib/common
src/coreclr/src/System.Private.CoreLib/shared
src/coreclr/src/System.Private.CoreLib/common
+
+# The debug directory should not be ignored
+!src/coreclr/src/debug
diff --git a/Build.proj b/Build.proj
index 0ecff09e8552be..dc4a15ab5f413d 100644
--- a/Build.proj
+++ b/Build.proj
@@ -5,10 +5,7 @@
Reference the projects for traversal build. Ordering matters here.
-->
-
-
-
-
-
-
-
-
- $(RepoTasksDir)
- $(ArtifactsObjDir)runtime.tasks\Debug\build-semaphore.txt
-
-
-
-
+
+
$([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'installer.tasks'))
$([MSBuild]::NormalizePath('$(InstallerTasksOutputPath)', 'Debug', 'netstandard2.0', 'installer.tasks.dll'))
$([MSBuild]::NormalizePath('$(InstallerTasksOutputPath)', 'Debug', 'net46', 'installer.tasks.dll'))
- $(ArtifactsObjDir)HostMachineInfo.props
$([MSBuild]::NormalizeDirectory('$(RepoRoot)', 'docs'))
$([MSBuild]::NormalizeDirectory('$(DocsDir)', 'manpages'))
$([MSBuild]::NormalizeDirectory('$(LibrariesProjectRoot)', 'System.Private.CoreLib', 'src'))
+
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'AppleAppBuilder', 'Debug', '$(NetCoreAppCurrent)'))
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'AndroidAppBuilder', 'Debug', '$(NetCoreAppCurrent)'))
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'WasmAppBuilder', 'Debug', '$(NetCoreAppCurrent)', 'publish'))
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'MonoAOTCompiler', 'Debug', '$(NetCoreAppCurrent)'))
+
+ $([MSBuild]::NormalizePath('$(AppleAppBuilderDir)', 'AppleAppBuilder.dll'))
+ $([MSBuild]::NormalizePath('$(AndroidAppBuilderDir)', 'AndroidAppBuilder.dll'))
+ $([MSBuild]::NormalizePath('$(WasmAppBuilderDir)', 'WasmAppBuilder.dll'))
+ $([MSBuild]::NormalizePath('$(MonoAOTCompilerDir)', 'MonoAOTCompiler.dll'))
+
+
true
-
-
- false
diff --git a/Directory.Build.targets b/Directory.Build.targets
index aa09db11f42053..2d72cd0f912847 100644
--- a/Directory.Build.targets
+++ b/Directory.Build.targets
@@ -20,10 +20,6 @@
$(MajorVersion).$(MinorVersion)
-
- $([System.IO.Path]::Combine('$(IntermediateOutputPath)','$(MSBuildProjectName).AssemblyInfo$(DefaultLanguageSourceExtension)'))
-
-
@@ -31,11 +27,4 @@
latest
-
-
-
diff --git a/README.md b/README.md
index ee0ac7fcf5ff4e..72e763d3bcceaa 100644
--- a/README.md
+++ b/README.md
@@ -44,7 +44,7 @@ For other issues, please use the following repos:
## Useful Links
* [.NET Core source index](https://source.dot.net) / [.NET Framework source index](https://referencesource.microsoft.com)
-* [API Reference docs](https://docs.microsoft.com/dotnet/api/?view=netcore-3.0)
+* [API Reference docs](https://docs.microsoft.com/dotnet/api/?view=netcore-3.1)
* [.NET API Catalog](http://apisof.net) (incl. APIs from daily builds and API usage info)
* [API docs writing guidelines](https://github.com/dotnet/dotnet-api-docs/wiki) - useful when writing /// comments
@@ -55,7 +55,7 @@ For other issues, please use the following repos:
There are many .NET related projects on GitHub.
- [.NET home repo](https://github.com/Microsoft/dotnet) - links to 100s of .NET projects, from Microsoft and the community.
-- [ASP.NET Core home](https://docs.microsoft.com/aspnet/core/?view=aspnetcore-3.0) - the best place to start learning about ASP.NET Core.
+- [ASP.NET Core home](https://docs.microsoft.com/aspnet/core/?view=aspnetcore-3.1) - the best place to start learning about ASP.NET Core.
This project has adopted the code of conduct defined by the [Contributor Covenant](http://contributor-covenant.org/) to clarify expected behavior in our community. For more information, see the [.NET Foundation Code of Conduct](http://www.dotnetfoundation.org/code-of-conduct).
diff --git a/THIRD-PARTY-NOTICES.TXT b/THIRD-PARTY-NOTICES.TXT
index 33b2268a7f2faa..707bd024f8f867 100644
--- a/THIRD-PARTY-NOTICES.TXT
+++ b/THIRD-PARTY-NOTICES.TXT
@@ -820,3 +820,43 @@ Unless required by applicable law or agreed to in writing, software distributed
under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied. See the License for the
specific language governing permissions and limitations under the License.
+
+License notice for DirectX Math Library
+---------------------------------------
+
+https://github.com/microsoft/DirectXMath/blob/master/LICENSE
+
+ The MIT License (MIT)
+
+Copyright (c) 2011-2020 Microsoft Corp
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this
+software and associated documentation files (the "Software"), to deal in the Software
+without restriction, including without limitation the rights to use, copy, modify,
+merge, publish, distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to the following
+conditions:
+
+The above copyright notice and this permission notice shall be included in all copies
+or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
+INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
+OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+License notice for ldap4net
+---------------------------
+
+The MIT License (MIT)
+
+Copyright (c) 2018 Alexander Chermyanin
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
diff --git a/build.cmd b/build.cmd
index 615bef6c65b576..76f4d8418947e8 100644
--- a/build.cmd
+++ b/build.cmd
@@ -4,5 +4,5 @@ setlocal
set _args=%*
if "%~1"=="-?" set _args=-help
-powershell -ExecutionPolicy ByPass -NoProfile -Command "%~dp0eng\build.ps1" %_args%
+powershell -ExecutionPolicy ByPass -NoProfile -Command "& '%~dp0eng\build.ps1'" %_args%
exit /b %ERRORLEVEL%
diff --git a/docs/area-owners.md b/docs/area-owners.md
index 4193e6f88632b8..ed99186090f578 100644
--- a/docs/area-owners.md
+++ b/docs/area-owners.md
@@ -4,8 +4,8 @@ Below table shows the combined area owners on this repository:
|-------------|------------------|------------------|
| area-AssemblyLoader-coreclr | @jeffschwMSFT @vitek-karas | |
| area-CodeGen-coreclr | @BruceForstall @dotnet/jit-contrib | |
-| area-CrossGen/NGEN-coreclr | @fadimounir | |
-| area-crossgen2-coreclr | @nattress @MichalStrehovsky @trylek @fadimounir | |
+| area-CrossGen/NGEN-coreclr | @nattress | |
+| area-crossgen2-coreclr | @nattress @trylek @dotnet/crossgen-contrib | |
| area-DependencyModel | @eerhardt | Microsoft.Extensions.DependencyModel |
| area-Diagnostics-coreclr | @tommcdon | |
| area-ExceptionHandling-coreclr | @janvorli | |
@@ -30,14 +30,15 @@ Below table shows the combined area owners on this repository:
| area-TieredCompilation-coreclr | @kouvel | |
| area-Tizen | @alpencolt @gbalykov | |
| area-Tracing-coreclr | @sywhang @josalem | |
-| area-TypeSystem-coreclr | @davidwrighton @MichalStrehovsky @fadimounir | |
+| area-TypeSystem-coreclr | @davidwrighton @MichalStrehovsky @janvorli @mangod9 | |
| area-UWP | @nattress | UWP-specific issues including Microsoft.NETCore.UniversalWindowsPlatform and Microsoft.Net.UWPCoreRuntimeSdk |
-| area-VM-coreclr | @jeffschwMSFT | |
+| area-VM-coreclr | @mangod9 | |
| area-AssemblyLoader-mono | @CoffeeFlux | |
| area-Codegen-meta-mono | @vargaz | |
| area-Codegen-JIT-mono | @SamMonoRT | |
| area-Codegen-AOT-mono | @SamMonoRT | |
| area-Codegen-Interpreter-mono | @BrzVlad | |
+| area-CodeGen-LLVM-mono | @imhameed | |
| area-CoreLib-mono | @steveisok | |
| area-GC-mono | @BrzVlad | |
| area-Build-mono | @akoeplinger | |
@@ -47,8 +48,19 @@ Below table shows the combined area owners on this repository:
| area-Threading-mono | @lambdageek | |
| area-Tracing-mono | @lambdageek | |
| area-Performance-mono | @SamMonoRT | |
+| ** Extensions namespaces ** | | |
+| area-Extensions-Caching | @maryamariyan | |
+| area-Extensions-Configuration | @maryamariyan | |
+| area-Extensions-DependencyInjection | @maryamariyan | |
+| area-Extensions-FileSystem | @maryamariyan | |
+| area-Extensions-Hosting | @maryamariyan | |
+| area-Extensions-HttpClientFactory | @maryamariyan | |
+| area-Extensions-Logging | @maryamariyan | |
+| area-Extensions-Options | @maryamariyan | |
+| area-Extensions-Primitives | @maryamariyan | |
+| area-Microsoft.Extensions | @maryamariyan | |
| **System namespaces** | | |
-| area-System.Buffers | @tannergooding | |
+| area-System.Buffers | @tannergooding @GrabYourPitchforks @pgovind | |
| area-System.CodeDom | @buyaa-n @krwq | |
| area-System.Collections | @eiriktsarpalis @layomia | Excluded:System.Array -> System.Runtime Odbc, OleDb - [@saurabh500](https://github.com/saurabh500) System.Diagnostics.EventLog - [@Anipik](https://github.com/Anipik) System.Diagnostics.DiagnosticSource System.Diagnostics.PerformanceCounter - [@Anipik](https://github.com/Anipik) System.Diagnostics.Tracing System.Diagnostics.TraceSource - [@Anipik](https://github.com/Anipik)
+ netstandard2.0;netstandard2.1
+
+...
+```
+2. Use a StartsWith when you want to test for multiple .NETStandard or .NETFramework versions.
+Example:
+```
+
+ netstandard2.0;netstandard2.1
+
+...
+```
+4. Use negations if that makes the conditions easier.
+Example:
+```
+
+ netstandard2.0;net461;net472;net5.0
+
+...
+```
+
+## Directory layout
+
Library projects should use the following directory layout.
```
@@ -121,7 +161,7 @@ The output for the ref project build will be a flat targeting pack folder in the
## src
In the src directory for a library there should be only **one** `.csproj` file that contains any information necessary to build the library in various target frameworks. All supported target frameworks should be listed in the `TargetFrameworks` property.
-All libraries should use `` template to create a type name like `SAFEHANDLEREF`. All the error checking from `OBJECTREF` is built into the `REF` template, and you can freely dereference this `SAFEHANDLEREF` and use fields off of it in native code. You still must GC protect these references.
+
+# Calling into managed code from unmanaged code
+
+Clearly there are places where the CLR must call into managed code from native. For this purpose, we have added a `MethodDescCallSite` class to handle a lot of plumbing for you. Conceptually, all you need to do is find the `MethodDesc*` for the method you want to call, find a managed object for the "this" pointer (if you're calling an instance method), pass in an array of arguments, and deal with the return value. Internally, you'll need to potentially toggle your thread's state to allow the GC to run in preemptive mode, etc.
+
+Here's a simplified example. Note how this instance uses the binder described in the previous section to call `SafeHandle`'s virtual `ReleaseHandle` method.
+
+```C++
+void SafeHandle::RunReleaseMethod(SafeHandle* psh)
+{
+ CONTRACTL {
+ THROWS;
+ GC_TRIGGERS;
+ MODE_COOPERATIVE;
+ } CONTRACTL_END;
+
+ SAFEHANDLEREF sh(psh);
+
+ GCPROTECT_BEGIN(sh);
+
+ MethodDescCallSite releaseHandle(s_pReleaseHandleMethod, METHOD__SAFE_HANDLE__RELEASE_HANDLE, (OBJECTREF*)&sh, TypeHandle(), TRUE);
+
+ ARG_SLOT releaseArgs[] = { ObjToArgSlot(sh) };
+ if (!(BOOL)releaseHandle.Call_RetBool(releaseArgs)) {
+ MDA_TRIGGER_ASSISTANT(ReleaseHandleFailed, ReportViolation)(sh->GetTypeHandle(), sh->m_handle);
+ }
+
+ GCPROTECT_END();
+}
+```
+
+# Interactions with other subsystems
+
+## Debugger
+
+One limitation of FCalls today is that you cannot easily debug both managed code and FCalls easily in Visual Studio's Interop (or mixed mode) debugging. Setting a breakpoint today in an FCall and debugging with Interop debugging just doesn't work. This most likely won't be fixed.
+
+# Physical architecture
+
+When the CLR starts up, CoreLib is loaded by a method called `SystemDomain::LoadBaseSystemClasses()`. Here, the base data types and other similar classes (like `Exception`) are loaded, and appropriate global pointers are set up to refer to CoreLib's types.
+
+For FCalls, look in [fcall.h][fcall] for infrastructure, and [ecalllist.h][ecalllist] to properly inform the runtime about your FCall method.
+
+For QCalls, look in [qcall.h][qcall] for associated infrastructure, and [ecalllist.h][ecalllist] to properly inform the runtime about your QCall method.
+
+More general infrastructure and some native type definitions can be found in [object.h][object.h]. The binder uses `mscorlib.h` to associate managed and native classes.
+
+[object.h]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/object.h
diff --git a/docs/design/coreclr/botr/dac-notes.md b/docs/design/coreclr/botr/dac-notes.md
index 1a267484760e9e..43b1714b1d8c90 100644
--- a/docs/design/coreclr/botr/dac-notes.md
+++ b/docs/design/coreclr/botr/dac-notes.md
@@ -11,13 +11,13 @@ Historically, the CLR debugger has operated in process. A debugger extension, SO
Notice that the DAC reads _the memory of the target process_. It's important to realize that the debugger and the debuggee are separate processes with separate address spaces. Thus it is important to make a clear distinction between target memory and host memory. Using a target address in code running in the host process would have completely unpredictable and generally incorrect results. When using the DAC to retrieve memory from the target, it is important to be very careful to use addresses from the correct address space. Furthermore, sometimes the target addresses are sometimes strictly used as data. In this case, it would be just as incorrect to use a host address. For example, to display information about a managed function, we might want to list its starting address and size. Here, it is important to provide the target address. When writing code in the VM that the DAC will run, one needs to correctly choose when to use host and target addresses.
-The DAC infrastructure (the macros and templates that control how host or target memory is accessed) supplies certain conventions that distinguish which pointers are host addresses and which are target addresses. When a function is _DACized_ (i.e., use the DAC infrastructure to make the function work out of process), host pointers of type _T _are declared to be of type _T _\*. Target pointers are of type PTR\ __T_. Remember though, that the concept of host versus target is only meaningful for the DAC. In a non-DAC build, we have only a single address space. The host and the target are the same: the CLR. If we declare a local variable of either type _T \* _or of type PTR\_T in a VM function, it will be a "host pointer" When we are executing code in clr.dll (coreclr.dll), there is absolutely no difference between a local variable of type _T \* _and a local variable of type PTR\__ T._ If we execute the function compiled into mscordacwks.dll (msdaccore.dll) from the same source, the variable declared to be of type _T \*_ will be a true host pointer, with the debugger as the host. If you think about it, this is obvious. Nevertheless it can become confusing when we start passing these pointers to other VM functions. When we are DACizing a function (i.e., changing _T \*_ to PTR\__T_, as appropriate), we sometimes need to trace a pointer back to its point of origin to determine whether it should be a host or target type.
+The DAC infrastructure (the macros and templates that control how host or target memory is accessed) supplies certain conventions that distinguish which pointers are host addresses and which are target addresses. When a function is _DACized_ (i.e., use the DAC infrastructure to make the function work out of process), host pointers of type `T` are declared to be of type `T *`. Target pointers are of type `PTR_T`. Remember though, that the concept of host versus target is only meaningful for the DAC. In a non-DAC build, we have only a single address space. The host and the target are the same: the CLR. If we declare a local variable of either type `T *` _or of type `PTR_T` in a VM function, it will be a "host pointer". When we are executing code in clr.dll (coreclr.dll), there is absolutely no difference between a local variable of type `T *` and a local variable of type `PTR_T`. If we execute the function compiled into mscordacwks.dll (msdaccore.dll) from the same source, the variable declared to be of type `T *` will be a true host pointer, with the debugger as the host. If you think about it, this is obvious. Nevertheless it can become confusing when we start passing these pointers to other VM functions. When we are DACizing a function (i.e., changing `T *` to `PTR_T`, as appropriate), we sometimes need to trace a pointer back to its point of origin to determine whether it should be a host or target type.
-When one has no understanding of the DAC, it's easy to find the use of the DAC infrastructure annoying. The TADDRs and PTR\_this and dac\_casts, etc. seem to clutter the code and make it harder to understand. With just a little work, though, you'll find that these are not really difficult to learn. Keeping host and target addresses explicitly different is really a form of strong typing. The more diligent we are, the easier it becomes to ensure our code is correct.
+When one has no understanding of the DAC, it's easy to find the use of the DAC infrastructure annoying. The `TADDR`s and `PTR_this` and `dac_casts`, etc. seem to clutter the code and make it harder to understand. With just a little work, though, you'll find that these are not really difficult to learn. Keeping host and target addresses explicitly different is really a form of strong typing. The more diligent we are, the easier it becomes to ensure our code is correct.
Because the DAC potentially operates on a dump, the part of the VM sources we build in clr.dll (msdaccore.dll) must be non-invasive. Specifically, we usually don't want to do anything that would cause writing to the target's address space, nor can we execute any code that might cause an immediate garbage collection. (If we can defer the GC, it may be possible to allocate.) Note that the _host_ state is always mutated (temporaries, stack or local heap values); it is only mutating the _target_ space that is problematic. To enforce this, we do two things: code factoring and conditional compilation. In an ideal world, we would factor the VM code so that we would strictly isolate invasive actions in functions that are separate from non-invasive functions.
-Unfortunately, we have a large code base, most of which we wrote without ever thinking about the DAC at all. We have a significant number of functions with "find or create" semantics and many other functions that have some parts that just do inspection and other parts that write to the target. Sometimes we control this with a flag passed into the function. This is common in loader code, for example. To avoid having to complete the immense job of refactoring all the VM code before we can use the DAC, we have a second method to prevent executing invasive code from out of process. We have a defined pre-processor constant, DACCESS\_COMPILE that we use to control what parts of the code we compile into the DAC. We would like to use the DACCESS\_COMPILE constant as little as we can, so when we DACize a new code path, we prefer to refactor whenever possible. Thus, a function that has "find or create" semantics should become two functions: one that tries to find the information and a wrapper that calls this and creates if the find fails. That way, the DAC code path can call the find function directly and avoid the creation.
+Unfortunately, we have a large code base, most of which we wrote without ever thinking about the DAC at all. We have a significant number of functions with "find or create" semantics and many other functions that have some parts that just do inspection and other parts that write to the target. Sometimes we control this with a flag passed into the function. This is common in loader code, for example. To avoid having to complete the immense job of refactoring all the VM code before we can use the DAC, we have a second method to prevent executing invasive code from out of process. We have a defined pre-processor constant, `DACCESS_COMPILE` that we use to control what parts of the code we compile into the DAC. We would like to use the `DACCESS_COMPILE` constant as little as we can, so when we DACize a new code path, we prefer to refactor whenever possible. Thus, a function that has "find or create" semantics should become two functions: one that tries to find the information and a wrapper that calls this and creates if the find fails. That way, the DAC code path can call the find function directly and avoid the creation.
How does the DAC work?
======================
@@ -27,9 +27,9 @@ As discussed, the DAC works by marshaling the data it needs and running code in
Marshaling Principles
---------------------
-The DAC maintains a cache of data that it reads. This avoids the overhead of reading the same values repeatedly. Of course, if the target is live, the values will potentially change. We can only assume the cached values are valid as long as the debuggee remains stopped. Once we allow the target to continue execution, we must flush the DAC cache. The DAC will retrieve the values again when the debugger stops the target for further inspection. The entries in the DAC cache are of type DAC\_INSTANCE. This contains (among other data) the target address, the size of the data and space for the marshaled data itself. When the DAC marshals data, it returns the address of the marshaled data part of this entry as the host address.
+The DAC maintains a cache of data that it reads. This avoids the overhead of reading the same values repeatedly. Of course, if the target is live, the values will potentially change. We can only assume the cached values are valid as long as the debuggee remains stopped. Once we allow the target to continue execution, we must flush the DAC cache. The DAC will retrieve the values again when the debugger stops the target for further inspection. The entries in the DAC cache are of type `DAC_INSTANCE`. This contains (among other data) the target address, the size of the data and space for the marshaled data itself. When the DAC marshals data, it returns the address of the marshaled data part of this entry as the host address.
-When the DAC reads a value from the target, it marshals the value as a chunk of bytes of a given size (determined by its type). By keeping the target address as a field in the cache entries, it maintains a mapping between the target address and the host address (the address in the cache). Between any stop and continue of a debugger session, the DAC will marshal each value requested only once, as long as subsequent accesses use the same type. (If we reference the target address by two different types, the size may be different, so the DAC will create a new cache entry for the new type). If the value is already in the cache, the DAC will be able to look it up by its target address. That means we can correctly compare two host pointers for (in)equality as long as we have accessed both pointers using the same type. This identity of pointers does not hold across type conversions however. Furthermore, we have no guarantee that values marshaled separately will maintain the same spatial relationship in the cache that they do in the target, so it is incorrect to compare two host pointers for less-than or greater-than relationships. Object layout must be identical in host and target, so we can access fields in an object in the cache using the same offsets we use in the target. Remember that any pointer fields in a marshaled object will be target addresses (generally declared as data members of a PTR type). If we need the values at those addresses, the DAC must marshal them to the host before dereferencing them.
+When the DAC reads a value from the target, it marshals the value as a chunk of bytes of a given size (determined by its type). By keeping the target address as a field in the cache entries, it maintains a mapping between the target address and the host address (the address in the cache). Between any stop and continue of a debugger session, the DAC will marshal each value requested only once, as long as subsequent accesses use the same type. (If we reference the target address by two different types, the size may be different, so the DAC will create a new cache entry for the new type). If the value is already in the cache, the DAC will be able to look it up by its target address. That means we can correctly compare two host pointers for (in)equality as long as we have accessed both pointers using the same type. This identity of pointers does not hold across type conversions however. Furthermore, we have no guarantee that values marshaled separately will maintain the same spatial relationship in the cache that they do in the target, so it is incorrect to compare two host pointers for less-than or greater-than relationships. Object layout must be identical in host and target, so we can access fields in an object in the cache using the same offsets we use in the target. Remember that any pointer fields in a marshaled object will be target addresses (generally declared as data members of a `PTR` type). If we need the values at those addresses, the DAC must marshal them to the host before dereferencing them.
Because we build this dll from the same sources that we use to build mscorwks.dll (coreclr.dll), the mscordacwks.dll (msdaccore.dll) build that the debugger uses must match the mscorwks build exactly. You can see that this is obviously true if you consider that between builds we might add or remove a field from a type we use. The size for the object in mscorwks would then be different from the size in mscordacwks and the DAC could not marshal the object correctly. This has a ramification that's obvious when you think about it, but easy to overlook. We cannot have fields in objects that exist only in DAC builds or only in non-DAC builds. Thus, a declaration such as the following would lead to incorrect behavior.
@@ -60,20 +60,20 @@ An example may be helpful in understanding how marshaling works. The common debu
-The debugger in this figure could be Visual Studio, MDbg, WinDbg, etc. The debugger interfaces with the CLR debugger interface (DBI) APIs to get the information it needs. Information that must come from the target goes through the DAC. The debugger implements the data target, which is responsible for implementing a ReadVirtual function to read memory in the target. The dotted line in the diagram represents the process boundary.
+The debugger in this figure could be Visual Studio, MDbg, WinDbg, etc. The debugger interfaces with the CLR debugger interface (DBI) APIs to get the information it needs. Information that must come from the target goes through the DAC. The debugger implements the data target, which is responsible for implementing a `ReadVirtual` function to read memory in the target. The dotted line in the diagram represents the process boundary.
-Suppose the debugger needs to display the starting address of an ngen'ed method in the managed application that it has gotten from the managed stack. We will assume that the debugger has already gotten an instance of ICorDebugFunction back from the DBI. It will begin by calling the DBI API ICorDebugFunction::GetNativeCode. This calls into the DAC through the DAC/DBI interface function GetNativeCodeInfo, passing in the domain file and metadata token for the function. The following code fragment is a simplification of the actual function, but it illustrates marshaling without introducing extraneous details.
+Suppose the debugger needs to display the starting address of an ngen'ed method in the managed application that it has gotten from the managed stack. We will assume that the debugger has already gotten an instance of `ICorDebugFunction` back from the DBI. It will begin by calling the DBI API `ICorDebugFunction::GetNativeCode`. This calls into the DAC through the DAC/DBI interface function `GetNativeCodeInfo`, passing in the domain file and metadata token for the function. The following code fragment is a simplification of the actual function, but it illustrates marshaling without introducing extraneous details.
void DacDbiInterfaceImpl::GetNativeCodeInfo(TADDR taddrDomainFile,
- mdToken functionToken,
- NativeCodeFunctionData \* pCodeInfo)
+ mdToken functionToken,
+ NativeCodeFunctionData * pCodeInfo)
{
...
- DomainFile \* pDomainFile = dac\_cast(taddrDomainFile);
- Module \* pModule = pDomainFile->GetCurrentModule();
+ DomainFile * pDomainFile = dac_cast(taddrDomainFile);
+ Module * pModule = pDomainFile->GetCurrentModule();
- MethodDesc\* pMethodDesc = pModule->LookupMethodDef (functionToken);
+ MethodDesc* pMethodDesc = pModule->LookupMethodDef (functionToken);
pCodeInfo->pNativeCodeMethodDescToken = pMethodDesc;
// if we are loading a module and trying to bind a previously set breakpoint, we may not have
@@ -85,9 +85,9 @@ Suppose the debugger needs to display the starting address of an ngen'ed method
}
}
-The first step is to get the module in which the managed function resides. The taddrDomainFile parameter we pass in represents a target address, but we will need to be able to dereference it here. This means we need the DAC to marshal the value. The dac\_cast operator will construct a new instance of PTR\_DomainFile with a target address equal to the value of domainFileTaddr. When we assign this to pDomainFile, we have an implicit conversion to the host pointer type. This conversion operator is a member of the PTR type and this is where the marshaling occurs. The DAC first searches its cache for the target address. If it doesn't find it, it reads the data from the target for the marshaled DomainFile instance and copies it to the cache. Finally, it returns the host address of the marshaled value.
+The first step is to get the module in which the managed function resides. The `taddrDomainFile` parameter we pass in represents a target address, but we will need to be able to dereference it here. This means we need the DAC to marshal the value. The `dac_cast` operator will construct a new instance of `PTR_DomainFile` with a target address equal to the value of `domainFileTaddr`. When we assign this to `pDomainFile`, we have an implicit conversion to the host pointer type. This conversion operator is a member of the `PTR` type and this is where the marshaling occurs. The DAC first searches its cache for the target address. If it doesn't find it, it reads the data from the target for the marshaled `DomainFile` instance and copies it to the cache. Finally, it returns the host address of the marshaled value.
-Now we can call GetCurrentModule on this host instance of the DomainFile. This function is a simple accessor that returns DomainFile::m\_pModule. Notice that it returns a Module \*, which will be a host address. The value of m\_pModule is a target address (the DAC will have copied the DomainFile instance as raw bytes). The type for the field is PTR\_Module, however, so when the function returns it, the DAC will automatically marshal it as part of the conversion to Module \*. That means the return value is a host address. Now we have the correct module and a method token, so we have all the information we need to get the MethodDesc.
+Now we can call `GetCurrentModule` on this host instance of the `DomainFile`. This function is a simple accessor that returns `DomainFile::m_pModule`. Notice that it returns a `Module *`, which will be a host address. The value of `m_pModule` is a target address (the DAC will have copied the `DomainFile` instance as raw bytes). The type for the field is `PTR_Module`, however, so when the function returns it, the DAC will automatically marshal it as part of the conversion to `Module *`. That means the return value is a host address. Now we have the correct module and a method token, so we have all the information we need to get the `MethodDesc`.
Module * DomainFile::GetCurrentModule()
{
@@ -96,20 +96,19 @@ Now we can call GetCurrentModule on this host instance of the DomainFile. This f
return m_pModule;
}
-In this simplified version of the code, we are assuming that the method token is a method definition. The next step, then, is to call the LookupMethodDef function on the Module instance.
+In this simplified version of the code, we are assuming that the method token is a method definition. The next step, then, is to call the `LookupMethodDef` function on the `Module` instance.
- inline MethodDesc \*Module::LookupMethodDef(mdMethodDef token)
+ inline MethodDesc *Module::LookupMethodDef(mdMethodDef token)
{
- WRAPPER\_CONTRACT;
- SUPPORTS\_DAC;
+ WRAPPER_CONTRACT;
+ SUPPORTS_DAC;
...
- return dac\_cast(GetFromRidMap(&m\_MethodDefToDescMap,
- RidFromToken(token)));
+ return dac_cast(GetFromRidMap(&m_MethodDefToDescMap, RidFromToken(token)));
}
-This uses the RidMap to lookup the MethodDesc. If you look at the definition for this function, you will see that it returns a TADDR:
+This uses the `RidMap` to lookup the `MethodDesc`. If you look at the definition for this function, you will see that it returns a `TADDR`:
- TADDR GetFromRidMap(LookupMap \*pMap, DWORD rid)
+ TADDR GetFromRidMap(LookupMap *pMap, DWORD rid)
{
...
@@ -118,52 +117,53 @@ This uses the RidMap to lookup the MethodDesc. If you look at the definition for
return result;
}
-This represents a target address, but it's not really a pointer; it's simply a number (although it represents an address). The problem is that LookupMethodDef needs to return the address of a MethodDesc that we can dereference. To accomplish this, the function uses a dac\_cast to PTR\_MethodDesc to convert the TADDR to a PTR\_MethodDesc. You can think of this as the target address space form of a cast from void \* to MethodDesc \*. In fact, this code would be slightly cleander if GetFromRidMap returned a PTR\_VOID (with pointer semantics) instead of a TADDR (with integer semantics). Again, the type conversion implicit in the return statement ensures that the DAC marshals the object (if necessary) and returns the host address of the MethodDesc in the DAC cache.
+This represents a target address, but it's not really a pointer; it's simply a number (although it represents an address). The problem is that `LookupMethodDef` needs to return the address of a `MethodDesc` that we can dereference. To accomplish this, the function uses a `dac_cast` to `PTR_MethodDesc` to convert the `TADDR` to a `PTR_MethodDesc`. You can think of this as the target address space form of a cast from `void *` to `MethodDesc *`. In fact, this code would be slightly cleander if `GetFromRidMap` returned a `PTR_VOID` (with pointer semantics) instead of a `TADDR` (with integer semantics). Again, the type conversion implicit in the return statement ensures that the DAC marshals the object (if necessary) and returns the host address of the `MethodDesc` in the DAC cache.
-The assignment statement in GetFromRidMap indexes an array to get a particular value. The pMap parameter is the address of a structure field from the MethodDesc. As such, the DAC will have copied the entire field into the cache when it marshaled the MethodDesc instance. Thus, pMap, which is the address of this struct, is a host pointer. Dereferencing it does not involve the DAC at all. The pTable field, however, is a PTR\_TADDR. What this tells us is that pTable is an array of target addresses, but its type indicates that it is a marshaled type. This means that pTable will be a target address as well. We dereference it with the overloaded indexing operator for the PTR type. This will get the target address of the array and compute the target address of the element we want. The last step of indexing marshals the array element back to a host instance in the DAC cache and returns its value. We assign the the element (a TADDR) to the local variable result and return it.
+The assignment statement in `GetFromRidMap` indexes an array to get a particular value. The `pMap` parameter is the address of a structure field from the `MethodDesc`. As such, the DAC will have copied the entire field into the cache when it marshaled the `MethodDesc` instance. Thus, `pMap`, which is the address of this struct, is a host pointer. Dereferencing it does not involve the DAC at all. The `pTable` field, however, is a `PTR_TADDR`. What this tells us is that `pTable` is an array of target addresses, but its type indicates that it is a marshaled type. This means that `pTable` will be a target address as well. We dereference it with the overloaded indexing operator for the `PTR` type. This will get the target address of the array and compute the target address of the element we want. The last step of indexing marshals the array element back to a host instance in the DAC cache and returns its value. We assign the the element (a `TADDR`) to the local variable result and return it.
-Finally, to get the code address, the DAC/DBI interface function will call MethodDesc::GetNativeCode. This function returns a value of type PCODE. This type is a target address, but one that we cannot dereference (it is just an alias of TADDR) and one that we use specifically to specify a code address. We store this value on the ICorDebugFunction instance and return it to the debugger.
+Finally, to get the code address, the DAC/DBI interface function will call `MethodDesc::GetNativeCode`. This function returns a value of type `PCODE`. This type is a target address, but one that we cannot dereference (it is just an alias of `TADDR`) and one that we use specifically to specify a code address. We store this value on the `ICorDebugFunction` instance and return it to the debugger.
### PTR Types
-Because the DAC marshals values from the target address space to the host address space, understanding how the DAC handles target pointers is fundamental. We collectively refer to the fundamental types used for marshaling these as "PTR types." You will see that [daccess.h][daccess.h] defines two classes: \_\_TPtrBase, which has several derived types, and \_\_GlobalPtr. We don't use these types directly; we use them only indirectly through a number of macros. Each of these contains a single data member to give us the target address of the value. For \_\_TPtrBase, this is a full address. For \_\_GlobalPtr, it is a relative address, referenced from a DAC global base location. The "T" in \_\_TPtrBase stands for "target". As you can guess, we use types derived from \_\_TPtrBase for pointers that are data members or locals and we use \_\_GlobalPtr for globals and statics.
+Because the DAC marshals values from the target address space to the host address space, understanding how the DAC handles target pointers is fundamental. We collectively refer to the fundamental types used for marshaling these as "PTR types." You will see that [daccess.h][daccess.h] defines two classes: `__TPtrBase`, which has several derived types, and `__GlobalPtr`. We don't use these types directly; we use them only indirectly through a number of macros. Each of these contains a single data member to give us the target address of the value. For `__TPtrBase`, this is a full address. For `__GlobalPtr`, it is a relative address, referenced from a DAC global base location. The "T" in `__TPtrBase` stands for "target". As you can guess, we use types derived from `__TPtrBase` for pointers that are data members or locals and we use `__GlobalPtr` for globals and statics.
-In practice, we use these types only through macros. The introductory comment in [daccess.h][daccess.h] has examples of the use of all of these. What is interesting about these macros is that they will expand to declare instantiated types from these marshaling templates in DAC builds, but are no-ops in non-DAC builds. For example, the following definition declares PTR\_MethodTable as a type to represent method table pointers (note that the convention is to name these types with a prefix of PTR\_):
+In practice, we use these types only through macros. The introductory comment in [daccess.h][daccess.h] has examples of the use of all of these. What is interesting about these macros is that they will expand to declare instantiated types from these marshaling templates in DAC builds, but are no-ops in non-DAC builds. For example, the following definition declares `PTR_MethodTable` as a type to represent method table pointers (note that the convention is to name these types with a prefix of `PTR_`):
- typedef DPTR(class MethodTable) PTR\_MethodTable;
+ typedef DPTR(class MethodTable) PTR_MethodTable;
-In a DAC build, the DPTR macro will expand to declare a \_\_DPtr type named PTR\_MethodTable. In a non-DAC build, the macro simply declares PTR\_MethodTable to be MethodTable \*. This implies that the DAC functionality does not result in any behavior change or performance degradation in non-DAC builds.
+In a DAC build, the `DPTR` macro will expand to declare a `__DPtr` type named `PTR_MethodTable`. In a non-DAC build, the macro simply declares `PTR_MethodTable` to be `MethodTable *`. This implies that the DAC functionality does not result in any behavior change or performance degradation in non-DAC builds.
-Even better, in a DAC build, the DAC will automatically marshal variables, data members, or return values declared to be of type PTR\_MethodTable, as we saw in the example in the last section. The marshaling is completely transparent. The \_\_DPtr type has overloaded operator functions to redefine pointer dereferencing and array indexing, and a conversion operator to cast to the host pointer type. These operations determine whether the requested value is already in the cache, from whence the operators will return them immediately, or whether it is necessary to read from the target and load the value into the cache before returning it. If you are interested in understanding the details, the function responsible for these cache operations is DacInstantiateTypeByAddressHelper.
+Even better, in a DAC build, the DAC will automatically marshal variables, data members, or return values declared to be of type `PTR_MethodTable`, as we saw in the example in the last section. The marshaling is completely transparent. The `__DPtr` type has overloaded operator functions to redefine pointer dereferencing and array indexing, and a conversion operator to cast to the host pointer type. These operations determine whether the requested value is already in the cache, from whence the operators will return them immediately, or whether it is necessary to read from the target and load the value into the cache before returning it. If you are interested in understanding the details, the function responsible for these cache operations is `DacInstantiateTypeByAddressHelper`.
-PTR types defined with DPTR are the most common in the runtime, but we also have PTR types for global and static pointers, restricted-use arrays, pointers to variable-sized objects, and pointers to classes with virtual functions that we may need to call from mscordacwks.dll (msdaccore.dll). Most of these are rare and you can refer to [daccess.h][daccess.h] to learn more about them if you need them.
+`PTR` types defined with `DPTR` are the most common in the runtime, but we also have `PTR` types for global and static pointers, restricted-use arrays, pointers to variable-sized objects, and pointers to classes with virtual functions that we may need to call from mscordacwks.dll (msdaccore.dll). Most of these are rare and you can refer to [daccess.h][daccess.h] to learn more about them if you need them.
-The GPTR and VPTR macros are common enough to warrant special mention here. Both the way we use these and their external behavior is quite similar to DPTRs. Again, marshaling is automatic and transparent. The VPTR macro declares a marshaled pointer type for a class with virtual functions. This special macro is necessary because the virtual function table is essentially an implicit extra field. The DAC has to marshal this separately, since the function addresses are all target addresses that the DAC must convert to host addresses. Treating these classes in this way means that the DAC automatically instantiates the correct implementation class, making casts between base and derived types unnecessary. When you declare a VPTR type, you must also list it in vptr\_list.h. \_\_GlobalPtr types provide base functionality to marshal both global variables and static data members through the GPTR, GVAL, SPTR and SVAL macros. The implementation of global variables is almost identical to that of static fields (both use the \_\_GlobalPtr class) and require the addition of an entry in [dacvars.h][dacvars.h]. The comments in daccess.h and dacvars.h provide more details about declaring these types.
+The `GPTR` and `VPTR` macros are common enough to warrant special mention here. Both the way we use these and their external behavior is quite similar to `DPTR`s. Again, marshaling is automatic and transparent. The `VPTR` macro declares a marshaled pointer type for a class with virtual functions. This special macro is necessary because the virtual function table is essentially an implicit extra field. The DAC has to marshal this separately, since the function addresses are all target addresses that the DAC must convert to host addresses. Treating these classes in this way means that the DAC automatically instantiates the correct implementation class, making casts between base and derived types unnecessary. When you declare a `VPTR` type, you must also list it in [vptr_list.h][vptr_list.h]. `__GlobalPtr` types provide base functionality to marshal both global variables and static data members through the `GPTR`, `GVAL`, `SPTR` and `SVAL` macros. The implementation of global variables is almost identical to that of static fields (both use the `__GlobalPtr` class) and require the addition of an entry in [dacvars.h][dacvars.h]. The comments in [daccess.h][daccess.h] and [dacvars.h][dacvars.h] provide more details about declaring these types.
[dacvars.h]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/inc/dacvars.h
+[vptr_list.h]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/inc/vptr_list.h
-Global and static values and pointers are interesting because they form the entry points to the target address space (all other uses of the DAC require you to have a target address already). Many of the globals in the runtime are already DACized. It occasionally becomes necessary to make a previously unDACized (or a newly introduced) global available to the DAC. By using the appropriate macros and [dacvars.h][dacvars.h] entry, you enable a post-build step (DacTableGen.exe run by the build in ndp\clr\src\dacupdatedll) to save the address of the global (from clr.pdb) into a table that is embedded into mscordacwks.dll. The DAC uses this table at run-time to determine where to look in the target address space when the code accesses a global.
+Global and static values and pointers are interesting because they form the entry points to the target address space (all other uses of the DAC require you to have a target address already). Many of the globals in the runtime are already DACized. It occasionally becomes necessary to make a previously un-DACized (or a newly introduced) global available to the DAC. By using the appropriate macros and [dacvars.h][dacvars.h] entry, you enable a post-build step (DacTableGen.exe run by the build in ndp\clr\src\dacupdatedll) to save the address of the global (from clr.pdb) into a table that is embedded into mscordacwks.dll. The DAC uses this table at run-time to determine where to look in the target address space when the code accesses a global.
### VAL Types
-In addition to pointer types, the DAC must also marshal static and global values (as opposed to values referenced by static or global pointers). For this we have a collection of macros ?VAL\_\*. We use GVAL\_\* for global values, and SVAL\_\* for static values. The comment in the [daccess.h][daccess.h] file has a table showing how to use the various forms of these and includes instructions for declaring global and static values (and global and static pointers) that we will use in DACized code.
+In addition to pointer types, the DAC must also marshal static and global values (as opposed to values referenced by static or global pointers). For this we have a collection of macros `?VAL_*`. We use `GVAL_*` for global values, and `SVAL_*` for static values. The comment in the [daccess.h][daccess.h] file has a table showing how to use the various forms of these and includes instructions for declaring global and static values (and global and static pointers) that we will use in DACized code.
### Pure Addresses
-The TADDR and PCODE types we introduced in the example of DAC operation are pure target addresses. These are actually integer types, rather than pointers. This prevents code in the host from incorrectly dereferencing them. The DAC does not treat them as pointers either. Specifically, because we have no type or size information no dereferencing or marshalling can occur. We use these primarily in two situations: when we are treating a target address as pure data and when we need to do pointer arithmetic with target addresses (although we can also do pointer arithmetic with PTR types). Of course, because TADDRs have no type information for the target locations they specify, when we perform address arithmetic, we need to factor in the size explicitly.
+The `TADDR` and `PCODE` types we introduced in the example of DAC operation are pure target addresses. These are actually integer types, rather than pointers. This prevents code in the host from incorrectly dereferencing them. The DAC does not treat them as pointers either. Specifically, because we have no type or size information no dereferencing or marshalling can occur. We use these primarily in two situations: when we are treating a target address as pure data and when we need to do pointer arithmetic with target addresses (although we can also do pointer arithmetic with `PTR` types). Of course, because `TADDR`s have no type information for the target locations they specify, when we perform address arithmetic, we need to factor in the size explicitly.
-We also have one special class of PTRs that don't involve marshaling: PTR\_VOID and PTR\_CVOID. These are the target equivalents of void \* and const void \*, respectively. Because TADDRs are simply numbers, they don't have pointer semantics, which means that if we DACize code by converting void \* to TADDR (as was often the case in the past), we often need extra casts and other changes, even in code that does not compile for the DAC. Using PTR\_VOID makes it easier and cleaner to DACize code that uses void \* by preserving the semantics expected for void \*. If we DACize a function that uses PTR\_VOID or PTR\_CVOID, we can't directly marshal data from these addresses, since we have no idea how much data we would need to read. This means we can't dereference them (or even do pointer arithmetic), but this is identical to the semantics of void \*. As is the case for void \*, we generally cast them to a more specific PTR type when we need to use them. We also have a PTR\_BYTE type, which is a standard marshaled target pointer (that supports pointer arithmetic, etc.). In general, when we DACize code, void \* becomes PTR\_VOID and BYTE \* becomes PTR\_BYTE, just as you would expect. [daccess.h][daccess.h] has explanatory comments that provide more details about the use and semantics of the PTR\_VOID type.
+We also have one special class of `PTR`s that don't involve marshaling: `PTR_VOID` and `PTR_CVOID`. These are the target equivalents of `void *` and `const void *`, respectively. Because `TADDR`s are simply numbers, they don't have pointer semantics, which means that if we DACize code by converting `void *` to `TADDR` (as was often the case in the past), we often need extra casts and other changes, even in code that does not compile for the DAC. Using `PTR_VOID` makes it easier and cleaner to DACize code that uses `void *` by preserving the semantics expected for `void *`. If we DACize a function that uses `PTR_VOID` or `PTR_CVOID`, we can't directly marshal data from these addresses, since we have no idea how much data we would need to read. This means we can't dereference them (or even do pointer arithmetic), but this is identical to the semantics of `void *`. As is the case for `void *`, we generally cast them to a more specific `PTR` type when we need to use them. We also have a `PTR_BYTE` type, which is a standard marshaled target pointer (that supports pointer arithmetic, etc.). In general, when we DACize code, `void *` becomes `PTR_VOID` and `BYTE *` becomes `PTR_BYTE`, just as you would expect. [daccess.h][daccess.h] has explanatory comments that provide more details about the use and semantics of the `PTR_VOID` type.
-Occasionally, legacy code stores a target address in a host pointer type such as void \*. This is always a bug and makes it extremely difficult to reason about the code. It will also break when we support cross-platform, where the pointer types are different sizes). In DAC builds, the void \* type is a host pointer which should never contain a target address. Using PTR\_VOID instead allows us to indicate that a void pointer type is a target address. We are trying to eliminate all such uses, but some are quite pervasive in the code and will take a while to eliminate entirely.
+Occasionally, legacy code stores a target address in a host pointer type such as `void *`. This is always a bug and makes it extremely difficult to reason about the code. It will also break when we support cross-platform, where the pointer types are different sizes. In DAC builds, the `void *` type is a host pointer which should never contain a target address. Using `PTR_VOID` instead allows us to indicate that a void pointer type is a target address. We are trying to eliminate all such uses, but some are quite pervasive in the code and will take a while to eliminate entirely.
### Conversions
-In earlier CLR versions, we used C-style type casting, macros, and constructors to cast between types. For example, in MethodIterator::Next, we have the following:
+In earlier CLR versions, we used C-style type casting, macros, and constructors to cast between types. For example, in `MethodIterator::Next`, we have the following:
if (methodCold)
{
PTR_CORCOMPILE_METHOD_COLD_HEADER methodColdHeader
- = PTR_CORCOMPILE_METHOD_COLD_HEADER((TADDR)methodCold);
+ = PTR_CORCOMPILE_METHOD_COLD_HEADER((TADDR)methodCold);
if (((TADDR)methodCode) == PTR_TO_TADDR(methodColdHeader->hotHeader))
{
@@ -171,31 +171,31 @@ In earlier CLR versions, we used C-style type casting, macros, and constructors
m_pCMH = PTR_CORCOMPILE_METHOD_COLD_HEADER((TADDR)methodCold);
...
-Both methodCold and methodCode are declared as BYTE \*, but in fact hold target addresses. In line 4, methodCold is casted to a TADDR and used as the argument to the constructor for PTR\_CORCOMPILE\_METHOD\_COLD\_HEADER. At this point, methodColdHeader is explicitly a target address. In line 6, there is another C-style cast for methodCode. The hotHeader field of methodColdHeader is of type PTR\_CORCOMPILE\_METHOD\_HEADER. The macro PTR\_TO\_TADDR extracts the raw target address from this PTR type and assigns it to methodCode. Finally, in line 9, another instance of type PTR\_CORCOMPILE\_METHOD\_COLD\_HEADER is constructed. Again, methodCold is casted to TADDR to pass to this constructor.
+Both methodCold and methodCode are declared as `BYTE *`, but in fact hold target addresses. In line 4, methodCold is casted to a `TADDR` and used as the argument to the constructor for `PTR_CORCOMPILE_METHOD_COLD_HEADER`. At this point, `methodColdHeader` is explicitly a target address. In line 6, there is another C-style cast for `methodCode`. The hotHeader field of `methodColdHeader` is of type `PTR_CORCOMPILE_METHOD_HEADER`. The macro `PTR_TO_TADDR` extracts the raw target address from this `PTR` type and assigns it to `methodCode`. Finally, in line 9, another instance of type `PTR_CORCOMPILE_METHOD_COLD_HEADER` is constructed. Again, `methodCold` is casted to `TADDR` to pass to this constructor.
-If this code seems overly complex and confusing to you, that's good. In fact it is. Worse, it provides no protection for the separation of host and target addresses. From the declarations of methodCold and methodCode, there is no particular reason to interpret them as target addresses at all. If these pointers were dereferenced in DAC builds as if they really were host pointers, the process would probably AV. This snippet demonstrates that any arbitrary pointer type (as opposed to a PTR type) can be casted to a TADDR. Given that these two variables always hold target addresses, they should be of type PTR\_BYTE, rather than BYTE \*.
+If this code seems overly complex and confusing to you, that's good. In fact it is. Worse, it provides no protection for the separation of host and target addresses. From the declarations of `methodCold` and `methodCode`, there is no particular reason to interpret them as target addresses at all. If these pointers were dereferenced in DAC builds as if they really were host pointers, the process would probably AV. This snippet demonstrates that any arbitrary pointer type (as opposed to a `PTR` type) can be casted to a `TADDR`. Given that these two variables always hold target addresses, they should be of type `PTR_BYTE`, rather than `BYTE *`.
-There is also a disciplined means to cast between different PTR types: dac\_cast. The dac\_cast operator is the DAC-aware vesion of the C++ static\_cast operator (which the CLR coding conventions stipulate instead of C-style casts when casting pointer types). The dac\_cast operator will do any of the following things:
+There is also a disciplined means to cast between different `PTR` types: `dac_cast`. The `dac_cast` operator is the DAC-aware vesion of the C++ `static_cast` operator (which the CLR coding conventions stipulate instead of C-style casts when casting pointer types). The `dac_cast` operator will do any of the following things:
-1. Create a PTR type from a TADDR
-2. Convert one PTR type to another
-3. Create a PTR from a host instance previously marshaled to the DAC cache
-4. Extract the TADDR from a PTR type
-5. Get a TADDR from a host instance previously marshaled to the DAC cache
+1. Create a `PTR` type from a `TADDR`
+2. Convert one `PTR` type to another
+3. Create a `PTR` from a host instance previously marshaled to the DAC cache
+4. Extract the `TADDR` from a `PTR` type
+5. Get a `TADDR` from a host instance previously marshaled to the DAC cache
-Now, assuming both methodCold and methodCode are declared to be of type PTR\_BYTE, the code above can be rewritten as follows.
+Now, assuming both methodCold and methodCode are declared to be of type `PTR_BYTE`, the code above can be rewritten as follows.
if (methodCold)
{
PTR_CORCOMPILE_METHOD_COLD_HEADER methodColdHeader
- = dac_cast(methodCold);
+ = dac_cast(methodCold);
if (methodCode == methodColdHeader->hotHeader)
{
// Matched the cold code
m_pCMH = methodColdHeader;
-You might argue that this code still seems complex and confusing, but at least we have significantly reduced the number of casts and constructors. We have also used constructs that maintain the separation between host and target pointers, so we have made the code safer. In particular, dac\_cast will often generate compiler or run-time errors if we try to do the wrong thing. In general, dac\_cast should be used for conversions.
+You might argue that this code still seems complex and confusing, but at least we have significantly reduced the number of casts and constructors. We have also used constructs that maintain the separation between host and target pointers, so we have made the code safer. In particular, `dac_cast` will often generate compiler or run-time errors if we try to do the wrong thing. In general, `dac_cast` should be used for conversions.
DACizing
========
@@ -203,11 +203,11 @@ DACizing
When do you need to DACize?
---------------------------
-Whenever you add a new feature, you will need to consider its debuggability needs and DACize the code to support your feature. You must also ensure that any other changes, such as bug fixes or code clean-up, conform to the DAC rules when necessary. Otherwise, the changes will break the debugger or SOS. If you are simply modifying existing code (as opposed to implementing a new feature), you will generally be able to determine that you need to worry about the DAC when a function you modify includes a SUPPORTS\_DAC contract. This contract has a few variants such as SUPPORTS\_DAC\_WRAPPER and LEAF\_DAC\_CONTRACT. You can find comments explaining the differences in [contract.h][contract.h]. If you see a number of DAC-specific types in the function, you should assume the code will run in DAC builds.
+Whenever you add a new feature, you will need to consider its debuggability needs and DACize the code to support your feature. You must also ensure that any other changes, such as bug fixes or code clean-up, conform to the DAC rules when necessary. Otherwise, the changes will break the debugger or SOS. If you are simply modifying existing code (as opposed to implementing a new feature), you will generally be able to determine that you need to worry about the DAC when a function you modify includes a `SUPPORTS_DAC` contract. This contract has a few variants such as `SUPPORTS_DAC_WRAPPER` and `LEAF_DAC_CONTRACT`. You can find comments explaining the differences in [contract.h][contract.h]. If you see a number of DAC-specific types in the function, you should assume the code will run in DAC builds.
[contract.h]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/inc/contract.h
-DACizing ensures that code in the engine will work correctly with the DAC. It is important to use the DAC correctly to marshal values from the target to the host. Target addresses used incorrectly from the host (or vice versa) may reference unmapped addresses. If addresses are mapped, the values will be completely unrelated to the values expected. As a result, DACizing mostly involves ensuring that we use PTR types for all values that the DAC needs to marshal. Another major task is to ensure that we do not allow invasive code to execute in DAC builds. In practice, this means that we must sometimes refactor code or add DACCESS\_COMPILE preprocessor directives. We also want to be sure that we add the appropriate SUPPORTS\_DAC contract. The use of this contract signals to developers that the function works with the DAC. This is important for two reasons:
+DACizing ensures that code in the engine will work correctly with the DAC. It is important to use the DAC correctly to marshal values from the target to the host. Target addresses used incorrectly from the host (or vice versa) may reference unmapped addresses. If addresses are mapped, the values will be completely unrelated to the values expected. As a result, DACizing mostly involves ensuring that we use `PTR` types for all values that the DAC needs to marshal. Another major task is to ensure that we do not allow invasive code to execute in DAC builds. In practice, this means that we must sometimes refactor code or add `DACCESS_COMPILE` preprocessor directives. We also want to be sure that we add the appropriate `SUPPORTS_DAC` contract. The use of this contract signals to developers that the function works with the DAC. This is important for two reasons:
-1. If we later call it from some other SUPPORTS\_DAC function, we know that it is DAC-safe and we don't need to worry about DACizing it.
+1. If we later call it from some other `SUPPORTS_DAC` function, we know that it is DAC-safe and we don't need to worry about DACizing it.
2. If we make modifications to the function, we need to make sure that they are DAC-safe. If we add a call to another function from this one, we also need to ensure that it is DAC-safe or that we only make the call in non-DAC builds.
diff --git a/docs/design/coreclr/botr/method-descriptor.md b/docs/design/coreclr/botr/method-descriptor.md
index ea5123bdc4b9a8..7d3f24ccf40f1d 100644
--- a/docs/design/coreclr/botr/method-descriptor.md
+++ b/docs/design/coreclr/botr/method-descriptor.md
@@ -42,7 +42,7 @@ Used for less common IL methods that have generic instantiation or that do not h
**FCall**
-Internal methods implemented in unmanaged code. These are [methods marked with MethodImplAttribute(MethodImplOptions.InternalCall) attribute](mscorlib.md), delegate constructors and tlbimp constructors.
+Internal methods implemented in unmanaged code. These are [methods marked with MethodImplAttribute(MethodImplOptions.InternalCall) attribute](corelib.md), delegate constructors and tlbimp constructors.
**NDirect**
diff --git a/docs/design/coreclr/botr/mscorlib.md b/docs/design/coreclr/botr/mscorlib.md
deleted file mode 100644
index c2d995567f4917..00000000000000
--- a/docs/design/coreclr/botr/mscorlib.md
+++ /dev/null
@@ -1,355 +0,0 @@
-Mscorlib and Calling Into the Runtime
-===
-
-Author: Brian Grunkemeyer ([@briangru](https://github.com/briangru)) - 2006
-
-# Introduction
-
-Mscorlib is the assembly for defining the core parts of the type system, and a good portion of the Base Class Library in .NET Framework. It has been renamed to System.Private.CoreLib in .NET Core, though many places in the code and documentation still refer to it as mscorlib. Base data types live in this assembly, and it has a tight coupling with the CLR. Here you will learn exactly how & why mscorlib.dll is special, and the basics about calling into the CLR from managed code via QCall and FCall methods. It also discusses calling from within the CLR into managed code.
-
-## Dependencies
-
-Since mscorlib defines base data types like Object, Int32, and String, mscorlib cannot depend on other managed assemblies. However, there is a strong dependency between mscorlib and the CLR. Many of the types in mscorlib need to be accessed from native code, so the layout of many managed types is defined both in managed code and in native code inside the CLR. Additionally, some fields may be defined only in debug or checked builds, so typically mscorlib must be compiled separately for checked vs. retail builds.
-
-For 64 bit platforms, some constants are also defined at compile time. So a 64 bit mscorlib.dll is slightly different from a 32 bit mscorlib.dll. Due to these constants, such as IntPtr.Size, most libraries above mscorlib should not need to build separately for 32 bit vs. 64 bit.
-
-## What Makes Mscorlib Special?
-
-Mscorlib has several unique properties, many of which are due to its tight coupling to the CLR.
-
-- Mscorlib defines the core types necessary to implement the CLR's Virtual Object System, such as the base data types (Object, Int32, String, etc).
-- The CLR must load mscorlib on startup to load certain system types.
-- Can only have one mscorlib loaded in the process at a time, due to layout issues. Loading multiple mscorlibs would require formalizing a contract of behavior, FCall methods, and datatype layout between CLR & mscorlib, and keeping that contract relatively stable across versions.
-- Mscorlib's types will be used heavily for native interop, and managed exceptions should map correctly to native error codes/formats.
-- The CLR's multiple JIT compilers may special case a small group of certain methods in mscorlib for performance reasons, both in terms of optimizing away the method (such as Math.Cos(double)), or calling a method in peculiar ways (such as Array.Length, or some implementation details on StringBuilder for getting the current thread).
-- Mscorlib will need to call into native code, via P/Invoke where appropriate, primarily into the underlying operating system or occasionally a platform adaptation layer.
-- Mscorlib will require calling into the CLR to expose some CLR-specific functionality, such as triggering a garbage collection, to load classes, or to interact with the type system in a non-trivial way. This requires a bridge between managed code and native, "manually managed" code within the CLR.
-- The CLR will need to call into managed code to call managed methods, and to get at certain functionality that is only implemented in managed code.
-
-# Interface between managed & CLR code
-
-To reiterate, the needs of managed code in mscorlib include:
-
-- The ability to access fields of some managed data structures in both managed code and "manually managed" code within the CLR
-- Managed code must be able to call into the CLR
-- The CLR must be able to call managed code.
-
-To implement these, we need a way for the CLR to specify and optionally verify the layout of a managed object in native code, a managed mechanism for calling into native code, and a native mechanism for calling into managed code.
-
-The managed mechanism for calling into native code must also support the special managed calling convention used by String's constructors, where the constructor allocates the memory used by the object (instead of the typical convention where the constructor is called after the GC allocates memory).
-
-The CLR provides a [mscorlib binder](https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/binder.cpp) internally, providing a mapping between unmanaged types and fields to managed types & fields. The binder will look up & load classes, allow you to call managed methods. It also does some simple verification to ensure the correctness of any layout information specified in both managed & native code. The binder ensures that the managed class you're attempting to use exists in mscorlib, has been loaded, and the field offsets are correct. It also needs the ability to differentiate between method overloads with different signatures.
-
-# Calling from managed to native code
-
-We have two techniques for calling into the CLR from managed code. FCall allows you to call directly into the CLR code, and provides a lot of flexibility in terms of manipulating objects, though it is easy to cause GC holes by not tracking object references correctly. QCall allows you to call into the CLR via the P/Invoke, and is much harder to accidentally mis-use than FCall. FCalls are identified in managed code as extern methods with the MethodImplOptions.InternalCall bit set. QCalls are _static_ extern methods that look like regular P/Invokes, but to a library called "QCall".
-
-There is a small variant of FCall called HCall (for Helper call) for implementing JIT helpers, for doing things like accessing multi-dimensional array elements, range checks, etc. The only difference between HCall and FCall is that HCall methods won't show up in an exception stack trace.
-
-### Choosing between FCall, QCall, P/Invoke, and writing in managed code
-
-First, remember that you should be writing as much as possible in managed code. You avoid a raft of potential GC hole issues, you get a good debugging experience, and the code is often simpler. It also is preparation for ongoing refactoring of mscorlib into smaller layered fully [managed libraries](https://github.com/dotnet/runtime/src/libraries).
-
-Reasons to write FCalls in the past generally fell into three camps: missing language features, better performance, or implementing unique interactions with the runtime. C# now has almost every useful language feature that you could get from C++, including unsafe code & stack-allocated buffers, and this eliminates the first two reasons for FCalls. We have ported some parts of the CLR that were heavily reliant on FCalls to managed code in the past (such as Reflection and some Encoding & String operations), and we want to continue this momentum. We may port our number formatting & String comparison code to managed in the future.
-
-If the only reason you're defining a FCall method is to call a native Win32 method, you should be using P/Invoke to call Win32 directly. P/Invoke is the public native method interface, and should be doing everything you need in a correct manner.
-
-If you still need to implement a feature inside the runtime, now consider if there is a way to reduce the frequency of transitioning to native code. Can you write the common case in managed, and only call into native for some rare corner cases? You're usually best off keeping as much as possible in managed code.
-
-QCalls are the preferred mechanism going forward. You should only use FCalls when you are "forced" to. This happens when there is common "short path" through the code that is important to optimize. This short path should not be more than a few hundred instructions, cannot allocate GC memory, take locks or throw exceptions (GC_NOTRIGGER, NOTHROWS). In all other circumstances (and especially when you enter a FCall and then simply erect HelperMethodFrame), you should be using QCall.
-
-FCalls were specifically designed for short paths of code that must be optimized. They allowed you to take explicit control over when erecting a frame was done. However it is error prone and is not worth it for many APIs. QCalls are essentially P/Invokes into CLR.
-
-As a result, QCalls give you some advantageous marshaling for SafeHandles automatically – your native method just takes a HANDLE type, and can use it without worrying whether someone will free the handle while you are in that method body. The resulting FCall method would need to use a SafeHandleHolder, and may need to protect the SafeHandle, etc. Leveraging the P/Invoke marshaler can avoid this additional plumbing code.
-
-## QCall Functional Behavior
-
-QCalls are very much like a normal P/Invoke from mscorlib.dll to CLR. Unlike FCalls, QCalls will marshal all arguments as unmanaged types like a normal P/Invoke. QCall also switch to preemptive GC mode like a normal P/Invoke. These two features should make QCalls easier to write reliably compared to FCalls. QCalls are not prone to GC holes and GC starvation bugs that are common with FCalls.
-
-QCalls perform better than FCalls that erect a HelperMethodFrame. The overhead is about 1.4x less compared to FCall w/ HelperMethodFrame overhead on x86 and x64.
-
-The preferred types for QCall arguments are primitive types that are efficiently handled by the P/Invoke marshaler (INT32, LPCWSTR, BOOL). Notice that BOOL is the correct boolean flavor for QCall arguments. On the other hand, CLR_BOOL is the correct boolean flavor for FCall arguments.
-
-The pointers to common unmanaged EE structures should be wrapped into handle types. This is to make the managed implementation type safe and avoid falling into unsafe C# everywhere. See AssemblyHandle in [vm\qcall.h][qcall] for an example.
-
-[qcall]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/qcall.h
-
-There is a way to pass a raw object references in and out of QCalls. It is done by wrapping a pointer to a local variable in a handle. It is intentionally cumbersome and should be avoided if reasonably possible. See the StringHandleOnStack in the example below. Returning objects, especially strings, from QCalls is the only common pattern where passing the raw objects is widely acceptable. (For reasoning on why this set of restrictions helps make QCalls less prone to GC holes, read the "GC Holes, FCall, and QCall" section below.)
-
-### QCall Example - Managed Part
-
-Do not replicate the comments into your actual QCall implementation. This is for illustrative purposes.
-
- class Foo
- {
- // All QCalls should have the following DllImport attribute
- [DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
- // QCalls should always be static extern.
- private static extern bool Bar(int flags, string inString, StringHandleOnStack retString);
-
- // Many QCalls have a thin managed wrapper around them to expose them to
- // the world in more meaningful way.
- public string Bar(int flags)
- {
- string retString = null;
-
- // The strings are returned from QCalls by taking address
- // of a local variable using StringHandleOnStack
- if (!Bar(flags, this.Id, new StringHandleOnStack(ref retString)))
- FatalError();
-
- return retString;
- }
- }
-
-### QCall Example - Unmanaged Part
-
-Do not replicate the comments into your actual QCall implementation.
-
-The QCall entrypoint has to be registered in tables in [vm\ecalllist.h][ecalllist] using QCFuncEntry macro. See "Registering your QCall or FCall Method" below.
-
-[ecalllist]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/ecalllist.h
-
- class FooNative
- {
- public:
- // All QCalls should be static and should be tagged with QCALLTYPE
- static
- BOOL QCALLTYPE Bar(int flags, LPCWSTR wszString, QCall::StringHandleOnStack retString);
- };
-
- BOOL QCALLTYPE FooNative::Bar(int flags, LPCWSTR wszString, QCall::StringHandleOnStack retString)
- {
- // All QCalls should have QCALL_CONTRACT.
- // It is alias for THROWS; GC_TRIGGERS; MODE_PREEMPTIVE.
- QCALL_CONTRACT;
-
- // Optionally, use QCALL_CHECK instead and the expanded form of the contract
- // if you want to specify preconditions:
- // CONTRACTL {
- // QCALL_CHECK;
- // PRECONDITION(wszString != NULL);
- // } CONTRACTL_END;
-
- // The only line between QCALL_CONTRACT and BEGIN_QCALL
- // should be the return value declaration if there is one.
- BOOL retVal = FALSE;
-
- // The body has to be enclosed in BEGIN_QCALL/END_QCALL macro. It is necessary
- // to make the exception handling work.
- BEGIN_QCALL;
-
- // Validate arguments if necessary and throw exceptions.
- // There is no convention currently on whether the argument validation should be
- // done in managed or unmanaged code.
- if (flags != 0)
- COMPlusThrow(kArgumentException, L"InvalidFlags");
-
- // No need to worry about GC moving strings passed into QCall.
- // Marshalling pins them for us.
- printf("%S", wszString);
-
- // This is most the efficient way to return strings back
- // to managed code. No need to use StringBuilder.
- retString.Set(L"Hello");
-
- // You can not return from inside of BEGIN_QCALL/END_QCALL.
- // The return value has to be passed out in helper variable.
- retVal = TRUE;
-
- END_QCALL;
-
- return retVal;
- }
-
-## FCall Functional Behavior
-
-FCalls allow more flexibility in terms of passing object references around, with a higher code complexity and more opportunities to hang yourself. Additionally, FCall methods must either erect a helper method frame along their common code paths, or for any FCall of non-trivial length, explicitly poll for whether a garbage collection must occur. Failing to do so will lead to starvation issues if managed code repeatedly calls the FCall method in a tight loop, because FCalls execute while the thread only allows the GC to run in a cooperative manner.
-
-FCalls require a lot of glue, too much to describe here. Look at [fcall.h][fcall] for details.
-
-[fcall]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/fcall.h
-
-### GC Holes, FCall, and QCall
-
-A much more complete discussion on GC holes can be found in the [CLR Code Guide](../../../coding-guidelines/clr-code-guide.md). Look for ["Is your code GC-safe?"](../../../coding-guidelines/clr-code-guide.md#2.1). This tailored discussion motivates some of the reasons why FCall and QCall have some of their strange conventions.
-
-Object references passed as parameters to FCall methods are not GC-protected, meaning that if a GC occurs, those references will point to the old location in memory of an object, not the new location. For this reason, FCalls usually follow the discipline of accepting something like "StringObject*" as their parameter type, then explicitly converting that to a STRINGREF before doing operations that may trigger a GC. You must GC protect object references before triggering a GC, if you expect to be able to use that object reference later.
-
-All GC heap allocations within an FCall method must happen within a helper method frame. If you allocate memory on the GC's heap, the GC may collect dead objects & move objects around in unpredictable ways, with some low probability. For this reason, you must manually report any object references in your method to the GC, so that if a garbage collection occurs, your object reference will be updated to refer to the new location in memory. Any pointers into managed objects (like arrays or Strings) within your code will not be updated automatically, and must be re-fetched after any operation that may allocate memory and before your first usage. Reporting a reference can be done via the GCPROTECT macros, or as parameters when you erect a helper method frame.
-
-Failing to properly report an OBJECTREF or to update an interior pointer is commonly referred to as a "GC hole", because the OBJECTREF class will do some validation that it points to a valid object every time you dereference it in checked builds. When an OBJECTREF pointing to an invalid object is dereferenced, you'll get an assert saying something like "Detected an invalid object reference. Possible GC hole?". This assert is unfortunately easy to hit when writing "manually managed" code.
-
-Note that QCall's programming model is restrictive to sidestep GC holes most of the time, by forcing you to pass in the address of an object reference on the stack. This guarantees that the object reference is GC protected by the JIT's reporting logic, and that the actual object reference will not move because it is not allocated in the GC heap. QCall is our recommended approach, precisely because it makes GC holes harder to write.
-
-### FCall Epilogue Walker for x86
-
-The managed stack walker needs to be able to find its way from FCalls. It is relative easy on newer platforms that define conventions for stack unwinding as part of the ABI. The stack unwinding conventions are not defined by ABI for x86. The runtime works around it by implementing a epilog walker. The epilog walker computes the FCall return address and callee save registers by simulating the FCall execution. This imposes limits on what constructs are allowed in the FCall implementation.
-
-Complex constructs like stack allocated objects with destructors or exception handling in the FCall implementation may confuse the epilog walker. It leads to GC holes or crashes during stack walking. There is no exact list of what constructs should be avoided to prevent this class of bugs. An FCall implementation that is fine one day may break with the next C++ compiler update. We depend on stress runs & code coverage to find bugs in this area.
-
-Setting a breakpoint inside an FCall implementation may confuse the epilog walker. It leads to an "Invalid breakpoint in a helpermethod frame epilog" assert inside [vm\i386\gmsx86.cpp](https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/i386/gmsx86.cpp).
-
-### FCall Example – Managed Part
-
-Here's a real-world example from the String class:
-
- public partial sealed class String
- {
- // Replaces all instances of oldChar with newChar.
- [MethodImplAttribute(MethodImplOptions.InternalCall)]
- public extern String Replace (char oldChar, char newChar);
- }
-
-### FCall Example – Native Part
-
-The FCall entrypoint has to be registered in tables in [vm\ecalllist.h][ecalllist] using FCFuncEntry macro. See "Registering your QCall or FCall Method".
-
-Notice how oldBuffer and newBuffer (interior pointers into String instances) are re-fetched after allocating memory. Also, this method is an instance method in managed code, with the "this" parameter passed as the first argument. We use StringObject* as the argument type, then copy it into a STRINGREF so we get some error checking when we use it.
-
- FCIMPL3(LPVOID, COMString::Replace, StringObject* thisRefUNSAFE, CLR_CHAR oldChar, CLR_CHAR newChar)
- {
- FCALL_CONTRACT;
-
- int length = 0;
- int firstFoundIndex = -1;
- WCHAR *oldBuffer = NULL;
- WCHAR *newBuffer;
-
- STRINGREF newString = NULL;
- STRINGREF thisRef = (STRINGREF)thisRefUNSAFE;
-
- if (thisRef==NULL) {
- FCThrowRes(kNullReferenceException, L"NullReference_This");
- }
-
- [... Removed some uninteresting code here for illustrative purposes...]
-
- HELPER_METHOD_FRAME_BEGIN_RET_ATTRIB_2(Frame::FRAME_ATTR_RETURNOBJ, newString, thisRef);
-
- //Get the length and allocate a new String
- //We will definitely do an allocation here.
- newString = NewString(length);
-
- //After allocation, thisRef may have moved
- oldBuffer = thisRef->GetBuffer();
-
- //Get the buffers in both of the Strings.
- newBuffer = newString->GetBuffer();
-
- //Copy the characters, doing the replacement as we go.
- for (int i=0; i template to create a type name like SAFEHANDLEREF. All the error checking from OBJECTREF is built into the REF macro, and you can freely dereference this SAFEHANDLEREF & use fields off of it in native code. You still must GC protect these references.
-
-# Calling Into Managed Code From Native
-
-Clearly there are places where the CLR must call into managed code from native. For this purpose, we have added a MethodDescCallSite class to handle a lot of plumbing for you. Conceptually, all you need to do is find the MethodDesc\* for the method you want to call, find a managed object for the "this" pointer (if you're calling an instance method), pass in an array of arguments, and deal with the return value. Internally, you'll need to potentially toggle your thread's state to allow the GC to run in preemptive mode, etc.
-
-Here's a simplified example. Note how this instance uses the binder described in the previous section to call SafeHandle's virtual ReleaseHandle method.
-
- void SafeHandle::RunReleaseMethod(SafeHandle* psh)
- {
- CONTRACTL {
- THROWS;
- GC_TRIGGERS;
- MODE_COOPERATIVE;
- } CONTRACTL_END;
-
- SAFEHANDLEREF sh(psh);
-
- GCPROTECT_BEGIN(sh);
-
- MethodDescCallSite releaseHandle(s_pReleaseHandleMethod, METHOD__SAFE_HANDLE__RELEASE_HANDLE, (OBJECTREF*)&sh, TypeHandle(), TRUE);
-
- ARG_SLOT releaseArgs[] = { ObjToArgSlot(sh) };
- if (!(BOOL)releaseHandle.Call_RetBool(releaseArgs)) {
- MDA_TRIGGER_ASSISTANT(ReleaseHandleFailed, ReportViolation)(sh->GetTypeHandle(), sh->m_handle);
- }
-
- GCPROTECT_END();
- }
-
-# Interactions with Other Subsystems
-
-## Debugger
-
-One limitation of FCalls today is that you cannot easily debug both managed code and FCalls easily in Visual Studio's Interop (or mixed mode) debugging. Setting a breakpoint today in an FCall and debugging with Interop debugging just doesn't work. This most likely won't be fixed.
-
-# Physical Architecture
-
-When the CLR starts up, mscorlib is loaded by a method called LoadBaseSystemClasses. Here, the base data types & other similar classes (like Exception) are loaded, and appropriate global pointers are set up to refer to mscorlib's types.
-
-For FCalls, look in [fcall.h][fcall] for infrastructure, and [ecalllist.h][ecalllist] to properly inform the runtime about your FCall method.
-
-For QCalls, look in [qcall.h][qcall] for associated infrastructure, and [ecalllist.h][ecalllist] to properly inform the runtime about your QCall method.
-
-More general infrastructure and some native type definitions can be found in [object.h][object.h]. The binder uses mscorlib.h to associate managed & native classes.
-
-[object.h]: https://github.com/dotnet/runtime/blob/master/src/coreclr/src/vm/object.h
diff --git a/docs/design/coreclr/botr/readytorun-format.md b/docs/design/coreclr/botr/readytorun-format.md
index 51fcd1cab56b4c..8db3423dbadfe9 100644
--- a/docs/design/coreclr/botr/readytorun-format.md
+++ b/docs/design/coreclr/botr/readytorun-format.md
@@ -28,8 +28,9 @@ in the COFF header represent a full copy of the input IL and MSIL metadata it wa
**Composite R2R files** currently conform to Windows PE executable file format as the
native envelope. Moving forward we plan to gradually add support for platform-native
-executable formats (ELF on Linux, MachO on OSX) as the native envelopes. As a natural corollary
-there is no global CLI / COR header in the file. The ReadyToRun header structure is pointed to
+executable formats (ELF on Linux, MachO on OSX) as the native envelopes. There is a
+global CLI / COR header in the file, but it only exists to facilitate pdb generation, and does
+not participate in any usages by the CoreCLR runtime. The ReadyToRun header structure is pointed to
by the well-known export symbol `RTR_HEADER` and has the `READYTORUN_FLAG_COMPOSITE` flag set.
Input MSIL metadata and IL streams can be either embedded in the composite R2R file or left
diff --git a/docs/design/coreclr/botr/shared-generics.md b/docs/design/coreclr/botr/shared-generics.md
index 690513621da103..6b23563ebf223d 100644
--- a/docs/design/coreclr/botr/shared-generics.md
+++ b/docs/design/coreclr/botr/shared-generics.md
@@ -12,31 +12,31 @@ Shared generics is a runtime+JIT feature aimed at reducing the amount of code th
Consider the following C# code sample:
``` c#
-string Func()
+string Method()
{
return typeof(List).ToString();
}
```
-Without shared generics, the code for instantiations like `Func` or `Func` would look identical except for one single instruction: the one that loads the correct TypeHandle of type `List`:
+Without shared generics, the code for instantiations like `Method` or `Method` would look identical except for one single instruction: the one that loads the correct TypeHandle of type `List`:
``` asm
mov rcx, type handle of List or List
call ToString()
ret
```
-With shared generics, the canonical code will not have any hard-coded versions of the type handle of List, but instead looks up the exact type handle either through a call to a runtime helper API, or by loading it up from the *generic dictionary* of the instantiation of Func that is executing. The code would look more like the following:
+With shared generics, the canonical code will not have any hard-coded versions of the type handle of List, but instead looks up the exact type handle either through a call to a runtime helper API, or by loading it up from the *generic dictionary* of the instantiation of Method that is executing. The code would look more like the following:
``` asm
- mov rcx, generic context // MethodDesc of Func or Func
+ mov rcx, generic context // MethodDesc of Method or Method
mov rcx, [rcx + offset of InstantiatedMethodDesc::m_pPerInstInfo] // This is the generic dictionary
mov rcx, [rcx + dictionary slot containing type handle of List]
call ToString()
ret
```
-The generic context in this example is the InstantiatedMethodDesc of `Func` or `Func`. The generic dictionary is a data structure used by shared generic code to fetch instantiation-specific information. It is basically an array where the entries are instantiation-specific type handles, method handles, field handles, method entry points, etc... The "PerInstInfo" fields on MethodTable and InstantiatedMethodDesc structures point at the generic dictionary structure for a generic type and method respectively.
+The generic context in this example is the InstantiatedMethodDesc of `Method` or `Method`. The generic dictionary is a data structure used by shared generic code to fetch instantiation-specific information. It is basically an array where the entries are instantiation-specific type handles, method handles, field handles, method entry points, etc... The "PerInstInfo" fields on MethodTable and InstantiatedMethodDesc structures point at the generic dictionary structure for a generic type and method respectively.
-In this example, the generic dictionary for Func will contain a slot with the type handle for type List, and the generic dictionary for Func will contain a slot with the type handle for type List.
+In this example, the generic dictionary for Method will contain a slot with the type handle for type List, and the generic dictionary for Method will contain a slot with the type handle for type List.
This feature is currently only supported for instantiations over reference types because they all have the same size/properties/layout/etc... For instantiations over primitive types or value types, the runtime will generate separate code bodies for each instantiation.
@@ -93,9 +93,9 @@ As described earlier, a generic dictionary is an array of multiple slots contain
The first N slots in an instantiation of N arguments are always going to be the type handles of the instantiation type arguments (this is kind of an optimization as well). The slots that follow contain instantiation-based information.
-For instance, here is an example of the contents of the generic dictionary for our `Func` example:
+For instance, here is an example of the contents of the generic dictionary for our `Method` example:
-| `Func's dicionary` |
+| `Method's dicionary` |
|--------------------------|
| slot[0]: TypeHandle(`string`) |
| slot[1]: Total dictionary size |
@@ -116,7 +116,7 @@ When generating shared generic code, the JIT knows which slots to use for the va
### Dictionary Layouts
The `DictionaryLayout` structure is what tells the JIT which slot to use when performing a dictionary lookup. This `DictionaryLayout` structure has a couple of important properties:
-- It is shared across all compatible instantiations of a certain type of method. In other words, a dictionary layout is associated with the canonical instantiation of a type or a method. For instance, in our example above, `Func` and `Func` are compatible instantiations, each with their own **separate dictionaries**, however they all share the **same dictionary layout**, which is associated with the canonical instantiation `Func<__Canon>`.
+- It is shared across all compatible instantiations of a certain type of method. In other words, a dictionary layout is associated with the canonical instantiation of a type or a method. For instance, in our example above, `Method` and `Method` are compatible instantiations, each with their own **separate dictionaries**, however they all share the **same dictionary layout**, which is associated with the canonical instantiation `Method<__Canon>`.
- The dictionaries of generic types or methods have the same number of slots as their dictionary layouts. Note: historically before the introduction of the dynamic dictionary expansion feature, the generic dictionaries could be smaller than their layouts, meaning that for certain lookups, we had to use invoke some runtime helper APIs (slow path).
When a generic type or method is first created, its dictionary layout contains 'unassigned' slots. Assignments happen as part of code generation, whenever the JIT needs to emit a dictionary lookup sequence. This assignment happens during the calls to the `DictionaryLayout::FindToken(...)` APIs. Once a slot has been assigned, it becomes associated with a certain signature, which describes the kind of value that will go in every instantiated dictionary at that slot index.
@@ -160,7 +160,7 @@ The feature is simple in concept: change dictionary layouts from a linked list o
- For types, the generic dictionary is part of the `MethodTable` structure, which can't be reallocated (already in use by managed code)
- For methods, the generic dictionary is not part of the `MethodDesc` structure, but can still be in use by some generic code.
- We can't have multiple MethodTables or MethodDescs for the same type or method anyways, so reallocations are not an option.
-- We can't just resize the generic dictionary for a single instantiation. For instance, in our example above, let's say we wanted to expand the dictionary for `Func`. The resizing of the layout would have an impact on the shared canonical code that the JIT generates for `Func<__Canon>`. If we only resized the dictionary of `Func`, the shared generic code would work for that instantiation only, but when we attempt to use it with another instantiation like `Func`, the jitted instructions would no longer match the size of the dictionary structure, and would cause access violations.
+- We can't just resize the generic dictionary for a single instantiation. For instance, in our example above, let's say we wanted to expand the dictionary for `Method`. The resizing of the layout would have an impact on the shared canonical code that the JIT generates for `Method<__Canon>`. If we only resized the dictionary of `Method`, the shared generic code would work for that instantiation only, but when we attempt to use it with another instantiation like `Method`, the jitted instructions would no longer match the size of the dictionary structure, and would cause access violations.
- The runtime is multi-threaded, which adds to the complexity.
The current implementation expands the dictionary layout and the actual dictionaries separately to keep things simple:
diff --git a/docs/design/coreclr/jit/ryujit-overview.md b/docs/design/coreclr/jit/ryujit-overview.md
index bf0e1540d42287..433043fd27e32e 100644
--- a/docs/design/coreclr/jit/ryujit-overview.md
+++ b/docs/design/coreclr/jit/ryujit-overview.md
@@ -843,7 +843,7 @@ bad tree and wish to understand how it got corrupted, you can place a conditiona
`gtNewNode` to see when it is created, and then a data breakpoint on the field that you believe is corrupted.
The trees are connected by line characters (either in ASCII, by default, or in slightly more readable Unicode when
-`COMPlus_JitDumpAscii=0` is specified), to make it a bit easier to read.
+`COMPlus_JitDumpASCII=0` is specified), to make it a bit easier to read.
## Variable naming
diff --git a/docs/design/coreclr/jit/ryujit-tutorial.md b/docs/design/coreclr/jit/ryujit-tutorial.md
index 77462044483caa..050c11495b6a88 100644
--- a/docs/design/coreclr/jit/ryujit-tutorial.md
+++ b/docs/design/coreclr/jit/ryujit-tutorial.md
@@ -5,9 +5,8 @@
### .NET Runtime
- An implementation of the Common Language Infrastructure [ECMA 335]
- Supports multiple languages, including C#, F# and VB
-- Sources are mostly shared between the "desktop" version and the open-source coreclr implementation:
- http://www.github.com/dotnet/runtime/src/coreclr
- RyuJIT is the "next generation" just in time compiler for .NET
+- Sources are at https://github.com/dotnet/runtime/tree/master/src/coreclr/src/jit
#### Notes
For context, the .NET runtime has been around since about the turn of the millennium. It is a virtual machine that supports the execution of a number of languages, primarily C#, Visual Basic, and F#.
@@ -19,7 +18,6 @@ RyuJIT is the re-architected JIT for .NET.
### Why "RyuJIT"?
- Ryujin is a Japanese Sea Dragon
-We came up with the code name "RyuJIT" because our original code name had possible issues.
We wanted something with "JIT" in the name, and the idea of a dragon came to mind because of the Dragon book that we all know and love.
So – we just adapted the name of the Japanese sea dragon, Ryujin.
diff --git a/docs/design/coreclr/jit/viewing-jit-dumps.md b/docs/design/coreclr/jit/viewing-jit-dumps.md
index a60dd596df9864..3adf613fae85ef 100644
--- a/docs/design/coreclr/jit/viewing-jit-dumps.md
+++ b/docs/design/coreclr/jit/viewing-jit-dumps.md
@@ -20,7 +20,7 @@ The first thing to do is setup the .NET Core app we want to dump. Here are the s
Exe
- netcoreapp5.0
+ net5.0
win-x64
@@ -58,17 +58,17 @@ The first thing to do is setup the .NET Core app we want to dump. Here are the s
}
```
-* After you've finished editing the code, run `dotnet restore` and `dotnet publish -c Release`. This should drop all of the binaries needed to run your app in `bin/Release/netcoreapp5.0//publish`.
+* After you've finished editing the code, run `dotnet restore` and `dotnet publish -c Release`. This should drop all of the binaries needed to run your app in `bin/Release/net5.0//publish`.
* Overwrite the CLR dlls with the ones you've built locally. If you're a fan of the command line, here are some shell commands for doing this:
```shell
# Windows
- robocopy /e \artifacts\bin\coreclr\Windows_NT..Release \bin\Release\netcoreapp5.0\\publish > NUL
- copy /y \artifacts\bin\coreclr\Windows_NT..Debug\clrjit.dll \bin\Release\netcoreapp5.0\\publish > NUL
+ robocopy /e \artifacts\bin\coreclr\Windows_NT..Release \bin\Release\net5.0\\publish > NUL
+ copy /y \artifacts\bin\coreclr\Windows_NT..Debug\clrjit.dll \bin\Release\net5.0\\publish > NUL
# Unix
- cp -rT /artifacts/bin/coreclr/..Release /bin/Release/netcoreapp5.0//publish
- cp /artifacts/bin/coreclr/..Debug/libclrjit.so /bin/Release/netcoreapp5.0//publish
+ cp -rT /artifacts/bin/coreclr/..Release /bin/Release/net5.0//publish
+ cp /artifacts/bin/coreclr/..Debug/libclrjit.so /bin/Release/net5.0//publish
```
* Set the configuration knobs you need (see below) and run your published app. The info you want should be dumped to stdout.
@@ -98,7 +98,7 @@ The first thing to do is setup the .NET Core app we want to dump. Here are the s
## Setting configuration variables
-The behavior of the JIT can be controlled via a number of configuration variables. These are declared in [inc/clrconfigvalues.h](/src/coreclr/src/inc/clrconfigvalues.h). When used as an environment variable, the string name generally has `COMPlus_` prepended. When used as a registry value name, the configuration name is used directly.
+The behavior of the JIT can be controlled via a number of configuration variables. These are declared in [inc/clrconfigvalues.h](/src/coreclr/src/inc/clrconfigvalues.h) and [jit/jitconfigvalues.h](/src/coreclr/src/jit/jitconfigvalues.h). When used as an environment variable, the string name generally has `COMPlus_` prepended. When used as a registry value name, the configuration name is used directly.
These can be set in one of three ways:
@@ -149,6 +149,7 @@ The wildcard character `*` can be used for `` and ``. In
Below are some of the most useful `COMPlus` variables. Where {method-list} is specified in the list below, you can supply a space-separated list of either fully-qualified or simple method names (the former is useful when running something that has many methods of the same name), or you can specify `*` to mean all methods.
* `COMPlus_JitDump`={method-list} – dump lots of useful information about what the JIT is doing. See [Reading a JitDump](ryujit-overview.md#reading-a-jitdump) for more on how to analyze this data.
+* `COMPlus_JitDumpASCII`={1 or 0} - Specifies whether the JIT dump should be ASCII only (Defaults to 1). Disabling this generates more readable expression trees.
* `COMPlus_JitDisasm`={method-list} – dump a disassembly listing of each method.
* `COMPlus_JitDiffableDasm` – set to 1 to tell the JIT to avoid printing things like pointer values that can change from one invocation to the next, so that the disassembly can be more easily compared.
* `COMPlus_JitGCDump`={method-list} – dump the GC information.
diff --git a/docs/design/coreclr/profiling/davbr-blog-archive/ELT Hooks - tail calls.md b/docs/design/coreclr/profiling/davbr-blog-archive/ELT Hooks - tail calls.md
index f24ce3bc145008..3cca8c9a9c5c17 100644
--- a/docs/design/coreclr/profiling/davbr-blog-archive/ELT Hooks - tail calls.md
+++ b/docs/design/coreclr/profiling/davbr-blog-archive/ELT Hooks - tail calls.md
@@ -219,7 +219,7 @@ Helper
Main
```
-until you get a Leave hook for Helper(). At this point, you need to pop Helper() from your shadow stack, but he's not at the top-- he's buried under all your "deferred pop" frames. So your profiler would need to perform the deferred pops if a frame above OR below them gets popped. Hopefully, the yuckiness of this implementation will scare you straight. But the confusion of presenting crazy stacks to the user is the real reason to abandon Method 2 and go with Method 1.
+until you get a Leave hook for Helper(). At this point, you need to pop Helper() from your shadow stack, but he's not at the top-- he's buried under all your "deferred pop" frames. So your profiler would need to perform the deferred pops if a frame above OR below them gets popped. Hopefully, the yuckiness of this implementation will scare you straight. But the confusion of presenting invalid stacks to the user is the real reason to abandon Method 2 and go with Method 1.
### Call tracing
diff --git a/docs/design/features/tailcalls-with-helpers.md b/docs/design/features/tailcalls-with-helpers.md
index f7156fe6414fd8..316a2a3a008bcb 100644
--- a/docs/design/features/tailcalls-with-helpers.md
+++ b/docs/design/features/tailcalls-with-helpers.md
@@ -1,460 +1,270 @@
-# The current way of handling tail-calls
-## Fast tail calls
-These are tail calls that are handled directly by the jitter and no runtime cooperation is needed. They are limited to cases where:
-* Return value and call target arguments are all either primitive types, reference types, or valuetypes with a single primitive type or reference type fields
-* The aligned size of call target arguments is less or equal to aligned size of caller arguments
-
-## Tail calls using a helper
-Tail calls in cases where we cannot perform the call in a simple way are implemented using a tail call helper. Here is a rough description of how it works:
-* For each tail call target, the jitter asks runtime to generate an assembler argument copying routine. This routine reads vararg list of arguments and places the arguments in their proper slots in the CONTEXT or on the stack. Together with the argument copying routine, the runtime also builds a list of offsets of references and byrefs for return value of reference type or structs returned in a hidden return buffer and for structs passed by ref. The gc layout data block is stored at the end of the argument copying thunk.
-* At the time of the tail call, the caller generates a vararg list of all arguments of the tail called function and then calls JIT_TailCall runtime function. It passes it the copying routine address, the target address and the vararg list of the arguments.
-* The JIT_TailCall then performs the following:
- * It calls RtlVirtualUnwind twice to get the context of the caller of the caller of the tail call to simulate the effect of running epilog of the caller of the tail call and also its return.
- * It prepares stack space for the callee stack arguments, a helper explicit TailCallFrame and also a CONTEXT structure where the argument registers of the callee, stack pointer and the target function address are set. In case the tail call caller has enough space for the callee arguments and the TailCallFrame in its stack frame, that space is used directly for the callee arguments. Otherwise the stack arguments area is allocated at the top of the stack. This slightly differs in the case the tail call was called from another tail called function - the TailCallFrame already exists and so it is not recreated. The TailCallFrame also keeps a pointer to the list of gc reference offsets of the arguments and structure return buffer members. The stack walker during GC then uses that to ensure proper GC liveness of those references.
- * It calls the copying routine to translate the arguments from the vararg list to the just reserved stack area and the context.
- * If the stack arguments and TailCaillFrame didn't fit into the caller's stack frame, these data are now moved to the final location
- * RtlRestoreContext is used to start executing the callee.
-
-There are several issues with this approach:
-* It is expensive to port to new platforms
- * Parsing the vararg list is not possible to do in a portable way on Unix. Unlike on Windows, the list is not stored a linear sequence of the parameter data bytes in memory. va_list on Unix is an opaque data type, some of the parameters can be in registers and some in the memory.
- * Generating the copying asm routine needs to be done for each target architecture / platform differently. And it is also very complex, error prone and impossible to do on platforms where code generation at runtime is not allowed.
-* It is slower than it has to be
- * The parameters are copied possibly twice - once from the vararg list to the stack and then one more time if there was not enough space in the caller's stack frame.
- * RtlRestoreContext restores all registers from the CONTEXT structure, not just a subset of them that is really necessary for the functionality, so it results in another unnecessary memory accesses.
-* Stack walking over the stack frames of the tail calls requires runtime assistance.
-
-# The new approach to tail calls using helpers
-## Objectives
-The new way of handling tail calls using helpers was designed with the following objectives:
-* It should be cheap to port to new platforms, architectures and code generators
-* It needs to work in both jitted and AOT compiled scenarios
-* It should support platforms where runtime code generation is not possible
-* The tail calls should be reasonably fast compared to regular calls with the same arguments
-* The tail calls should not be slower than existing mechanism on Windows
-* No runtime assistance should be necessary for unwinding stack with tail call frames on it
-* The stack should be unwindable at any spot during the tail calls to properly support sampling profilers and similar tools.
-* Stack walk during GC must be able to always correctly report GC references.
-* It should work in all cases except those where a tail call is not allowed as described in the ECMA 335 standard section III.2.4
-
-## Requirements
-* The code generator needs to be able to compile a tail call to a target as a call to a thunk with the same parameters as the target, but void return, followed by a jump to an assembler helper.
-
-## Implementation
-This section describes the helper functions and data structures that the tail calls use and also describes the tail call sequence step by step.
-### Helper functions
-The tail calls use the following thunks and helpers:
-* StoreArguments - this thunk stores the arguments into a thread local storage together with the address of the corresponding CallTarget thunk and a descriptor of locations and types of managed references in the stored arguments data. This thunk is generated as IL and compiled by the jitter or AOT compiler. There is one such thunk per tail call target.
-It has a signature that is compatible with the tailcall target function except for the return type which is void. But it is not the same. It gets the same arguments as the tail call target function, but it would also get "this" pointer and the generic context as explicit arguments if the tail call target requires them. Arguments of generic reference types are passed as "object" so that the StoreArguments doesn't have to be generic.
-* CallTarget - this thunk gets the arguments buffer that was filled by the StoreArguments thunk, loads the arguments from the buffer, releases the buffer and calls the target function using calli. The signature used for the calli would ensure that all arguments including the optional hidden return buffer and the generic context are passed in the right registers / stack slots. Generic reference arguments will be specified as "object" in the signature so that the CallTarget doesn't have to be generic.
-The CallTarget is also generated as IL and compiled by the jitter or AOT compiler. There is one such thunk per tail call target. This thunk has the same return type as the tailcall target or return "object" if the return type of the tail call target is a generic reference type.
-* TailCallHelper - this is an assembler helper that is responsible for restoring stack pointer to the location where it was when the first function in a tail call chain was entered and then jumping to the CallTarget thunk. This helper is common for all tail call targets.
-In a context of each tailcall invocation, the TailCallHelper will be handled by the jitter as if it had the same return type as the tail call target. That means that if the tail call target needs a hidden return buffer for returning structs, the pointer to this buffer will be passed to the TailCallHelper the same way as it would be passed to the tail call target. The TailCallHelper would then pass this hidden argument to the CallTarget helper.
-There will be two flavors of this helper, based on whether the tail call target needs a hidden return buffer or not:
- * TailCallHelper
- * TailCallHelper_RetBuf
-
-### Helper data structures
-The tail calls use the following data structures:
-* Thread local storage for arguments. It stores the arguments of a tail call for a short period of time between the StoreArguments and CallTarget calls.
-* Arguments GC descriptor - descriptor of locations and types of managed references in the arguments.
-* TailCallHelperStack - a per thread stack of helper entries that is used to determine whether a tail call is chained or not. Its entries are allocated as local variables in CallTarget thunks. Each entry contains:
- * Stack pointer captured right before a call to a tail call target
- * ChainCall flag indicating whether the CallTarget thunk should return after the call to the tail call target or whether it should execute its epilog and jump to TailCallHelper instead. The latter is used by the TailCallHelper to remove the stack frame of the CallTarget before making a tail call from a tail called function.
- * Pointer to the next entry on the stack.
-
-### Tail call sequence
-* The caller calls the StoreArguments thunk corresponding to the callee to store the pointer to the tail call target function, its arguments, their GC descriptors, optional "this" and generic context arguments and the corresponding CallTarget thunk address in a thread local storage.
-* The caller executes its epilog, restoring stack pointer and callee saved registers to their values when the caller was entered.
-* The caller jumps to the TailCallHelper. This function performs the following operations:
- * Get the topmost TailCallHelperStack entry for the current thread.
- * Check if the previous stack frame is a CallTarget thunk frame by comparing the stack pointer value stored in the TailCallHelperStack entry to the current CFA (call frame address). If it matches, it means that the previous stack frame belongs to a CallTarget thunk and so the tail call caller was also tail called.
- * If the previous frame was a CallTarget thunk, its stack frame needs to be removed to ensure that the stack will not grow when tail calls are chained. Set ChainCall flag in the TailCallHelperStack entry and return. That returns control to the CallTarget thunk. It checks the ChainCall flag and since it set, it executes its epilog and jumps to the TailCallHelper again.
- * If the previous frame was not a CallTarget thunk, get the address of the CallTarget thunk of the tailcall target from the arguments buffer and jump to it.
-* The CallTarget thunk function then does the following operation:
- * Create local instance of TailCallHelperStack entry and store the current stack pointer value in it.
- * Push the entry to the TailCallHelperStack of the current thread.
- * Get the arguments buffer from the thread local storage, extract the regular arguments and the optional "this" and generic context arguments and the target function pointer. Release the buffer and call the target function. The frame of the CallTarget thunk ensures that the arguments of the target are GC protected until the target function returns or tail calls to another function.
- * Pop the TailCallHelperStack entry from the TailCallHelperStack of the current thread.
- * Check the ChainCall flag in the TailCallHelperStack entry. If it is set, run epilog and jump to the TailCallHelper.
- * If the ChainCall flag is clear, it means that the last function in the tail call chain has returned. So return the return value of the target function.
-
-## Work that needs to be done to implement the new tail calls mechanism
-### JIT (compiler in the AOT scenario)
-* Modify compilation of tail calls with helper so that a tail call is compiled as a call to the StoreArguments thunk followed by the jump to the assembler TailCallHelper. In other words, the
-```
-tail. call/callvirt
-ret
-```
-becomes
-```
-call/callvirt
-tail. call
-ret
-```
-### Runtime (compiler in the AOT scenario)
-* Add generation of the StoreArguments and CallTarget IL thunks to the runtime (compiler tool chain in at AOT scenario). As a possible optimization, In the AOT scenario, the thunks can be generated by the compiler as native code directly without the intermediate IL.
-* For the JIT scenario, add a new method to the JIT to EE interface to get the StoreArguments thunk method handle for a given target method and the TailCallHelper address.
-
-### Runtime in both scenarios
-* Add support for the arguments buffer, which means:
- * Add functions to create, release and get the buffer for a thread
- * Add support for GC scanning the arguments buffers.
-* Implement the TailCallHelper asm helper for all architectures
-### Debugging in both scenarios
-Ensure that the stepping in a debugger works correctly. In CoreCLR, the TailCallStubManager needs to be updated accordingly.
-
-## Example code
-
-```C#
-struct S
-{
- public S(long p1, long p2, long p3)
- {
- s1 = p1; s2 = p2; s3 = p3;
- }
-
- public long s1, s2, s3;
-}
-
-struct T
-{
- public T(S s)
- {
- t1 = s.s1; t2 = s.s2; t3 = s.s3 t4 = 4;
- }
- public long t1, t2, t3, t4;
-}
-
-struct U
-{
- public U(T t)
- {
- u1 = t.t1; u2 = t.t2; u3 = t.t3 u4 = t.t4; u5 = 5;
- }
- public long u1, u2, u3, u4, u5;
-}
-
-int D(U u)
+# Tailcalls via helpers
+## Introduction
+Tailcall optimization is a transformation typically performed by compilers in
+which a call appearing at the very end of a function allows the stack frame of
+the caller to be cleaned up before the call is performed. This allows the
+execution to use less stack space. For that reason it is an important
+optimization for functional languages where recursion is typically the only way
+of looping over data structures. Thus, these languages require this
+transformation to be performed for correctness to guarantee that stack space
+usage does not grow linear in the size of the data structures.
+
+Since not all languages need this to be done .NET allows languages to request
+this optimization to be done on a per-call basis. This is communicated to the
+runtime by adding the `tail.` prefix before the call in the CIL bytecode and
+marks that the call needs to be performed as a tailcall for correctness. This
+prefix is legal only on calls in tail position and also requires certain other
+conditions to be met (as described in ECMA-335).
+
+When .NET sees the `tail.` prefix it has two mechanisms to perform the requested
+tailcall: fast tailcalls and helper-based tailcalls. In fast tailcalls the JIT
+is able to turn the call into cleanup of the stackframe followed by a jump or
+branch instruction in the underlying assembly. However, not all platforms
+support this and even on supported platforms it is not generally possible to do
+for all callsites. In scenarios where the JIT is not able to do this it falls
+back to another helper-based mechanism which allows dispatch of tailcalls more
+generally. This mechanism is described in this document.
+
+## An overview of the mechanism
+The helper-based mechanism is designed to be both portable and flexible so that
+it can support many forms of tailcalls and so that the mechanism itself can be
+supported widely and easily ported to new platforms. To accomplish these goals
+the mechanism makes use of IL stubs and as little as possible use of details of
+the underlying architecture. These goals are tricky to accomplish for the
+general definition of a tailcall which requires unwindining the stack before
+performing the call. Instead, the mechanism solves a slightly different problem:
+for any arbitrary sequence of tailcalls use constant stack space.
+
+The idea is the following: at the first tailcall of a sequence let the stack
+frame survive but set up a "dispatcher" that will know how to perform future
+tailcalls. Otherwise detect that this is not the first tailcall and return to
+let the previous dispatcher deal with the tailcall. The hard problems to solve
+are then
+1. Detecting whether returning will give control to a previous dispatcher.
+1. Recording the required information about the tailcall: its arguments and
+ target.
+1. Performing the call once the dispatcher has control.
+
+It turns out that the first problem is the only problem that requires
+architectural details (and thus needs work when ported to new platforms) while
+the other two problems can be solved once and for all in the runtime. This is
+accomplished by having the runtime generate two IL stubs to do just those
+things. When the JIT sees that a tailcall cannot be done using the fast tailcall
+mechanism it asks the runtime to create these two IL stubs: one IL stub to
+record the arguments and target for the call, and another to extract that
+information and perform the call.
+
+## Storing the args
+The first stub will be used to store the arguments. In the scenario where there
+is a previous dispatcher control flow will initially return here before the
+tail. prefixed call is (semantically) performed. Thus, it will not be legal to
+store the arguments on the stack. Instead the arguments are stored in
+thread-local storage for this small transitionary period of time. For the first
+tailcall it would be legal to store the arguments on the stack but for
+simplicity and uniformity this is not done and TLS is always used. Concretely,
+for an example like
+```csharp
+bool IsEven(int x)
{
- int local;
- Console.WriteLine("In C, U = [{0}, {1}, {2}, {3}, {4}", u.u1, u.u2, u.u3, u.u4, u.u5);
- return 1;
+ if (x == 0)
+ return true;
+ return /* tail. prefixed */ IsOdd(x - 1);
}
+```
-int C(T t)
+An IL stub will be generated which performs the following:
+```csharp
+void IL_STUB_StoreTailCallArgs(int x)
{
- int local;
- Console.WriteLine("In C");
- U args = new U(t);
- return tailcall D(args);
+ IntPtr argBuffer = RuntimeHelpers.AllocTailCallArgBuffer(4, null);
+ *(int*)argBuffer = x;
}
+```
-int B(S s)
+Here a runtime helper is used to allocate an area of space in TLS. Note that
+since arguments can be any arbitrary value, including by-refs and object refs,
+the GC needs special knowledge of the argument buffer. This is the purpose of
+the second argument to the runtime helper: it is a so-called GC descriptor which
+describes which slots contain what kind of GC pointers in the argument buffer.
+When the runtime generates this IL stub it will also generate the matching GC
+descriptor and pass it as the second argument to the runtime helper. For this
+simple example, the GC descriptor is trivial and null is passed.
+
+This case is relatively simple. In other cases the runtime might also require
+the generated stub to be passed a function pointer to the target address. This
+is for example the case when the tailcall is a `calli` instruction or for
+certain tailcalls to generic methods.
+
+## Calling the target
+The second IL stub extracts the arguments and calls the target function. For the
+above case a function like the following will be generated:
+```csharp
+void IL_STUB_CallTailCallTarget(IntPtr argBuffer, IntPtr result, IntPtr* retAddr)
{
- int local;
- Console.WriteLine("In B");
- T args = new T(S);
- return tailcall C(args);
+ int arg1 = *(int*)argBuffer;
+ RuntimeHelpers.FreeTailCallArgBuffer();
+ *retAddr = StubHelpers.NextCallReturnAddress();
+ *(bool*)result = IsOdd(arg1);
}
-
-int A()
+```
+It matches the function above but also includes a call to
+`StubHelpers.NextCallReturnAddress`. This is a JIT intrinsic that represents the
+address of where the next call will return to. This is part of how the mechanism
+detects that there is a previous dispatcher that should be used, which will be
+described in the next section.
+
+As described above there are cases when the runtime needs to be passed the
+target function pointer. In those cases this stub will instead load the function
+pointer out of the arg buffer and dispatch to it using a `calli` instruction.
+
+## The dispatcher
+The dispatcher is the last function of the mechanism. Unlike the IL stubs
+described in the previous two sections it is general and not specific to any one
+callsite. Thus only one dispatcher function needs to exist. However, note that
+it is possible for the dispatcher to be simultaneously live multiple times on
+the stack. This happens for example when a tailcalled function does a regular
+call to a function that then does tailcalls. In that case the dispatcher needs
+to be set up again since returning would not return directly back to the
+previous dispatcher.
+
+The mechanism uses some data structures to describe the dispatchers that are
+currently live on the stack and to facilitate detection of previous dispatchers.
+The dispatchers themselves are described by a linked list of
+`PortableTailCallFrame` entries. These entries are in a one-to-one
+correspondence with each live instance of the dispatcher in the current stack.
+This structure looks like the following:
+
+```csharp
+struct PortableTailCallFrame
{
- S args = new S(1, 2, 3);
- int result = B(args);
- Console.WriteLine("Done, result = {0}\n", result);
+ public PortableTailCallFrame* Prev;
+ public IntPtr TailCallAwareReturnAddress;
+ public IntPtr NextCall;
}
```
-## Example code execution
-This section shows how stack evolves during the execution of the example code above. Execution starts at function A, but the details below start at the interesting point where the first tail call is about to be called.
-### B is about to tail call C
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of B
-```
-### Arguments of C are stored in the thread local buffer, now we are in the TailCallHelper
-The callee saved registers and locals of B are not on the stack anymore
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-```
+Here the `TailCallAwareReturnAddress` is an address that can be used to detect
+whether a return would go to that particular dispatcher. `NextCall` is what the
+dispatcher uses to perform the next tailcall of a sequence.
-### In CallTarget thunk for C, about to call C
-The thunk will now extract parameters for C from the thread local storage and call C.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for C
-```
-### C is about to tail call D
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for C
-* Stack arguments of C
-* Return address of C
-* Callee saved registers and locals of C
-```
-### Arguments of D are stored in the thread local buffer, now we are in the TailCallHelper
-The callee saved registers and locals of C are not on the stack anymore.
-But we still have the return address of C, stack arguments of C and callee saved registers and locals of CallTarget thunk for C on the stack.
-We need to remove them as well to prevent stack growing.
-The TailCallHelper detects that the previous stack frame was the frame of the CallTarget thunk for C and so it sets the ChainCall flag in the topmost TailCallHelperStackEntry and returns to CallTarget thunk for C in order to let it cleanup its stack frame.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for C
-* Stack arguments of C
-* Return address of C
-```
-### Returned to CallTarget thunk for C with ChainCall flag in the TailCallHelperStackEntry **set**
-The thunk checks the ChainCall flag and since it is set, it runs its epilog and then jumps to the TailCallHelper.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for C
-```
-### Back in TailCallHelper
-Now the stack is back in the state where we have made the previous tail call. Since the previous stack frame was not a CallTarget thunk frame, we just jump to the CallTarget thunk for D.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-```
-### In CallTarget thunk for D, about to call D
-The thunk will now extract parameters for D from the thread local storage and call D.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for D
-```
-### In D
-We are in the last function of the chain, so after it does its work, it returns to its CallTarget thunk.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for D
-* Stack arguments of D
-* Return address of D
-* Callee saved registers and locals of D
-```
-### Returned to CallTarget thunk for D with ChainCall flag in the TailCallHelperStackEntry **clear**
-The thunk checks the ChainCall flag and since it is clear, it recognizes we are now returning from the call chain and so it returns the result of the D.
-```
-* Return address of A
-* Callee saved registers and locals of A
-* Stack arguments of B
-* Return address of B
-* Callee saved registers and locals of CallTarget thunk for D
-```
-### Returned to A
-We are back in A and we have the return value of the call chain.
-```
-* Return address of A
-* Callee saved registers and locals of A
-```
+The head of this linked list is stored in TLS, along with information about the
+currently allocated argument buffer that can be used by GC:
-## Example of thunks generated for a simple generic method
-
-```C#
-struct Point
+```csharp
+struct TailCallTls
{
- public int x;
- public int y;
- public int z;
+ public PortableTailCallFrame* Frame;
+ public IntPtr ArgBuffer;
+ public IntPtr ArgBufferGCDesc;
+ public int ArgBufferSize;
}
+```
-class Foo
+Finally, the dispatcher follows:
+```csharp
+void DispatchTailCalls(IntPtr callTarget, IntPtr result, IntPtr callersRetAddrSlot)
{
- public Point Test(int x, T t) where T : class
+ IntPtr callersRetAddr;
+ TailCallTls* tls =
+ RuntimeHelpers.GetTailCallInfo(callersRetAddrSlot, &callersRetAddr);
+ TailCallFrame* prevDispatcher = tls->Frame;
+ if (callersRetAddr == prevDispatcher->TailCallAwareReturnAddress)
{
- Console.WriteLine("T: {0}", typeof(t));
- return new Point(x, x, x);
+ prevDispatcher->NextCall = callTarget;
+ return;
}
-}
-```
-
-For tail calling the Test function, the IL helpers could look e.g. as follows:
-
-```IL
-.method public static void StoreArgumentsTest(native int target, object thisObj, native int genericContext, int x, object t) cil managed
-{
- .maxstack 4
- .locals init (
- [0] native int buffer,
- )
-
- call native int AllocateArgumentBuffer(56)
- stloc.0
-
- ldloc.0
- ldc.i8 0x12345678 // pointer to the GC descriptor of the arguments buffer
- stind.i
- ldloc.0
- sizeof native int
- add
- stloc.0
-
- ldloc.0
- ldftn Point CallTargetTest()
- stind.i
- ldloc.0
- sizeof native int
- add
- stloc.0
-
- ldloc.0
- ldarg.1 // "thisObj"
- stobj object
- ldloc.0
- sizeof object
- add
- stloc.0
-
- ldloc.0
- ldarg.2 // "genericContext"
- stind.i
- ldloc.0
- sizeof native int
- add
- stloc.0
-
- ldloc.0
- ldarg.3 // "x"
- stind.i4
- ldloc.0
- sizeof native int
- add
- stloc.0
-
- ldloc.0
- ldarg.4 // "t"
- stobj object
- ldloc.0
- sizeof object
- add
- stloc.0
-
- ldloc.0
- ldarg.0 // "target"
- stind.i
- ret
-}
-
-```
-
-```IL
-.method public static Point CallTargetTest() cil managed
-{
- .maxstack 4
- .locals init (
- [0] native int buffer,
- [1] valuetype TailCallHelperStackEntry entry,
- [2] Point result
- )
-
- // Initialize the TailCallHelperStackEntry
- // chainCall = false
- // sp = current sp
-
- ldloca.s 1
- ldc.i4.0
- stfld bool TailCallHelperStackEntry::chainCall
- ldloca.s 1
- call native int GetCurrentSp()
- stfld native int TailCallHelperStackEntry::sp
-
- ldloca.s 1 // TailCallHelperStackEntry
- call void PushHelperStackEntry(native int)
-
- // Prepare arguments for the tail call target
-
- call native int FetchArgumentBuffer()
- sizeof native int
- add // skip the pointer to the GC descriptor of the arguments buffer
- sizeof native int
- add // skip the address of the CallTargetTest in the buffer, it is used by the TailCallHelper only
- stloc.0
-
- ldloc.0
- ldobj object // this
- ldloc.0
- sizeof object
- add
- stloc.0
-
- ldloc.0
- ldind.i // generic context
- ldloc.0
- sizeof native int
- add
- stloc.0
-
- ldloc.0
- ldind.i4 // int x
- ldloc.0
- sizeof native int
- add
- stloc.0
-
- ldloc.0
- ldobj object // T t
- ldloc.0
- sizeof object
- add
-
- ldobj native int // tailcall target
-
- // The arguments buffer is not needed anymore
- call void ReleaseArgumentBuffer()
-
- .try
+ PortableTailCallFrame frame;
+ frame.Prev = prevDispatcher;
+ try
{
- calli Point (object, native int, int32, object) // this, generic context, x, t
- stloc.2
- leave.s Done
+ tls->Frame = &frame;
+
+ do
+ {
+ frame.NextCall = IntPtr.Zero;
+ var fptr = (func* void(IntPtr, IntPtr, IntPtr*))callTarget;
+ fptr(tls->ArgBuffer, result, &frame.TailCallAwareReturnAddress);
+ callTarget = frame.NextCall;
+ } while (frame.NextCall != IntPtr.Zero);
}
finally
{
- ldloca.s 1 // TailCallHelperStackEntry
- call void PopHelperStackEntry(native int)
- endfinally
+ tls->Frame = prevDispatcher;
}
+}
+```
-Done:
- ldloc.1 // TailCallHelperStackEntry
- ldfld bool TailCallHelperStackEntry::chainCall
- brfalse.s NotChained
-
- // Jump to the TailCallHelper that will call to the next tail call in the chain.
- // The stack frame of the current CallTargetTest is reclaimed and epilog executed
- // before the TailCallHelper is entered.
- tail.call int32 TailCallHelper()
- ret
+It is first responsible for detecting whether we can return and let a previous
+dispatcher perform the tailcall. To do this it needs to obtain the caller's
+return address (i.e. an address in the caller's caller). Furthermode, it needs
+to obtain information about the linked list of dispatcher frames. Due to return
+address hijacking in the VM it is not enough to simply read the return address
+directly from the stack -- instead, assistance from the VM is required in the
+form of a helper. This helper both returns the TLS information and the correct
+return address.
+
+In the case a return would go back to a dispatcher we simply record the next
+call by saving the `callTarget` parameter, a function pointer to a
+`CallTailCallTarget` stub. Otherwise a new entry in the linked list is set up
+and a loop is entered that starts dispatching tailcalls.
+
+This loop calls into the `CallTailCallTarget` stubs so it is from these stubs
+that we need to store the return address for comparisons in the future. These
+stubs will call into the specified user function from the original tailcall
+site, and it is if this function does a tailcall that we will need to detect
+whether we can use a previous dispatcher. This will be the case when we return
+directly to a `CallTailCallTarget` stub which will then return to the
+dispatcher.
+
+## The JIT's transformation
+Based on these functions the JIT needs to do a relatively simple transformation
+when it sees a tailcall that it cannot dispatch as a fast tailcall. This
+transformation is done in the JIT's internal IR, but for familiarity it is
+described here in pseudo C#. For a tailcall site like
+
+```csharp
+return /*tail prefixed*/ IsOdd(x - 1);
+```
+the JIT requests the runtime to create the two IL stubs described above and
+transforms the code into the equivalent of
+
+```csharp
+IL_STUB_StoreTailCallArgs(x - 1);
+bool result;
+DispatchTailCalls(&IL_STUB_CallTailCallTarget, (IntPtr)&result, _AddressOfReturnAddress());
+return result;
+```
-NotChained:
- // Now we are returning from a chain of tail calls to the caller of this chain
- ldloc.2
- ret
-}
-```
\ No newline at end of file
+Here `_AddressOfReturnAddress()` represents the stack slot containing the return
+address. Note that .NET requires that the return address is always stored on the
+stack, even on ARM architectures, due to its return address hijacking mechanism.
+
+In certain cases the target function pointer is also stored. For some targets
+this might require the JIT to perform the equivalent of `ldvirtftn` or `ldftn`
+to obtain a properly callable function pointer.
+
+## Debugging
+The control flow when helper-based tailcalls are performed is non-standard.
+Specifically, there are two possible paths of execution when a tailcall is
+performed, depending on whether returning goes to an existing dispatcher. Due to
+this the debugger requires special support to give users a good experience when
+stepping in code involving heper-based tailcalls.
+
+The debugger by default ignores IL stubs and implement stepping-in in a way that
+makes the above work in both scenarios. It turns out that the only problematic
+case is when stepping over tailcalls that are done by returning first. The
+debugger uses the same TLS structure as the rest of the mechanism to detect this
+case and simulates a step-over by performing a step-out to the nearest user
+function instead.
+
+## Conclusion
+.NET implements tail prefixed calls based on two separate mechanisms: a fast
+tailcall mechanism, where the JIT just directly jumps to the target function,
+and a helper-based tailcall mechanism, where the JIT asks the runtime to
+generate IL stubs that are used by a dispatcher to perform the tailcalls. Since
+the mechanism is primarily based on these IL stubs the mechanism is portable and
+the only architecture specific part is detecting whether there is a previous
+dispatcher. However, this part was not hard to implement for ARM and XArch
+architectures and it is expected that it will not be significantly harder for
+other platforms in the future.
diff --git a/docs/design/features/unloadability.md b/docs/design/features/unloadability.md
index 54a236cbbe6b5d..4b61b0f8b3ce62 100644
--- a/docs/design/features/unloadability.md
+++ b/docs/design/features/unloadability.md
@@ -98,8 +98,9 @@ The dashed lines represent indirect links from MethodTables of the objects to th
### First phase of unloading
Unloading is initialized by the user code calling `AssemblyLoadContext.Unload` metod or by execution of the `AssemblyLoadContext` finalizer. The following steps are performed to start the unloading process.
* The `AssemblyLoadContext` fires the `Unloading` event to allow the user code to perform cleanup if required (e.g. stop threads running inside of the context, remove references and destroy handles, etc.)
-* `AssemblyNative::PrepareForAssemblyLoadContextRelease` method is called, which in turn calls `CLRPrivBinderAssemblyLoadContext::PrepareForLoadContextRelease`
-* That method changes the handle referring to the `AssemblyLoadContext` to strong to keep the `AssemblyLoadContext` around until the unload is complete. For example, finalizers of types that are loaded into the `AssemblyLoadContext` may need access to the `AssemblyLoadContext`.
+* The `AssemblyLoadContext.InitiateUnload` method is called. It creates a strong GC handle referring to the `AssemblyLoadContext` to keep it around until the unload is complete. For example, finalizers of types that are loaded into the `AssemblyLoadContext` may need access to the `AssemblyLoadContext`.
+* Then it calls `AssemblyNative::PrepareForAssemblyLoadContextRelease` method with that strong handle as an argument, which in turn calls `CLRPrivBinderAssemblyLoadContext::PrepareForLoadContextRelease`
+* That method stores the passed in strong GC handle in `CLRPrivBinderAssemblyLoadContext::m_ptrManagedStrongAssemblyLoadContext`.
* Then it decrements refcount of the `AssemblyLoaderAllocator` the `CLRPrivBinderAssemblyLoadContext` points to.
* Finally, it destroys the strong handle to the managed `LoaderAllocator`. That allows the `LoaderAllocator` to be collected.
### Second phase of unloading
@@ -109,5 +110,5 @@ This phase is initiated after all instances of types from assemblies loaded into
* This method decrements reference count of all the `LoaderAllocators` that reference this `LoaderAllocator` and then the reference count of this `LoaderAllocator` itself.
* If it was not the last reference, the native `AssemblyLoaderAllocator` must stay alive until there are no references to it, so there is nothing else to be done now. It will be destroyed later in `LoaderAllocator::GCLoaderAllocators` after the last reference goes away.
* If we have released the last reference, the `LoaderAllocator::GCLoaderAllocators` is executed. This function finds all collectible LoaderAllocators that are not alive anymore and cleans up all domain assemblies in them. The cleanup removes each `DomainAssembly` from the `AppDomain` and also from the binding cache, it notifies debugger and finally destroys the `DomainAssembly`.
-* Strong handle to the managed `AssemblyLoadContext` in each of these LoaderAllocators is now destroyed. That enables these related AssemblyLoadContexts to be collected by GC.
-* Finally, these LoaderAllocators are registered for cleanup in the `AppDomain`. Their actual destruction happens on the finalizer thread in `Thread::DoExtraWorkForFinalizer`. When a `LoaderAllocator` is destroyed, the related `CLRPrivBinderAssemblyLoadContext` is destroyed too.
+* The strong and long weak handles to the managed `AssemblyLoadContext` in each of these LoaderAllocators are now destroyed. That enables these related `AssemblyLoadContext`s to be collected by GC.
+* Finally, these `LoaderAllocator`s are registered for cleanup in the `AppDomain`. Their actual destruction happens on the finalizer thread in `Thread::DoExtraWorkForFinalizer`. When a `LoaderAllocator` is destroyed, the related `CLRPrivBinderAssemblyLoadContext` is destroyed too.
diff --git a/docs/design/features/unloadability.svg b/docs/design/features/unloadability.svg
index 52f39cdec945da..2b361ebeb2eff2 100644
--- a/docs/design/features/unloadability.svg
+++ b/docs/design/features/unloadability.svg
@@ -3,7 +3,7 @@
+ viewBox="0 0 583.926 544.114" xml:space="preserve" color-interpolation-filters="sRGB" class="st19">
@@ -210,7 +209,7 @@
Dynamic connector.26
@@ -218,7 +217,7 @@
Dynamic connector.27
@@ -226,15 +225,15 @@
Dynamic connector.28
Pointer
Dynamic connector.29
@@ -249,21 +248,21 @@
Pointer
Dynamic connector.31
-
-
+
Dynamic connector.32
- Handle (initially weak, strong during unload)
+ Long weak handle
+
Dynamic connector.33
Pointer
@@ -277,7 +276,7 @@
Strong handle
@@ -285,26 +284,36 @@
...
+
Dynamic connector.36
Sheet.37
Managed side
+
Sheet.38
Native side
+
+ Dynamic connector.39
+ Strong handle (only during unload)
+ (only during unload)
diff --git a/docs/design/specs/Ecma-335-Augments.md b/docs/design/specs/Ecma-335-Augments.md
new file mode 100644
index 00000000000000..1d42a5e4c9094d
--- /dev/null
+++ b/docs/design/specs/Ecma-335-Augments.md
@@ -0,0 +1,368 @@
+# ECMA-335 CLI Specification Addendum
+
+This is a list of additions and edits to be made in ECMA-335 specifications. It includes both documentation of new runtime features and issues encountered during development. Some of the issues are definite spec errors while others could be reasoned as Microsoft implementation quirks.
+
+## Signatures
+
+There is a general philosophical issue whereby the spec defines the
+*syntax* of signatures to exclude errors such as:
+
+* using void outside of return types or pointer element types
+* instantiating a generic with a byref type
+* having a field of byref type
+* etc.
+
+Another approach is to syntactically treat `VOID`, `TYPEDBYREF`,
+`BYREF Type`, `CMOD_OPT Type`, `CMOD_REQ Type` as the other `Type`s
+and then deal with the cases like those above as semantic errors in their use.
+That is closer to how many implementations work. It is also how type syntax
+is defined in the grammar for IL, with many of the semantic errors
+deferred to peverify and/or runtime checking rather than being checked
+during assembly.
+
+The spec is also not entirely consistent in its use of the first
+approach. Some errors, such as instantiating a generic with an
+unmanaged pointer type, are not excluded from the spec's signature
+grammars and diagrams.
+
+Many of the specific issues below arise from the tension between these
+two approaches.
+
+### 1. `(CLASS | VALUETYPE)` cannot be followed by TypeSpec in practice
+
+In II.23.2.12 and II.23.2.14, it is implied that the token in
+`(CLASS | VALUETYPE) TypeDefOrRefOrSpecEncoded` can be a `TypeSpec`, when in
+fact it must be a `TypeDef` or `TypeRef`.
+
+peverify gives the following error:
+
+```
+[MD]: Error: Signature has token following ELEMENT_TYPE_CLASS
+(_VALUETYPE) that is not a TypeDef or TypeRef
+```
+
+An insightful comment in CLR source code notes that this rule prevents
+cycles in signatures, but see #2 below.
+
+Related issue:
+
+* https://github.com/dotnet/roslyn/issues/7970
+
+#### Proposed specification change
+
+a) Rename section II.23.2.8 from "TypeDefOrRefOrSpecEncoded" to "TypeDefOrRefEncoded and TypeDefOrRefOrSpecEncoded"
+
+b) Replace
+
+> These items are compact ways to store a TypeDef, TypeRef, or TypeSpec token in a Signature (§II.23.2.12).
+
+with
+
+> TypeDefOrRefEncoded is a compact representation of either TypeDef or TypeRef token in a Signature (§II.23.2.12). TypeDefOrRefOrSpecEncoded is a compact representation of either TypeDef, TypeRef or TypeSpec token in a Signature.
+
+Also correct
+
+> The encoded version of this TypeRef token is made up as follows:
+
+to
+
+> The compact representation of a TypeDef, TypeRef or TypeSpec token is made up as follows:
+
+c) In section II.23.2.12 replace
+
+```ebnf
+Type ::=
+ ...
+ CLASS TypeDefOrRefOrSpecEncoded
+ ...
+ GENERICINST (CLASS | VALUETYPE) TypeDefOrRefOrSpecEncoded GenArgCount Type*
+ ...
+ VALUETYPE TypeDefOrRefOrSpecEncoded
+ ...
+```
+
+with
+
+```ebnf
+Type ::=
+ ...
+ (CLASS | VALUETYPE) TypeDefOrRefEncoded
+ GENERICINST (CLASS | VALUETYPE) TypeDefOrRefEncoded GenArgCount Type+
+ ...
+```
+
+Note also the correction of `Type*` to `Type+`. A generic type instantiation shall have at least one type argument.
+
+d) In section II.23.2.14 replace
+
+```ebnf
+TypeSpecBlob ::=
+ ...
+ GENERICINST (CLASS | VALUETYPE) TypeDefOrRefOrSpecEncoded GenArgCount Type Type*
+ ...
+```
+
+with
+
+```ebnf
+TypeSpecBlob ::=
+ ...
+ GENERICINST (CLASS | VALUETYPE) TypeDefOrRefEncoded GenArgCount Type+
+ ...
+```
+
+`Type Type*` is simplified to `Type+`.
+
+#### Rationale of the proposal
+
+1. The proposal removes the possibility of representing the same type via two different encodings. This approach is consistent with II.23.2.16: "Short form signatures" where a short form of a primitive type is preferred over the corresponding long form.
+
+2. Potential TypeSpec recursion is prevented.
+
+3. PEVerify, the CLR runtime and C# compiler prior to VS 2015 report an error when encountering an encoded TypeSpec in the positions described above.
+
+### 2. `(CMOD_OPT | CMOD_REQ) ` is permitted in practice
+
+In II.23.2.7, it is noted that CMOD_OPT or CMOD_REQD is followed
+by a TypeRef or TypeDef metadata token, but TypeSpec tokens are
+also allowed by ilasm, csc, peverify, and the CLR.
+
+Note, in particular, that TypeSpecs are used there by C++/CLI to
+represent strongly-typed boxing in C++/CLI. e.g. `Nullable^`
+in C++/CLI becomes
+``[mscorlib]System.ValueType modopt([mscorlib]System.Nullable`1) modopt([mscorlib]System.Runtime.CompilerServices.IsBoxed)``
+in IL.
+
+This tolerance adds a loophole to the rule above whereby cyclical
+signatures are in fact possible, e.g.:
+
+* `TypeSpec #1: PTR CMOD_OPT I4`
+
+Such signatures can currently cause crashes in the runtime and various
+tools, so if the spec is amended to permit TypeSpecs as modifiers,
+then there should be a clarification that cycles are nonetheless not
+permitted, and ideally readers would detect such cycles and handle the
+error with a suitable message rather than a stack overflow.
+
+Related issues:
+
+* https://github.com/dotnet/roslyn/issues/7971
+* https://github.com/dotnet/coreclr/issues/2674
+
+#### Proposed specification change
+
+In section II.23.2.7, replace
+
+> The CMOD_OPT or CMOD_REQD is followed by a metadata token that indexes a row in the TypeDef
+ table or the TypeRef table. However, these tokens are encoded and compressed – see §II.23.2.8
+for details
+
+with
+
+> The CMOD_OPT or CMOD_REQD is followed by a metadata token that indexes a row in the TypeDef
+table, TypeRef table, or TypeSpec table. However, these tokens are encoded and compressed –
+see §II.23.2.8 for details. Furthermore, if a row in the TypeSpec table is indicated,
+it must not create cycle.
+
+### 3. Custom modifiers can go in more places than specified
+
+Most notably, II.23.2.14 and II.23.21.12 (`Type` and `TypeSpec` grammars)
+are missing custom modifiers for the element type of `ARRAY` and the
+type arguments of `GENERICINST`.
+
+Also, `LocalVarSig` as specified does not allow modifiers on
+`TYPEDBYREF`, and that seems arbitrary since it is allowed on parameter
+and return types.
+
+#### Proposed specification change
+
+a) In section II.23.2.4 FieldSig, replace the diagram with a production rule:
+
+```ebnf
+FieldSig ::= FIELD Type
+```
+
+b) In section II.23.2.5 PropertySig, replace the diagram with a production rule:
+
+```ebnf
+PropertySig ::= PROPERTY HASTHIS? ParamCount RetType Param*
+```
+
+Note that this change also allows properties to have BYREF type.
+
+c) In section II.23.2.6 LocalVarSig, replace the diagram with production rules:
+
+```ebnf
+LocalVarSig ::=
+ LOCAL_SIG Count LocalVarType+
+
+LocalVarType ::=
+ Type
+ CustomMod* Constraint BYREF? Type
+ CustomMod* BYREF Type
+ CustomMod* TYPEDBYREF
+
+```
+
+d) In section II.23.2.10 Param, replace the diagram with production rules:
+
+```ebnf
+Param ::=
+ Type
+ CustomMod* BYREF Type
+ CustomMod* TYPEDBYREF
+```
+
+e) In section II.23.2.11 RetType, replace the diagram with production rules:
+
+```ebnf
+RetType ::=
+ Type
+ CustomMod* BYREF Type
+ CustomMod* TYPEDBYREF
+ CustomMod* VOID
+```
+
+f) In section II.23.2.12 Type, add a production rule to the definition of `Type`:
+
+```ebnf
+Type ::= CustomMod* Type
+
+```
+
+g) In sections II.23.2.12 Type and II.23.2.14 TypeSpec replace production rule
+
+```ebnf
+PTR CustomMod* Type
+```
+
+with
+
+```ebnf
+PTR Type
+```
+
+and replace production rule
+
+```ebnf
+SZARRAY CustomMod* Type
+```
+
+with
+
+```ebnf
+SZARRAY Type
+```
+
+### 4. BYREF can come before custom modifiers
+
+Everywhere `BYREF` appears in the spec's box and pointer diagrams, it
+comes after any custom modifiers, but the C++/CLI declaration `const int&`
+is emitted as `BYREF CMOD_OPT IsConst I4`, and a call-site using
+`CMOD_OPT IsConst BYREF I4` will not match.
+
+Under the interpretation that `BYREF` is just a managed pointer type, it
+makes sense that there should be parity between `PTR` and `BYREF` with
+respect to modifiers. Consider, `const int*` vs. `int* const` in
+C++. The former (pointer to constant int) is `PTR CMOD_OPT IsConst I4`
+and the latter (constant pointer to int) is `CMOD_OPT IsConst PTR I4`.
+The analogy from `const int*` to `const int&` justifies C++'s
+encoding of `BYREF` before `CMOD_OPT` in defiance of the spec.
+
+#### Proposed specification change
+
+Already addressed by changes in proposal #3 above.
+
+### 5. TypeSpecs can encode more than specified
+
+In II.23.2.14, the grammar for a `TypeSpec` blob is a subset of the
+`Type` grammar defined in II.23.21.12. However, in practice, it is
+possible to have other types than what is listed.
+
+Most notably, the important use of the `constrained.` IL prefix with
+type parameters is not representable as specified since `MVAR` and `VAR`
+are excluded from II.23.2.14.
+
+More obscurely, the constrained. prefix also works with primitives,
+e.g:
+
+```
+constrained. int32
+callvirt instance string [mscorlib]System.Object::ToString()
+```
+
+which opens the door to `TypeSpec`s with I4, I8, etc. signatures.
+
+It then follows that the only productions in `Type` that do not make
+sense in `TypeSpec` are `(CLASS | VALUETYPE) TypeDefOrRef` since
+`TypeDefOrRef` tokens can be used directly and the indirection through
+a `TypeSpec` would serve no purpose.
+
+In the same way as `constrained.`, (assuming #2 is a spec bug and not
+an ilasm/peverify/CLR quirk), custom modifiers can beget `TypeSpec`s
+beyond what is allowed by II.23.2.14, e.g. `modopt(int32)` creates a
+typespec with signature I4.
+
+Even more obscurely, this gives us a way to use `VOID`, `TYPEDBYREF`,
+`CMOD_OPT`, and `CMOD_REQ` at the root of a `TypeSpec`, which are not even
+specified as valid at the root of a `Type`: `modopt(int32 modopt(int32))`,
+`modopt(void)`, and `modopt(typedref)` all work in
+practice. `CMOD_OPT` and `CMOD_REQ` at the root can also be obtained by putting
+a modifier on the type used with `constrained.`.
+
+## Heap sizes
+
+The ECMA-335-II specification isn't clear on the maximum sizes of #String, #Blob and #GUID heaps.
+
+#### Proposed specification change
+
+We propose the limit on #String and #Blob heap size is 2^29 (0.5 GB), that is any index to these heaps fits into 29 bits.
+
+#### Rationale of the proposal
+
+1) 2^29 is the maximum value representable by a compressed integer as defined elsewhere in the spec. Currently the metadata don't encode heap indices anywhere using compressed integers. However the Portable PDB specification uses compressed integers for efficient encoding of heap indices. We could extend the definition of compressed integer to cover all 32 bit integers, but it would be simpler if we could leave it as is.
+
+2) 0.5 GB is a very large heap. Having such a big PE file seems unreasonable and very rare scenario (if it exists at all).
+
+3) Having 3 spare bits available is very beneficial for the implementation. It allows to represent WinRT projected strings, namespaces, etc. in very efficient way. If we had to represent heap indices with all 32 bits it would bloat various structures and increase memory pressure. PE files over 0.5 GB of size are very rare, but the overhead would affect all compilers and tools working with the metadata reader.
+
+## Metadata merging
+
+The mention of metadata merging in § II.10.8 _Global fields and methods_ is a spec bug. The CLI does not merge metadata. Policies of static linkers that merge metadata may vary and do not concern the CLI.
+
+This text should be deleted, and the _metadata merging_ entry should be removed from the index:
+
+> ~~The only noticeable difference is in how definitions of this special class
+> are treated when multiple modules are combined together, as is done by a class loader. This process is
+> known as _metadata merging_.~~
+>
+> ~~For an ordinary type, if the metadata merges two definitions of the same type, it simply discards one
+> definition on the assumption they are equivalent, and that any anomaly will be discovered when the
+> type is used. For the special class that holds global members, however, members are unioned across all
+> modules at merge time. If the same name appears to be defined for cross-module use in multiple
+> modules then there is an error. In detail:~~
+>
+> * ~~If no member of the same kind (field or method), name, and signature exists, then
+> add this member to the output class.~~
+>
+> * ~~If there are duplicates and no more than one has an accessibility other than
+> **compilercontrolled**, then add them all to the output class.~~
+>
+> * ~~If there are duplicates and two or more have an accessibility other than
+> **compilercontrolled**, an error has occurred.~~
+
+## Module Initializer
+
+All modules may have a module initializer. A module initializer is defined as the type initializer (§ II.10.5.3) of the `` type (§ II.10.8).
+
+There are no limitations on what code is permitted in a module initializer. Module initializers are permitted to run and call both managed and unmanaged code.
+
+### Module Initialization Guarantees
+
+In addition to the guarantees that apply to all type initializers, the CLI shall provide the following guarantees for module initializers:
+
+1. A module initializer is executed at, or sometime before, first access to any static field or first invocation of any method defined in the module.
+
+2. A module initializer shall run exactly once for any given module unless explicitly called by user code.
+
+3. No method other than those called directly or indirectly from the module initializer will be able to access the types, methods, or data in a module before its initializer completes execution.
diff --git a/src/libraries/System.Reflection.Metadata/specs/PE-COFF.md b/docs/design/specs/PE-COFF.md
similarity index 100%
rename from src/libraries/System.Reflection.Metadata/specs/PE-COFF.md
rename to docs/design/specs/PE-COFF.md
diff --git a/src/libraries/System.Reflection.Metadata/specs/PortablePdb-Metadata.md b/docs/design/specs/PortablePdb-Metadata.md
similarity index 100%
rename from src/libraries/System.Reflection.Metadata/specs/PortablePdb-Metadata.md
rename to docs/design/specs/PortablePdb-Metadata.md
diff --git a/docs/pr-guide.md b/docs/pr-guide.md
index f55e4e5f1b6b89..9074d699186f39 100644
--- a/docs/pr-guide.md
+++ b/docs/pr-guide.md
@@ -52,7 +52,7 @@ Validation may fail for several reasons:
* Add a comment `/azp run runtime`
* Or, click on "re-run all checks" in the GitHub Checks tab
* Or, simply close and reopen the PR.
-* If you have established that it is an unrelated failure, please ensure we have an active issue for it. See the [unrelated failure](#unrelated-failure) section below.
+* If you have established that it is an unrelated failure, please ensure we have an active issue for it. See the [unrelated failure](#what-to-do-if-you-determine-the-failure-is-unrelated) section below.
* Whoever merges the PR should be satisfied that the failure is unrelated, is not introduced by the change, and that we are appropriately tracking it.
### Option 3: The state of the master branch HEAD is bad.
diff --git a/docs/project/dogfooding.md b/docs/project/dogfooding.md
index 8af5db3b995a11..6b564f7ec239c3 100644
--- a/docs/project/dogfooding.md
+++ b/docs/project/dogfooding.md
@@ -117,8 +117,8 @@ This is the default case for applications - running against an installed .NET ru
```XML
Exe
-
- netcoreapp5.0
+
+ net5.0
5.0.0-preview.1.20120.5
@@ -140,8 +140,8 @@ make it self-contained by adding a RuntimeIdentifier (RID).
```XML
Exe
-
- netcoreapp5.0
+
+ net5.0
5.0.0-preview.1.20120.5
@@ -152,7 +152,7 @@ make it self-contained by adding a RuntimeIdentifier (RID).
```
$ dotnet restore
$ dotnet publish
-$ bin\Debug\netcoreapp5.0\win-x64\publish\App.exe
+$ bin\Debug\net5.0\win-x64\publish\App.exe
```
## More Advanced Scenario - Using your local CoreFx build
diff --git a/docs/project/dotnet-standards.md b/docs/project/dotnet-standards.md
index 2eb0af2be0bdea..8cdb60da4898db 100644
--- a/docs/project/dotnet-standards.md
+++ b/docs/project/dotnet-standards.md
@@ -29,6 +29,7 @@ ECMA 335 - CLI
- [ECMA 335 Standard Overview](http://www.ecma-international.org/publications/standards/Ecma-335.htm)
- [ECMA 335 Standard (PDF)](http://www.ecma-international.org/publications/files/ECMA-ST/ECMA-335.pdf)
- [Wikipedia entry on CLI](http://en.wikipedia.org/wiki/Common_Language_Infrastructure)
+- [ECMA 335 Addendum](../design/specs/Ecma-335-Augments.md)
**ECMA 335 Partitions with added Microsoft Specific Implementation Notes**
diff --git a/docs/project/library-servicing.md b/docs/project/library-servicing.md
index 52d7f5ac06775c..29934d1606f1f5 100644
--- a/docs/project/library-servicing.md
+++ b/docs/project/library-servicing.md
@@ -25,7 +25,7 @@ If this library ships both inbox on a platform and in its own library package th
```
- 4.0.3.0
+ 4.0.3.0
```
Where the `AssemblyVersion` is set to the old version before updating. To determine if the library ships inbox you can look at for `InboxOnTargetFramework` item groups or `TreatAsOutOfBox` suppressions in the pkgproj for the library.
diff --git a/docs/workflow/README.md b/docs/workflow/README.md
index 57c10f7a9d472d..7a17fecd50eff0 100644
--- a/docs/workflow/README.md
+++ b/docs/workflow/README.md
@@ -10,7 +10,7 @@ The repo can be built for the following platforms, using the provided setup and
| x86 | ✔ | | | |
| ARM | ✔ | ✔ | | |
| ARM64 | ✔ | ✔ | | |
-| | [Requirements](requirements/windows-requirements.md) | [Requirements](requirements/linux-requirements.md) | [Requirements](requirements/macos-requirements.md) |
+| | [Requirements](requirements/windows-requirements.md) | [Requirements](requirements/linux-requirements.md) | [Requirements](requirements/macos-requirements.md) | [Requirements](requirements/freebsd-requirements.md)
Before proceeding further, please click on the link above that matches your machine and ensure you have installed all the prerequisites for the build to work.
diff --git a/docs/workflow/building/coreclr/linux-instructions.md b/docs/workflow/building/coreclr/linux-instructions.md
index 06977543d9d57b..63280373139927 100644
--- a/docs/workflow/building/coreclr/linux-instructions.md
+++ b/docs/workflow/building/coreclr/linux-instructions.md
@@ -19,7 +19,7 @@ Please note that when choosing an image choosing the same image as the host os y
Once you have chosen an image the build is one command run from the root of the runtime repository:
```sh
-docker run --rm -v :/runtime -w /runtime mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-a50a721-20191120200116 ./src/coreclr/build.sh -clang9
+docker run --rm -v :/runtime -w /runtime mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-20200508132555-78cbb55 ./build.sh --subset clr -clang9
```
Dissecting the command:
@@ -30,16 +30,18 @@ Dissecting the command:
`-w: /runtime`: set /runtime as working directory for the container
-`mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-a50a721-20191120200116`: image name.
+`mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-20200508132555-78cbb55`: image name.
-`./src/coreclr/build.sh`: command to be run in the container, run the build to coreclr.
+`./build.sh`: command to be run in the container, run the build to coreclr.
+
+`--subset clr`: build the runtime subset (excluding libraries and installers)
`-clang9`: argument to use clang 9 for the build, only compiler in the build image.
-If you are attempting to cross build for arm/arm64 then use the crossrootfs location to set the ROOTFS_DIR. The command would add `-e ROOTFS_DIR=`. See [Docker Images](#Docker-Images) for the crossrootfs location. In addition you will need to specify `cross`.
+If you are attempting to cross build for arm/arm64 then use the crossrootfs location to set the ROOTFS_DIR. The command would add `-e ROOTFS_DIR=`. See [Docker Images](#Docker-Images) for the crossrootfs location. In addition you will need to specify `--cross`.
```sh
-docker run --rm -v :/runtime -w /runtime -e ROOTFS_DIR=/crossrootfs/arm64 mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-arm64-cfdd435-20191023143847 ./src/coreclr/build.sh arm64 cross
+docker run --rm -v :/runtime -w /runtime -e ROOTFS_DIR=/crossrootfs/arm64 mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-arm64-20200508132638-b2c2436 ./build.sh --arch arm64 --cross --subset clr
```
Note that instructions on building the crossrootfs location can be found at [cross-building.md](cross-building.md). These instructions are suggested only if there are plans to change the rootfs, or the Docker images for arm/arm64 are insufficient for you build.
@@ -55,9 +57,9 @@ These instructions might fall stale often enough as we change our images as our
| Alpine | x64 | `mcr.microsoft.com/dotnet-buildtools/prereqs:alpine-3.9-WithNode-0fc54a3-20190918214015` | - | -clang9 |
| CentOS 6 (build for RHEL 6) | x64 | `mcr.microsoft.com/dotnet-buildtools/prereqs:centos-6-f39df28-20191023143802` | - | -clang9 |
| CentOS 7 (build for RHEL 7) | x64 | `mcr.microsoft.com/dotnet-buildtools/prereqs:centos-7-f39df28-20191023143754` | - | -clang9 |
-| Ubuntu 16.04 | arm32(armhf) | `mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-09ec757-20200320131433` | `/crossrootfs/arm` | -clang9 |
-| Ubuntu 16.04 | arm64 (arm64v8) | `mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-arm64-cfdd435-20191023143847` | `/crossrootfs/arm64` | -clang9 |
-| Alpine | arm64 (arm64v8) | `mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-arm64-alpine-406629a-20191023143847` | `/crossrootfs/arm64` | -clang5.0 |
+| Ubuntu 16.04 | arm32(armhf) | `mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-20200413125008-09ec757` | `/crossrootfs/arm` | -clang9 |
+| Ubuntu 16.04 | arm64 (arm64v8) | `mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-arm64-20200413125008-cfdd435` | `/crossrootfs/arm64` | -clang9 |
+| Alpine | arm64 (arm64v8) | `mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-16.04-cross-arm64-alpine-20200413125008-406629a` | `/crossrootfs/arm64` | -clang5.0 |
Environment
===========
@@ -69,47 +71,7 @@ Minimum RAM required to build is 1GB. The build is known to fail on 512 MB VMs (
Toolchain Setup
---------------
-Add Kitware's APT feed to your configuration for a newer version of CMake. See their instructions at -Debug-`. Ex: `artifacts/bin/netcoreapp5.0-Linux-Debug-x64`. For more details on the build configurations see [project-guidelines](/docs/coding-guidelines/project-guidelines.md)
+The output is at `artifacts/bin/[BuildSettings]` where `BuildSettings` looks something like `net5.0--Debug-`. Ex: `artifacts/bin/net5.0-Linux-Debug-x64`. For more details on the build configurations see [project-guidelines](/docs/coding-guidelines/project-guidelines.md)
Building corefx for Linux ARM Emulator
=======================================
@@ -118,14 +118,14 @@ When building for a new architecture you will need to build the native pieces se
Example building for armel
```
src/Native/build-native.sh armel
---> Output goes to artifacts/bin/runtime/netcoreapp5.0-Linux-Debug-armel
+--> Output goes to artifacts/bin/runtime/net5.0-Linux-Debug-armel
build /p:TargetArchitecture=x64 /p:BuildNative=false
---> Output goes to artifacts/bin/runtime/netcoreapp5.0-Linux-Debug-x64
+--> Output goes to artifacts/bin/runtime/net5.0-Linux-Debug-x64
```
The reason you need to build the managed portion for x64 is because it depends on runtime packages for the new architecture which don't exist yet so we use another existing architecture such as x64 as a proxy for building the managed binaries.
-Similar if you want to try and run tests you will have to copy the managed assemblies from the proxy directory (i.e. `netcoreapp5.0-Linux-Debug-x64`) to the new architecture directory (i.e `netcoreapp5.0-Linux-Debug-armel`) and run code via another host such as corerun because dotnet is at a higher level and most likely doesn't exist for the new architecture yet.
+Similar if you want to try and run tests you will have to copy the managed assemblies from the proxy directory (i.e. `net5.0-Linux-Debug-x64`) to the new architecture directory (i.e `net5.0-Linux-Debug-armel`) and run code via another host such as corerun because dotnet is at a higher level and most likely doesn't exist for the new architecture yet.
Once all the necessary builds are setup and packages are published the splitting of the build and manual creation of the runtime should no longer be necessary.
diff --git a/docs/workflow/building/mono/README.md b/docs/workflow/building/mono/README.md
index a7cfa158e03e07..276ae512cedabc 100644
--- a/docs/workflow/building/mono/README.md
+++ b/docs/workflow/building/mono/README.md
@@ -1,5 +1,15 @@
# Building Mono
+## Build Requirements
+
+| Windows | Linux | macOS | FreeBSD |
+| :------: | :------: | :------: | :------: |
+| [Requirements](../../requirements/windows-requirements.md) | [Requirements](../../requirements/linux-requirements.md) | [Requirements](../../requirements/macos-requirements.md) |
+
+Before proceeding further, please click on the link above that matches your machine and ensure you have installed all the prerequisites for the build to work.
+
+## Concept
+
To build the Mono runtime, you must first do a complete runtime build (coreclr, libraries, and then mono). At the repo root, simply execute:
```bash
diff --git a/docs/workflow/debugging/libraries/debugging-vscode.md b/docs/workflow/debugging/libraries/debugging-vscode.md
index a27aa1dcbed577..4b82a4265811b8 100644
--- a/docs/workflow/debugging/libraries/debugging-vscode.md
+++ b/docs/workflow/debugging/libraries/debugging-vscode.md
@@ -5,7 +5,7 @@
- Open the folder containing the source you want to debug in VS Code - i.e., if you are debugging a test failure in System.Net.Sockets, open `runtime/src/libraries/System.Net.Sockets`
- Open the debug window: `ctrl-shift-D` or click on the button on the left
- Click the gear button at the top to create a launch configuration, select `.NET Core` from the selection dropdown
-- In the `.NET Core Launch (console)` configuration do the following
+- In the ".NET Core Launch (console)" `launch.json` configuration file make the following changes:
- delete the `preLaunchTask` property
- set `program` to the full path to `dotnet` in the artifacts/bin/testhost directory.
- something like `artifacts/bin/testhost/netcoreapp-{OS}-{Configuration}-{Architecture}`, plus the full path to your dotnet/runtime directory.
@@ -13,5 +13,5 @@
- using the System.Net.Sockets example, it should be something like `artifacts/bin/System.Net.Sockets.Tests/netcoreapp-{OS}-{Configuration}-{Architecture}`, plus the full path to your dotnet/runtime directory.
- set `args` to the command line arguments to pass to the test
- something like: `[ "exec", "--runtimeconfig", "{TestProjectName}.runtimeconfig.json", "xunit.console.dll", "{TestProjectName}.dll", "-notrait", ... ]`, where TestProjectName would be `System.Net.Sockets.Tests`
- - to run a specific test, you can append something like: `[ "method", "System.Net.Sockets.Tests.{ClassName}.{TestMethodName}", ...]`
+ - to run a specific test, you can append something like: `[ "-method", "System.Net.Sockets.Tests.{ClassName}.{TestMethodName}", ...]`
- Set a breakpoint and launch the debugger, inspecting variables and call stacks will now work
diff --git a/docs/workflow/requirements/freebsd-requirements.md b/docs/workflow/requirements/freebsd-requirements.md
new file mode 100644
index 00000000000000..59b3c64d928f15
--- /dev/null
+++ b/docs/workflow/requirements/freebsd-requirements.md
@@ -0,0 +1,69 @@
+Requirements to build dotnet/runtime on FreeBSD
+=====================
+
+This guide will walk you through the requirements needed to build dotnet/runtime on FreeBSD. We'll start by showing how to set up your environment from scratch.
+Since there is no official build and FreeBSD package, native build on FreeBSD is not trivial. There are generally three options, sorted by ease of use:
+- cross-compile on Linux using Docker
+- cross-compile on Linux using Toolchain
+- build on FreeBSD
+
+
+Environment
+===========
+
+These instructions were validated for and on FreeBSD 11.3 and 12.1.
+
+Build using Docker on Linux
+---------------------------
+
+This is similar to [Linux](linux-requirements.md) instructions. https://github.com/dotnet/dotnet-buildtools-prereqs-docker repro provides images
+with all needed prerequisites to build. As the example bellow may become stale, https://github.com/dotnet/versions/blob/master/build-info/docker/image-info.dotnet-dotnet-buildtools-prereqs-docker-master.json offers list of latest Docker tags.
+
+```sh
+TAG=mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-cross-freebsd-11-20200430154008-a84b0d2
+docker run --rm --volume $(pwd):$(pwd) --workdir $(pwd) --env ROOTFS_DIR=/crossrootfs/x64 -ti $TAG ./build.sh -cross -FreeBSD
+```
+
+Build using Toolchain Setup
+---------------------------
+To build FreeBSD images, prerequisites described in [Linux](linux-requirements.md) are needed. Additionally, crossrootfs for FreeBSD needs to be constructed.
+In order to successfully build FreeBSD crossrootfs, few more packages needs to be installed. Following example is for Ubuntu 18:
+```sh
+apt-get install -y libbz2-dev libz-dev liblzma-dev libarchive-dev libbsd-dev
+```
+With prerequisites for crossrootfs one can run:
+```sh
+./eng/common/cross/build-rootfs.sh freebsd11 $(pwd)/rootfs/freebsd
+```
+After that, FreeBSD build can be started by running
+```
+ROOTFS_DIR=$(pwd)/rootfs/freebsd ./build.sh -cross -os FreeBSD
+```
+
+
+Building on FreeBSD
+-------------------
+
+Building dotnet/runtime depends on several tools to be installed.
+
+Install the following packages:
+
+- cmake
+- autoconf
+- automake
+- libtool
+- icu
+- libunwind
+- lttng-ust
+- krb5
+- openssl (optional)
+
+The lines to install all the packages above using package manager.
+
+```sh
+sudo pkg install --yes libunwind icu libinotify lttng-ust krb5 cmake autoconf automake openssl
+```
+
+Additionally, working dotnet cli with SDK is needed. On other platforms this would be downloaded automatically during build but it is not currently available for FreeBSD.
+It needs to be built once on supported platform or obtained via community resources.
+
diff --git a/docs/workflow/requirements/linux-requirements.md b/docs/workflow/requirements/linux-requirements.md
index f7180dcf77e186..6f13897bc64556 100644
--- a/docs/workflow/requirements/linux-requirements.md
+++ b/docs/workflow/requirements/linux-requirements.md
@@ -86,9 +86,14 @@ Install the following packages for the toolchain:
- libssl-dev
- libkrb5-dev
- libnuma-dev (optional, enables numa support)
+- zlib1g-dev
-A single line to install all packages above:
+The following dependencies are needed if Mono Runtime is enabled (default behavior):
- ~$ sudo apt-get install cmake llvm-9 clang-9 autoconf automake libtool build-essential python curl git lldb-6.0 liblldb-6.0-dev libunwind8 libunwind8-dev gettext libicu-dev liblttng-ust-dev libssl-dev libnuma-dev libkrb5-dev
+- autoconf
+- automake
+- libtool
+
+ ~$ sudo apt-get install cmake llvm-9 clang-9 autoconf automake libtool build-essential python curl git lldb-6.0 liblldb-6.0-dev libunwind8 libunwind8-dev gettext libicu-dev liblttng-ust-dev libssl-dev libnuma-dev libkrb5-dev zlib1g-dev autoconf automake libtool
You now have all the required components.
diff --git a/docs/workflow/requirements/macos-requirements.md b/docs/workflow/requirements/macos-requirements.md
index 06d1fb01545d69..4604b87f60f85d 100644
--- a/docs/workflow/requirements/macos-requirements.md
+++ b/docs/workflow/requirements/macos-requirements.md
@@ -16,54 +16,21 @@ Install Apple Xcode developer tools from the Mac App Store ([link](https://apps.
Toolchain Setup
---------------
-Building dotnet/runtime depends on several tools to be installed. You can download them individually or use [Homebrew](http://brew.sh) for easier toolchain setup.
+Building dotnet/runtime depends on several tools to be installed. You can download them individually or use [Homebrew](https://brew.sh) for easier toolchain setup.
Install the following packages:
- cmake 3.15.5 or newer
- autoconf
- automake
+- icu4c
- libtool
+- openssl 1.1
- pkg-config
- python3
-- icu4c
-The lines to install all the packages above using Homebrew.
+You can install all the packages above using Homebrew by running this command in the repository root:
```
-brew install cmake autoconf automake libtool pkg-config python3 icu4c
-brew link --force icu4c
-```
-
-OpenSSL
--------
-
-To build the libraries on macOS, you must install and configure links for OpenSSL 1.1.
-
-```sh
-brew install openssl
-
-# You might need to "link" pkg-config:
-brew link pkg-config
-
-# We need to make the runtime libraries discoverable, as well as make
-# pkg-config be able to find the headers and current ABI version.
-#
-# Ensure the paths we will need exist
-mkdir -p /usr/local/lib/pkgconfig
-
-# The rest of these instructions assume a default Homebrew path of
-# `/usr/local/opt/`, with `brew --prefix` returning `/usr/local`
-# and `brew --prefix openssl` returning `/usr/local/opt/openssl@1.1`.
-# In this case, `brew info openssl` shows:
-# `openssl@1.1: stable 1.1.1d (bottled) [keg-only]`.
-
-# Runtime dependencies
-ln -s /usr/local/opt/openssl\@1.1/lib/libcrypto.1.1.dylib /usr/local/lib/
-ln -s /usr/local/opt/openssl\@1.1/lib/libssl.1.1.dylib /usr/local/lib/
-
-# Compile-time dependencies (for pkg-config)
-ln -s /usr/local/opt/openssl\@1.1/lib/pkgconfig/libcrypto.pc /usr/local/lib/pkgconfig/
-ln -s /usr/local/opt/openssl\@1.1/lib/pkgconfig/libssl.pc /usr/local/lib/pkgconfig/
-ln -s /usr/local/opt/openssl\@1.1/lib/pkgconfig/openssl.pc /usr/local/lib/pkgconfig/
+brew bundle --no-lock --file eng/Brewfile
```
diff --git a/docs/workflow/requirements/windows-requirements.md b/docs/workflow/requirements/windows-requirements.md
index 51fdbe28943b03..5753ccf266a938 100644
--- a/docs/workflow/requirements/windows-requirements.md
+++ b/docs/workflow/requirements/windows-requirements.md
@@ -26,19 +26,19 @@ Visual Studio 2019 installation process:
- .NET Desktop Development with all default components.
- Desktop Development with C++ with all default components.
- To build for Arm32 or Arm64, make sure that you have the right architecture specific compilers installed:
- - In addition, ensure you install the ARM tools. In the "Individual components" window, in the "Compilers, build tools, and runtimes" section, check the box for "MSVC v142 - VS 2019 C++ ARM build tools (v14.23)".
- - Also, ensure you install the ARM64 tools. In the "Individual components" window, in the "Compilers, build tools, and runtimes" section, check the box for "MSVC v142 - VS 2019 C++ ARM64 build tools (v14.23)".
+ - In addition, ensure you install the ARM tools. In the "Individual components" window, in the "Compilers, build tools, and runtimes" section, check the box for "MSVC v142 - VS 2019 C++ ARM build tools" (v14.23 or newer).
+ - Also, ensure you install the ARM64 tools. In the "Individual components" window, in the "Compilers, build tools, and runtimes" section, check the box for "MSVC v142 - VS 2019 C++ ARM64 build tools (v14.23 or newer)".
- To build the tests, you will need some additional components:
- Windows 10 SDK component version 10.0.18362 or newer. This component is installed by default as a part of 'Desktop Development with C++' workload.
- - C++/CLI support for v142 build tools (14.23)
+ - C++/CLI support for v142 build tools (v14.23 or newer)
A `.vsconfig` file is included in the root of the dotnet/runtime repository that includes all components needed to build the dotnet/runtime repository. You can [import `.vsconfig` in your Visual Studio installer](https://docs.microsoft.com/en-us/visualstudio/install/import-export-installation-configurations?view=vs-2019#import-a-configuration) to install all necessary components.
-The dotnet/runtime repository requires at least Visual Studio 2019 16.3.
+The dotnet/runtime repository requires at least Visual Studio 2019 16.6 Preview 2.
## CMake
-- Install [CMake](http://www.cmake.org/download) for Windows.
+- Install [CMake](https://cmake.org/download) for Windows.
- Add its location (e.g. C:\Program Files (x86)\CMake\bin) to the PATH environment variable.
The installation script has a check box to do this, but you can do it yourself after the fact following the instructions at [Adding to the Default PATH variable](#adding-to-the-default-path-variable).
@@ -67,9 +67,17 @@ The dotnet/runtime repository requires at least Git 2.22.0.
## .NET SDK
-While not strictly needed to build or test this repository, having the .NET SDK installed lets you use the dotnet.exe command to run .NET applications in the 'normal' way.
+While not strictly needed to build or test this repository, having the .NET SDK installed lets you browse solution files in this repository with Visual Studio and use the dotnet.exe command to run .NET applications in the 'normal' way.
We use this in the [Using Your Build](../testing/using-your-build.md) instructions.
-Visual Studio should have installed the .NET SDK, but in case it did not you can get it from the [Installing the .NET SDK](https://dotnet.microsoft.com/download) page.
+The minimum required version of the SDK is specified in the [global.json file](https://github.com/dotnet/runtime/blob/master/global.json#L3). [You can find the installers and binaries for nightly builds of .NET SDK here](https://github.com/dotnet/installer#installers-and-binaries).
+
+Alternatively, to avoid modifying your machine state, you can use the repository's locally acquired SDK by passing in the solution to load via the `-vs` switch:
+
+```
+build.cmd -vs System.Text.RegularExpressions
+```
+
+This will set the `DOTNET_ROOT` and `PATH` environment variables to point to the locally acquired SDK under `runtime\.dotnet\` and will launch the Visual Studio instance which is registered for the `sln` extension.
## Adding to the default PATH variable
diff --git a/docs/workflow/testing/libraries/testing-android.md b/docs/workflow/testing/libraries/testing-android.md
new file mode 100644
index 00000000000000..7ac22f84062fa5
--- /dev/null
+++ b/docs/workflow/testing/libraries/testing-android.md
@@ -0,0 +1,91 @@
+# Testing Libraries on Android
+
+The following dependencies should be installed in order to be able to run tests:
+
+- Android NDK
+- Android SDK
+- OpenJDK
+- OpenSSL
+
+OpenJDK can be installed on Linux (Ubuntu) using `apt-get`:
+```bash
+sudo apt-get install openjdk-8 unzip
+```
+
+Android SDK, NDK and OpenSSL can be automatically installed via the following script:
+```bash
+#!/usr/bin/env bash
+set -e
+
+NDK_VER=r21b
+SDK_VER=6200805_latest
+SDK_API_LEVEL=29
+SDK_BUILD_TOOLS=29.0.3
+OPENSSL_VER=1.1.1g-alpha-1
+
+if [[ "$OSTYPE" == "darwin"* ]]; then
+ HOST_OS=darwin
+ HOST_OS_SHORT=mac
+ BASHRC=~/.zprofile
+else
+ HOST_OS=linux
+ HOST_OS_SHORT=linux
+ BASHRC=~/.bashrc
+fi
+
+# download Android NDK
+export ANDROID_NDK_ROOT=~/android-ndk-${NDK_VER}
+curl https://dl.google.com/android/repository/android-ndk-${NDK_VER}-${HOST_OS}-x86_64.zip -L --output ~/andk.zip
+unzip ~/andk.zip -d $(dirname ${ANDROID_NDK_ROOT}) && rm -rf ~/andk.zip
+
+# download Android SDK, accept licenses and download additional packages such as
+# platform-tools, platforms and build-tools
+export ANDROID_SDK_ROOT=~/android-sdk
+curl https://dl.google.com/android/repository/commandlinetools-${HOST_OS_SHORT}-${SDK_VER}.zip -L --output ~/asdk.zip
+unzip ~/asdk.zip -d ${ANDROID_SDK_ROOT} && rm -rf ~/asdk.zip
+yes | ${ANDROID_SDK_ROOT}/tools/bin/./sdkmanager --sdk_root=${ANDROID_SDK_ROOT} --licenses
+${ANDROID_SDK_ROOT}/tools/bin/./sdkmanager --sdk_root=${ANDROID_SDK_ROOT} "platform-tools" "platforms;android-${SDK_API_LEVEL}" "build-tools;${SDK_BUILD_TOOLS}"
+
+# We also need to download precompiled binaries and headers for OpenSSL from maven, this step is a temporary hack
+# and will be removed once we figure out how to integrate OpenSSL properly as a dependency
+export ANDROID_OPENSSL_AAR=~/openssl-android
+curl https://maven.google.com/com/android/ndk/thirdparty/openssl/${OPENSSL_VER}/openssl-${OPENSSL_VER}.aar -L --output ~/openssl.zip
+unzip ~/openssl.zip -d ${ANDROID_OPENSSL_AAR} && rm -rf ~/openssl.zip
+printf "\n\nexport ANDROID_NDK_ROOT=${ANDROID_NDK_ROOT}\nexport ANDROID_SDK_ROOT=${ANDROID_SDK_ROOT}\nexport ANDROID_OPENSSL_AAR=${ANDROID_OPENSSL_AAR}\n" >> ${BASHRC}
+```
+Save it to a file (e.g. `deps.sh`) and execute using `source` (e.g. `chmod +x deps.sh && source ./deps.sh`) in order to propogate the `ANDROID_NDK_ROOT`, `ANDROID_SDK_ROOT` and `ANDROID_OPENSSL_AAR` environment variables to the current process.
+
+## Building Libs and Tests for Android
+
+Now we're ready to build everything for Android:
+```
+./build.sh mono+libs -os Android -arch x64
+```
+and even run tests one by one for each library:
+```
+./build.sh libs.tests -os Android -arch x64 -test
+```
+Make sure an emulator is booted (see `AVD Manager`) or a device is plugged in and unlocked.
+`AVD Manager` tool recommends to install `x86` images by default so if you follow that recommendation make sure `-arch x86` was used for the build script.
+
+### Running individual test suites
+The following shows how to run tests for a specific library
+```
+./dotnet.sh build /t:Test src/libraries/System.Numerics.Vectors/tests /p:TargetOS=Android /p:TargetArchitecture=x64
+```
+
+### Test App Design
+Android app is basically a [Java Instrumentation](https://github.com/dotnet/runtime/blob/master/src/mono/msbuild/AndroidAppBuilder/Templates/MonoRunner.java) and a simple Activity that inits the Mono Runtime via JNI. This Mono Runtime starts a simple xunit test
+runner called XHarness.TestRunner (see https://github.com/dotnet/xharness) which runs tests for all `*.Tests.dll` libs in the bundle. There is also XHarness.CLI tool with ADB embedded to deploy `*.apk` to a target (device or emulator) and obtain logs once tests are completed.
+
+### Obtaining the logs
+XHarness for Android doesn't talk much and only saves test results to a file. However, you can also subscribe to live logs via the following command:
+```
+adb logcat -s "DOTNET"
+```
+Or simply open `logcat` window in Android Studio or Visual Stuido.
+
+### Existing Limitations
+- `-os Android` is not supported for Windows yet (`WSL` can be used instead)
+- XHarness.CLI is not able to boot emulators yet (so you need to boot via `AVD Manager` or IDE)
+- AOT and Interpreter modes are not supported yet
\ No newline at end of file
diff --git a/docs/workflow/testing/libraries/testing-apple.md b/docs/workflow/testing/libraries/testing-apple.md
new file mode 100644
index 00000000000000..3f99570042065b
--- /dev/null
+++ b/docs/workflow/testing/libraries/testing-apple.md
@@ -0,0 +1,32 @@
+# Testing Libraries on iOS and tvOS
+
+In order to build libraries and tests for iOS or tvOS you need recent version of XCode installed (e.g. 11.3 or higher).
+
+Build Libraries for iOS:
+```
+./build.sh mono+libs -os iOS -arch x64
+```
+Run tests one by one for each test suite on a simulator:
+```
+./build.sh libs.tests -os iOS -arch x64 -test
+```
+In order to run the tests on a device you need to specify `DevTeamProvisioning` (see [developer.apple.com/account/#/membership](https://developer.apple.com/account/#/membership), scroll down to `Team ID`):
+```
+./build.sh libs.tests -os iOS -arch x64 -test /p:DevTeamProvisioning=H1A2B3C4D5
+```
+[AppleAppBuilder](https://github.com/dotnet/runtime/blob/master/src/mono/msbuild/AppleAppBuilder/AppleAppBuilder.cs) generates temp Xcode projects you can manually open and resolve provisioning issues there using native UI and deploy to your devices.
+
+### Running individual test suites
+- The following shows how to run tests for a specific library:
+```
+./dotnet.sh build src/libraries/System.Numerics.Vectors/tests /t:Test /p:TargetOS=iOS /p:TargetArchitecture=x64
+```
+
+### Test App Design
+iOS/tvOS `*.app` (or `*.ipa`) is basically a simple [ObjC app](https://github.com/dotnet/runtime/blob/master/src/mono/msbuild/AppleAppBuilder/Templates/main-console.m) that inits the Mono Runtime. This Mono Runtime starts a simple xunit test
+runner called XHarness.TestRunner (see https://github.com/dotnet/xharness) which runs tests for all `*.Tests.dll` libs in the bundle. There is also XHarness.CLI tool to deploy `*.app` and `*.ipa` to a target (device or simulator) and listens for logs via network sockets.
+
+### Existing Limitations
+- Most of the test suites crash on devices due to #35674
+- Simulator uses JIT mode only at the moment (to be extended with FullAOT and Interpreter)
+- Interpreter is not enabled yet.
diff --git a/docs/workflow/testing/libraries/testing.md b/docs/workflow/testing/libraries/testing.md
index a221d849330c64..9ab30e12be41ad 100644
--- a/docs/workflow/testing/libraries/testing.md
+++ b/docs/workflow/testing/libraries/testing.md
@@ -12,18 +12,18 @@ build.cmd/sh -subset libs.tests
- The following builds and runs all tests in release configuration:
```
-build.cmd/sh -subset libs -test -c Release
+build.cmd/sh -subset libs.tests -test -c Release
```
- The following example shows how to pass extra msbuild properties to ignore tests ignored in CI:
```
-build.cmd/sh -subset libs -test /p:WithoutCategories=IgnoreForCI
+build.cmd/sh -subset libs.tests -test /p:WithoutCategories=IgnoreForCI
```
Unless you specifiy `-testnobuild`, test assemblies are implicitly built when invoking the `Test` action.
- The following shows how to only test the libraries without building them
```
-build.cmd/sh -subset libs -test -testnobuild
+build.cmd/sh -subset libs.tests -test -testnobuild
```
## Running tests on the command line
@@ -38,7 +38,7 @@ dotnet build /t:Test
It is possible to pass parameters to the underlying xunit runner via the `XUnitOptions` parameter, e.g.:
```cmd
-dotnet build /t:Test "/p:XUnitOptions=-class Test.ClassUnderTests"
+dotnet build /t:Test /p:XUnitOptions="-class Test.ClassUnderTests"
```
There may be multiple projects in some directories so you may need to specify the path to a specific test project to get it to build and run the tests.
@@ -59,17 +59,7 @@ dotnet build /t:Test /p:Outerloop=true
#### Running tests on a different target framework
-Each test project can potentially have multiple target frameworks. There are some tests that might be OS-specific, or might be testing an API that is available only on some target frameworks, so the `TargetFrameworks` property specifies the valid target frameworks. By default we will build and run only the default build target framework which is `netcoreapp5.0`. The rest of the `TargetFrameworks` will need to be built and ran by specifying the `BuildTargetFramework` option, e.g.:
+Each test project can potentially have multiple target frameworks. There are some tests that might be OS-specific, or might be testing an API that is available only on some target frameworks, so the `TargetFrameworks` property specifies the valid target frameworks. By default we will build and run only the default build target framework which is `net5.0`. The rest of the `TargetFrameworks` will need to be built and ran by specifying the `BuildTargetFramework` option, e.g.:
```cmd
dotnet build src\libraries\System.Runtime\tests\System.Runtime.Tests.csproj /p:BuildTargetFramework=net472
```
-
-## Running tests from Visual Studio
-
-**Test Explorer** will be able to discover the tests only if the solution is opened with `build -vs` command, e.g.:
-```cmd
-build -vs System.Net.Http
-```
-If running the tests from **Test Explorer** does nothing, it probably tries to use x86 dotnet installation instead of the x64 one. It can be fixed by setting the x64 architecture manually in the test settings.
-
-It is also possible to execute the tests by simply debugging the test project once it's been built. It will underneath call the same command as `dotnet build /t:Test` does.
diff --git a/docs/workflow/testing/visualstudio.md b/docs/workflow/testing/visualstudio.md
new file mode 100644
index 00000000000000..c8c20b9cfc7fa3
--- /dev/null
+++ b/docs/workflow/testing/visualstudio.md
@@ -0,0 +1,16 @@
+# Visual Studio Test Explorer support
+For Visual Studio Test Explorer to work in dotnet/runtime, the following test settings need to be enabled:
+- Test parameters (like which `dotnet` host to use) are persisted in an auto-generated .runsettings file. For that to work, make sure that the "Auto detect runsettings Files" (`Options -> Test`) option is enabled.
+- Make sure that the "Processor Architecture for AnyCPU project" (`Test Explore pane -> Test Explorer toolbar options --> Settings`) value is set to `auto`.
+
+# Visual Studio F5 Debugging support
+dotnet/runtime uses `dotnet test` ([VSTest](https://github.com/Microsoft/vstest)) which spawns child processes during test execution.
+Visual Studio by default doesn't automatically debug child processes, therefore preliminary steps need to be done to enable Debugging "F5" support.
+Note that these steps aren't necessary for Visual Studio Test Explorer support.
+1. Install the [Microsoft Child Process Debugging Power Tool](https://marketplace.visualstudio.com/items?itemName=vsdbgplat.MicrosoftChildProcessDebuggingPowerTool) extension.
+2. Go to the child process debug settings (`Debug -> Other Debug Targets -> Child Process Debugging Settings...`), enable the "Enable child process debugging" option and hit save.
+3. Go to the project debug settings (`Debug -> $ProjectName Properties`) and enable the "Enable native code debugging" option.
+
+## References
+- https://github.com/dotnet/project-system/issues/6176 tracks enabling the native code debugging functionality for multiple projects without user interaction.
+- https://github.com/dotnet/sdk/issues/7419#issuecomment-298261617 explains the necessary steps to install and enable the mentioned extension in more detail.
diff --git a/eng/Analyzers.props b/eng/Analyzers.props
index 8d2cb20609f2b8..4ed7e3cb9a96d0 100644
--- a/eng/Analyzers.props
+++ b/eng/Analyzers.props
@@ -6,7 +6,7 @@
diff --git a/eng/BeforeTargetFrameworkInference.targets b/eng/BeforeTargetFrameworkInference.targets
new file mode 100644
index 00000000000000..92adb5df635380
--- /dev/null
+++ b/eng/BeforeTargetFrameworkInference.targets
@@ -0,0 +1,23 @@
+
+
+
+ <_OriginalTargetFramework>$(TargetFramework)
+ $(TargetFramework.SubString($([MSBuild]::Add($(TargetFramework.IndexOf('-')), 1))))
+ $(TargetFramework.SubString(0, $(TargetFramework.IndexOf('-'))))
+
+
+
+ $([MSBuild]::NormalizeDirectory('$(RefRootPath)', '$(TargetFramework)'))
+
+
+
+ $([MSBuild]::NormalizeDirectory('$(BaseIntermediateOutputPath)', '$(TargetFramework)-$(TargetFrameworkSuffix)-$(Configuration)'))
+ $([MSBuild]::NormalizeDirectory('$(BaseIntermediateOutputPath)', '$(TargetFramework)-$(Configuration)'))
+
+ $([MSBuild]::NormalizeDirectory('$(BaseOutputPath)', '$(TargetFramework)-$(TargetFrameworkSuffix)-$(Configuration)'))
+ $([MSBuild]::NormalizeDirectory('$(BaseOutputPath)', '$(TargetFramework)-$(Configuration)'))
+
+
+
diff --git a/eng/Brewfile b/eng/Brewfile
new file mode 100644
index 00000000000000..40252a15f30489
--- /dev/null
+++ b/eng/Brewfile
@@ -0,0 +1,8 @@
+brew "autoconf"
+brew "automake"
+brew "cmake"
+brew "icu4c"
+brew "libtool"
+brew "openssl@1.1"
+brew "pkg-config"
+brew "python3"
diff --git a/eng/CodeAnalysis.ruleset b/eng/CodeAnalysis.ruleset
index cf97025667a2bd..66a6af943a1ef7 100644
--- a/eng/CodeAnalysis.ruleset
+++ b/eng/CodeAnalysis.ruleset
@@ -4,7 +4,7 @@
$([MSBuild]::NormalizeDirectory('$(RepoToolsLocalDir)', 'tasks'))
$([MSBuild]::NormalizeDirectory('$(ArtifactsDir)', 'ibc'))
$([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'docs'))
- $([MSBuild]::NormalizePath('$(ArtifactsDir)', 'tmp', '$(Configuration)', 'RuntimeOS.props'))
- 5.0
- .NETCoreApp,Version=v$(NETCoreAppCurrentVersion)
- netcoreapp$(NETCoreAppCurrentVersion)
+
+ 5.0
+ .NETCoreApp
+ $(NetCoreAppCurrentIdentifier),Version=v$(NetCoreAppCurrentVersion)
+ net$(NetCoreAppCurrentVersion)
+
+ $(NetCoreAppCurrent)
+ Microsoft.NETCore.App
+ .NET $(NetCoreAppCurrentVersion)
+
net472
@@ -37,9 +46,13 @@
+ $([System.Runtime.InteropServices.RuntimeInformation]::RuntimeIdentifier)
+ win-$([System.Runtime.InteropServices.RuntimeInformation]::OSArchitecture.ToString().ToLowerInvariant)
+
OSX
FreeBSD
NetBSD
+ SunOS
Linux
Windows_NT
$(TargetOS)
@@ -47,6 +60,10 @@
$(TargetOS)
+
+ true
+
+
true
diff --git a/eng/DiaSymReaderNative.targets b/eng/DiaSymReaderNative.targets
new file mode 100644
index 00000000000000..5836a781dfa8f6
--- /dev/null
+++ b/eng/DiaSymReaderNative.targets
@@ -0,0 +1,35 @@
+
+
+
+
+
+ AnyCPU
+
+
+
+
+
+ PreserveNewest
+ false
+ false
+
+
+ PreserveNewest
+ false
+ false
+
+
+
+
\ No newline at end of file
diff --git a/eng/SignCheckExclusionsFile.txt b/eng/SignCheckExclusionsFile.txt
index 2db3b79a9339ec..dc77ca3e4603ca 100644
--- a/eng/SignCheckExclusionsFile.txt
+++ b/eng/SignCheckExclusionsFile.txt
@@ -7,6 +7,9 @@
;; and SCD apps. If they are signed, the file that the SDK produces has an invalid signature and
;; can't be signed again. More info at https://github.com/dotnet/core-setup/pull/7549.
*apphost.exe;;Template, https://github.com/dotnet/core-setup/pull/7549
+*singlefilehost.exe;;Template, https://github.com/dotnet/core-setup/pull/7549
*comhost.dll;;Template, https://github.com/dotnet/core-setup/pull/7549
*apphosttemplateapphostexe.exe;;Template, https://github.com/dotnet/core-setup/pull/7549
*comhosttemplatecomhostdll.dll;;Template, https://github.com/dotnet/core-setup/pull/7549
+*staticapphosttemplateapphostexe.exe;;Template, https://github.com/dotnet/core-setup/pull/7549
+*dotnet.js;;Workaround, https://github.com/dotnet/core-eng/issues/9933
diff --git a/eng/Signing.props b/eng/Signing.props
index 05f2a8bcb39570..463c3602bb7f94 100644
--- a/eng/Signing.props
+++ b/eng/Signing.props
@@ -24,7 +24,7 @@
@@ -71,7 +71,6 @@
diff --git a/eng/SubsetValidation.targets b/eng/SubsetValidation.targets
index 53ea39ccd4959c..3b0acd5c5e1564 100644
--- a/eng/SubsetValidation.targets
+++ b/eng/SubsetValidation.targets
@@ -6,7 +6,7 @@
on a whole subset, and the dependency on the subset is disregarded automatically when Subset
doesn't contain it.
- %(InstallerProject.SignPhase): Indicates this project must be built before a certain signing
+ %(ProjectToBuild.SignPhase): Indicates this project must be built before a certain signing
phase. Projects can depend on 'signing/stages/Sign.proj' to wait until all projects
that are part of a stage are complete. This allows the build to perform complex container
signing that isn't (can't be?) supported by Arcade's single pass, such as MSIs and bundles:
diff --git a/eng/Subsets.props b/eng/Subsets.props
index d33944f97ddbdb..f7c472357e68c5 100644
--- a/eng/Subsets.props
+++ b/eng/Subsets.props
@@ -13,7 +13,7 @@
./build.sh corehost installer.managed
- This builds the CoreHost and also the Managed installer portion (e.g. Microsoft.DotNet.PlatformAbstractions)
+ This builds the CoreHost and also the Managed installer portion (e.g. Microsoft.NET.HostModel)
projects. A space ' ' or '+' are the delimiters between multiple subsets to build.
./build.sh -test installer.tests
@@ -38,12 +38,23 @@
clr+mono+libs+installer
- mono+libs+installer
- mono+libs
+ mono+libs+installer
+
- clr.runtime+linuxdac+clr.corelib+clr.nativecorelib+clr.tools+clr.buildtools+clr.packages
+ <_subset Condition="'$(Subset)' != ''">+$(Subset.ToLowerInvariant())+
+ <_subset Condition="'$(Subset)' == ''">+$(DefaultSubsets)+
+
+
+
+ Mono
+ Mono
+ CoreCLR
+
+
+
+ clr.runtime+linuxdac+clr.corelib+clr.nativecorelib+clr.tools+clr.packages
mono.llvm+
$(DefaultMonoSubsets)mono.runtime+mono.corelib
@@ -51,12 +62,10 @@
libs.depprojs+libs.native+libs.ref+libs.src+libs.pretest+libs.packages
corehost+installer.managed+installer.depprojs+installer.pkgprojs+bundles+installers+installer.tests
- installer.depprojs+installer.pkgprojs
+ installer.pkgprojs
- <_subset Condition="'$(Subset)' != ''">+$(Subset.ToLowerInvariant())+
- <_subset Condition="'$(Subset)' == ''">+$(DefaultSubsets)+
<_subset>$(_subset.Replace('+clr+', '+$(DefaultCoreClrSubsets)+'))
<_subset>$(_subset.Replace('+mono+', '+$(DefaultMonoSubsets)+'))
<_subset>$(_subset.Replace('+libs+', '+$(DefaultLibrariesSubsets)+'))
@@ -66,12 +75,6 @@
<_subset>+$(_subset.Trim('+'))+
-
- Mono
- Mono
- CoreCLR
-
-
-
+
false
false
false
false
- Configuration=$(CoreCLRConfiguration)
-
-
- false
- false
- false
- false
- Configuration=$(MonoConfiguration)
-
-
- false
- false
- false
- false
- Configuration=$(LibrariesConfiguration)
-
-
- false
- true
- false
-
+
-
-
-
-
-
-
-
-
-
-
-
-
+
-
-
@@ -199,65 +177,65 @@
-
-
-
-
-
-
@@ -267,11 +245,20 @@
-
+
+
+
+
+ Configuration=$(CoreCLRConfiguration)
+ Configuration=$(MonoConfiguration)
+ Configuration=$(LibrariesConfiguration)
+
diff --git a/eng/Version.Details.xml b/eng/Version.Details.xml
index 7b7ecd8507195a..0e5212ef380e4f 100644
--- a/eng/Version.Details.xml
+++ b/eng/Version.Details.xml
@@ -6,61 +6,61 @@
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
-
+
https://github.com/dotnet/arcade
- bce0a98620c1c5a110b2bba9912f3d5929069c6b
+ 898e51ed5fdcc4871087ac5754ca9056e58e575d
https://dev.azure.com/dnceng/internal/_git/dotnet-optimization
@@ -82,65 +82,65 @@
https://dev.azure.com/dnceng/internal/_git/dotnet-optimization
d0bb63d2ec7060714e63ee4082fac48f2e57f3e2
-
+
https://github.com/microsoft/vstest
- 732a3a37e8d3e1a2522546fca644c7d69be457cf
+ 8ee627ea54aba31b941e5d45a1a1614b50f7befb
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/runtime-assets
- 3e5b67e9033c00da5e1ce539c0186cbf171b6ce4
+ 71b9284907ebc69e5f80b491a51084c75e0ef7d3
-
+
https://github.com/dotnet/llvm-project
- f29b04491741ba1e4c7aa4f0fa039512aad2028f
+ d179d1b519fb0b3e4a4b3f15ee55920e310c582f
-
+
https://github.com/dotnet/llvm-project
- f29b04491741ba1e4c7aa4f0fa039512aad2028f
+ d179d1b519fb0b3e4a4b3f15ee55920e310c582f
-
+
https://github.com/dotnet/llvm-project
- f29b04491741ba1e4c7aa4f0fa039512aad2028f
+ d179d1b519fb0b3e4a4b3f15ee55920e310c582f
-
+
https://github.com/dotnet/llvm-project
- f29b04491741ba1e4c7aa4f0fa039512aad2028f
+ d179d1b519fb0b3e4a4b3f15ee55920e310c582f
-
+
https://github.com/dotnet/llvm-project
- f29b04491741ba1e4c7aa4f0fa039512aad2028f
+ d179d1b519fb0b3e4a4b3f15ee55920e310c582f
-
+
https://github.com/dotnet/llvm-project
- f29b04491741ba1e4c7aa4f0fa039512aad2028f
+ d179d1b519fb0b3e4a4b3f15ee55920e310c582f
https://github.com/dotnet/runtime
@@ -166,9 +166,17 @@
https://github.com/dotnet/runtime
0375524a91a47ca4db3ee1be548f74bab7e26e76
-
+
+ https://github.com/dotnet/runtime
+ 0375524a91a47ca4db3ee1be548f74bab7e26e76
+
+
https://github.com/mono/linker
- 8caef57d1f3bc7a188e5dd26d43a2d34151223f9
+ 3481158940a2b7f1114950cc7ba5bd56e0bfc761
+
+
+ https://github.com/dotnet/xharness
+ 8f6cc04f53cb6759758ffc97c9c8ca3ab4802f7f
diff --git a/eng/Versions.props b/eng/Versions.props
index 948bdc32af6337..586f105dc54668 100644
--- a/eng/Versions.props
+++ b/eng/Versions.props
@@ -7,7 +7,7 @@
0
0
preview
- 4
+ 6
$(MajorVersion).$(MinorVersion).0.0
@@ -18,15 +18,9 @@
true
true
false
-
- 3.6.0-2.20166.2
dotnet
$(ContainerName)
-
- $(MajorVersion).$(MinorVersion)
- $(MajorVersion).$(MinorVersion)
- netcoreapp$(NETCoreAppFrameworkVersion)
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 2.5.1-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
- 5.0.0-beta.20201.2
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
+ 2.5.1-beta.20264.3
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
+ 5.0.0-beta.20261.9
5.0.0-preview.4.20202.18
5.0.0-preview.4.20202.18
5.0.0-preview.4.20202.18
- 2.1.0
- 3.0.0
+ 3.1.0
5.0.0-preview.4.20202.18
5.0.0-preview.4.20202.18
- 1.0.120601
+ 5.0.0-preview.4.20202.18
5.0.0-alpha.1.19563.3
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
- 5.0.0-beta.20206.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
+ 5.0.0-beta.20258.1
2.2.0-prerelease.19564.1
@@ -100,6 +92,7 @@
1.0.5
1.7.0
+ 2.0.0-beta1.20253.1
4.8.0
- 16.7.0-preview-20200408-06
+ 16.7.0-preview-20200521-01
+ 1.0.0-prerelease.20277.1
2.4.1
+ 1.2.1
2.0.5
12.0.3
4.12.0
3.1.0-preview-20200129.1
- 5.0.0-preview.3.20210.1
+ 5.0.0-preview.3.20276.2
- 6.0.1-alpha.1.20206.1
- 6.0.1-alpha.1.20206.1
- 6.0.1-alpha.1.20206.1
- 6.0.1-alpha.1.20206.1
- 6.0.1-alpha.1.20206.1
- 6.0.1-alpha.1.20206.1
+ 9.0.1-alpha.1.20268.2
+ 9.0.1-alpha.1.20268.2
+ 9.0.1-alpha.1.20268.2
+ 9.0.1-alpha.1.20268.2
+ 9.0.1-alpha.1.20268.2
+ 9.0.1-alpha.1.20268.2
diff --git a/eng/build.ps1 b/eng/build.ps1
index 1298a9ba6a2742..f8f1164bcafc8d 100644
--- a/eng/build.ps1
+++ b/eng/build.ps1
@@ -2,15 +2,16 @@
Param(
[switch][Alias('h')]$help,
[switch][Alias('t')]$test,
- [string[]][Alias('c')]$configuration = @("Debug"),
+ [ValidateSet("Debug","Release","Checked")][string[]][Alias('c')]$configuration = @("Debug"),
[string][Alias('f')]$framework,
[string]$vs,
- [string]$os,
+ [string][Alias('v')]$verbosity = "minimal",
+ [ValidateSet("Windows_NT","Linux","OSX","Browser")][string]$os,
[switch]$allconfigurations,
[switch]$coverage,
[string]$testscope,
[switch]$testnobuild,
- [string[]][Alias('a')]$arch = @([System.Runtime.InteropServices.RuntimeInformation]::ProcessArchitecture.ToString().ToLowerInvariant()),
+ [ValidateSet("x86","x64","arm","arm64","wasm")][string[]][Alias('a')]$arch = @([System.Runtime.InteropServices.RuntimeInformation]::ProcessArchitecture.ToString().ToLowerInvariant()),
[Parameter(Position=0)][string][Alias('s')]$subset,
[ValidateSet("Debug","Release","Checked")][string][Alias('rc')]$runtimeConfiguration,
[ValidateSet("Debug","Release")][string][Alias('lc')]$librariesConfiguration,
@@ -20,9 +21,9 @@ Param(
function Get-Help() {
Write-Host "Common settings:"
Write-Host " -subset Build a subset, print available subsets with -subset help (short: -s)"
- Write-Host " -vs Open the solution with VS for Test Explorer support. Path or solution name (ie -vs Microsoft.CSharp)"
- Write-Host " -os Build operating system: Windows_NT or Unix"
- Write-Host " -arch Build platform: x86, x64, arm or arm64 (short: -a). Pass a comma-separated list to build for multiple architectures."
+ Write-Host " -vs Open the solution with VS using the locally acquired SDK. Path or solution name (ie -vs Microsoft.CSharp)"
+ Write-Host " -os Build operating system: Windows_NT, Linux, OSX, or Browser"
+ Write-Host " -arch Build platform: x86, x64, arm, arm64, or wasm (short: -a). Pass a comma-separated list to build for multiple architectures."
Write-Host " -configuration Build configuration: Debug, Release or [CoreCLR]Checked (short: -c). Pass a comma-separated list to build for multiple configurations"
Write-Host " -runtimeConfiguration Runtime build configuration: Debug, Release or [CoreCLR]Checked (short: -rc)"
Write-Host " -librariesConfiguration Libraries build configuration: Debug or Release (short: -lc)"
@@ -43,7 +44,7 @@ function Get-Help() {
Write-Host ""
Write-Host "Libraries settings:"
- Write-Host " -framework Build framework: netcoreapp5.0 or net472 (short: -f)"
+ Write-Host " -framework Build framework: net5.0 or net472 (short: -f)"
Write-Host " -coverage Collect code coverage when testing"
Write-Host " -testscope Scope tests, allowed values: innerloop, outerloop, all"
Write-Host " -testnobuild Skip building tests when invoking -test"
@@ -59,37 +60,32 @@ if ($help -or (($null -ne $properties) -and ($properties.Contains('/help') -or $
exit 0
}
-# VS Test Explorer support for libraries
if ($vs) {
. $PSScriptRoot\common\tools.ps1
- # Microsoft.DotNet.CoreSetup.sln is special - hosting tests are currently meant to run on the
- # bootstrapped .NET Core, not on the live-built runtime.
- if (([System.IO.Path]::GetFileName($vs) -ieq "Microsoft.DotNet.CoreSetup.sln") -or ($vs -ieq "Microsoft.DotNet.CoreSetup")) {
+ if (-Not (Test-Path $vs)) {
+ $solution = $vs
+ # Search for the solution in libraries
+ $vs = Split-Path $PSScriptRoot -Parent | Join-Path -ChildPath "src\libraries" | Join-Path -ChildPath $vs | Join-Path -ChildPath "$vs.sln"
if (-Not (Test-Path $vs)) {
- if (-Not ( $vs.endswith(".sln"))) {
- $vs = "$vs.sln"
+ $vs = $solution
+ # Search for the solution in installer
+ if (-Not ($vs.endswith(".sln"))) {
+ $vs = "$vs.sln"
+ }
+ $vs = Split-Path $PSScriptRoot -Parent | Join-Path -ChildPath "src\installer" | Join-Path -ChildPath $vs
+ if (-Not (Test-Path $vs)) {
+ Write-Error "Passed in solution cannot be resolved."
+ exit 1
}
- $vs = Join-Path "$PSScriptRoot\..\src\installer" $vs
}
-
- # This tells .NET Core to use the bootstrapped runtime to run the tests
- $env:DOTNET_ROOT=InitializeDotNetCli -install:$false
}
- else {
- if (-Not (Test-Path $vs)) {
- $vs = Join-Path "$PSScriptRoot\..\src\libraries" $vs | Join-Path -ChildPath "$vs.sln"
- }
-
- $archTestHost = if ($arch) { $arch } else { "x64" }
- # This tells .NET Core to use the same dotnet.exe that build scripts use
- $env:DOTNET_ROOT="$PSScriptRoot\..\artifacts\bin\testhost\netcoreapp5.0-Windows_NT-$configuration-$archTestHost";
- $env:DEVPATH="$PSScriptRoot\..\artifacts\bin\testhost\net472-Windows_NT-$configuration-$archTestHost";
- }
+ # This tells .NET Core to use the bootstrapped runtime
+ $env:DOTNET_ROOT=InitializeDotNetCli -install:$false
# This tells MSBuild to load the SDK from the directory of the bootstrapped SDK
- $env:DOTNET_MSBUILD_SDK_RESOLVER_CLI_DIR=InitializeDotNetCli -install:$false
+ $env:DOTNET_MSBUILD_SDK_RESOLVER_CLI_DIR=$env:DOTNET_ROOT
# This tells .NET Core not to go looking for .NET Core in other places
$env:DOTNET_MULTILEVEL_LOOKUP=0;
@@ -130,6 +126,7 @@ foreach ($argument in $PSBoundParameters.Keys)
"os" { $arguments += " /p:TargetOS=$($PSBoundParameters[$argument])" }
"allconfigurations" { $arguments += " /p:BuildAllConfigurations=true" }
"properties" { $arguments += " " + $properties }
+ "verbosity" { $arguments += " -$argument " + $($PSBoundParameters[$argument]) }
# configuration and arch can be specified multiple times, so they should be no-ops here
"configuration" {}
"arch" {}
@@ -159,4 +156,4 @@ if ($failedBuilds.Count -ne 0) {
exit 1
}
-exit 0
\ No newline at end of file
+exit 0
diff --git a/eng/build.sh b/eng/build.sh
index 5b55cabd4ba2af..02c5d278e259d6 100755
--- a/eng/build.sh
+++ b/eng/build.sh
@@ -18,8 +18,8 @@ usage()
{
echo "Common settings:"
echo " --subset Build a subset, print available subsets with -subset help (short: -s)"
- echo " --os Build operating system: Windows_NT, Linux, FreeBSD, OSX, tvOS, iOS or Android"
- echo " --arch Build platform: x86, x64, arm, armel or arm64"
+ echo " --os Build operating system: Windows_NT, Linux, FreeBSD, OSX, tvOS, iOS, Android, Browser, NetBSD or SunOS"
+ echo " --arch Build platform: x86, x64, arm, armel, arm64 or wasm"
echo " --configuration Build configuration: Debug, Release or [CoreCLR]Checked (short: -c)"
echo " --runtimeConfiguration Runtime build configuration: Debug, Release or [CoreCLR]Checked (short: -rc)"
echo " --librariesConfiguration Libraries build configuration: Debug or Release (short: -lc)"
@@ -42,7 +42,7 @@ usage()
echo ""
echo "Libraries settings:"
- echo " --framework Build framework: netcoreapp5.0 or net472 (short: -f)"
+ echo " --framework Build framework: net5.0 or net472 (short: -f)"
echo " --coverage Collect code coverage when testing"
echo " --testscope Test scope, allowed values: innerloop, outerloop, all"
echo " --testnobuild Skip building tests when invoking -test"
@@ -107,71 +107,190 @@ while [[ $# > 0 ]]; do
usage
exit 0
;;
+
-subset|-s)
- arguments="$arguments /p:Subset=$2"
- shift 2
+ if [ -z ${2+x} ]; then
+ arguments="$arguments /p:Subset=help"
+ shift 1
+ else
+ arguments="$arguments /p:Subset=$2"
+ shift 2
+ fi
;;
+
-arch)
- arch=$2
+ if [ -z ${2+x} ]; then
+ echo "No architecture supplied. See help (--help) for supported architectures." 1>&2
+ exit 1
+ fi
+ passedArch="$(echo "$2" | awk '{print tolower($0)}')"
+ case "$passedArch" in
+ x64|x86|arm|armel|arm64|wasm)
+ arch=$passedArch
+ ;;
+ *)
+ echo "Unsupported target architecture '$2'."
+ echo "The allowed values are x86, x64, arm, armel, arm64, and wasm."
+ exit 1
+ ;;
+ esac
shift 2
;;
+
-configuration|-c)
- val="$(tr '[:lower:]' '[:upper:]' <<< ${2:0:1})${2:1}"
+ if [ -z ${2+x} ]; then
+ echo "No configuration supplied. See help (--help) for supported configurations." 1>&2
+ exit 1
+ fi
+ passedConfig="$(echo "$2" | awk '{print tolower($0)}')"
+ case "$passedConfig" in
+ debug|release|checked)
+ val="$(tr '[:lower:]' '[:upper:]' <<< ${passedConfig:0:1})${passedConfig:1}"
+ ;;
+ *)
+ echo "Unsupported target configuration '$2'."
+ echo "The allowed values are Debug, Release, and Checked."
+ exit 1
+ ;;
+ esac
arguments="$arguments -configuration $val"
shift 2
;;
+
-framework|-f)
+ if [ -z ${2+x} ]; then
+ echo "No framework supplied. See help (--help) for supported frameworks." 1>&2
+ exit 1
+ fi
val="$(echo "$2" | awk '{print tolower($0)}')"
arguments="$arguments /p:BuildTargetFramework=$val"
shift 2
;;
+
-os)
- os=$2
- arguments="$arguments /p:TargetOS=$2"
+ if [ -z ${2+x} ]; then
+ echo "No target operating system supplied. See help (--help) for supported target operating systems." 1>&2
+ exit 1
+ fi
+ passedOS="$(echo "$2" | awk '{print tolower($0)}')"
+ case "$passedOS" in
+ windows_nt)
+ os="Windows_NT" ;;
+ linux)
+ os="Linux" ;;
+ freebsd)
+ os="FreeBSD" ;;
+ osx)
+ os="OSX" ;;
+ tvos)
+ os="tvOS" ;;
+ ios)
+ os="iOS" ;;
+ android)
+ os="Android" ;;
+ browser)
+ os="Browser" ;;
+ sunos)
+ os="SunOS" ;;
+ *)
+ echo "Unsupported target OS '$2'."
+ echo "The allowed values are Windows_NT, Linux, FreeBSD, OSX, tvOS, iOS, Android, Browser, and SunOS."
+ exit 1
+ ;;
+ esac
+ arguments="$arguments /p:TargetOS=$os"
shift 2
;;
+
-allconfigurations)
arguments="$arguments /p:BuildAllConfigurations=true"
shift 1
;;
+
-testscope)
+ if [ -z ${2+x} ]; then
+ echo "No test scope supplied. See help (--help) for supported test scope values." 1>&2
+ exit 1
+ fi
arguments="$arguments /p:TestScope=$2"
shift 2
;;
+
-testnobuild)
- arguments="$arguments /p:TestNoBuild=$2"
- shift 2
+ arguments="$arguments /p:TestNoBuild=true"
+ shift 1
;;
+
-coverage)
arguments="$arguments /p:Coverage=true"
shift 1
;;
+
-runtimeconfiguration|-rc)
- val="$(tr '[:lower:]' '[:upper:]' <<< ${2:0:1})${2:1}"
+ if [ -z ${2+x} ]; then
+ echo "No runtime configuration supplied. See help (--help) for supported runtime configurations." 1>&2
+ exit 1
+ fi
+ passedRuntimeConf="$(echo "$2" | awk '{print tolower($0)}')"
+ case "$passedRuntimeConf" in
+ debug|release|checked)
+ val="$(tr '[:lower:]' '[:upper:]' <<< ${passedRuntimeConf:0:1})${passedRuntimeConf:1}"
+ ;;
+ *)
+ echo "Unsupported runtime configuration '$2'."
+ echo "The allowed values are Debug, Release, and Checked."
+ exit 1
+ ;;
+ esac
arguments="$arguments /p:RuntimeConfiguration=$val"
shift 2
;;
+
-librariesconfiguration|-lc)
- arguments="$arguments /p:LibrariesConfiguration=$2"
+ if [ -z ${2+x} ]; then
+ echo "No libraries configuration supplied. See help (--help) for supported libraries configurations." 1>&2
+ exit 1
+ fi
+ passedLibConf="$(echo "$2" | awk '{print tolower($0)}')"
+ case "$passedLibConf" in
+ debug|release)
+ val="$(tr '[:lower:]' '[:upper:]' <<< ${passedLibConf:0:1})${passedLibConf:1}"
+ ;;
+ *)
+ echo "Unsupported libraries configuration '$2'."
+ echo "The allowed values are Debug and Release."
+ exit 1
+ ;;
+ esac
+ arguments="$arguments /p:LibrariesConfiguration=$val"
shift 2
;;
+
-cross)
crossBuild=1
arguments="$arguments /p:CrossBuild=True"
shift 1
;;
+
-clang*)
arguments="$arguments /p:Compiler=$opt"
shift 1
;;
+
-cmakeargs)
+ if [ -z ${2+x} ]; then
+ echo "No cmake args supplied." 1>&2
+ exit 1
+ fi
cmakeargs="${cmakeargs} ${opt} $2"
shift 2
;;
+
-gcc*)
arguments="$arguments /p:Compiler=$opt"
shift 1
;;
+
*)
extraargs="$extraargs $1"
shift 1
diff --git a/eng/codeOptimization.targets b/eng/codeOptimization.targets
index 3687c865c90046..6ed7e997487bd6 100644
--- a/eng/codeOptimization.targets
+++ b/eng/codeOptimization.targets
@@ -9,7 +9,7 @@
IBCMerge optimizations on Mac for now to unblock the offical build.
See issue https://github.com/dotnet/runtime/issues/33303
-->
- false
+ false
Semi-colon delimited list of sln/proj's to build. Globbing is supported (*.sln)"
Write-Host " -ci Set when running on CI server"
+ Write-Host " -excludeCIBinarylog Don't output binary log (short: -nobl)"
Write-Host " -prepareMachine Prepare machine for CI run, clean up processes after build"
Write-Host " -warnAsError Sets warnaserror msbuild parameter ('true' or 'false')"
Write-Host " -msbuildEngine Msbuild engine to use to run build ('dotnet', 'vs', or unspecified)."
@@ -134,7 +136,9 @@ try {
}
if ($ci) {
- $binaryLog = $true
+ if (-not $excludeCIBinarylog) {
+ $binaryLog = $true
+ }
$nodeReuse = $false
}
diff --git a/eng/common/build.sh b/eng/common/build.sh
index 36f9aa0462ee17..6d7c5a1f69c200 100755
--- a/eng/common/build.sh
+++ b/eng/common/build.sh
@@ -32,6 +32,7 @@ usage()
echo "Advanced settings:"
echo " --projects Project or solution file(s) to build"
echo " --ci Set when running on CI server"
+ echo " --excludeCIBinarylog Don't output binary log (short: -nobl)"
echo " --prepareMachine Prepare machine for CI run, clean up processes after build"
echo " --nodeReuse Sets nodereuse msbuild parameter ('true' or 'false')"
echo " --warnAsError Sets warnaserror msbuild parameter ('true' or 'false')"
@@ -68,6 +69,7 @@ clean=false
warn_as_error=true
node_reuse=true
binary_log=false
+exclude_ci_binary_log=false
pipelines_log=false
projects=''
@@ -98,6 +100,9 @@ while [[ $# > 0 ]]; do
-binarylog|-bl)
binary_log=true
;;
+ -excludeCIBinarylog|-nobl)
+ exclude_ci_binary_log=true
+ ;;
-pipelineslog|-pl)
pipelines_log=true
;;
@@ -156,8 +161,10 @@ done
if [[ "$ci" == true ]]; then
pipelines_log=true
- binary_log=true
node_reuse=false
+ if [[ "$exclude_ci_binary_log" == false ]]; then
+ binary_log=true
+ fi
fi
. "$scriptroot/tools.sh"
diff --git a/eng/common/cross/build-rootfs.sh b/eng/common/cross/build-rootfs.sh
index 2cdd82d30df62e..d780fefb541432 100755
--- a/eng/common/cross/build-rootfs.sh
+++ b/eng/common/cross/build-rootfs.sh
@@ -1,5 +1,7 @@
#!/usr/bin/env bash
+set -e
+
usage()
{
echo "Usage: $0 [BuildArch] [CodeName] [lldbx.y] [--skipunmount] --rootfsdir ]"
@@ -15,6 +17,8 @@ __CodeName=xenial
__CrossDir=$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )
__InitialDir=$PWD
__BuildArch=arm
+__AlpineArch=armv7
+__QEMUArch=arm
__UbuntuArch=armhf
__UbuntuRepo="http://ports.ubuntu.com/"
__LLDB_Package="liblldb-3.9-dev"
@@ -26,9 +30,10 @@ __UbuntuPackages="build-essential"
__AlpinePackages="alpine-base"
__AlpinePackages+=" build-base"
__AlpinePackages+=" linux-headers"
-__AlpinePackagesEdgeTesting=" lldb-dev"
-__AlpinePackagesEdgeMain=" llvm9-libs"
+__AlpinePackagesEdgeCommunity=" lldb-dev"
+__AlpinePackagesEdgeMain=" llvm10-libs"
__AlpinePackagesEdgeMain+=" python3"
+__AlpinePackagesEdgeMain+=" libedit"
# symlinks fixer
__UbuntuPackages+=" symlinks"
@@ -55,12 +60,11 @@ __AlpinePackages+=" openssl-dev"
__AlpinePackages+=" zlib-dev"
__FreeBSDBase="12.1-RELEASE"
-__FreeBSDPkg="1.10.5"
+__FreeBSDPkg="1.12.0"
__FreeBSDPackages="libunwind"
__FreeBSDPackages+=" icu"
__FreeBSDPackages+=" libinotify"
__FreeBSDPackages+=" lttng-ust"
-__FreeBSDPackages+=" llvm-90"
__FreeBSDPackages+=" krb5"
__UnprocessedBuildArgs=
@@ -78,7 +82,7 @@ while :; do
arm)
__BuildArch=arm
__UbuntuArch=armhf
- __AlpineArch=armhf
+ __AlpineArch=armv7
__QEMUArch=arm
;;
arm64)
@@ -205,7 +209,7 @@ fi
if [ -d "$__RootfsDir" ]; then
if [ $__SkipUnmount == 0 ]; then
- umount $__RootfsDir/*
+ umount $__RootfsDir/* || true
fi
rm -rf $__RootfsDir
fi
@@ -231,9 +235,9 @@ if [[ "$__CodeName" == "alpine" ]]; then
add $__AlpinePackagesEdgeMain
$__ApkToolsDir/apk-tools-$__ApkToolsVersion/apk \
- -X http://dl-cdn.alpinelinux.org/alpine/edge/testing \
+ -X http://dl-cdn.alpinelinux.org/alpine/edge/community \
-U --allow-untrusted --root $__RootfsDir --arch $__AlpineArch --initdb \
- add $__AlpinePackagesEdgeTesting
+ add $__AlpinePackagesEdgeCommunity
rm -r $__ApkToolsDir
elif [[ "$__CodeName" == "freebsd" ]]; then
@@ -246,11 +250,13 @@ elif [[ "$__CodeName" == "freebsd" ]]; then
# get and build package manager
wget -O - https://github.com/freebsd/pkg/archive/${__FreeBSDPkg}.tar.gz | tar -C $__RootfsDir/tmp -zxf -
cd $__RootfsDir/tmp/pkg-${__FreeBSDPkg}
- ./autogen.sh && ./configure --prefix=$__RootfsDir/host && make install
+ # needed for install to succeed
+ mkdir -p $__RootfsDir/host/etc
+ ./autogen.sh && ./configure --prefix=$__RootfsDir/host && make && make install
rm -rf $__RootfsDir/tmp/pkg-${__FreeBSDPkg}
# install packages we need.
- $__RootfsDir/host/sbin/pkg -r $__RootfsDir -C $__RootfsDir/usr/local/etc/pkg.conf update
- $__RootfsDir/host/sbin/pkg -r $__RootfsDir -C $__RootfsDir/usr/local/etc/pkg.conf install --yes $__FreeBSDPackages
+ INSTALL_AS_USER=$(whoami) $__RootfsDir/host/sbin/pkg -r $__RootfsDir -C $__RootfsDir/usr/local/etc/pkg.conf update
+ INSTALL_AS_USER=$(whoami) $__RootfsDir/host/sbin/pkg -r $__RootfsDir -C $__RootfsDir/usr/local/etc/pkg.conf install --yes $__FreeBSDPackages
elif [[ -n $__CodeName ]]; then
qemu-debootstrap --arch $__UbuntuArch $__CodeName $__RootfsDir $__UbuntuRepo
cp $__CrossDir/$__BuildArch/sources.list.$__CodeName $__RootfsDir/etc/apt/sources.list
@@ -260,7 +266,7 @@ elif [[ -n $__CodeName ]]; then
chroot $__RootfsDir symlinks -cr /usr
if [ $__SkipUnmount == 0 ]; then
- umount $__RootfsDir/*
+ umount $__RootfsDir/* || true
fi
if [[ "$__BuildArch" == "arm" && "$__CodeName" == "trusty" ]]; then
diff --git a/eng/common/internal/Tools.csproj b/eng/common/internal/Tools.csproj
index 1a39a7ef3f67b1..f46d5efe2e32af 100644
--- a/eng/common/internal/Tools.csproj
+++ b/eng/common/internal/Tools.csproj
@@ -4,6 +4,7 @@
net472
false
+ false
diff --git a/eng/common/native/CommonLibrary.psm1 b/eng/common/native/CommonLibrary.psm1
index 41416862d9132f..d7d1a6510949af 100644
--- a/eng/common/native/CommonLibrary.psm1
+++ b/eng/common/native/CommonLibrary.psm1
@@ -145,9 +145,12 @@ function Get-File {
New-Item -path $DownloadDirectory -force -itemType "Directory" | Out-Null
}
+ $TempPath = "$Path.tmp"
if (Test-Path -IsValid -Path $Uri) {
- Write-Verbose "'$Uri' is a file path, copying file to '$Path'"
- Copy-Item -Path $Uri -Destination $Path
+ Write-Verbose "'$Uri' is a file path, copying temporarily to '$TempPath'"
+ Copy-Item -Path $Uri -Destination $TempPath
+ Write-Verbose "Moving temporary file to '$Path'"
+ Move-Item -Path $TempPath -Destination $Path
return $?
}
else {
@@ -157,8 +160,10 @@ function Get-File {
while($Attempt -Lt $DownloadRetries)
{
try {
- Invoke-WebRequest -UseBasicParsing -Uri $Uri -OutFile $Path
- Write-Verbose "Downloaded to '$Path'"
+ Invoke-WebRequest -UseBasicParsing -Uri $Uri -OutFile $TempPath
+ Write-Verbose "Downloaded to temporary location '$TempPath'"
+ Move-Item -Path $TempPath -Destination $Path
+ Write-Verbose "Moved temporary file to '$Path'"
return $True
}
catch {
@@ -359,16 +364,21 @@ function Expand-Zip {
return $False
}
}
- if (-Not (Test-Path $OutputDirectory)) {
- New-Item -path $OutputDirectory -Force -itemType "Directory" | Out-Null
+
+ $TempOutputDirectory = Join-Path "$(Split-Path -Parent $OutputDirectory)" "$(Split-Path -Leaf $OutputDirectory).tmp"
+ if (Test-Path $TempOutputDirectory) {
+ Remove-Item $TempOutputDirectory -Force -Recurse
}
+ New-Item -Path $TempOutputDirectory -Force -ItemType "Directory" | Out-Null
Add-Type -assembly "system.io.compression.filesystem"
- [io.compression.zipfile]::ExtractToDirectory("$ZipPath", "$OutputDirectory")
+ [io.compression.zipfile]::ExtractToDirectory("$ZipPath", "$TempOutputDirectory")
if ($? -Eq $False) {
Write-Error "Unable to extract '$ZipPath'"
return $False
}
+
+ Move-Item -Path $TempOutputDirectory -Destination $OutputDirectory
}
catch {
Write-Host $_
diff --git a/eng/common/native/find-native-compiler.sh b/eng/common/native/find-native-compiler.sh
new file mode 100644
index 00000000000000..aed19d07d506ff
--- /dev/null
+++ b/eng/common/native/find-native-compiler.sh
@@ -0,0 +1,121 @@
+#!/usr/bin/env bash
+#
+# This file locates the native compiler with the given name and version and sets the environment variables to locate it.
+#
+
+source="${BASH_SOURCE[0]}"
+
+# resolve $SOURCE until the file is no longer a symlink
+while [[ -h $source ]]; do
+ scriptroot="$( cd -P "$( dirname "$source" )" && pwd )"
+ source="$(readlink "$source")"
+
+ # if $source was a relative symlink, we need to resolve it relative to the path where the
+ # symlink file was located
+ [[ $source != /* ]] && source="$scriptroot/$source"
+done
+scriptroot="$( cd -P "$( dirname "$source" )" && pwd )"
+
+if [ $# -lt 0 ]
+then
+ echo "Usage..."
+ echo "find-native-compiler.sh "
+ echo "Specify the name of compiler (clang or gcc)."
+ echo "Specify the major version of compiler."
+ echo "Specify the minor version of compiler."
+ exit 1
+fi
+
+. $scriptroot/../pipeline-logging-functions.sh
+
+compiler="$1"
+cxxCompiler="$compiler++"
+majorVersion="$2"
+minorVersion="$3"
+
+if [ "$compiler" = "gcc" ]; then cxxCompiler="g++"; fi
+
+check_version_exists() {
+ desired_version=-1
+
+ # Set up the environment to be used for building with the desired compiler.
+ if command -v "$compiler-$1.$2" > /dev/null; then
+ desired_version="-$1.$2"
+ elif command -v "$compiler$1$2" > /dev/null; then
+ desired_version="$1$2"
+ elif command -v "$compiler-$1$2" > /dev/null; then
+ desired_version="-$1$2"
+ fi
+
+ echo "$desired_version"
+}
+
+if [ -z "$CLR_CC" ]; then
+
+ # Set default versions
+ if [ -z "$majorVersion" ]; then
+ # note: gcc (all versions) and clang versions higher than 6 do not have minor version in file name, if it is zero.
+ if [ "$compiler" = "clang" ]; then versions=( 9 8 7 6.0 5.0 4.0 3.9 3.8 3.7 3.6 3.5 )
+ elif [ "$compiler" = "gcc" ]; then versions=( 9 8 7 6 5 4.9 ); fi
+
+ for version in "${versions[@]}"; do
+ parts=(${version//./ })
+ desired_version="$(check_version_exists "${parts[0]}" "${parts[1]}")"
+ if [ "$desired_version" != "-1" ]; then majorVersion="${parts[0]}"; break; fi
+ done
+
+ if [ -z "$majorVersion" ]; then
+ if command -v "$compiler" > /dev/null; then
+ if [ "$(uname)" != "Darwin" ]; then
+ Write-PipelineTelemetryError -category "Build" -type "warning" "Specific version of $compiler not found, falling back to use the one in PATH."
+ fi
+ export CC="$(command -v "$compiler")"
+ export CXX="$(command -v "$cxxCompiler")"
+ else
+ Write-PipelineTelemetryError -category "Build" "No usable version of $compiler found."
+ exit 1
+ fi
+ else
+ if [ "$compiler" = "clang" ] && [ "$majorVersion" -lt 5 ]; then
+ if [ "$build_arch" = "arm" ] || [ "$build_arch" = "armel" ]; then
+ if command -v "$compiler" > /dev/null; then
+ Write-PipelineTelemetryError -category "Build" -type "warning" "Found clang version $majorVersion which is not supported on arm/armel architectures, falling back to use clang from PATH."
+ export CC="$(command -v "$compiler")"
+ export CXX="$(command -v "$cxxCompiler")"
+ else
+ Write-PipelineTelemetryError -category "Build" "Found clang version $majorVersion which is not supported on arm/armel architectures, and there is no clang in PATH."
+ exit 1
+ fi
+ fi
+ fi
+ fi
+ else
+ desired_version="$(check_version_exists "$majorVersion" "$minorVersion")"
+ if [ "$desired_version" = "-1" ]; then
+ Write-PipelineTelemetryError -category "Build" "Could not find specific version of $compiler: $majorVersion $minorVersion."
+ exit 1
+ fi
+ fi
+
+ if [ -z "$CC" ]; then
+ export CC="$(command -v "$compiler$desired_version")"
+ export CXX="$(command -v "$cxxCompiler$desired_version")"
+ if [ -z "$CXX" ]; then export CXX="$(command -v "$cxxCompiler")"; fi
+ fi
+else
+ if [ ! -f "$CLR_CC" ]; then
+ Write-PipelineTelemetryError -category "Build" "CLR_CC is set but path '$CLR_CC' does not exist"
+ exit 1
+ fi
+ export CC="$CLR_CC"
+ export CXX="$CLR_CXX"
+fi
+
+if [ -z "$CC" ]; then
+ Write-PipelineTelemetryError -category "Build" "Unable to find $compiler."
+ exit 1
+fi
+
+export CCC_CC="$CC"
+export CCC_CXX="$CXX"
+export SCAN_BUILD_COMMAND="$(command -v "scan-build$desired_version")"
diff --git a/eng/common/performance/perfhelixpublish.proj b/eng/common/performance/perfhelixpublish.proj
index cf5941e1b64554..1db5e8a84d758b 100644
--- a/eng/common/performance/perfhelixpublish.proj
+++ b/eng/common/performance/perfhelixpublish.proj
@@ -6,6 +6,7 @@
py -3
%HELIX_CORRELATION_PAYLOAD%\Core_Root\CoreRun.exe
%HELIX_CORRELATION_PAYLOAD%\Baseline_Core_Root\CoreRun.exe
+
$(HelixPreCommands);call %HELIX_CORRELATION_PAYLOAD%\performance\tools\machine-setup.cmd;set PYTHONPATH=%HELIX_WORKITEM_PAYLOAD%\scripts%3B%HELIX_WORKITEM_PAYLOAD%
%HELIX_CORRELATION_PAYLOAD%\artifacts\BenchmarkDotNet.Artifacts
%HELIX_CORRELATION_PAYLOAD%\artifacts\BenchmarkDotNet.Artifacts_Baseline
@@ -40,6 +41,13 @@
$HELIX_WORKITEM_ROOT/testResults.xml
+
+ --corerun %HELIX_CORRELATION_PAYLOAD%\dotnet-mono\shared\Microsoft.NETCore.App\5.0.0\corerun.exe
+
+
+ --corerun $(BaseDirectory)/dotnet-mono/shared/Microsoft.NETCore.App/5.0.0/corerun
+
+
--corerun $(CoreRun)
diff --git a/eng/common/performance/performance-setup.ps1 b/eng/common/performance/performance-setup.ps1
index 1763a1a97b0e79..31a99e49015f49 100644
--- a/eng/common/performance/performance-setup.ps1
+++ b/eng/common/performance/performance-setup.ps1
@@ -3,7 +3,7 @@ Param(
[string] $CoreRootDirectory,
[string] $BaselineCoreRootDirectory,
[string] $Architecture="x64",
- [string] $Framework="netcoreapp5.0",
+ [string] $Framework="net5.0",
[string] $CompilationMode="Tiered",
[string] $Repository=$env:BUILD_REPOSITORY_NAME,
[string] $Branch=$env:BUILD_SOURCEBRANCH,
@@ -12,8 +12,12 @@ Param(
[string] $RunCategories="Libraries Runtime",
[string] $Csproj="src\benchmarks\micro\MicroBenchmarks.csproj",
[string] $Kind="micro",
+ [switch] $LLVM,
+ [switch] $MonoInterpreter,
+ [switch] $MonoAOT,
[switch] $Internal,
[switch] $Compare,
+ [string] $MonoDotnet="",
[string] $Configurations="CompilationMode=$CompilationMode RunKind=$Kind"
)
@@ -31,7 +35,8 @@ $HelixSourcePrefix = "pr"
$Queue = "Windows.10.Amd64.ClientRS4.DevEx.15.8.Open"
-if ($Framework.StartsWith("netcoreapp")) {
+# TODO: Implement a better logic to determine if Framework is .NET Core or >= .NET 5.
+if ($Framework.StartsWith("netcoreapp") -or ($Framework -eq "net5.0")) {
$Queue = "Windows.10.Amd64.ClientRS5.Open"
}
@@ -49,6 +54,21 @@ if ($Internal) {
$HelixSourcePrefix = "official"
}
+if($MonoDotnet -ne "")
+{
+ $Configurations += " LLVM=$LLVM MonoInterpreter=$MonoInterpreter MonoAOT=$MonoAOT"
+ if($ExtraBenchmarkDotNetArguments -eq "")
+ {
+ #FIX ME: We need to block these tests as they don't run on mono for now
+ $ExtraBenchmarkDotNetArguments = "--exclusion-filter *Perf_Image* *Perf_NamedPipeStream*"
+ }
+ else
+ {
+ #FIX ME: We need to block these tests as they don't run on mono for now
+ $ExtraBenchmarkDotNetArguments += " --exclusion-filter *Perf_Image* *Perf_NamedPipeStream*"
+ }
+}
+
# FIX ME: This is a workaround until we get this from the actual pipeline
$CommonSetupArguments="--channel master --queue $Queue --build-number $BuildNumber --build-configs $Configurations --architecture $Architecture"
$SetupArguments = "--repository https://github.com/$Repository --branch $Branch --get-perf-hash --commit-sha $CommitSha $CommonSetupArguments"
@@ -69,6 +89,13 @@ else {
git clone --branch master --depth 1 --quiet https://github.com/dotnet/performance $PerformanceDirectory
}
+if($MonoDotnet -ne "")
+{
+ $UsingMono = "true"
+ $MonoDotnetPath = (Join-Path $PayloadDirectory "dotnet-mono")
+ Move-Item -Path $MonoDotnet -Destination $MonoDotnetPath
+}
+
if ($UseCoreRun) {
$NewCoreRoot = (Join-Path $PayloadDirectory "Core_Root")
Move-Item -Path $CoreRootDirectory -Destination $NewCoreRoot
@@ -104,6 +131,7 @@ Write-PipelineSetVariable -Name 'UseCoreRun' -Value "$UseCoreRun" -IsMultiJobVar
Write-PipelineSetVariable -Name 'UseBaselineCoreRun' -Value "$UseBaselineCoreRun" -IsMultiJobVariable $false
Write-PipelineSetVariable -Name 'RunFromPerfRepo' -Value "$RunFromPerformanceRepo" -IsMultiJobVariable $false
Write-PipelineSetVariable -Name 'Compare' -Value "$Compare" -IsMultiJobVariable $false
+Write-PipelineSetVariable -Name 'MonoDotnet' -Value "$UsingMono" -IsMultiJobVariable $false
# Helix Arguments
Write-PipelineSetVariable -Name 'Creator' -Value "$Creator" -IsMultiJobVariable $false
diff --git a/eng/common/performance/performance-setup.sh b/eng/common/performance/performance-setup.sh
index b9eecf94bd01b8..9409e4d85e92e3 100755
--- a/eng/common/performance/performance-setup.sh
+++ b/eng/common/performance/performance-setup.sh
@@ -4,7 +4,7 @@ source_directory=$BUILD_SOURCESDIRECTORY
core_root_directory=
baseline_core_root_directory=
architecture=x64
-framework=netcoreapp5.0
+framework=net5.0
compilation_mode=tiered
repository=$BUILD_REPOSITORY_NAME
branch=$BUILD_SOURCEBRANCH
@@ -12,13 +12,18 @@ commit_sha=$BUILD_SOURCEVERSION
build_number=$BUILD_BUILDNUMBER
internal=false
compare=false
+mono_dotnet=
kind="micro"
+llvm=false
+monointerpreter=false
+monoaot=false
run_categories="Libraries Runtime"
csproj="src\benchmarks\micro\MicroBenchmarks.csproj"
configurations="CompliationMode=$compilation_mode RunKind=$kind"
run_from_perf_repo=false
use_core_run=true
use_baseline_core_run=true
+using_mono=false
while (($# > 0)); do
lowerI="$(echo $1 | awk '{print tolower($0)}')"
@@ -65,6 +70,7 @@ while (($# > 0)); do
;;
--kind)
kind=$2
+ configurations="CompliationMode=$compilation_mode RunKind=$kind"
shift 2
;;
--runcategories)
@@ -79,6 +85,22 @@ while (($# > 0)); do
internal=true
shift 1
;;
+ --llvm)
+ llvm=true
+ shift 1
+ ;;
+ --monointerpreter)
+ monointerpreter=true
+ shift 1
+ ;;
+ --monoaot)
+ monoaot=true
+ shift 1
+ ;;
+ --monodotnet)
+ mono_dotnet=$2
+ shift 2
+ ;;
--compare)
compare=true
shift 1
@@ -107,6 +129,7 @@ while (($# > 0)); do
echo " --kind Related to csproj. The kind of benchmarks that should be run. Defaults to micro"
echo " --runcategories Related to csproj. Categories of benchmarks to run. Defaults to \"coreclr corefx\""
echo " --internal If the benchmarks are running as an official job."
+ echo " --monodotnet Pass the path to the mono dotnet for mono performance testing."
echo ""
exit 0
;;
@@ -164,6 +187,10 @@ if [[ "$internal" == true ]]; then
fi
fi
+if [[ "$mono_dotnet" != "" ]]; then
+ configurations="$configurations LLVM=$llvm MonoInterpreter=$monointerpreter MonoAOT=$monoaot"
+fi
+
common_setup_arguments="--channel master --queue $queue --build-number $build_number --build-configs $configurations --architecture $architecture"
setup_arguments="--repository https://github.com/$repository --branch $branch --get-perf-hash --commit-sha $commit_sha $common_setup_arguments"
@@ -186,6 +213,12 @@ else
mv $docs_directory $workitem_directory
fi
+if [[ "$mono_dotnet" != "" ]]; then
+ using_mono=true
+ mono_dotnet_path=$payload_directory/dotnet-mono
+ mv $mono_dotnet $mono_dotnet_path
+fi
+
if [[ "$use_core_run" = true ]]; then
new_core_root=$payload_directory/Core_Root
mv $core_root_directory $new_core_root
@@ -221,3 +254,4 @@ Write-PipelineSetVariable -name "HelixSourcePrefix" -value "$helix_source_prefix
Write-PipelineSetVariable -name "Kind" -value "$kind" -is_multi_job_variable false
Write-PipelineSetVariable -name "_BuildConfig" -value "$architecture.$kind.$framework" -is_multi_job_variable false
Write-PipelineSetVariable -name "Compare" -value "$compare" -is_multi_job_variable false
+Write-PipelineSetVariable -name "MonoDotnet" -value "$using_mono" -is_multi_job_variable false
diff --git a/eng/common/post-build/check-channel-consistency.ps1 b/eng/common/post-build/check-channel-consistency.ps1
index 7e6618d64ad9f3..38abc5392dc75c 100644
--- a/eng/common/post-build/check-channel-consistency.ps1
+++ b/eng/common/post-build/check-channel-consistency.ps1
@@ -6,13 +6,18 @@ param(
try {
. $PSScriptRoot\post-build-utils.ps1
+ if ($PromoteToChannels -eq "") {
+ Write-PipelineTaskError -Type 'warning' -Message "This build won't publish assets as it's not configured to any Maestro channel. If that wasn't intended use Darc to configure a default channel using add-default-channel for this branch or to promote it to a channel using add-build-to-channel. See https://github.com/dotnet/arcade/blob/master/Documentation/Darc.md#assigning-an-individual-build-to-a-channel for more info."
+ ExitWithExitCode 0
+ }
+
# Check that every channel that Maestro told to promote the build to
# is available in YAML
$PromoteToChannelsIds = $PromoteToChannels -split "\D" | Where-Object { $_ }
foreach ($id in $PromoteToChannelsIds) {
if (($id -ne 0) -and ($id -notin $AvailableChannelIds)) {
- Write-PipelineTaskError -Type 'warning' -Message "Channel $id is not present in the post-build YAML configuration!"
+ Write-PipelineTaskError -Message "Channel $id is not present in the post-build YAML configuration! This is an error scenario. Please contact @dnceng."
}
}
diff --git a/eng/common/post-build/symbols-validation.ps1 b/eng/common/post-build/symbols-validation.ps1
index f7cfe986ddd3e4..8e9527113ca083 100644
--- a/eng/common/post-build/symbols-validation.ps1
+++ b/eng/common/post-build/symbols-validation.ps1
@@ -1,7 +1,9 @@
param(
[Parameter(Mandatory=$true)][string] $InputPath, # Full path to directory where NuGet packages to be checked are stored
[Parameter(Mandatory=$true)][string] $ExtractPath, # Full path to directory where the packages will be extracted during validation
- [Parameter(Mandatory=$true)][string] $DotnetSymbolVersion # Version of dotnet symbol to use
+ [Parameter(Mandatory=$true)][string] $DotnetSymbolVersion, # Version of dotnet symbol to use
+ [Parameter(Mandatory=$false)][switch] $ContinueOnError, # If we should keep checking symbols after an error
+ [Parameter(Mandatory=$false)][switch] $Clean # Clean extracted symbols directory after checking symbols
)
function FirstMatchingSymbolDescriptionOrDefault {
@@ -80,7 +82,14 @@ function CountMissingSymbols {
$ExtractPath = Join-Path -Path $ExtractPath -ChildPath $PackageGuid
$SymbolsPath = Join-Path -Path $ExtractPath -ChildPath 'Symbols'
- [System.IO.Compression.ZipFile]::ExtractToDirectory($PackagePath, $ExtractPath)
+ try {
+ [System.IO.Compression.ZipFile]::ExtractToDirectory($PackagePath, $ExtractPath)
+ }
+ catch {
+ Write-Host "Something went wrong extracting $PackagePath"
+ Write-Host $_
+ return -1
+ }
Get-ChildItem -Recurse $ExtractPath |
Where-Object {$RelevantExtensions -contains $_.Extension} |
@@ -115,6 +124,10 @@ function CountMissingSymbols {
}
}
+ if ($Clean) {
+ Remove-Item $ExtractPath -Recurse -Force
+ }
+
Pop-Location
return $MissingSymbols
@@ -125,6 +138,8 @@ function CheckSymbolsAvailable {
Remove-Item $ExtractPath -Force -Recurse -ErrorAction SilentlyContinue
}
+ $TotalFailures = 0
+
Get-ChildItem "$InputPath\*.nupkg" |
ForEach-Object {
$FileName = $_.Name
@@ -148,11 +163,22 @@ function CheckSymbolsAvailable {
if ($Status -ne 0) {
Write-PipelineTelemetryError -Category 'CheckSymbols' -Message "Missing symbols for $Status modules in the package $FileName"
- ExitWithExitCode $exitCode
+
+ if ($ContinueOnError) {
+ $TotalFailures++
+ }
+ else {
+ ExitWithExitCode 1
+ }
}
Write-Host
}
+
+ if ($TotalFailures -ne 0) {
+ Write-PipelineTelemetryError -Category 'CheckSymbols' -Message "Symbols missing for $TotalFailures packages"
+ ExitWithExitCode 1
+ }
}
function InstallDotnetSymbol {
diff --git a/eng/common/sdk-task.ps1 b/eng/common/sdk-task.ps1
index 3872af59b97288..f997be4331d224 100644
--- a/eng/common/sdk-task.ps1
+++ b/eng/common/sdk-task.ps1
@@ -57,6 +57,19 @@ try {
ExitWithExitCode 1
}
+ if( $msbuildEngine -eq "vs") {
+ # Ensure desktop MSBuild is available for sdk tasks.
+ if( -not ($GlobalJson.tools.PSObject.Properties.Name -contains "vs" )) {
+ $GlobalJson.tools | Add-Member -Name "vs" -Value (ConvertFrom-Json "{ `"version`": `"16.5`" }") -MemberType NoteProperty
+ }
+ if( -not ($GlobalJson.tools.PSObject.Properties.Name -match "xcopy-msbuild" )) {
+ $GlobalJson.tools | Add-Member -Name "xcopy-msbuild" -Value "16.5.0-alpha" -MemberType NoteProperty
+ }
+
+ $xcopyMSBuildToolsFolder = InitializeXCopyMSBuild $GlobalJson.tools."xcopy-msbuild" -install $true
+ $global:_MSBuildExe = "$($xcopyMSBuildToolsFolder)\MSBuild\Current\Bin\MSBuild.exe"
+ }
+
$taskProject = GetSdkTaskProject $task
if (!(Test-Path $taskProject)) {
Write-PipelineTelemetryError -Category 'Build' -Message "Unknown task: $task" -ForegroundColor Red
diff --git a/eng/common/sdl/extract-artifact-packages.ps1 b/eng/common/sdl/extract-artifact-packages.ps1
index 9e5f3cb43c7e4e..7f28d9c59ec69c 100644
--- a/eng/common/sdl/extract-artifact-packages.ps1
+++ b/eng/common/sdl/extract-artifact-packages.ps1
@@ -63,7 +63,7 @@ try {
}
}
catch {
- Write-Host $_.ScriptStackTrace
+ Write-Host $_
Write-PipelineTelemetryError -Force -Category 'Sdl' -Message $_
ExitWithExitCode 1
}
@@ -74,7 +74,7 @@ try {
Measure-Command { ExtractArtifacts }
}
catch {
- Write-Host $_.ScriptStackTrace
+ Write-Host $_
Write-PipelineTelemetryError -Force -Category 'Sdl' -Message $_
ExitWithExitCode 1
}
diff --git a/eng/common/sdl/init-sdl.ps1 b/eng/common/sdl/init-sdl.ps1
index 1a91bbbc5a9a9c..a68bf0b88ea681 100644
--- a/eng/common/sdl/init-sdl.ps1
+++ b/eng/common/sdl/init-sdl.ps1
@@ -24,7 +24,7 @@ $ProgressPreference = 'SilentlyContinue'
# Construct basic auth from AzDO access token; construct URI to the repository's gdn folder stored in that repository; construct location of zip file
$encodedPat = [Convert]::ToBase64String([System.Text.Encoding]::ASCII.GetBytes(":$AzureDevOpsAccessToken"))
$escapedRepository = [Uri]::EscapeDataString("/$Repository/$BranchName/.gdn")
-$uri = "https://dev.azure.com/dnceng/internal/_apis/git/repositories/sdl-tool-cfg/Items?path=$escapedRepository&versionDescriptor[versionOptions]=0&`$format=zip&api-version=5.0-preview.1"
+$uri = "https://dev.azure.com/dnceng/internal/_apis/git/repositories/sdl-tool-cfg/Items?path=$escapedRepository&versionDescriptor[versionOptions]=0&`$format=zip&api-version=5.0"
$zipFile = "$WorkingDirectory/gdn.zip"
Add-Type -AssemblyName System.IO.Compression.FileSystem
diff --git a/eng/common/sdl/packages.config b/eng/common/sdl/packages.config
index 256ffbfb93a306..968b39bef5f193 100644
--- a/eng/common/sdl/packages.config
+++ b/eng/common/sdl/packages.config
@@ -1,4 +1,4 @@
-
diff --git a/eng/common/templates/job/execute-sdl.yml b/eng/common/templates/job/execute-sdl.yml
index 640f2b04e240f9..c64c4f5686cbfa 100644
--- a/eng/common/templates/job/execute-sdl.yml
+++ b/eng/common/templates/job/execute-sdl.yml
@@ -6,6 +6,7 @@ parameters:
# 'continueOnError', the parameter value is not correctly picked up.
# This can also be remedied by the caller (post-build.yml) if it does not use a nested parameter
sdlContinueOnError: false # optional: determines whether to continue the build if the step errors;
+ downloadArtifacts: true # optional: determines if the artifacts should be dowloaded
dependsOn: '' # Optional: dependencies of the job
artifactNames: '' # Optional: patterns supplied to DownloadBuildArtifacts
# Usage:
@@ -31,8 +32,20 @@ jobs:
steps:
- checkout: self
clean: true
- - ${{ if ne(parameters.artifactNames, '') }}:
- - ${{ each artifactName in parameters.artifactNames }}:
+ - ${{ if ne(parameters.downloadArtifacts, 'false')}}:
+ - ${{ if ne(parameters.artifactNames, '') }}:
+ - ${{ each artifactName in parameters.artifactNames }}:
+ - task: DownloadBuildArtifacts@0
+ displayName: Download Build Artifacts
+ inputs:
+ buildType: specific
+ buildVersionToDownload: specific
+ project: $(AzDOProjectName)
+ pipeline: $(AzDOPipelineId)
+ buildId: $(AzDOBuildId)
+ artifactName: ${{ artifactName }}
+ downloadPath: $(Build.ArtifactStagingDirectory)\artifacts
+ - ${{ if eq(parameters.artifactNames, '') }}:
- task: DownloadBuildArtifacts@0
displayName: Download Build Artifacts
inputs:
@@ -41,20 +54,9 @@ jobs:
project: $(AzDOProjectName)
pipeline: $(AzDOPipelineId)
buildId: $(AzDOBuildId)
- artifactName: ${{ artifactName }}
+ downloadType: specific files
+ itemPattern: "**"
downloadPath: $(Build.ArtifactStagingDirectory)\artifacts
- - ${{ if eq(parameters.artifactNames, '') }}:
- - task: DownloadBuildArtifacts@0
- displayName: Download Build Artifacts
- inputs:
- buildType: specific
- buildVersionToDownload: specific
- project: $(AzDOProjectName)
- pipeline: $(AzDOPipelineId)
- buildId: $(AzDOBuildId)
- downloadType: specific files
- itemPattern: "**"
- downloadPath: $(Build.ArtifactStagingDirectory)\artifacts
- powershell: eng/common/sdl/extract-artifact-packages.ps1
-InputPath $(Build.ArtifactStagingDirectory)\artifacts\BlobArtifacts
-ExtractPath $(Build.ArtifactStagingDirectory)\artifacts\BlobArtifacts
@@ -81,7 +83,7 @@ jobs:
continueOnError: ${{ parameters.sdlContinueOnError }}
- ${{ if eq(parameters.overrideParameters, '') }}:
- powershell: eng/common/sdl/execute-all-sdl-tools.ps1
- -GuardianPackageName Microsoft.Guardian.Cli.0.7.2
+ -GuardianPackageName Microsoft.Guardian.Cli.win10-x64.0.20.1
-NugetPackageDirectory $(Build.SourcesDirectory)\.packages
-AzureDevOpsAccessToken $(dn-bot-dotnet-build-rw-code-rw)
${{ parameters.additionalParameters }}
diff --git a/eng/common/templates/job/job.yml b/eng/common/templates/job/job.yml
index 536c15c4641c18..fc39647f4b1d0f 100644
--- a/eng/common/templates/job/job.yml
+++ b/eng/common/templates/job/job.yml
@@ -24,6 +24,7 @@ parameters:
enablePublishBuildAssets: false
enablePublishTestResults: false
enablePublishUsingPipelines: false
+ useBuildManifest: false
mergeTestResults: false
testRunTitle: $(AgentOsName)-$(BuildConfiguration)-xunit
name: ''
@@ -218,3 +219,12 @@ jobs:
ArtifactName: AssetManifests
continueOnError: ${{ parameters.continueOnError }}
condition: and(succeeded(), eq(variables['_DotNetPublishToBlobFeed'], 'true'))
+
+ - ${{ if eq(parameters.useBuildManifest, true) }}:
+ - task: PublishBuildArtifacts@1
+ displayName: Publish Build Manifest
+ inputs:
+ PathToPublish: '$(Build.SourcesDirectory)/artifacts/log/$(_BuildConfig)/manifest.props'
+ PublishLocation: Container
+ ArtifactName: BuildManifests
+ continueOnError: ${{ parameters.continueOnError }}
diff --git a/eng/common/templates/post-build/channels/generic-internal-channel.yml b/eng/common/templates/post-build/channels/generic-internal-channel.yml
index dde27800c3f268..258ba4b7706d96 100644
--- a/eng/common/templates/post-build/channels/generic-internal-channel.yml
+++ b/eng/common/templates/post-build/channels/generic-internal-channel.yml
@@ -23,7 +23,7 @@ stages:
- job: publish_symbols
displayName: Symbol Publishing
dependsOn: setupMaestroVars
- condition: or(contains(dependencies.setupMaestroVars.outputs['setReleaseVars.InitialChannels'], format('[{0}]', ${{ parameters.channelId }} )), eq(dependencies.setupMaestroVars.outputs['setReleaseVars.PromoteToMaestroChannelId'], ${{ parameters.channelId }}))
+ condition: contains(dependencies.setupMaestroVars.outputs['setReleaseVars.TargetChannels'], format('[{0}]', ${{ parameters.channelId }} ))
variables:
- group: DotNet-Symbol-Server-Pats
- name: AzDOProjectName
@@ -96,7 +96,7 @@ stages:
value: $[ dependencies.setupMaestroVars.outputs['setReleaseVars.AzDOPipelineId'] ]
- name: AzDOBuildId
value: $[ dependencies.setupMaestroVars.outputs['setReleaseVars.AzDOBuildId'] ]
- condition: or(contains(dependencies.setupMaestroVars.outputs['setReleaseVars.InitialChannels'], format('[{0}]', ${{ parameters.channelId }} )), eq(dependencies.setupMaestroVars.outputs['setReleaseVars.PromoteToMaestroChannelId'], ${{ parameters.channelId }}))
+ condition: contains(dependencies.setupMaestroVars.outputs['setReleaseVars.TargetChannels'], format('[{0}]', ${{ parameters.channelId }} ))
pool:
vmImage: 'windows-2019'
steps:
diff --git a/eng/common/templates/post-build/channels/generic-public-channel.yml b/eng/common/templates/post-build/channels/generic-public-channel.yml
index 08853ec45e0c1f..bf98d990e88ef7 100644
--- a/eng/common/templates/post-build/channels/generic-public-channel.yml
+++ b/eng/common/templates/post-build/channels/generic-public-channel.yml
@@ -25,7 +25,7 @@ stages:
- job: publish_symbols
displayName: Symbol Publishing
dependsOn: setupMaestroVars
- condition: or(contains(dependencies.setupMaestroVars.outputs['setReleaseVars.InitialChannels'], format('[{0}]', ${{ parameters.channelId }} )), eq(dependencies.setupMaestroVars.outputs['setReleaseVars.PromoteToMaestroChannelId'], ${{ parameters.channelId }}))
+ condition: contains(dependencies.setupMaestroVars.outputs['setReleaseVars.TargetChannels'], format('[{0}]', ${{ parameters.channelId }} ))
variables:
- group: DotNet-Symbol-Server-Pats
- name: AzDOProjectName
@@ -99,7 +99,7 @@ stages:
value: $[ dependencies.setupMaestroVars.outputs['setReleaseVars.AzDOBuildId'] ]
- name: ArtifactsCategory
value: ${{ coalesce(variables._DotNetArtifactsCategory, '.NETCore') }}
- condition: or(contains(dependencies.setupMaestroVars.outputs['setReleaseVars.InitialChannels'], format('[{0}]', ${{ parameters.channelId }} )), eq(dependencies.setupMaestroVars.outputs['setReleaseVars.PromoteToMaestroChannelId'], ${{ parameters.channelId }}))
+ condition: contains(dependencies.setupMaestroVars.outputs['setReleaseVars.TargetChannels'], format('[{0}]', ${{ parameters.channelId }} ))
pool:
vmImage: 'windows-2019'
steps:
diff --git a/eng/common/templates/post-build/common-variables.yml b/eng/common/templates/post-build/common-variables.yml
index 867f37cd875885..c99fd7503767cd 100644
--- a/eng/common/templates/post-build/common-variables.yml
+++ b/eng/common/templates/post-build/common-variables.yml
@@ -63,7 +63,7 @@ variables:
- name: MaestroApiAccessToken
value: $(MaestroAccessToken)
- name: MaestroApiVersion
- value: "2019-01-16"
+ value: "2020-02-20"
- name: SourceLinkCLIVersion
value: 3.0.0
diff --git a/eng/common/templates/post-build/post-build.yml b/eng/common/templates/post-build/post-build.yml
index fbab4cb5dce058..b51bc5375ecf0d 100644
--- a/eng/common/templates/post-build/post-build.yml
+++ b/eng/common/templates/post-build/post-build.yml
@@ -9,12 +9,14 @@ parameters:
continueOnError: false
params: ''
artifactNames: ''
+ downloadArtifacts: true
# These parameters let the user customize the call to sdk-task.ps1 for publishing
# symbols & general artifacts as well as for signing validation
symbolPublishingAdditionalParameters: ''
artifactsPublishingAdditionalParameters: ''
signingValidationAdditionalParameters: ''
+ useBuildManifest: false
# Which stages should finish execution before post-build stages start
validateDependsOn:
@@ -35,10 +37,13 @@ parameters:
NETCoreExperimentalChannelId: 562
NetEngServicesIntChannelId: 678
NetEngServicesProdChannelId: 679
- Net5Preview2ChannelId: 738
Net5Preview3ChannelId: 739
+ Net5Preview4ChannelId: 856
+ Net5Preview5ChannelId: 857
NetCoreSDK313xxChannelId: 759
NetCoreSDK313xxInternalChannelId: 760
+ NetCoreSDK314xxChannelId: 921
+ NetCoreSDK314xxInternalChannelId: 922
stages:
- stage: Validate
@@ -53,10 +58,8 @@ stages:
displayName: Post-build Checks
dependsOn: setupMaestroVars
variables:
- - name: InitialChannels
- value: $[ dependencies.setupMaestroVars.outputs['setReleaseVars.InitialChannels'] ]
- - name: PromoteToMaestroChannelId
- value: $[ dependencies.setupMaestroVars.outputs['setReleaseVars.PromoteToMaestroChannelId'] ]
+ - name: TargetChannels
+ value: $[ dependencies.setupMaestroVars.outputs['setReleaseVars.TargetChannels'] ]
pool:
vmImage: 'windows-2019'
steps:
@@ -64,8 +67,8 @@ stages:
displayName: Maestro Channels Consistency
inputs:
filePath: $(Build.SourcesDirectory)/eng/common/post-build/check-channel-consistency.ps1
- arguments: -PromoteToChannels "$(InitialChannels)[$(PromoteToMaestroChannelId)]"
- -AvailableChannelIds ${{parameters.NetEngLatestChannelId}},${{parameters.NetEngValidationChannelId}},${{parameters.NetDev5ChannelId}},${{parameters.GeneralTestingChannelId}},${{parameters.NETCoreToolingDevChannelId}},${{parameters.NETCoreToolingReleaseChannelId}},${{parameters.NETInternalToolingChannelId}},${{parameters.NETCoreExperimentalChannelId}},${{parameters.NetEngServicesIntChannelId}},${{parameters.NetEngServicesProdChannelId}},${{parameters.Net5Preview2ChannelId}},${{parameters.Net5Preview3ChannelId}},${{parameters.NetCoreSDK313xxChannelId}},${{parameters.NetCoreSDK313xxInternalChannelId}}
+ arguments: -PromoteToChannels "$(TargetChannels)"
+ -AvailableChannelIds ${{parameters.NetEngLatestChannelId}},${{parameters.NetEngValidationChannelId}},${{parameters.NetDev5ChannelId}},${{parameters.GeneralTestingChannelId}},${{parameters.NETCoreToolingDevChannelId}},${{parameters.NETCoreToolingReleaseChannelId}},${{parameters.NETInternalToolingChannelId}},${{parameters.NETCoreExperimentalChannelId}},${{parameters.NetEngServicesIntChannelId}},${{parameters.NetEngServicesProdChannelId}},${{parameters.Net5Preview3ChannelId}},${{parameters.Net5Preview4ChannelId}},${{parameters.Net5Preview5ChannelId}},${{parameters.NetCoreSDK313xxChannelId}},${{parameters.NetCoreSDK313xxInternalChannelId}},${{parameters.NetCoreSDK314xxChannelId}},${{parameters.NetCoreSDK314xxInternalChannelId}}
- job:
displayName: NuGet Validation
@@ -113,6 +116,16 @@ stages:
pool:
vmImage: 'windows-2019'
steps:
+ - ${{ if eq(parameters.useBuildManifest, true) }}:
+ - task: DownloadBuildArtifacts@0
+ displayName: Download build manifest
+ inputs:
+ buildType: specific
+ buildVersionToDownload: specific
+ project: $(AzDOProjectName)
+ pipeline: $(AzDOPipelineId)
+ buildId: $(AzDOBuildId)
+ artifactName: BuildManifests
- task: DownloadBuildArtifacts@0
displayName: Download Package Artifacts
inputs:
@@ -135,11 +148,13 @@ stages:
filePath: eng\common\enable-cross-org-publishing.ps1
arguments: -token $(dn-bot-dnceng-artifact-feeds-rw)
+ # Signing validation will optionally work with the buildmanifest file which is downloaded from
+ # Azure DevOps above.
- task: PowerShell@2
displayName: Validate
inputs:
filePath: eng\common\sdk-task.ps1
- arguments: -task SigningValidation -restore -msbuildEngine dotnet
+ arguments: -task SigningValidation -restore -msbuildEngine vs
/p:PackageBasePath='$(Build.ArtifactStagingDirectory)/PackageArtifacts'
/p:SignCheckExclusionsFile='$(Build.SourcesDirectory)/eng/SignCheckExclusionsFile.txt'
${{ parameters.signingValidationAdditionalParameters }}
@@ -192,6 +207,7 @@ stages:
additionalParameters: ${{ parameters.SDLValidationParameters.params }}
continueOnError: ${{ parameters.SDLValidationParameters.continueOnError }}
artifactNames: ${{ parameters.SDLValidationParameters.artifactNames }}
+ downloadArtifacts: ${{ parameters.SDLValidationParameters.downloadArtifacts }}
- template: \eng\common\templates\post-build\channels\generic-public-channel.yml
parameters:
@@ -213,10 +229,10 @@ stages:
dependsOn: ${{ parameters.publishDependsOn }}
publishInstallersAndChecksums: ${{ parameters.publishInstallersAndChecksums }}
symbolPublishingAdditionalParameters: ${{ parameters.symbolPublishingAdditionalParameters }}
- stageName: 'Net5_Preview2_Publish'
- channelName: '.NET 5 Preview 2'
- akaMSChannelName: 'net5/preview2'
- channelId: ${{ parameters.Net5Preview2ChannelId }}
+ stageName: 'Net5_Preview3_Publish'
+ channelName: '.NET 5 Preview 3'
+ akaMSChannelName: 'net5/preview3'
+ channelId: ${{ parameters.Net5Preview3ChannelId }}
transportFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5-transport/nuget/v3/index.json'
shippingFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5/nuget/v3/index.json'
symbolsFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5-symbols/nuget/v3/index.json'
@@ -227,10 +243,24 @@ stages:
dependsOn: ${{ parameters.publishDependsOn }}
publishInstallersAndChecksums: ${{ parameters.publishInstallersAndChecksums }}
symbolPublishingAdditionalParameters: ${{ parameters.symbolPublishingAdditionalParameters }}
- stageName: 'Net5_Preview3_Publish'
- channelName: '.NET 5 Preview 3'
- akaMSChannelName: 'net5/preview3'
- channelId: ${{ parameters.Net5Preview3ChannelId }}
+ stageName: 'Net5_Preview4_Publish'
+ channelName: '.NET 5 Preview 4'
+ akaMSChannelName: 'net5/preview4'
+ channelId: ${{ parameters.Net5Preview4ChannelId }}
+ transportFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5-transport/nuget/v3/index.json'
+ shippingFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5/nuget/v3/index.json'
+ symbolsFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5-symbols/nuget/v3/index.json'
+
+- template: \eng\common\templates\post-build\channels\generic-public-channel.yml
+ parameters:
+ artifactsPublishingAdditionalParameters: ${{ parameters.artifactsPublishingAdditionalParameters }}
+ dependsOn: ${{ parameters.publishDependsOn }}
+ publishInstallersAndChecksums: ${{ parameters.publishInstallersAndChecksums }}
+ symbolPublishingAdditionalParameters: ${{ parameters.symbolPublishingAdditionalParameters }}
+ stageName: 'Net5_Preview5_Publish'
+ channelName: '.NET 5 Preview 5'
+ akaMSChannelName: 'net5/preview5'
+ channelId: ${{ parameters.Net5Preview5ChannelId }}
transportFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5-transport/nuget/v3/index.json'
shippingFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5/nuget/v3/index.json'
symbolsFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet5-symbols/nuget/v3/index.json'
@@ -355,6 +385,32 @@ stages:
shippingFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet-eng/nuget/v3/index.json'
symbolsFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet-eng-symbols/nuget/v3/index.json'
+- template: \eng\common\templates\post-build\channels\generic-public-channel.yml
+ parameters:
+ artifactsPublishingAdditionalParameters: ${{ parameters.artifactsPublishingAdditionalParameters }}
+ dependsOn: ${{ parameters.publishDependsOn }}
+ publishInstallersAndChecksums: ${{ parameters.publishInstallersAndChecksums }}
+ symbolPublishingAdditionalParameters: ${{ parameters.symbolPublishingAdditionalParameters }}
+ stageName: 'NETCore_SDK_314xx_Publishing'
+ channelName: '.NET Core SDK 3.1.4xx'
+ channelId: ${{ parameters.NetCoreSDK314xxChannelId }}
+ transportFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet3.1-transport/nuget/v3/index.json'
+ shippingFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet3.1/nuget/v3/index.json'
+ symbolsFeed: 'https://pkgs.dev.azure.com/dnceng/public/_packaging/dotnet3.1-symbols/nuget/v3/index.json'
+
+- template: \eng\common\templates\post-build\channels\generic-internal-channel.yml
+ parameters:
+ artifactsPublishingAdditionalParameters: ${{ parameters.artifactsPublishingAdditionalParameters }}
+ dependsOn: ${{ parameters.publishDependsOn }}
+ publishInstallersAndChecksums: ${{ parameters.publishInstallersAndChecksums }}
+ symbolPublishingAdditionalParameters: ${{ parameters.symbolPublishingAdditionalParameters }}
+ stageName: 'NETCore_SDK_314xx_Internal_Publishing'
+ channelName: '.NET Core SDK 3.1.4xx Internal'
+ channelId: ${{ parameters.NetCoreSDK314xxInternalChannelId }}
+ transportFeed: 'https://pkgs.dev.azure.com/dnceng/_packaging/dotnet3.1-internal-transport/nuget/v3/index.json'
+ shippingFeed: 'https://pkgs.dev.azure.com/dnceng/_packaging/dotnet3.1-internal/nuget/v3/index.json'
+ symbolsFeed: 'https://pkgs.dev.azure.com/dnceng/_packaging/dotnet3.1-internal-symbols/nuget/v3/index.json'
+
- template: \eng\common\templates\post-build\channels\generic-public-channel.yml
parameters:
artifactsPublishingAdditionalParameters: ${{ parameters.artifactsPublishingAdditionalParameters }}
diff --git a/eng/common/templates/post-build/setup-maestro-vars.yml b/eng/common/templates/post-build/setup-maestro-vars.yml
index 05e611edb68a2b..b3d29d4498e36a 100644
--- a/eng/common/templates/post-build/setup-maestro-vars.yml
+++ b/eng/common/templates/post-build/setup-maestro-vars.yml
@@ -5,7 +5,9 @@ jobs:
- template: common-variables.yml
- name: BuildId
value: $[ coalesce(variables.BARBuildId, 0) ]
- - name: PromoteToChannelId
+ - name: PromoteToMaestroChannels
+ value: $[ coalesce(variables.PromoteToChannelIds, 0) ]
+ - name: PromoteToMaestroChannel
value: $[ coalesce(variables.PromoteToMaestroChannelId, 0) ]
pool:
vmImage: 'windows-2019'
@@ -14,7 +16,7 @@ jobs:
- task: DownloadBuildArtifacts@0
displayName: Download Release Configs
- condition: eq(variables.PromoteToChannelId, 0)
+ condition: and(eq(variables.PromoteToMaestroChannels, 0), eq(variables.PromoteToMaestroChannel, 0))
inputs:
buildType: current
artifactName: ReleaseConfigs
@@ -26,20 +28,16 @@ jobs:
targetType: inline
script: |
try {
- if ($Env:PromoteToChannelId -eq 0) {
+ if ($Env:PromoteToMaestroChannels -eq 0 -and $Env:PromoteToMaestroChannel -eq 0) {
$Content = Get-Content $(Build.StagingDirectory)/ReleaseConfigs/ReleaseConfigs.txt
$BarId = $Content | Select -Index 0
-
- $Channels = ""
- $Content | Select -Index 1 | ForEach-Object { $Channels += "$_ ," }
-
+ $Channels = $Content | Select -Index 1
$IsStableBuild = $Content | Select -Index 2
$AzureDevOpsProject = $Env:System_TeamProject
$AzureDevOpsBuildDefinitionId = $Env:System_DefinitionId
$AzureDevOpsBuildId = $Env:Build_BuildId
- $PromoteToMaestroChannelId = 0
}
else {
$buildApiEndpoint = "${Env:MaestroApiEndPoint}/api/builds/${Env:BARBuildId}?api-version=${Env:MaestroApiVersion}"
@@ -51,25 +49,23 @@ jobs:
$buildInfo = try { Invoke-WebRequest -Method Get -Uri $buildApiEndpoint -Headers $apiHeaders | ConvertFrom-Json } catch { Write-Host "Error: $_" }
$BarId = $Env:BARBuildId
- $Channels = 'None'
-
- #TODO: Fix this once this issue is done: https://github.com/dotnet/arcade/issues/3834
- $IsStableBuild = 'False'
+ $Channels = $Env:PromoteToMaestroChannels -split ","
+ $Channels = $Channels -join "]["
+ $Channels = "[$Channels][$Env:PromoteToMaestroChannel]"
+ $IsStableBuild = $buildInfo.stable
$AzureDevOpsProject = $buildInfo.azureDevOpsProject
$AzureDevOpsBuildDefinitionId = $buildInfo.azureDevOpsBuildDefinitionId
$AzureDevOpsBuildId = $buildInfo.azureDevOpsBuildId
- $PromoteToMaestroChannelId = $Env:PromoteToMaestroChannelId
}
Write-Host "##vso[task.setvariable variable=BARBuildId;isOutput=true]$BarId"
- Write-Host "##vso[task.setvariable variable=InitialChannels;isOutput=true]$Channels"
+ Write-Host "##vso[task.setvariable variable=TargetChannels;isOutput=true]$Channels"
Write-Host "##vso[task.setvariable variable=IsStableBuild;isOutput=true]$IsStableBuild"
Write-Host "##vso[task.setvariable variable=AzDOProjectName;isOutput=true]$AzureDevOpsProject"
Write-Host "##vso[task.setvariable variable=AzDOPipelineId;isOutput=true]$AzureDevOpsBuildDefinitionId"
Write-Host "##vso[task.setvariable variable=AzDOBuildId;isOutput=true]$AzureDevOpsBuildId"
- Write-Host "##vso[task.setvariable variable=PromoteToMaestroChannelId;isOutput=true]$PromoteToMaestroChannelId"
}
catch {
Write-Host $_
diff --git a/eng/common/templates/steps/send-to-helix.yml b/eng/common/templates/steps/send-to-helix.yml
index 30becf01ea55a8..5eceb48725dcf5 100644
--- a/eng/common/templates/steps/send-to-helix.yml
+++ b/eng/common/templates/steps/send-to-helix.yml
@@ -10,7 +10,7 @@ parameters:
HelixPostCommands: '' # optional -- commands to run after Helix work item execution
WorkItemDirectory: '' # optional -- a payload directory to zip up and send to Helix; requires WorkItemCommand; incompatible with XUnitProjects
WorkItemCommand: '' # optional -- a command to execute on the payload; requires WorkItemDirectory; incompatible with XUnitProjects
- WorkItemTimeout: '' # optional -- a timeout in seconds for the work item command; requires WorkItemDirectory; incompatible with XUnitProjects
+ WorkItemTimeout: '' # optional -- a timeout in TimeSpan.Parse-ready value (e.g. 00:02:00) for the work item command; requires WorkItemDirectory; incompatible with XUnitProjects
CorrelationPayloadDirectory: '' # optional -- a directory to zip up and send to Helix as a correlation payload
XUnitProjects: '' # optional -- semicolon delimited list of XUnitProjects to parse and send to Helix; requires XUnitRuntimeTargetFramework, XUnitPublishTargetFramework, XUnitRunnerVersion, and IncludeDotNetCli=true
XUnitWorkItemTimeout: '' # optional -- the workitem timeout in seconds for all workitems created from the xUnit projects specified by XUnitProjects
@@ -18,8 +18,8 @@ parameters:
XUnitRuntimeTargetFramework: '' # optional -- framework to use for the xUnit console runner
XUnitRunnerVersion: '' # optional -- version of the xUnit nuget package you wish to use on Helix; required for XUnitProjects
IncludeDotNetCli: false # optional -- true will download a version of the .NET CLI onto the Helix machine as a correlation payload; requires DotNetCliPackageType and DotNetCliVersion
- DotNetCliPackageType: '' # optional -- either 'sdk' or 'runtime'; determines whether the sdk or runtime will be sent to Helix; see https://raw.githubusercontent.com/dotnet/core/master/release-notes/releases.json
- DotNetCliVersion: '' # optional -- version of the CLI to send to Helix; based on this: https://raw.githubusercontent.com/dotnet/core/master/release-notes/releases.json
+ DotNetCliPackageType: '' # optional -- either 'sdk' or 'runtime'; determines whether the sdk or runtime will be sent to Helix; see https://raw.githubusercontent.com/dotnet/core/master/release-notes/releases-index.json
+ DotNetCliVersion: '' # optional -- version of the CLI to send to Helix; based on this: https://raw.githubusercontent.com/dotnet/core/master/release-notes/releases-index.json
EnableXUnitReporter: false # optional -- true enables XUnit result reporting to Mission Control
WaitForWorkItemCompletion: true # optional -- true will make the task wait until work items have been completed and fail the build if work items fail. False is "fire and forget."
IsExternal: false # [DEPRECATED] -- doesn't do anything, jobs are external if HelixAccessToken is empty and Creator is set
diff --git a/eng/common/tools.ps1 b/eng/common/tools.ps1
index 60c1cd89758721..d8dfc5e00498ce 100644
--- a/eng/common/tools.ps1
+++ b/eng/common/tools.ps1
@@ -7,9 +7,11 @@
# Build configuration. Common values include 'Debug' and 'Release', but the repository may use other names.
[string]$configuration = if (Test-Path variable:configuration) { $configuration } else { 'Debug' }
+# Set to true to opt out of outputting binary log while running in CI
+[bool]$excludeCIBinarylog = if (Test-Path variable:excludeCIBinarylog) { $excludeCIBinarylog } else { $false }
+
# Set to true to output binary log from msbuild. Note that emitting binary log slows down the build.
-# Binary log must be enabled on CI.
-[bool]$binaryLog = if (Test-Path variable:binaryLog) { $binaryLog } else { $ci }
+[bool]$binaryLog = if (Test-Path variable:binaryLog) { $binaryLog } else { $ci -and !$excludeCIBinarylog }
# Set to true to use the pipelines logger which will enable Azure logging output.
# https://github.com/Microsoft/azure-pipelines-tasks/blob/master/docs/authoring/commands.md
@@ -55,10 +57,8 @@ set-strictmode -version 2.0
$ErrorActionPreference = 'Stop'
[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12
-function Create-Directory([string[]] $path) {
- if (!(Test-Path $path)) {
- New-Item -path $path -force -itemType 'Directory' | Out-Null
- }
+function Create-Directory ([string[]] $path) {
+ New-Item -Path $path -Force -ItemType 'Directory' | Out-Null
}
function Unzip([string]$zipfile, [string]$outpath) {
@@ -488,10 +488,11 @@ function GetNuGetPackageCachePath() {
if ($env:NUGET_PACKAGES -eq $null) {
# Use local cache on CI to ensure deterministic build,
# use global cache in dev builds to avoid cost of downloading packages.
+ # For directory normalization, see also: https://github.com/NuGet/Home/issues/7968
if ($useGlobalNuGetCache) {
- $env:NUGET_PACKAGES = Join-Path $env:UserProfile '.nuget\packages'
+ $env:NUGET_PACKAGES = Join-Path $env:UserProfile '.nuget\packages\'
} else {
- $env:NUGET_PACKAGES = Join-Path $RepoRoot '.packages'
+ $env:NUGET_PACKAGES = Join-Path $RepoRoot '.packages\'
}
}
@@ -546,7 +547,7 @@ function InitializeToolset() {
MSBuild-Core $proj $bl /t:__WriteToolsetLocation /clp:ErrorsOnly`;NoSummary /p:__ToolsetLocationOutputFile=$toolsetLocationFile
- $path = Get-Content $toolsetLocationFile -TotalCount 1
+ $path = Get-Content $toolsetLocationFile -Encoding UTF8 -TotalCount 1
if (!(Test-Path $path)) {
throw "Invalid toolset path: $path"
}
@@ -604,8 +605,8 @@ function MSBuild() {
#
function MSBuild-Core() {
if ($ci) {
- if (!$binaryLog) {
- Write-PipelineTelemetryError -Category 'Build' -Message 'Binary log must be enabled in CI build.'
+ if (!$binaryLog -and !$excludeCIBinarylog) {
+ Write-PipelineTelemetryError -Category 'Build' -Message 'Binary log must be enabled in CI build, or explicitly opted-out from with the -excludeCIBinarylog switch.'
ExitWithExitCode 1
}
@@ -632,6 +633,8 @@ function MSBuild-Core() {
}
}
+ $env:ARCADE_BUILD_TOOL_COMMAND = "$($buildTool.Path) $cmdArgs"
+
$exitCode = Exec-Process $buildTool.Path $cmdArgs
if ($exitCode -ne 0) {
diff --git a/eng/common/tools.sh b/eng/common/tools.sh
index caae1dbdb273c5..e94fce22ec37ba 100755
--- a/eng/common/tools.sh
+++ b/eng/common/tools.sh
@@ -18,9 +18,17 @@ fi
# Build configuration. Common values include 'Debug' and 'Release', but the repository may use other names.
configuration=${configuration:-'Debug'}
+# Set to true to opt out of outputting binary log while running in CI
+exclude_ci_binary_log=${exclude_ci_binary_log:-false}
+
+if [[ "$ci" == true && "$exclude_ci_binary_log" == false ]]; then
+ binary_log_default=true
+else
+ binary_log_default=false
+fi
+
# Set to true to output binary log from msbuild. Note that emitting binary log slows down the build.
-# Binary log must be enabled on CI.
-binary_log=${binary_log:-$ci}
+binary_log=${binary_log:-$binary_log_default}
# Turns on machine preparation/clean up code that changes the machine state (e.g. kills build processes).
prepare_machine=${prepare_machine:-false}
@@ -201,7 +209,14 @@ function InstallDotNet {
local runtimeSourceFeedKey=''
if [[ -n "${7:-}" ]]; then
- decodedFeedKey=`echo $7 | base64 --decode`
+ # The 'base64' binary on alpine uses '-d' and doesn't support '--decode'
+ # '-d'. To work around this, do a simple detection and switch the parameter
+ # accordingly.
+ decodeArg="--decode"
+ if base64 --help 2>&1 | grep -q "BusyBox"; then
+ decodeArg="-d"
+ fi
+ decodedFeedKey=`echo $7 | base64 $decodeArg`
runtimeSourceFeedKey="--feed-credential $decodedFeedKey"
fi
@@ -397,8 +412,8 @@ function MSBuild {
function MSBuild-Core {
if [[ "$ci" == true ]]; then
- if [[ "$binary_log" != true ]]; then
- Write-PipelineTelemetryError -category 'Build' "Binary log must be enabled in CI build."
+ if [[ "$binary_log" != true && "$exclude_ci_binary_log" != true ]]; then
+ Write-PipelineTelemetryError -category 'Build' "Binary log must be enabled in CI build, or explicitly opted-out from with the -noBinaryLog switch."
ExitWithExitCode 1
fi
@@ -415,11 +430,17 @@ function MSBuild-Core {
warnaserror_switch="/warnaserror"
fi
- "$_InitializeBuildTool" "$_InitializeBuildToolCommand" /m /nologo /clp:Summary /v:$verbosity /nr:$node_reuse $warnaserror_switch /p:TreatWarningsAsErrors=$warn_as_error /p:ContinuousIntegrationBuild=$ci "$@" || {
- local exit_code=$?
- Write-PipelineTelemetryError -category 'Build' "Build failed (exit code '$exit_code')."
- ExitWithExitCode $exit_code
+ function RunBuildTool {
+ export ARCADE_BUILD_TOOL_COMMAND="$_InitializeBuildTool $@"
+
+ "$_InitializeBuildTool" "$@" || {
+ local exit_code=$?
+ Write-PipelineTaskError "Build failed (exit code '$exit_code')."
+ ExitWithExitCode $exit_code
+ }
}
+
+ RunBuildTool "$_InitializeBuildToolCommand" /m /nologo /clp:Summary /v:$verbosity /nr:$node_reuse $warnaserror_switch /p:TreatWarningsAsErrors=$warn_as_error /p:ContinuousIntegrationBuild=$ci "$@"
}
ResolvePath "${BASH_SOURCE[0]}"
diff --git a/eng/docker/libraries-sdk-aspnetcore.linux.Dockerfile b/eng/docker/libraries-sdk-aspnetcore.linux.Dockerfile
index f352d29cac70c0..422e8e19601558 100644
--- a/eng/docker/libraries-sdk-aspnetcore.linux.Dockerfile
+++ b/eng/docker/libraries-sdk-aspnetcore.linux.Dockerfile
@@ -14,7 +14,7 @@ RUN ./src/coreclr/build.sh -release -skiptests -clang9 && \
FROM $SDK_BASE_IMAGE as target
ARG TESTHOST_LOCATION=/repo/artifacts/bin/testhost
-ARG TFM=netcoreapp5.0
+ARG TFM=net5.0
ARG OS=Linux
ARG ARCH=x64
ARG CONFIGURATION=Release
diff --git a/eng/docker/libraries-sdk-aspnetcore.windows.Dockerfile b/eng/docker/libraries-sdk-aspnetcore.windows.Dockerfile
index 59aa7f034f71f0..81c13817d11d91 100644
--- a/eng/docker/libraries-sdk-aspnetcore.windows.Dockerfile
+++ b/eng/docker/libraries-sdk-aspnetcore.windows.Dockerfile
@@ -4,7 +4,7 @@ ARG SDK_BASE_IMAGE=mcr.microsoft.com/dotnet/core/sdk:3.0.100-nanoserver-1809
FROM $SDK_BASE_IMAGE as target
ARG TESTHOST_LOCATION=".\\artifacts\\bin\\testhost"
-ARG TFM=netcoreapp5.0
+ARG TFM=net5.0
ARG OS=Windows_NT
ARG ARCH=x64
ARG CONFIGURATION=Release
diff --git a/eng/docker/libraries-sdk.linux.Dockerfile b/eng/docker/libraries-sdk.linux.Dockerfile
index bbfaef49a39d12..8a4abed0b09509 100644
--- a/eng/docker/libraries-sdk.linux.Dockerfile
+++ b/eng/docker/libraries-sdk.linux.Dockerfile
@@ -13,7 +13,7 @@ RUN ./build.sh -ci -subset clr+libs -runtimeconfiguration release -c $CONFIGURAT
FROM $SDK_BASE_IMAGE as target
ARG TESTHOST_LOCATION=/repo/artifacts/bin/testhost
-ARG TFM=netcoreapp5.0
+ARG TFM=net5.0
ARG OS=Linux
ARG ARCH=x64
ARG CONFIGURATION=Release
diff --git a/eng/docker/libraries-sdk.windows.Dockerfile b/eng/docker/libraries-sdk.windows.Dockerfile
index 5954ae39a0c003..b6393424aad23a 100644
--- a/eng/docker/libraries-sdk.windows.Dockerfile
+++ b/eng/docker/libraries-sdk.windows.Dockerfile
@@ -4,7 +4,7 @@ ARG SDK_BASE_IMAGE=mcr.microsoft.com/dotnet/core/sdk:3.0.100-nanoserver-1809
FROM $SDK_BASE_IMAGE as target
ARG TESTHOST_LOCATION=".\\artifacts\\bin\\testhost"
-ARG TFM=netcoreapp5.0
+ARG TFM=net5.0
ARG OS=Windows_NT
ARG ARCH=x64
ARG CONFIGURATION=Release
diff --git a/eng/empty.csproj b/eng/empty.csproj
index 0bd280da02f353..6edde5507fcdaa 100644
--- a/eng/empty.csproj
+++ b/eng/empty.csproj
@@ -12,4 +12,6 @@
netcoreapp2.0
+
-
- $([MSBuild]::NormalizeDirectory('$(PkgILLink_Tasks)', 'tools'))
+ $([MSBuild]::NormalizeDirectory('$(PkgMicrosoft_NET_ILLink_Tasks)', 'tools'))
$(ILLinkTasksDir)netcoreapp3.0/ILLink.Tasks.dll
$(ILLinkTasksDir)$(NetFrameworkCurrent)/ILLink.Tasks.dll
$(IntermediateOutputPath)$(TargetName)$(TargetExt)
@@ -29,6 +29,8 @@
$(IntermediateOutputPath)
$(MSBuildProjectDirectory)/ILLinkTrim.xml
+
+ $(MSBuildProjectDirectory)/ILLinkTrim_LibraryBuild.xml
true
@@ -40,6 +42,10 @@
+
+
+
@@ -87,7 +93,9 @@
$(ILLinkArgs) -v true
- $(ILLinkArgs) --strip-resources false
+ $(ILLinkArgs) --strip-descriptors false
+
+ $(ILLinkArgs) -x "$(ILLinkTrimXmlLibraryBuild)"
$(ILLinkArgs) --skip-unresolved true
diff --git a/eng/install-native-dependencies.sh b/eng/install-native-dependencies.sh
old mode 100644
new mode 100755
index 9670ae590314cd..00be5a6287289f
--- a/eng/install-native-dependencies.sh
+++ b/eng/install-native-dependencies.sh
@@ -1,4 +1,4 @@
-#!/usr/bin/env sh
+#!/usr/bin/env bash
if [ "$1" = "Linux" ]; then
sudo apt update
@@ -9,37 +9,9 @@ if [ "$1" = "Linux" ]; then
if [ "$?" != "0" ]; then
exit 1;
fi
-elif [ "$1" = "OSX" ]; then
- brew update
- brew upgrade
- if [ "$?" != "0" ]; then
- exit 1;
- fi
- brew install icu4c openssl autoconf automake libtool pkg-config python3
- if [ "$?" != "0" ]; then
- exit 1;
- fi
- brew link --force icu4c
- if [ "$?" != "0" ]; then
- exit 1;
- fi
-elif [ "$1" = "tvOS" ]; then
- brew update
- brew upgrade
- if [ "$?" != "0" ]; then
- exit 1;
- fi
- brew install openssl autoconf automake libtool pkg-config python3
- if [ "$?" != "0" ]; then
- exit 1;
- fi
-elif [ "$1" = "iOS" ]; then
- brew update
- brew upgrade
- if [ "$?" != "0" ]; then
- exit 1;
- fi
- brew install openssl autoconf automake libtool pkg-config python3
+elif [ "$1" = "OSX" ] || [ "$1" = "tvOS" ] || [ "$1" = "iOS" ]; then
+ engdir=$(dirname "${BASH_SOURCE[0]}")
+ brew bundle --no-lock --file "${engdir}/Brewfile"
if [ "$?" != "0" ]; then
exit 1;
fi
diff --git a/eng/liveBuilds.targets b/eng/liveBuilds.targets
index e01739925eb8ea..42cae8568797aa 100644
--- a/eng/liveBuilds.targets
+++ b/eng/liveBuilds.targets
@@ -76,11 +76,12 @@
x64
x86
x64
+ x64
-
$([MSBuild]::NormalizeDirectory('$(CoreCLRArtifactsPath)'))
@@ -133,18 +134,18 @@
true
-
-
-
-
diff --git a/eng/native/build-commons.sh b/eng/native/build-commons.sh
index a1a975ce177348..c231a01d429570 100755
--- a/eng/native/build-commons.sh
+++ b/eng/native/build-commons.sh
@@ -53,10 +53,23 @@ check_prereqs()
function version { echo "$@" | awk -F. '{ printf("%d%02d%02d\n", $1,$2,$3); }'; }
- local cmake_version="$(cmake --version | awk '/^cmake version [0-9]+\.[0-9]+\.[0-9]+$/ {print $3}')"
+ local cmake_version="$(cmake --version | awk '/^cmake.* version [0-9]+\.[0-9]+\.[0-9]+$/ {print $3}')"
if [[ "$(version "$cmake_version")" -lt "$(version 3.14.2)" ]]; then
- echo "Please install CMake 3.14.2 or newer from http://www.cmake.org/download/ or https://apt.kitware.com and ensure it is on your path."; exit 1;
+ echo "Please install CMake 3.14.2 or newer from https://cmake.org/download/ or https://apt.kitware.com and ensure it is on your path."; exit 1;
+ fi
+
+ if [[ "$__HostOS" == "OSX" ]]; then
+ # Check presence of pkg-config on the path
+ command -v pkg-config 2>/dev/null || { echo >&2 "Please install pkg-config before running this script, see https://github.com/dotnet/runtime/blob/master/docs/workflow/requirements/macos-requirements.md"; exit 1; }
+
+ if ! pkg-config openssl ; then
+ # We export the proper PKG_CONFIG_PATH where openssl was installed by Homebrew
+ # It's important to _export_ it since build-commons.sh is sourced by other scripts such as build-native.sh
+ export PKG_CONFIG_PATH=/usr/local/opt/openssl/lib/pkgconfig
+ # We try again with the PKG_CONFIG_PATH in place, if pkg-config still can't find OpenSSL, exit with an error, cmake won't find OpenSSL either
+ pkg-config openssl || { echo >&2 "Please install openssl before running this script, see https://github.com/dotnet/runtime/blob/master/docs/workflow/requirements/macos-requirements.md"; exit 1; }
+ fi
fi
if [[ "$__UseNinja" == 1 ]]; then
@@ -82,6 +95,7 @@ build_native()
buildTool="make"
fi
+ runtimeVersionHeaderFile="$intermediatesDir/../runtime_version.h"
if [[ "$__SkipConfigure" == 0 ]]; then
# if msbuild is not supported, then set __SkipGenerateVersion to 1
if [[ "$__IsMSBuildOnNETCoreSupported" == 0 ]]; then __SkipGenerateVersion=1; fi
@@ -95,7 +109,8 @@ build_native()
if [[ "$__SkipGenerateVersion" == 0 ]]; then
"$__RepoRootDir/eng/common/msbuild.sh" /clp:nosummary "$__ArcadeScriptArgs" "$__RepoRootDir"/eng/empty.csproj \
/p:NativeVersionFile="$__versionSourceFile" \
- /t:GenerateNativeVersionFile /restore \
+ /p:RuntimeVersionFile="$runtimeVersionHeaderFile" \
+ /t:GenerateRuntimeVersionFile /restore \
$__CommonMSBuildArgs $__binlogArg $__UnprocessedBuildArgs
local exit_code="$?"
if [[ "$exit_code" != 0 ]]; then
@@ -103,12 +118,24 @@ build_native()
exit "$exit_code"
fi
else
- # Generate the dummy version.c, but only if it didn't exist to make sure we don't trigger unnecessary rebuild
+ # Generate the dummy version.c and runtime_version.h, but only if they didn't exist to make sure we don't trigger unnecessary rebuild
__versionSourceLine="static char sccsid[] __attribute__((used)) = \"@(#)No version information produced\";"
if [[ -e "$__versionSourceFile" ]]; then
read existingVersionSourceLine < "$__versionSourceFile"
fi
if [[ "$__versionSourceLine" != "$existingVersionSourceLine" ]]; then
+ cat << EOF > $runtimeVersionHeaderFile
+#define RuntimeAssemblyMajorVersion 0
+#define RuntimeAssemblyMinorVersion 0
+#define RuntimeFileMajorVersion 0
+#define RuntimeFileMinorVersion 0
+#define RuntimeFileBuildVersion 0
+#define RuntimeFileRevisionVersion 0
+#define RuntimeProductMajorVersion 0
+#define RuntimeProductMinorVersion 0
+#define RuntimeProductPatchVersion 0
+#define RuntimeProductVersion
+EOF
echo "$__versionSourceLine" > "$__versionSourceFile"
fi
fi
@@ -382,7 +409,7 @@ done
# Get the number of processors available to the scheduler
# Other techniques such as `nproc` only get the number of
# processors available to a single process.
-platform=$(uname)
+platform="$(uname)"
if [[ "$platform" == "FreeBSD" ]]; then
__NumProc=$(sysctl hw.ncpu | awk '{ print $2+1 }')
elif [[ "$platform" == "NetBSD" || "$platform" == "SunOS" ]]; then
diff --git a/eng/native/configurecompiler.cmake b/eng/native/configurecompiler.cmake
index 2937916ced91b2..a6e6ba45808d2c 100644
--- a/eng/native/configurecompiler.cmake
+++ b/eng/native/configurecompiler.cmake
@@ -183,10 +183,10 @@ elseif(CLR_CMAKE_HOST_FREEBSD)
add_compile_options($<$:-Wa,--noexecstack>)
add_link_options(LINKER:--build-id=sha1)
elseif(CLR_CMAKE_HOST_SUNOS)
- set(CMAKE_INCLUDE_PATH ${CMAKE_INCLUDE_PATH} /opt/local/include)
- set(CMAKE_LIBRARY_PATH ${CMAKE_LIBRARY_PATH} /opt/local/lib)
+ add_compile_options($<$:-Wa,--noexecstack>)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fstack-protector")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fstack-protector")
+ add_definitions(-D__EXTENSIONS__)
endif()
#------------------------------------
@@ -227,15 +227,13 @@ if (CLR_CMAKE_HOST_UNIX)
if(CLR_CMAKE_HOST_OSX)
message("Detected OSX x86_64")
- endif(CLR_CMAKE_HOST_OSX)
-
- if(CLR_CMAKE_HOST_FREEBSD)
+ elseif(CLR_CMAKE_HOST_FREEBSD)
message("Detected FreeBSD amd64")
- endif(CLR_CMAKE_HOST_FREEBSD)
-
- if(CLR_CMAKE_HOST_NETBSD)
+ elseif(CLR_CMAKE_HOST_NETBSD)
message("Detected NetBSD amd64")
- endif(CLR_CMAKE_HOST_NETBSD)
+ elseif(CLR_CMAKE_HOST_SUNOS)
+ message("Detected SunOS amd64")
+ endif(CLR_CMAKE_HOST_OSX)
endif(CLR_CMAKE_HOST_UNIX)
if (CLR_CMAKE_HOST_WIN32)
@@ -367,17 +365,15 @@ if(CLR_CMAKE_TARGET_UNIX)
add_definitions(-DDISABLE_CONTRACTS)
if(CLR_CMAKE_TARGET_OSX)
add_definitions(-DTARGET_OSX)
- endif(CLR_CMAKE_TARGET_OSX)
- if(CLR_CMAKE_TARGET_FREEBSD)
+ elseif(CLR_CMAKE_TARGET_FREEBSD)
add_definitions(-DTARGET_FREEBSD)
- endif(CLR_CMAKE_TARGET_FREEBSD)
- if(CLR_CMAKE_TARGET_LINUX)
+ elseif(CLR_CMAKE_TARGET_LINUX)
add_definitions(-DTARGET_LINUX)
- endif(CLR_CMAKE_TARGET_LINUX)
- if(CLR_CMAKE_TARGET_NETBSD)
+ elseif(CLR_CMAKE_TARGET_NETBSD)
add_definitions(-DTARGET_NETBSD)
- endif(CLR_CMAKE_TARGET_NETBSD)
- if(CLR_CMAKE_TARGET_ANDROID)
+ elseif(CLR_CMAKE_TARGET_SUNOS)
+ add_definitions(-DTARGET_SUNOS)
+ elseif(CLR_CMAKE_TARGET_ANDROID)
add_definitions(-DTARGET_ANDROID)
endif()
else(CLR_CMAKE_TARGET_UNIX)
diff --git a/eng/native/configureplatform.cmake b/eng/native/configureplatform.cmake
index 1c5254d84965a8..04fdfaed45a99d 100644
--- a/eng/native/configureplatform.cmake
+++ b/eng/native/configureplatform.cmake
@@ -88,6 +88,8 @@ if(CLR_CMAKE_HOST_OS STREQUAL iOS)
set(CLR_CMAKE_HOST_IOS 1)
if(CMAKE_OSX_ARCHITECTURES MATCHES "x86_64")
set(CLR_CMAKE_HOST_UNIX_AMD64 1)
+ elseif(CMAKE_OSX_ARCHITECTURES MATCHES "i386")
+ set(CLR_CMAKE_HOST_UNIX_X86 1)
elseif(CMAKE_OSX_ARCHITECTURES MATCHES "armv7")
set(CLR_CMAKE_HOST_UNIX_ARM 1)
elseif(CMAKE_OSX_ARCHITECTURES MATCHES "arm64")
@@ -168,6 +170,7 @@ endif(CLR_CMAKE_HOST_OS STREQUAL Windows)
if(CLR_CMAKE_HOST_OS STREQUAL Emscripten)
#set(CLR_CMAKE_HOST_UNIX 1) # TODO: this should be reenabled but it activates a bunch of additional compiler flags in configurecompiler.cmake
set(CLR_CMAKE_HOST_UNIX_WASM 1)
+ set(CLR_CMAKE_HOST_BROWSER 1)
endif(CLR_CMAKE_HOST_OS STREQUAL Emscripten)
#--------------------------------------------
@@ -315,7 +318,7 @@ endif(CLR_CMAKE_TARGET_OS STREQUAL SunOS)
if(CLR_CMAKE_TARGET_OS STREQUAL Emscripten)
set(CLR_CMAKE_TARGET_UNIX 1)
set(CLR_CMAKE_TARGET_LINUX 1)
- set(CLR_CMAKE_TARGET_EMSCRIPTEN 1)
+ set(CLR_CMAKE_TARGET_BROWSER 1)
endif(CLR_CMAKE_TARGET_OS STREQUAL Emscripten)
if(CLR_CMAKE_TARGET_UNIX)
@@ -357,7 +360,7 @@ else()
endif()
endif()
-if(NOT CLR_CMAKE_TARGET_EMSCRIPTEN)
+if(NOT CLR_CMAKE_TARGET_BROWSER)
# Skip check_pie_supported call on Android as ld from llvm toolchain with NDK API level 21
# complains about missing linker flag `-no-pie` (while level 28's ld does support this flag,
# but since we know that PIE is supported, we can safely skip this redundant check).
diff --git a/eng/native/configuretools.cmake b/eng/native/configuretools.cmake
index b63ab0f1a66d5a..4fb94531d76987 100644
--- a/eng/native/configuretools.cmake
+++ b/eng/native/configuretools.cmake
@@ -6,7 +6,7 @@ if (CMAKE_C_COMPILER MATCHES "-?[0-9]+(\.[0-9]+)?$")
set(CLR_CMAKE_COMPILER_FILE_NAME_VERSION "${CMAKE_MATCH_0}")
endif()
-if(NOT WIN32 AND NOT CLR_CMAKE_TARGET_ARCH_WASM)
+if(NOT WIN32 AND NOT CLR_CMAKE_TARGET_BROWSER)
if(CMAKE_CXX_COMPILER_ID MATCHES "Clang")
if(APPLE)
set(TOOLSET_PREFIX "")
diff --git a/eng/native/functions.cmake b/eng/native/functions.cmake
index 9a5014917ec61c..49b0064499eb42 100644
--- a/eng/native/functions.cmake
+++ b/eng/native/functions.cmake
@@ -175,8 +175,8 @@ function(generate_exports_file)
add_custom_command(
OUTPUT ${outputFilename}
- COMMAND ${AWK} -f ${CMAKE_SOURCE_DIR}/${AWK_SCRIPT} ${INPUT_LIST} >${outputFilename}
- DEPENDS ${INPUT_LIST} ${CMAKE_SOURCE_DIR}/${AWK_SCRIPT}
+ COMMAND ${AWK} -f ${CLR_ENG_NATIVE_DIR}/${AWK_SCRIPT} ${INPUT_LIST} >${outputFilename}
+ DEPENDS ${INPUT_LIST} ${CLR_ENG_NATIVE_DIR}/${AWK_SCRIPT}
COMMENT "Generating exports file ${outputFilename}"
)
set_source_files_properties(${outputFilename}
@@ -196,8 +196,8 @@ function(generate_exports_file_prefix inputFilename outputFilename prefix)
add_custom_command(
OUTPUT ${outputFilename}
- COMMAND ${AWK} -f ${CMAKE_SOURCE_DIR}/${AWK_SCRIPT} ${AWK_VARS} ${inputFilename} >${outputFilename}
- DEPENDS ${inputFilename} ${CMAKE_SOURCE_DIR}/${AWK_SCRIPT}
+ COMMAND ${AWK} -f ${CLR_ENG_NATIVE_DIR}/${AWK_SCRIPT} ${AWK_VARS} ${inputFilename} >${outputFilename}
+ DEPENDS ${inputFilename} ${CLR_ENG_NATIVE_DIR}/${AWK_SCRIPT}
COMMENT "Generating exports file ${outputFilename}"
)
set_source_files_properties(${outputFilename}
@@ -268,13 +268,20 @@ function(strip_symbols targetName outputFilename)
message(FATAL_ERROR "strip not found")
endif()
+ string(TOLOWER "${CMAKE_BUILD_TYPE}" LOWERCASE_CMAKE_BUILD_TYPE)
+ if (LOWERCASE_CMAKE_BUILD_TYPE STREQUAL release)
+ set(strip_command ${STRIP} -S ${strip_source_file})
+ else ()
+ set(strip_command)
+ endif ()
+
add_custom_command(
TARGET ${targetName}
POST_BUILD
VERBATIM
COMMAND ${DSYMUTIL} --flat --minimize ${strip_source_file}
- COMMAND ${STRIP} -S ${strip_source_file}
- COMMENT Stripping symbols from ${strip_source_file} into file ${strip_destination_file}
+ COMMAND ${strip_command}
+ COMMENT "Stripping symbols from ${strip_source_file} into file ${strip_destination_file}"
)
else (CLR_CMAKE_TARGET_OSX OR CLR_CMAKE_TARGET_IOS OR CLR_CMAKE_TARGET_TVOS)
set(strip_destination_file ${strip_source_file}.dbg)
@@ -286,7 +293,7 @@ function(strip_symbols targetName outputFilename)
COMMAND ${CMAKE_OBJCOPY} --only-keep-debug ${strip_source_file} ${strip_destination_file}
COMMAND ${CMAKE_OBJCOPY} --strip-debug ${strip_source_file}
COMMAND ${CMAKE_OBJCOPY} --add-gnu-debuglink=${strip_destination_file} ${strip_source_file}
- COMMENT Stripping symbols from ${strip_source_file} into file ${strip_destination_file}
+ COMMENT "Stripping symbols from ${strip_source_file} into file ${strip_destination_file}"
)
endif (CLR_CMAKE_TARGET_OSX OR CLR_CMAKE_TARGET_IOS OR CLR_CMAKE_TARGET_TVOS)
@@ -338,7 +345,7 @@ function(install_clr)
if (NOT DEFINED CLR_CROSS_COMPONENTS_LIST OR NOT ${INDEX} EQUAL -1)
strip_symbols(${targetName} symbol_file)
- foreach(destination in ${destinations})
+ foreach(destination ${destinations})
# We don't need to install the export libraries for our DLLs
# since they won't be directly linked against.
install(PROGRAMS $ DESTINATION ${destination})
@@ -415,3 +422,28 @@ endfunction()
function(add_executable_clr)
_add_executable(${ARGV})
endfunction()
+
+function(generate_module_index Target ModuleIndexFile)
+ if(CLR_CMAKE_HOST_WIN32)
+ set(scriptExt ".cmd")
+ else()
+ set(scriptExt ".sh")
+ endif()
+
+ add_custom_command(
+ OUTPUT ${ModuleIndexFile}
+ COMMAND ${CLR_ENG_NATIVE_DIR}/genmoduleindex${scriptExt} $ ${ModuleIndexFile}
+ DEPENDS ${Target}
+ COMMENT "Generating ${Target} module index file -> ${ModuleIndexFile}"
+ )
+
+ set_source_files_properties(
+ ${ModuleIndexFile}
+ PROPERTIES GENERATED TRUE
+ )
+
+ add_custom_target(
+ ${Target}_module_index_header
+ DEPENDS ${ModuleIndexFile}
+ )
+endfunction(generate_module_index)
diff --git a/src/coreclr/generateexportedsymbols.awk b/eng/native/generateexportedsymbols.awk
similarity index 100%
rename from src/coreclr/generateexportedsymbols.awk
rename to eng/native/generateexportedsymbols.awk
diff --git a/src/coreclr/generateversionscript.awk b/eng/native/generateversionscript.awk
similarity index 100%
rename from src/coreclr/generateversionscript.awk
rename to eng/native/generateversionscript.awk
diff --git a/eng/native/genmoduleindex.cmd b/eng/native/genmoduleindex.cmd
new file mode 100644
index 00000000000000..a6be851461a695
--- /dev/null
+++ b/eng/native/genmoduleindex.cmd
@@ -0,0 +1,25 @@
+@echo off
+REM Generate module index header
+
+if [%1]==[] goto :Usage
+if [%2]==[] goto :Usage
+
+setlocal
+for /f "tokens=1" %%i in ('dumpbin /HEADERS %1 ^| findstr /c:"size of image"') do set imagesize=%%i
+REM Pad the extracted size to 8 hex digits
+set imagesize=00000000%imagesize%
+set imagesize=%imagesize:~-8%
+
+for /f "tokens=1" %%i in ('dumpbin /HEADERS %1 ^| findstr /c:"time date"') do set timestamp=%%i
+REM Pad the extracted time stamp to 8 hex digits
+set timestamp=00000000%timestamp%
+set timestamp=%timestamp:~-8%
+
+echo 0x08, 0x%timestamp:~6,2%, 0x%timestamp:~4,2%, 0x%timestamp:~2,2%, 0x%timestamp:~0,2%, 0x%imagesize:~6,2%, 0x%imagesize:~4,2%, 0x%imagesize:~2,2%, 0x%imagesize:~0,2%, > %2
+
+endlocal
+exit /b 0
+
+:Usage
+echo Usage: genmoduleindex.cmd ModuleBinaryFile IndexHeaderFile
+exit /b 1
diff --git a/eng/native/genmoduleindex.sh b/eng/native/genmoduleindex.sh
new file mode 100755
index 00000000000000..77ead1cc8bd86b
--- /dev/null
+++ b/eng/native/genmoduleindex.sh
@@ -0,0 +1,29 @@
+#!/usr/bin/env bash
+#
+# Generate module index header
+#
+set -euo pipefail
+
+if [[ "$#" -lt 2 ]]; then
+ echo "Usage: genmoduleindex.sh ModuleBinaryFile IndexHeaderFile"
+ exit 1
+fi
+
+OSName=$(uname -s)
+
+case "$OSName" in
+Darwin)
+ # Extract the build id and prefix it with its length in bytes
+ dwarfdump -u $1 |
+ awk '/UUID:/ { gsub(/\-/,"", $2); printf("%02x", length($2)/2); print $2}' |
+ # Convert each byte of the id to 0x prefixed constant followed by comma
+ sed -E s/\(\.\.\)/0x\\1,\ /g > $2
+ ;;
+*)
+ # Extract the build id and prefix it with its length in bytes
+ readelf -n $1 |
+ awk '/Build ID:/ { printf("%02x", length($3)/2); print $3 }' |
+ # Convert each byte of the id to 0x prefixed constant followed by comma
+ sed -E s/\(\.\.\)/0x\\1,\ /g > $2
+ ;;
+esac
diff --git a/eng/native/init-distro-rid.sh b/eng/native/init-distro-rid.sh
index 3c875a3e28b96f..22efd8e8b5423f 100644
--- a/eng/native/init-distro-rid.sh
+++ b/eng/native/init-distro-rid.sh
@@ -137,7 +137,7 @@ initDistroRidGlobal()
initNonPortableDistroRid "${targetOs}" "${buildArch}" "${isPortable}" "${rootfsDir}"
if [ "$buildArch" = "wasm" ]; then
- __DistroRid=WebAssembly-wasm
+ __DistroRid=browser-wasm
export __DistroRid
fi
@@ -165,6 +165,8 @@ initDistroRidGlobal()
distroRid="ios-$buildArch"
elif [ "$targetOs" = "Android" ]; then
distroRid="android-$buildArch"
+ elif [ "$targetOs" = "Browser" ]; then
+ distroRid="browser-$buildArch"
elif [ "$targetOs" = "FreeBSD" ]; then
distroRid="freebsd-$buildArch"
elif [ "$targetOs" = "SunOS" ]; then
diff --git a/eng/notSupported.SourceBuild.targets b/eng/notSupported.SourceBuild.targets
index afbbdd32de4047..743c4a3ace00bc 100644
--- a/eng/notSupported.SourceBuild.targets
+++ b/eng/notSupported.SourceBuild.targets
@@ -3,7 +3,11 @@
BeforeTargets="BeforeCompile"
Condition="'$(DotNetBuildFromSource)' == 'true' and
('$(GeneratePlatformNotSupportedAssembly)' == 'true' or '$(GeneratePlatformNotSupportedAssemblyMessage)' != '')">
-
+
+
+ $(IntermediateOutputPath)
+
+
-
+
diff --git a/eng/pipelines/common/global-build-job.yml b/eng/pipelines/common/global-build-job.yml
index b5140477a7f35d..29071209e79dc1 100644
--- a/eng/pipelines/common/global-build-job.yml
+++ b/eng/pipelines/common/global-build-job.yml
@@ -25,22 +25,27 @@ jobs:
variables: ${{ parameters.variables }}
steps:
- - ${{ if eq(parameters.osGroup, 'OSX') }}:
- - script: |
- $(setScriptToEchoAndFailOnNonZero)
- brew install pkgconfig icu4c openssl autoconf automake libtool pkg-config python3
- brew link --force icu4c
- ln -s /usr/local/opt/openssl/lib/pkgconfig/libcrypto.pc /usr/local/lib/pkgconfig/
- ln -s /usr/local/opt/openssl/lib/pkgconfig/libssl.pc /usr/local/lib/pkgconfig/
- ln -s /usr/local/opt/openssl/lib/pkgconfig/openssl.pc /usr/local/lib/pkgconfig/
+ - template: /eng/pipelines/common/clone-checkout-bundle-step.yml
+
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS', 'tvOS') }}:
+ - script: $(Build.SourcesDirectory)/eng/install-native-dependencies.sh ${{ parameters.osGroup }}
displayName: Install Build Dependencies
- - template: /eng/pipelines/common/clone-checkout-bundle-step.yml
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
# Build
- script: $(Build.SourcesDirectory)$(dir)build$(scriptExt) -ci -arch ${{ parameters.archType }} ${{ parameters.buildArgs }}
displayName: Build product
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
- task: PublishBuildArtifacts@1
displayName: Publish Logs
inputs:
diff --git a/eng/pipelines/common/platform-matrix.yml b/eng/pipelines/common/platform-matrix.yml
index fe0765b81050e3..2979349d8beca7 100644
--- a/eng/pipelines/common/platform-matrix.yml
+++ b/eng/pipelines/common/platform-matrix.yml
@@ -38,7 +38,7 @@ jobs:
archType: arm
platform: Linux_arm
container:
- image: ubuntu-16.04-cross-09ec757-20200320131433
+ image: ubuntu-16.04-cross-20200413125008-09ec757
registry: mcr
jobParameters:
runtimeFlavor: ${{ parameters.runtimeFlavor }}
@@ -62,7 +62,7 @@ jobs:
archType: arm64
platform: Linux_arm64
container:
- image: ubuntu-16.04-cross-arm64-cfdd435-20200121150126
+ image: ubuntu-16.04-cross-arm64-20200413125008-cfdd435
registry: mcr
jobParameters:
runtimeFlavor: ${{ parameters.runtimeFlavor }}
@@ -119,7 +119,7 @@ jobs:
archType: arm64
platform: Linux_musl_arm64
container:
- image: ubuntu-16.04-cross-arm64-alpine-406629a-20200127195039
+ image: ubuntu-16.04-cross-arm64-alpine-20200413125008-406629a
registry: mcr
jobParameters:
runtimeFlavor: ${{ parameters.runtimeFlavor }}
@@ -160,14 +160,14 @@ jobs:
# WebAssembly
-- ${{ if containsValue(parameters.platforms, 'WebAssembly_wasm') }}:
+- ${{ if containsValue(parameters.platforms, 'Browser_wasm') }}:
- template: xplat-setup.yml
parameters:
jobTemplate: ${{ parameters.jobTemplate }}
helixQueuesTemplate: ${{ parameters.helixQueuesTemplate }}
- osGroup: WebAssembly
+ osGroup: Browser
archType: wasm
- platform: WebAssembly_wasm
+ platform: Browser_wasm
container:
image: ubuntu-18.04-webassembly-20200409132031-f70ea41
registry: mcr
@@ -180,23 +180,25 @@ jobs:
${{ insert }}: ${{ parameters.jobParameters }}
# FreeBSD
-
-# FreeBSD machines are currently offline. Re-enable in the official build when
-# the machines are healthy.
-
-# - template: xplat-setup.yml
-# parameters:
-# jobTemplate: ${{ parameters.jobTemplate }}
-# osGroup: FreeBSD
-# archType: x64
-# jobParameters:
-# runtimeFlavor: ${{ parameters.runtimeFlavor }}
-# buildConfig: ${{ parameters.buildConfig }}
-# # There are no FreeBSD helix queues, so we don't run tests at the moment.
-# helixQueues:
-# asString: ''
-# asArray: []
-# ${{ insert }}: ${{ parameters.jobParameters }}
+- ${{ if containsValue(parameters.platforms, 'FreeBSD_x64') }}:
+ - template: xplat-setup.yml
+ parameters:
+ jobTemplate: ${{ parameters.jobTemplate }}
+ helixQueuesTemplate: ${{ parameters.helixQueuesTemplate }}
+ osGroup: FreeBSD
+ archType: x64
+ platform: FreeBSD_x64
+ container:
+ image: ubuntu-18.04-cross-freebsd-11-20200407092345-a84b0d2
+ registry: mcr
+ jobParameters:
+ runtimeFlavor: ${{ parameters.runtimeFlavor }}
+ buildConfig: ${{ parameters.buildConfig }}
+ helixQueueGroup: ${{ parameters.helixQueueGroup }}
+ crossrootfsDir: '/crossrootfs/x64'
+ ${{ if eq(parameters.passPlatforms, true) }}:
+ platforms: ${{ parameters.platforms }}
+ ${{ insert }}: ${{ parameters.jobParameters }}
# Android x64
@@ -209,7 +211,7 @@ jobs:
archType: x64
platform: Android_x64
container:
- image: ubuntu-18.04-android-20200401093035-1517ea2
+ image: ubuntu-18.04-android-20200422191843-e2c3f83
registry: mcr
jobParameters:
runtimeFlavor: mono
@@ -231,7 +233,7 @@ jobs:
archType: x86
platform: Android_x86
container:
- image: ubuntu-18.04-android-20200401093035-1517ea2
+ image: ubuntu-18.04-android-20200422191843-e2c3f83
registry: mcr
jobParameters:
runtimeFlavor: mono
@@ -253,7 +255,7 @@ jobs:
archType: arm
platform: Android_arm
container:
- image: ubuntu-18.04-android-20200401093035-1517ea2
+ image: ubuntu-18.04-android-20200422191843-e2c3f83
registry: mcr
jobParameters:
runtimeFlavor: mono
@@ -275,7 +277,7 @@ jobs:
archType: arm64
platform: Android_arm64
container:
- image: ubuntu-18.04-android-20200401093035-1517ea2
+ image: ubuntu-18.04-android-20200422191843-e2c3f83
registry: mcr
jobParameters:
runtimeFlavor: mono
@@ -346,6 +348,26 @@ jobs:
managedTestBuildOsGroup: OSX
${{ insert }}: ${{ parameters.jobParameters }}
+# iOS x86
+
+- ${{ if containsValue(parameters.platforms, 'iOS_x86') }}:
+ - template: xplat-setup.yml
+ parameters:
+ jobTemplate: ${{ parameters.jobTemplate }}
+ helixQueuesTemplate: ${{ parameters.helixQueuesTemplate }}
+ osGroup: iOS
+ archType: x86
+ platform: iOS_x86
+ jobParameters:
+ runtimeFlavor: mono
+ stagedBuild: ${{ parameters.stagedBuild }}
+ buildConfig: ${{ parameters.buildConfig }}
+ ${{ if eq(parameters.passPlatforms, true) }}:
+ platforms: ${{ parameters.platforms }}
+ helixQueueGroup: ${{ parameters.helixQueueGroup }}
+ managedTestBuildOsGroup: OSX
+ ${{ insert }}: ${{ parameters.jobParameters }}
+
# iOS arm
- ${{ if containsValue(parameters.platforms, 'iOS_arm') }}:
diff --git a/eng/pipelines/common/templates/runtimes/build-test-job.yml b/eng/pipelines/common/templates/runtimes/build-test-job.yml
new file mode 100644
index 00000000000000..6c46cfadeb0c4b
--- /dev/null
+++ b/eng/pipelines/common/templates/runtimes/build-test-job.yml
@@ -0,0 +1,162 @@
+parameters:
+ buildConfig: ''
+ archType: ''
+ osGroup: ''
+ osSubgroup: ''
+ container: ''
+ testGroup: ''
+ liveRuntimeBuildConfig: ''
+
+ # When set to a non-empty value (Debug / Release), it determines libraries
+ # build configuration to use for the tests. Setting this property implies
+ # a dependency of this job on the appropriate libraries build and is used
+ # to construct the name of the Azure artifact representing libraries build
+ # to use for building the tests.
+ liveLibrariesBuildConfig: ''
+
+ displayNameArgs: ''
+ condition: true
+ stagedBuild: false
+ variables: {}
+ pool: ''
+ runtimeFlavor: 'coreclr'
+ runtimeFlavorDisplayName: 'CoreCLR'
+ runtimeVariant: ''
+
+### Build managed test components (native components are getting built as part
+### of the the product build job).
+
+### TODO: As of today, build of managed test components requires the product build
+### as a prerequisite due to dependency on System.Private.Corelib. After switching
+### over to its reference assembly we should be able to remove this dependency and
+### run managed test builds in parallel with the product build job.
+
+
+jobs:
+- template: /eng/pipelines/${{ parameters.runtimeFlavor }}/templates/xplat-pipeline-job.yml
+ parameters:
+ buildConfig: ${{ parameters.buildConfig }}
+ archType: ${{ parameters.archType }}
+ osGroup: ${{ parameters.osGroup }}
+ osSubgroup: ${{ parameters.osSubgroup }}
+ managedTestBuildOsGroup: ${{ parameters.osGroup }}
+ managedTestBuildOsSubgroup: ${{ parameters.osSubgroup }}
+ container: ${{ parameters.container }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
+ testGroup: ${{ parameters.testGroup }}
+ stagedBuild: ${{ parameters.stagedBuild }}
+ liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
+ variables: ${{ parameters.variables }}
+ pool: ${{ parameters.pool }}
+
+ # Test jobs should continue on error for internal builds
+ ${{ if eq(variables['System.TeamProject'], 'internal') }}:
+ continueOnError: true
+
+ ${{ if eq(parameters.testGroup, 'innerloop') }}:
+ name: '${{ parameters.runtimeFlavor }}_common_test_build_p0_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
+ displayName: '${{ parameters.runtimeFlavorDisplayName }} Common Pri0 Test Build ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
+
+ ${{ if ne(parameters.testGroup, 'innerloop') }}:
+ name: '${{ parameters.runtimeFlavor }}_common_test_build_p1_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
+ displayName: '${{ parameters.runtimeFlavorDisplayName }} Common Pri1 Test Build ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
+
+ # Since the condition is being altered, merge the default with the additional conditions.
+ # See https://docs.microsoft.com/azure/devops/pipelines/process/conditions
+ condition: and(succeeded(), ${{ parameters.condition }})
+
+ # TODO: Build of managed test components currently depends on the corresponding build job
+ # because it needs System.Private.Corelib; we should be able to remove this dependency
+ # by switching over to using reference assembly.
+ ${{ if ne(parameters.stagedBuild, true) }}:
+ dependsOn:
+ - ${{ format('coreclr_{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, coalesce(parameters.liveRuntimeBuildConfig, parameters.buildConfig)) }}
+ - ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
+ - ${{ format('libraries_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveLibrariesBuildConfig) }}
+
+
+ ${{ if eq(parameters.testGroup, 'innerloop') }}:
+ timeoutInMinutes: 90
+
+ ${{ if ne(parameters.testGroup, 'innerloop') }}:
+ timeoutInMinutes: 160
+
+ steps:
+
+ # Install test build dependencies
+ - ${{ if eq(parameters.osGroup, 'OSX') }}:
+ - script: $(Build.SourcesDirectory)/eng/install-native-dependencies.sh $(osGroup)
+ displayName: Install native dependencies
+ - ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
+ # Necessary to install correct cmake version
+ - script: $(Build.SourcesDirectory)\eng\common\init-tools-native.cmd -InstallDirectory $(Build.SourcesDirectory)\native-tools -Force
+ displayName: Install native dependencies
+
+
+ # Optionally download live-built libraries
+ - ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
+ - template: /eng/pipelines/common/download-artifact-step.yml
+ parameters:
+ unpackFolder: $(librariesDownloadDir)
+ cleanUnpackFolder: false
+ artifactFileName: '$(librariesBuildArtifactName)$(archiveExtension)'
+ artifactName: '$(librariesBuildArtifactName)'
+ displayName: 'live-built libraries'
+
+ # We need to explictly download CoreCLR, even if building Mono because the CoreCLR tests depend on it
+ - template: /eng/pipelines/common/download-artifact-step.yml
+ parameters:
+ unpackFolder: $(coreClrProductRootFolderPath)
+ artifactFileName: '$(coreClrProductArtifactName)$(archiveExtension)'
+ artifactName: '$(coreClrProductArtifactName)'
+ displayName: 'CoreCLR product build'
+
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
+
+ # Build managed test components
+ - script: $(coreClrRepoRootDir)build-test$(scriptExt) skipnative skipgeneratelayout skiptestwrappers $(buildConfig) $(archType) $(crossArg) $(priorityArg) ci $(librariesOverrideArg)
+ displayName: Build managed test components
+
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
+ # Zip and publish managed test components
+ - template: /eng/pipelines/common/upload-artifact-step.yml
+ parameters:
+ rootFolder: $(managedTestArtifactRootFolderPath)
+ includeRootFolder: false
+ archiveType: $(archiveType)
+ tarCompression: $(tarCompression)
+ archiveExtension: $(archiveExtension)
+ artifactName: $(managedTestArtifactName)
+ displayName: 'managed test components'
+
+
+ # Publish .packages/microsoft.net.sdk.il needed for traversing
+ # test projects during the copynativeonly command in run test job.
+ - template: /eng/pipelines/common/upload-artifact-step.yml
+ parameters:
+ rootFolder: $(microsoftNetSdkIlFolderPath)
+ includeRootFolder: false
+ archiveType: $(archiveType)
+ tarCompression: $(tarCompression)
+ archiveExtension: $(archiveExtension)
+ artifactName: $(microsoftNetSdkIlArtifactName)
+ displayName: 'Microsoft.NET.Sdk.IL package'
+
+
+ # Publish Logs
+ - task: PublishPipelineArtifact@1
+ displayName: Publish Logs
+ inputs:
+ targetPath: $(Build.SourcesDirectory)/artifacts/log
+ artifactName: '${{ parameters.runtimeFlavor }}_Common_Runtime_TestBuildLogs_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)_${{ parameters.testGroup }}'
+ continueOnError: true
+ condition: always()
diff --git a/eng/pipelines/coreclr/templates/run-test-job.yml b/eng/pipelines/common/templates/runtimes/run-test-job.yml
similarity index 81%
rename from eng/pipelines/coreclr/templates/run-test-job.yml
rename to eng/pipelines/common/templates/runtimes/run-test-job.yml
index 4bdb1d38891bf2..a98e8cd1c57cfd 100644
--- a/eng/pipelines/coreclr/templates/run-test-job.yml
+++ b/eng/pipelines/common/templates/runtimes/run-test-job.yml
@@ -11,6 +11,7 @@ parameters:
readyToRun: false
liveLibrariesBuildConfig: ''
crossgen2: false
+ compositeBuildMode: false
helixQueues: ''
# If true, run the corefx tests instead of the coreclr ones
corefxTests: false
@@ -18,8 +19,11 @@ parameters:
stagedBuild: false
displayNameArgs: ''
runInUnloadableContext: false
+ runtimeVariant: ''
variables: {}
pool: ''
+ runtimeFlavor: 'coreclr'
+ runtimeFlavorDisplayName: 'CoreCLR'
### Test run job
@@ -27,7 +31,7 @@ parameters:
### buildConfig and archType.
jobs:
-- template: xplat-pipeline-job.yml
+- template: /eng/pipelines/${{ parameters.runtimeFlavor }}/templates/xplat-pipeline-job.yml
parameters:
buildConfig: ${{ parameters.buildConfig }}
archType: ${{ parameters.archType }}
@@ -42,6 +46,7 @@ jobs:
stagedBuild: ${{ parameters.stagedBuild }}
liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
helixType: 'build/tests/'
+ runtimeVariant: ${{ parameters.runtimeVariant }}
pool: ${{ parameters.pool }}
condition: ${{ parameters.condition }}
@@ -52,22 +57,22 @@ jobs:
dependsOn:
- ${{ if ne(parameters.corefxTests, true) }}:
- ${{ if eq(parameters.testGroup, 'innerloop') }}:
- - 'coreclr_test_build_p0_${{ parameters.managedTestBuildOsGroup }}${{ parameters.managedTestBuildOsSubgroup }}_${{ parameters.archType }}_${{parameters.buildConfig }}'
+ - '${{ parameters.runtimeFlavor }}_common_test_build_p0_${{ parameters.managedTestBuildOsGroup }}${{ parameters.managedTestBuildOsSubgroup }}_${{ parameters.archType }}_${{parameters.buildConfig }}'
- ${{ if ne(parameters.testGroup, 'innerloop') }}:
- - 'coreclr_test_build_p1_${{ parameters.managedTestBuildOsGroup }}${{ parameters.managedTestBuildOsSubgroup }}_${{ parameters.archType }}_${{parameters.buildConfig }}'
+ - '${{ parameters.runtimeFlavor }}_common_test_build_p1_${{ parameters.managedTestBuildOsGroup }}${{ parameters.managedTestBuildOsSubgroup }}_${{ parameters.archType }}_${{parameters.buildConfig }}'
- ${{ if ne(parameters.stagedBuild, true) }}:
- - ${{ format('coreclr_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ - ${{ format('{0}_{1}_product_build_{2}{3}_{4}_{5}', parameters.runtimeFlavor, parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- ${{ format('libraries_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveLibrariesBuildConfig) }}
# Compute job name from template parameters
${{ if eq(parameters.testGroup, 'innerloop') }}:
- name: 'run_test_p0_${{ parameters.displayNameArgs }}_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
- displayName: 'CoreCLR Pri0 Test Run ${{ parameters.displayNameArgs }} ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
+ name: 'run_test_p0_${{ parameters.runtimeFlavor }}${{ parameters.runtimeVariant }}_${{ parameters.displayNameArgs }}_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
+ displayName: '${{ parameters.runtimeFlavorDisplayName }} ${{ parameters.runtimeVariant}} Pri0 Runtime Tests Run ${{ parameters.displayNameArgs }} ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
${{ if ne(parameters.testGroup, 'innerloop') }}:
name: 'run_test_p1_${{ parameters.displayNameArgs }}_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
- displayName: 'CoreCLR Pri1 Test Run ${{ parameters.displayNameArgs }} ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
+ displayName: '${{ parameters.runtimeFlavorDisplayName }} ${{ parameters.runtimeVariant }} Pri1 Runtime Tests Run ${{ parameters.displayNameArgs }} ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
variables:
- name: testhostArg
@@ -76,6 +81,13 @@ jobs:
- name: testhostArg
value: 'buildtesthostonly'
+ - name: runtimeFlavorArgs
+ value: ''
+
+ - ${{ if eq(parameters.runtimeFlavor, 'mono') }}:
+ - name: runtimeFlavorArgs
+ value: '-excludemonofailures'
+
- name: crossgenArg
value: ''
- name: LogNamePrefix
@@ -91,6 +103,9 @@ jobs:
value: 'crossgen2'
- name: LogNamePrefix
value: TestRunLogs_R2R_CG2
+ - ${{ if eq(parameters.compositeBuildMode, true) }}:
+ - name: crossgenArg
+ value: 'composite'
# Set job timeouts
#
@@ -141,6 +156,10 @@ jobs:
- name: timeoutPerTestInMinutes
value: 90
+ - ${{ if eq(parameters.compositeBuildMode, true) }}:
+ - name: crossgenArg
+ value: 'composite'
+
- ${{ if eq(variables['System.TeamProject'], 'internal') }}:
- group: DotNet-HelixApi-Access
@@ -148,7 +167,7 @@ jobs:
# TODO: update these numbers as they were determined long ago
${{ if eq(parameters.testGroup, 'innerloop') }}:
- timeoutInMinutes: 150
+ timeoutInMinutes: 200
${{ if in(parameters.testGroup, 'outerloop', 'jit-experimental') }}:
timeoutInMinutes: 270
${{ if in(parameters.testGroup, 'gc-longrunning', 'gc-simulator') }}:
@@ -190,6 +209,15 @@ jobs:
displayName: 'product build'
+ - ${{ if eq(parameters.runtimeFlavor, 'mono') }}:
+ # We need to explictly download CoreCLR for Mono
+ - template: /eng/pipelines/common/download-artifact-step.yml
+ parameters:
+ unpackFolder: $(coreClrProductRootFolderPath)
+ artifactFileName: '$(coreClrProductArtifactName)$(archiveExtension)'
+ artifactName: '$(coreClrProductArtifactName)'
+ displayName: 'CoreCLR product download for Mono'
+
# Download and unzip the Microsoft.NET.Sdk.IL package needed for traversing
# ilproj test projects during copynativeonly.
- ${{ if ne(parameters.corefxTests, true) }}:
@@ -227,8 +255,8 @@ jobs:
displayName: Generate test host
- # Generate test wrappers
- - script: $(coreClrRepoRootDir)build-test$(scriptExt) buildtestwrappersonly $(crossgenArg) $(buildConfig) $(archType) $(crossArg) $(priorityArg) $(librariesOverrideArg)
+ # Generate test wrappers. This is the step that examines issues.targets to exclude tests.
+ - script: $(coreClrRepoRootDir)build-test$(scriptExt) buildtestwrappersonly $(runtimeFlavorArgs) $(crossgenArg) $(buildConfig) $(archType) $(crossArg) $(priorityArg) $(librariesOverrideArg)
displayName: Generate test wrappers
@@ -237,15 +265,25 @@ jobs:
- script: $(coreClrRepoRootDir)build-test$(scriptExt) skipmanaged skipnative $(crossgenArg) $(buildConfig) $(archType) $(crossArg) $(priorityArg) $(librariesOverrideArg)
displayName: Crossgen framework assemblies
+ # Overwrite coreclr runtime binaries with mono ones
+ - ${{ if eq(parameters.runtimeFlavor, 'mono') }}:
+ - script: $(_msbuildCommand)
+ $(Build.SourcesDirectory)/src/mono/mono.proj
+ /t:PatchCoreClrCoreRoot
+ /p:Configuration=$(buildConfigUpper)
+ /p:TargetArchitecture=$(archType)
+ displayName: "Patch dotnet with mono"
# Send tests to Helix
- - template: /eng/pipelines/coreclr/templates/send-to-helix-step.yml
+ - template: /eng/pipelines/common/templates/runtimes/send-to-helix-step.yml
parameters:
displayName: Send tests to Helix
buildConfig: $(buildConfigUpper)
archType: ${{ parameters.archType }}
osGroup: ${{ parameters.osGroup }}
+ osSubgroup: ${{ parameters.osSubgroup}}
coreClrRepoRoot: $(coreClrRepoRoot)
+ runtimeFlavorDisplayName: ${{ parameters.runtimeFlavorDisplayName }}
${{ if eq(variables['System.TeamProject'], 'public') }}:
creator: $(Build.DefinitionName)
@@ -277,6 +315,7 @@ jobs:
runCrossGen: ${{ and(eq(parameters.readyToRun, true), ne(parameters.crossgen2, true)) }}
runCrossGen2: ${{ and(eq(parameters.readyToRun, true), eq(parameters.crossgen2, true)) }}
+ compositeBuildMode: ${{ parameters.compositeBuildMode }}
runInUnloadableContext: ${{ parameters.runInUnloadableContext }}
${{ if eq(variables['System.TeamProject'], 'internal') }}:
@@ -293,7 +332,10 @@ jobs:
${{ if in(parameters.testGroup, 'innerloop', 'outerloop') }}:
scenarios:
- normal
- - no_tiered_compilation
+ - ${{ if eq(parameters.runtimeFlavor, 'coreclr') }}:
+ - no_tiered_compilation
+ - ${{ if eq(parameters.runtimeFlavor, 'mono') }}:
+ - interpreter
${{ if in(parameters.testGroup, 'jitstress') }}:
scenarios:
- jitminopts
@@ -411,12 +453,13 @@ jobs:
- jitguardeddevirtualization
- jitehwritethru
- jitobjectstackallocation
+ - jitpgo
# Publish Logs
- task: PublishPipelineArtifact@1
displayName: Publish Logs
inputs:
targetPath: $(Build.SourcesDirectory)/artifacts/log
- artifactName: '$(LogNamePrefix)_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)_${{ parameters.testGroup }}'
+ artifactName: '${{ parameters.runtimeFlavor }}_${{ parameters.runtimeVariant }}_$(LogNamePrefix)_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)_${{ parameters.testGroup }}'
continueOnError: true
condition: always()
diff --git a/eng/pipelines/coreclr/templates/send-to-helix-step.yml b/eng/pipelines/common/templates/runtimes/send-to-helix-step.yml
similarity index 87%
rename from eng/pipelines/coreclr/templates/send-to-helix-step.yml
rename to eng/pipelines/common/templates/runtimes/send-to-helix-step.yml
index 7209065b570b5e..3602929653dc36 100644
--- a/eng/pipelines/coreclr/templates/send-to-helix-step.yml
+++ b/eng/pipelines/common/templates/runtimes/send-to-helix-step.yml
@@ -3,6 +3,7 @@ parameters:
condition: ''
archType: ''
osGroup: ''
+ osSubgroup: ''
buildConfig: ''
creator: ''
publishTestResults: ''
@@ -16,11 +17,14 @@ parameters:
timeoutPerTestInMinutes: ''
runCrossGen: ''
runCrossGen2: ''
+ compositeBuildMode: false
helixProjectArguments: ''
runInUnloadableContext: ''
longRunningGcTests: ''
gcSimulatorTests: ''
coreClrRepoRoot: ''
+ runtimeFlavorDisplayName: 'CoreCLR'
+ runtimeVariant: ''
steps:
- ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
@@ -36,7 +40,7 @@ steps:
condition: ${{ parameters.condition }}
env:
__BuildArch: ${{ parameters.archType }}
- __TargetOS: ${{ parameters.osGroup }}
+ __TargetOS: ${{ parameters.osGroup }}${{ parameters.osSubgroup }}
__BuildType: ${{ parameters.buildConfig }}
_Creator: ${{ parameters.creator }}
_PublishTestResults: ${{ parameters.publishTestResults }}
@@ -47,12 +51,15 @@ steps:
_HelixType: ${{ parameters.helixType }}
_RunCrossGen: ${{ parameters.runCrossGen }}
_RunCrossGen2: ${{ parameters.runCrossGen2 }}
+ _CompositeBuildMode: ${{ parameters.compositeBuildMode }}
_RunInUnloadableContext: ${{ parameters.runInUnloadableContext }}
_LongRunningGcTests: ${{ parameters.longRunningGcTests }}
_GcSimulatorTests: ${{ parameters.gcSimulatorTests }}
_Scenarios: ${{ join(',', parameters.scenarios) }}
_TimeoutPerTestCollectionInMinutes: ${{ parameters.timeoutPerTestCollectionInMinutes }}
_TimeoutPerTestInMinutes: ${{ parameters.timeoutPerTestInMinutes }}
+ runtimeFlavorDisplayName: ${{ parameters.runtimeFlavorDisplayName }}
+ _RuntimeVariant: ${{ parameters.runtimeVariant }}
${{ if eq(parameters.publishTestResults, 'true') }}:
SYSTEM_ACCESSTOKEN: $(System.AccessToken)
# TODO: remove NUGET_PACKAGES once https://github.com/dotnet/arcade/issues/1578 is fixed
@@ -75,7 +82,7 @@ steps:
condition: ${{ parameters.condition }}
env:
__BuildArch: ${{ parameters.archType }}
- __TargetOS: ${{ parameters.osGroup }}
+ __TargetOS: ${{ parameters.osGroup }}${{ parameters.osSubgroup }}
__BuildType: ${{ parameters.buildConfig }}
_Creator: ${{ parameters.creator }}
_PublishTestResults: ${{ parameters.publishTestResults }}
@@ -86,12 +93,15 @@ steps:
_HelixType: ${{ parameters.helixType }}
_RunCrossGen: ${{ parameters.runCrossGen }}
_RunCrossGen2: ${{ parameters.runCrossGen2 }}
+ _CompositeBuildMode: ${{ parameters.compositeBuildMode }}
_RunInUnloadableContext: ${{ parameters.runInUnloadableContext }}
_LongRunningGcTests: ${{ parameters.longRunningGcTests }}
_GcSimulatorTests: ${{ parameters.gcSimulatorTests }}
_Scenarios: ${{ join(',', parameters.scenarios) }}
_TimeoutPerTestCollectionInMinutes: ${{ parameters.timeoutPerTestCollectionInMinutes }}
_TimeoutPerTestInMinutes: ${{ parameters.timeoutPerTestInMinutes }}
+ runtimeFlavorDisplayName: ${{ parameters.runtimeFlavorDisplayName }}
+ _RuntimeVariant: ${{ parameters.runtimeVariant }}
${{ if eq(parameters.publishTestResults, 'true') }}:
SYSTEM_ACCESSTOKEN: $(System.AccessToken)
# TODO: remove NUGET_PACKAGES once https://github.com/dotnet/arcade/issues/1578 is fixed
diff --git a/eng/pipelines/common/xplat-setup.yml b/eng/pipelines/common/xplat-setup.yml
index 4467951602b7e7..54da4233adaff3 100644
--- a/eng/pipelines/common/xplat-setup.yml
+++ b/eng/pipelines/common/xplat-setup.yml
@@ -11,6 +11,10 @@ parameters:
jobs:
- template: ${{ coalesce(parameters.helixQueuesTemplate, parameters.jobTemplate) }}
parameters:
+ ${{ if eq(parameters.jobParameters.runtimeFlavor, 'coreclr') }}:
+ runtimeFlavorDisplayName: 'CoreCLR'
+ ${{ if eq(parameters.jobParameters.runtimeFlavor, 'mono') }}:
+ runtimeFlavorDisplayName: 'Mono'
variables:
# Disable component governance in our CI builds. These builds are not shipping nor
# are they a service. Also the component governance jobs issue lots of inconsequential
@@ -64,10 +68,6 @@ jobs:
- name: ROOTFS_DIR
value: ${{ parameters.jobParameters.crossrootfsDir }}
- - ${{ if eq(parameters.osGroup, 'Android') }}:
- - name: ANDROID_NDK_HOME
- value: /usr/local/ndk
-
- name: runtimeFlavorName
${{ if eq(parameters.jobParameters.runtimeFlavor, 'mono') }}:
value: Mono
@@ -88,19 +88,15 @@ jobs:
${{ if eq(parameters.jobParameters.pool, '') }}:
pool:
# Public Linux Build Pool
- ${{ if and(eq(parameters.osGroup, 'Linux'), eq(variables['System.TeamProject'], 'public')) }}:
+ ${{ if and(in(parameters.osGroup, 'Linux', 'FreeBSD'), eq(variables['System.TeamProject'], 'public')) }}:
name: NetCorePublic-Pool
queue: BuildPool.Ubuntu.1604.Amd64.Open
# Official Build Linux Pool
- ${{ if and(eq(parameters.osGroup, 'Linux'), ne(variables['System.TeamProject'], 'public')) }}:
+ ${{ if and(in(parameters.osGroup, 'Linux', 'FreeBSD'), ne(variables['System.TeamProject'], 'public')) }}:
name: NetCoreInternal-Pool
queue: BuildPool.Ubuntu.1604.Amd64
- # FreeBSD builds only in the internal project
- ${{ if and(eq(parameters.osGroup, 'FreeBSD'), ne(variables['System.TeamProject'], 'public')) }}:
- name: dnceng-freebsd-internal
-
# Public OSX Build Pool
${{ if eq(parameters.osGroup, 'OSX') }}:
vmImage: 'macOS-10.14'
diff --git a/eng/pipelines/coreclr/ci.yml b/eng/pipelines/coreclr/ci.yml
index 0249dc33eba230..ec430007258404 100644
--- a/eng/pipelines/coreclr/ci.yml
+++ b/eng/pipelines/coreclr/ci.yml
@@ -8,6 +8,7 @@ trigger:
- '*'
- src/libraries/System.Private.CoreLib/*
exclude:
+ - .github/*
- docs/*
- CODE-OF-CONDUCT.md
- CONTRIBUTING.md
@@ -94,7 +95,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: checked
platforms:
- Linux_arm
@@ -113,7 +114,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platformGroup: all
helixQueueGroup: ci
@@ -127,7 +128,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
- Linux_arm64
diff --git a/eng/pipelines/coreclr/corefx-jitstress.yml b/eng/pipelines/coreclr/corefx-jitstress.yml
index 4ea57cb95ba3d7..07acd4100062a4 100644
--- a/eng/pipelines/coreclr/corefx-jitstress.yml
+++ b/eng/pipelines/coreclr/corefx-jitstress.yml
@@ -33,7 +33,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
# TODO: add Windows_NT_arm64, when we have hardware available. Note: platform-matrix.yml needs to enable a Helix queue for this.
diff --git a/eng/pipelines/coreclr/corefx-jitstress2-jitstressregs.yml b/eng/pipelines/coreclr/corefx-jitstress2-jitstressregs.yml
index df6417a3c080a8..c58f8f575f3831 100644
--- a/eng/pipelines/coreclr/corefx-jitstress2-jitstressregs.yml
+++ b/eng/pipelines/coreclr/corefx-jitstress2-jitstressregs.yml
@@ -33,7 +33,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
# TODO: add Windows_NT_arm64, when we have hardware available. Note: platform-matrix.yml needs to enable a Helix queue for this.
diff --git a/eng/pipelines/coreclr/corefx-jitstressregs.yml b/eng/pipelines/coreclr/corefx-jitstressregs.yml
index a74c2ec0801624..ce064af729f91c 100644
--- a/eng/pipelines/coreclr/corefx-jitstressregs.yml
+++ b/eng/pipelines/coreclr/corefx-jitstressregs.yml
@@ -33,7 +33,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
# TODO: add Windows_NT_arm64, when we have hardware available. Note: platform-matrix.yml needs to enable a Helix queue for this.
diff --git a/eng/pipelines/coreclr/corefx.yml b/eng/pipelines/coreclr/corefx.yml
index c251b0236d3af7..2f70f3f7083031 100644
--- a/eng/pipelines/coreclr/corefx.yml
+++ b/eng/pipelines/coreclr/corefx.yml
@@ -33,7 +33,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
# TODO: add Windows_NT_arm64, when we have hardware available. Note: platform-matrix.yml needs to enable a Helix queue for this.
diff --git a/eng/pipelines/coreclr/crossgen2-composite.yml b/eng/pipelines/coreclr/crossgen2-composite.yml
new file mode 100644
index 00000000000000..0a2e5405878e0d
--- /dev/null
+++ b/eng/pipelines/coreclr/crossgen2-composite.yml
@@ -0,0 +1,56 @@
+trigger: none
+
+pr: none
+
+schedules:
+- cron: "0 6 * * *"
+ displayName: Mon through Sun at 10:00 PM (UTC-8:00)
+ branches:
+ include:
+ - master
+ always: true
+
+jobs:
+#
+# Checkout repository
+#
+- template: /eng/pipelines/common/checkout-job.yml
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/common/build-coreclr-and-libraries-job.yml
+ buildConfig: checked
+ platforms:
+ - Linux_x64
+ - OSX_x64
+ - Windows_NT_x64
+ jobParameters:
+ testGroup: innerloop
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
+ buildConfig: checked
+ platforms:
+ - OSX_x64
+ - Windows_NT_x64
+ jobParameters:
+ testGroup: innerloop
+ liveLibrariesBuildConfig: Release
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
+ helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
+ buildConfig: checked
+ platforms:
+ - Linux_x64
+ - OSX_x64
+ - Windows_NT_x64
+ jobParameters:
+ testGroup: innerloop
+ readyToRun: true
+ crossgen2: true
+ compositeBuildMode: true
+ displayNameArgs: Composite
+ liveLibrariesBuildConfig: Release
diff --git a/eng/pipelines/coreclr/crossgen2-outerloop.yml b/eng/pipelines/coreclr/crossgen2-outerloop.yml
index d31a45088687b1..3802f6222f0379 100644
--- a/eng/pipelines/coreclr/crossgen2-outerloop.yml
+++ b/eng/pipelines/coreclr/crossgen2-outerloop.yml
@@ -29,7 +29,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: checked
platforms:
- OSX_x64
@@ -40,7 +40,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
buildConfig: checked
platforms:
diff --git a/eng/pipelines/coreclr/crossgen2.yml b/eng/pipelines/coreclr/crossgen2.yml
index 3d1ea01d4f69d6..ab6ccdf94246b2 100644
--- a/eng/pipelines/coreclr/crossgen2.yml
+++ b/eng/pipelines/coreclr/crossgen2.yml
@@ -29,7 +29,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: checked
platforms:
- OSX_x64
@@ -40,7 +40,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
buildConfig: checked
platforms:
diff --git a/eng/pipelines/coreclr/gc-longrunning.yml b/eng/pipelines/coreclr/gc-longrunning.yml
index 5d3ec8f9e5335b..e706868dc49314 100644
--- a/eng/pipelines/coreclr/gc-longrunning.yml
+++ b/eng/pipelines/coreclr/gc-longrunning.yml
@@ -30,7 +30,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: release
platforms:
- Linux_x64
@@ -43,7 +43,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: release
platforms:
- Linux_x64
diff --git a/eng/pipelines/coreclr/jitstress-isas-x86.yml b/eng/pipelines/coreclr/jitstress-isas-x86.yml
index 52d977d4b7ea46..8c1241a1b371ab 100644
--- a/eng/pipelines/coreclr/jitstress-isas-x86.yml
+++ b/eng/pipelines/coreclr/jitstress-isas-x86.yml
@@ -30,7 +30,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: checked
platforms:
- OSX_x64
@@ -42,7 +42,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
- Linux_x64
diff --git a/eng/pipelines/coreclr/jitstress.yml b/eng/pipelines/coreclr/jitstress.yml
index 94ee7eb62c6bb9..04107ea4b05732 100644
--- a/eng/pipelines/coreclr/jitstress.yml
+++ b/eng/pipelines/coreclr/jitstress.yml
@@ -28,8 +28,7 @@ jobs:
- Linux_x64
- Windows_NT_x64
- Windows_NT_x86
- # Currently no Windows arm32 testing. https://github.com/dotnet/runtime/issues/1097
- #- Windows_NT_arm
+ - Windows_NT_arm
- Windows_NT_arm64
jobParameters:
testGroup: jitstress
@@ -46,8 +45,7 @@ jobs:
- Linux_x64
- Windows_NT_x64
- Windows_NT_x86
- # Currently no Windows arm32 testing. https://github.com/dotnet/runtime/issues/1097
- #- Windows_NT_arm
+ - Windows_NT_arm
- Windows_NT_arm64
helixQueueGroup: ci
helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
diff --git a/eng/pipelines/coreclr/jitstress2-jitstressregs.yml b/eng/pipelines/coreclr/jitstress2-jitstressregs.yml
index 8f196635e89e5b..24953b5ad92196 100644
--- a/eng/pipelines/coreclr/jitstress2-jitstressregs.yml
+++ b/eng/pipelines/coreclr/jitstress2-jitstressregs.yml
@@ -28,8 +28,7 @@ jobs:
- Linux_x64
- Windows_NT_x64
- Windows_NT_x86
- # Currently no Windows arm32 testing. https://github.com/dotnet/runtime/issues/1097
- #- Windows_NT_arm
+ - Windows_NT_arm
- Windows_NT_arm64
jobParameters:
testGroup: jitstress2-jitstressregs
@@ -46,8 +45,7 @@ jobs:
- Linux_x64
- Windows_NT_x64
- Windows_NT_x86
- # Currently no Windows arm32 testing. https://github.com/dotnet/runtime/issues/1097
- #- Windows_NT_arm
+ - Windows_NT_arm
- Windows_NT_arm64
helixQueueGroup: ci
helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
diff --git a/eng/pipelines/coreclr/jitstressregs.yml b/eng/pipelines/coreclr/jitstressregs.yml
index af6e2faba56891..322458047125b5 100644
--- a/eng/pipelines/coreclr/jitstressregs.yml
+++ b/eng/pipelines/coreclr/jitstressregs.yml
@@ -28,8 +28,7 @@ jobs:
- Linux_x64
- Windows_NT_x64
- Windows_NT_x86
- # Currently no Windows arm32 testing. https://github.com/dotnet/runtime/issues/1097
- #- Windows_NT_arm
+ - Windows_NT_arm
- Windows_NT_arm64
jobParameters:
testGroup: jitstressregs
@@ -46,8 +45,7 @@ jobs:
- Linux_x64
- Windows_NT_x64
- Windows_NT_x86
- # Currently no Windows arm32 testing. https://github.com/dotnet/runtime/issues/1097
- #- Windows_NT_arm
+ - Windows_NT_arm
- Windows_NT_arm64
helixQueueGroup: ci
helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
diff --git a/eng/pipelines/coreclr/perf.yml b/eng/pipelines/coreclr/perf.yml
index ffa22b8afc7515..d2ed639d434bdc 100644
--- a/eng/pipelines/coreclr/perf.yml
+++ b/eng/pipelines/coreclr/perf.yml
@@ -8,6 +8,7 @@ trigger:
- '*'
- src/libraries/System.Private.CoreLib/*
exclude:
+ - .github/*
- docs/*
- CODE-OF-CONDUCT.md
- CONTRIBUTING.md
@@ -60,11 +61,32 @@ jobs:
- Windows_NT_x86
jobParameters:
testGroup: perf
-
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/mono/templates/build-job.yml
+ runtimeFlavor: mono
+ buildConfig: release
+ platforms:
+ - Linux_x64
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/coreclr/templates/perf-job.yml
+ buildConfig: release
+ runtimeFlavor: mono
+ platforms:
+ - Linux_x64
+ jobParameters:
+ testGroup: perf
+ liveLibrariesBuildConfig: Release
+ runtimeType: mono
+
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
jobTemplate: /eng/pipelines/coreclr/templates/perf-job.yml
buildConfig: release
+ runtimeFlavor: coreclr
platforms:
- Linux_x64
- Windows_NT_x64
diff --git a/eng/pipelines/coreclr/r2r.yml b/eng/pipelines/coreclr/r2r.yml
index 04ef6d73c06bf2..781e934c6d6e3b 100644
--- a/eng/pipelines/coreclr/r2r.yml
+++ b/eng/pipelines/coreclr/r2r.yml
@@ -24,6 +24,8 @@ jobs:
- Linux_arm
- Linux_arm64
- Linux_x64
+ - Windows_NT_arm
+ - Windows_NT_arm64
- Windows_NT_x64
- Windows_NT_x86
jobParameters:
@@ -37,6 +39,8 @@ jobs:
- Linux_arm
- Linux_arm64
- Linux_x64
+ - Windows_NT_arm
+ - Windows_NT_arm64
- Windows_NT_x64
- Windows_NT_x86
helixQueueGroup: ci
diff --git a/eng/pipelines/coreclr/release-tests.yml b/eng/pipelines/coreclr/release-tests.yml
index 29342df4f6153c..f597bc1623d1a9 100644
--- a/eng/pipelines/coreclr/release-tests.yml
+++ b/eng/pipelines/coreclr/release-tests.yml
@@ -32,7 +32,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: release
platformGroup: all
jobParameters:
@@ -44,7 +44,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: release
platformGroup: all
helixQueueGroup: ci
@@ -58,7 +58,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: release
platformGroup: all
helixQueueGroup: ci
diff --git a/eng/pipelines/coreclr/templates/build-job.yml b/eng/pipelines/coreclr/templates/build-job.yml
index b343975a710b53..c23db63f956668 100644
--- a/eng/pipelines/coreclr/templates/build-job.yml
+++ b/eng/pipelines/coreclr/templates/build-job.yml
@@ -10,6 +10,7 @@ parameters:
osSubgroup: ''
platform: ''
pool: ''
+ runtimeVariant: ''
signBinaries: false
stagedBuild: false
testGroup: ''
@@ -25,6 +26,7 @@ jobs:
archType: ${{ parameters.archType }}
osGroup: ${{ parameters.osGroup }}
osSubgroup: ${{ parameters.osSubgroup }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
testGroup: ${{ parameters.testGroup }}
helixType: 'build/product/'
enableMicrobuild: true
@@ -37,8 +39,8 @@ jobs:
name: ${{ format('coreclr_{0}_product_build_{1}{1}_{3}_{4}', parameters.compilerName, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
displayName: ${{ format('CoreCLR GCC Product Build {0}{1} {2} {3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
${{ if eq(parameters.compilerName, 'clang') }}:
- name: ${{ format('coreclr_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- displayName: ${{ format('CoreCLR Product Build {0}{1} {2} {3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ name: ${{ format('coreclr_{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ displayName: ${{ format('CoreCLR {0} Product Build {1}{2} {3} {4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
# Run all steps in the container.
# Note that the containers are defined in platform-matrix.yml
@@ -66,10 +68,6 @@ jobs:
- ${{ if and(ne(parameters.osGroup, 'Windows_NT'), eq(parameters.compilerName, 'clang')) }}:
- name: compilerArg
value: '-clang9'
- # Our FreeBSD doesn't yet detect available clang versions, so pass it explicitly.
- - ${{ if eq(parameters.osGroup, 'FreeBSD') }}:
- - name: compilerArg
- value: '-clang6.0'
# Building for x64 MUSL happens on Alpine Linux and we need to use the stable version available there
- ${{ if and(eq(parameters.osGroup, 'Linux'), eq(parameters.osSubgroup, '_musl'), eq(parameters.archType, 'x64')) }}:
- name: compilerArg
@@ -108,7 +106,7 @@ jobs:
# and FreeBSD builds use a build agent with dependencies
# preinstalled, so we only need this step for OSX and Windows.
- ${{ if eq(parameters.osGroup, 'OSX') }}:
- - script: sh $(Build.SourcesDirectory)/eng/install-native-dependencies.sh $(osGroup)
+ - script: $(Build.SourcesDirectory)/eng/install-native-dependencies.sh $(osGroup)
displayName: Install native dependencies
- ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
# Necessary to install python
@@ -122,28 +120,36 @@ jobs:
- ${{ if and(eq(variables['System.TeamProject'], 'internal'), ne(variables['Build.Reason'], 'PullRequest')) }}:
- template: /eng/pipelines/common/restore-internal-tools.yml
- # Build CoreCLR tools needed by the native runtime build
- - script: $(Build.SourcesDirectory)$(dir)build$(scriptExt) -subset clr.buildtools $(crossArg) -arch $(archType) -c $(buildConfig) $(officialBuildIdArg) -ci /bl:$(Build.SourcesDirectory)/artifacts/log/clr.buildtools.binlog
- displayName: Build CoreCLR Diagnostic Tools
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
# Build CoreCLR Runtime
- ${{ if ne(parameters.osGroup, 'Windows_NT') }}:
- - script: $(coreClrRepoRootDir)build-runtime$(scriptExt) $(buildConfig) $(archType) $(crossArg) -ci $(compilerArg) $(officialBuildIdArg)
+ - script: $(coreClrRepoRootDir)build-runtime$(scriptExt) $(buildConfig) $(archType) $(crossArg) $(osArg) -ci $(compilerArg) $(officialBuildIdArg)
displayName: Build CoreCLR Runtime
- ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
- script: set __TestIntermediateDir=int&&$(coreClrRepoRootDir)build-runtime$(scriptExt) $(buildConfig) $(archType) -ci $(enforcePgoArg) $(officialBuildIdArg)
displayName: Build CoreCLR Runtime
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
- ${{ if and(eq(parameters.osGroup, 'Windows_NT'), ne(parameters.archType, 'x86')) }}:
- script: set __TestIntermediateDir=int&&$(coreClrRepoRootDir)build-runtime$(scriptExt) $(buildConfig) $(archType) -ci -linuxdac $(officialBuildIdArg)
displayName: Build Cross OS Linux DAC for Windows
# Build CoreCLR Managed Components
- - script: $(Build.SourcesDirectory)$(dir)build$(scriptExt) -subset clr.corelib+clr.nativecorelib+clr.tools+clr.packages $(crossArg) -arch $(archType) -c $(buildConfig) $(officialBuildIdArg) -ci
+ - script: $(Build.SourcesDirectory)$(dir)build$(scriptExt) -subset clr.corelib+clr.nativecorelib+clr.tools+clr.packages $(crossArg) -arch $(archType) $(osArg) -c $(buildConfig) $(officialBuildIdArg) -ci
displayName: Build managed product components and packages
# Build native test components
- - script: $(coreClrRepoRootDir)build-test$(scriptExt) skipmanaged $(buildConfig) $(archType) $(crossArg) $(priorityArg) $(compilerArg) skipgeneratelayout
+ - script: $(coreClrRepoRootDir)build-test$(scriptExt) skipmanaged $(buildConfig) $(archType) $(crossArg) $(osArg) $(priorityArg) $(compilerArg) skipgeneratelayout
displayName: Build native test components
# Sign on Windows
diff --git a/eng/pipelines/coreclr/templates/build-test-job.yml b/eng/pipelines/coreclr/templates/build-test-job.yml
deleted file mode 100644
index 75650136520d55..00000000000000
--- a/eng/pipelines/coreclr/templates/build-test-job.yml
+++ /dev/null
@@ -1,148 +0,0 @@
-parameters:
- buildConfig: ''
- archType: ''
- osGroup: ''
- osSubgroup: ''
- container: ''
- testGroup: ''
-
- # When set to a non-empty value (Debug / Release), it determines libraries
- # build configuration to use for the tests. Setting this property implies
- # a dependency of this job on the appropriate libraries build and is used
- # to construct the name of the Azure artifact representing libraries build
- # to use for building the tests.
- liveLibrariesBuildConfig: ''
-
- displayNameArgs: ''
- condition: true
- stagedBuild: false
- variables: {}
- pool: ''
-
-### Build managed test components (native components are getting built as part
-### of the the product build job).
-
-### TODO: As of today, build of managed test components requires the product build
-### as a prerequisite due to dependency on System.Private.Corelib. After switching
-### over to its reference assembly we should be able to remove this dependency and
-### run managed test builds in parallel with the product build job.
-
-jobs:
-- template: xplat-pipeline-job.yml
- parameters:
- buildConfig: ${{ parameters.buildConfig }}
- archType: ${{ parameters.archType }}
- osGroup: ${{ parameters.osGroup }}
- osSubgroup: ${{ parameters.osSubgroup }}
- managedTestBuildOsGroup: ${{ parameters.osGroup }}
- managedTestBuildOsSubgroup: ${{ parameters.osSubgroup }}
- container: ${{ parameters.container }}
- testGroup: ${{ parameters.testGroup }}
- stagedBuild: ${{ parameters.stagedBuild }}
- liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
- variables: ${{ parameters.variables }}
- pool: ${{ parameters.pool }}
-
- # Test jobs should continue on error for internal builds
- ${{ if eq(variables['System.TeamProject'], 'internal') }}:
- continueOnError: true
-
- # Compute job name from template parameters
- ${{ if eq(parameters.testGroup, 'innerloop') }}:
- name: 'coreclr_test_build_p0_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
- displayName: 'CoreCLR Pri0 Test Build ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
-
- ${{ if ne(parameters.testGroup, 'innerloop') }}:
- name: 'coreclr_test_build_p1_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.buildConfig }}'
- displayName: 'CoreCLR Pri1 Test Build ${{ parameters.osGroup }}${{ parameters.osSubgroup }} ${{ parameters.archType }} ${{ parameters.buildConfig }}'
-
- # Since the condition is being altered, merge the default with the additional conditions.
- # See https://docs.microsoft.com/azure/devops/pipelines/process/conditions
- condition: and(succeeded(), ${{ parameters.condition }})
-
- # TODO: Build of managed test components currently depends on the corresponding build job
- # because it needs System.Private.Corelib; we should be able to remove this dependency
- # by switching over to using reference assembly.
- ${{ if ne(parameters.stagedBuild, true) }}:
- dependsOn:
- - ${{ format('coreclr_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- - ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- - ${{ format('libraries_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveLibrariesBuildConfig) }}
-
-
- ${{ if eq(parameters.testGroup, 'innerloop') }}:
- timeoutInMinutes: 90
-
- ${{ if ne(parameters.testGroup, 'innerloop') }}:
- timeoutInMinutes: 160
-
- steps:
-
- # Install test build dependencies
- - ${{ if eq(parameters.osGroup, 'OSX') }}:
- - script: sh $(Build.SourcesDirectory)/eng/install-native-dependencies.sh $(osGroup)
- displayName: Install native dependencies
- - ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
- # Necessary to install correct cmake version
- - script: $(Build.SourcesDirectory)\eng\common\init-tools-native.cmd -InstallDirectory $(Build.SourcesDirectory)\native-tools -Force
- displayName: Install native dependencies
-
-
- # Optionally download live-built libraries
- - ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- - template: /eng/pipelines/common/download-artifact-step.yml
- parameters:
- unpackFolder: $(librariesDownloadDir)
- cleanUnpackFolder: false
- artifactFileName: '$(librariesBuildArtifactName)$(archiveExtension)'
- artifactName: '$(librariesBuildArtifactName)'
- displayName: 'live-built libraries'
-
-
- # Download product binaries directory
- - template: /eng/pipelines/common/download-artifact-step.yml
- parameters:
- unpackFolder: $(buildProductRootFolderPath)
- artifactFileName: '$(buildProductArtifactName)$(archiveExtension)'
- artifactName: '$(buildProductArtifactName)'
- displayName: 'product build'
-
-
- # Build managed test components
- - script: $(coreClrRepoRootDir)build-test$(scriptExt) skipnative skipgeneratelayout skiptestwrappers $(buildConfig) $(archType) $(crossArg) $(priorityArg) ci $(librariesOverrideArg)
- displayName: Build managed test components
-
-
- # Zip and publish managed test components
- - template: /eng/pipelines/common/upload-artifact-step.yml
- parameters:
- rootFolder: $(managedTestArtifactRootFolderPath)
- includeRootFolder: false
- archiveType: $(archiveType)
- tarCompression: $(tarCompression)
- archiveExtension: $(archiveExtension)
- artifactName: $(managedTestArtifactName)
- displayName: 'managed test components'
-
-
- # Publish .packages/microsoft.net.sdk.il needed for traversing
- # test projects during the copynativeonly command in run test job.
- - template: /eng/pipelines/common/upload-artifact-step.yml
- parameters:
- rootFolder: $(microsoftNetSdkIlFolderPath)
- includeRootFolder: false
- archiveType: $(archiveType)
- tarCompression: $(tarCompression)
- archiveExtension: $(archiveExtension)
- artifactName: $(microsoftNetSdkIlArtifactName)
- displayName: 'Microsoft.NET.Sdk.IL package'
-
-
- # Publish Logs
- - task: PublishPipelineArtifact@1
- displayName: Publish Logs
- inputs:
- targetPath: $(Build.SourcesDirectory)/artifacts/log
- artifactName: 'TestBuildLogs_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)_${{ parameters.testGroup }}'
- continueOnError: true
- condition: always()
diff --git a/eng/pipelines/coreclr/templates/crossgen-comparison-job.yml b/eng/pipelines/coreclr/templates/crossgen-comparison-job.yml
index cfecf9bbd5c06f..0e537cb6c7e171 100644
--- a/eng/pipelines/coreclr/templates/crossgen-comparison-job.yml
+++ b/eng/pipelines/coreclr/templates/crossgen-comparison-job.yml
@@ -5,6 +5,7 @@ parameters:
osSubgroup: ''
container: ''
helixQueues: ''
+ runtimeVariant: ''
crossrootfsDir: ''
stagedBuild: false
variables: {}
@@ -30,6 +31,7 @@ jobs:
osGroup: ${{ parameters.osGroup }}
osSubgroup: ${{ parameters.osSubgroup }}
stagedBuild: ${{ parameters.stagedBuild }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
helixType: 'test/crossgen-comparison/'
pool: ${{ parameters.pool }}
@@ -72,7 +74,7 @@ jobs:
# Test job depends on the corresponding build job
dependsOn:
- - ${{ format('coreclr_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ - ${{ format('coreclr_{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- ${{ format('libraries_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveLibrariesBuildConfig) }}
diff --git a/eng/pipelines/coreclr/templates/helix-queues-setup.yml b/eng/pipelines/coreclr/templates/helix-queues-setup.yml
index e35a69e6f7d5b0..5f970ca5367c8c 100644
--- a/eng/pipelines/coreclr/templates/helix-queues-setup.yml
+++ b/eng/pipelines/coreclr/templates/helix-queues-setup.yml
@@ -7,6 +7,7 @@ parameters:
container: ''
pool: ''
platform: ''
+ runtimeFlavorDisplayName: ''
jobParameters: {}
jobs:
@@ -18,6 +19,7 @@ jobs:
archType: ${{ parameters.archType }}
container: ${{ parameters.container }}
pool: ${{ parameters.pool }}
+ runtimeFlavorDisplayName: ${{ parameters.runtimeFlavorDisplayName }}
helixQueues:
# Linux arm
diff --git a/eng/pipelines/coreclr/templates/perf-job.yml b/eng/pipelines/coreclr/templates/perf-job.yml
index d71e26001c44c1..003e58f276146d 100644
--- a/eng/pipelines/coreclr/templates/perf-job.yml
+++ b/eng/pipelines/coreclr/templates/perf-job.yml
@@ -4,9 +4,11 @@ parameters:
osGroup: ''
osSubgroup: ''
container: ''
- framework: netcoreapp5.0 # Specify the appropriate framework when running release branches (ie netcoreapp3.0 for release/3.0)
+ runtimeVariant: ''
+ framework: net5.0 # Specify the appropriate framework when running release branches (ie netcoreapp3.0 for release/3.0)
liveLibrariesBuildConfig: ''
variables: {}
+ runtimeType: 'coreclr'
pool: ''
### Perf job
@@ -18,24 +20,34 @@ jobs:
- template: run-performance-job.yml
parameters:
# Compute job name from template parameters
- jobName: ${{ format('perfbuild_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- displayName: ${{ format('Performance {0}{1} {2} {3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ jobName: ${{ format('perfbuild_{0}{1}_{2}_{3}_{4}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig, parameters.runtimeType) }}
+ displayName: ${{ format('Performance {0}{1} {2} {3} {4}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig, parameters.runtimeType) }}
pool: ${{ parameters.pool }}
buildConfig: ${{ parameters.buildConfig }}
archType: ${{ parameters.archType }}
osGroup: ${{ parameters.osGroup }}
osSubgroup: ${{ parameters.osSubgroup }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
+ runtimeType: ${{ parameters.runtimeType }}
# Test job depends on the corresponding build job
dependsOn:
- - ${{ format('coreclr_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ - ${{ format('coreclr_{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- ${{ format('libraries_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveLibrariesBuildConfig) }}
+ - ${{ if eq(parameters.runtimeType, 'mono') }}:
+ - ${{ format('mono_{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
${{ if eq(parameters.osGroup, 'Windows_NT') }}:
- extraSetupParameters: -CoreRootDirectory $(Build.SourcesDirectory)\artifacts\tests\coreclr\${{ parameters.osGroup }}.${{ parameters.archType }}.Release\Tests\Core_Root -Architecture ${{ parameters.archType }}
+ ${{ if eq(parameters.runtimeType, 'mono') }}:
+ extraSetupParameters: -Architecture ${{ parameters.archType }} -MonoDotnet $(Build.SourcesDirectory)\.dotnet-mono -Kind micro_mono
+ ${{ if ne(parameters.runtimeType, 'mono') }}:
+ extraSetupParameters: -CoreRootDirectory $(Build.SourcesDirectory)\artifacts\tests\coreclr\${{ parameters.osGroup }}.${{ parameters.archType }}.Release\Tests\Core_Root -Architecture ${{ parameters.archType }}
${{ if ne(parameters.osGroup, 'Windows_NT') }}:
- extraSetupParameters: --corerootdirectory $(Build.SourcesDirectory)/artifacts/tests/coreclr/${{ parameters.osGroup }}.${{ parameters.archType }}.Release/Tests/Core_Root --architecture ${{ parameters.archType }}
+ ${{ if eq(parameters.runtimeType, 'mono') }}:
+ extraSetupParameters: --architecture ${{ parameters.archType }} --monodotnet $(Build.SourcesDirectory)/.dotnet-mono --kind micro_mono
+ ${{ if ne(parameters.runtimeType, 'mono') }}:
+ extraSetupParameters: --corerootdirectory $(Build.SourcesDirectory)/artifacts/tests/coreclr/${{ parameters.osGroup }}.${{ parameters.archType }}.Release/Tests/Core_Root --architecture ${{ parameters.archType }}
variables: ${{ parameters.variables }}
@@ -44,7 +56,6 @@ jobs:
steps:
# Extra steps that will be passed to the performance template and run before sending the job to helix (all of which is done in the template)
-
# Optionally download live-built libraries
- ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- template: /eng/pipelines/common/download-artifact-step.yml
@@ -64,7 +75,24 @@ jobs:
artifactName: '$(buildProductArtifactName)'
displayName: 'product build'
+ - ${{ if eq(parameters.runtimeType, 'mono') }}:
+ - template: /eng/pipelines/common/download-artifact-step.yml
+ parameters:
+ unpackFolder: $(librariesDownloadDir)/bin/mono/$(osGroup).$(archType).$(buildConfigUpper)
+ cleanUnpackFolder: false
+ artifactFileName: 'MonoProduct_${{ parameters.runtimeVariant }}_$(osGroup)_$(archType)_$(buildConfig)$(archiveExtension)'
+ artifactName: 'MonoProduct_${{ parameters.runtimeVariant }}_$(osGroup)_$(archType)_$(buildConfig)'
+ displayName: 'Mono runtime'
# Create Core_Root
- script: $(coreClrRepoRootDir)build-test$(scriptExt) $(buildConfig) $(archType) generatelayoutonly $(librariesOverrideArg)
displayName: Create Core_Root
+ condition: and(succeeded(), ne(variables.runtimeFlavorName, 'Mono'))
+
+ - script: "build.cmd -subset libs.pretest -configuration release -ci -arch $(archType) -testscope innerloop /p:RuntimeArtifactsPath=$(librariesDownloadDir)\\bin\\mono\\$(osGroup).$(archType).$(buildConfigUpper) /p:RuntimeFlavor=mono;xcopy $(Build.SourcesDirectory)\\artifacts\\bin\\testhost\\$(_Framework)-$(osGroup)-$(buildConfigUpper)-$(archType)\\* $(Build.SourcesDirectory)\\.dotnet-mono /E /I /Y;copy $(Build.SourcesDirectory)\\artifacts\\bin\\coreclr\\$(osGroup).$(archType).$(buildConfigUpper)\\corerun.exe $(Build.SourcesDirectory)\\.dotnet-mono\\shared\\Microsoft.NETCore.App\\5.0.0\\corerun.exe"
+ displayName: "Create mono dotnet (Windows)"
+ condition: and(and(succeeded(), eq(variables.runtimeFlavorName, 'Mono')), eq(variables.osGroup, 'Windows_NT'))
+
+ - script: "mkdir $(Build.SourcesDirectory)/.dotnet-mono;./build.sh -subset libs.pretest -configuration release -ci -arch $(archType) -testscope innerloop /p:RuntimeArtifactsPath=$(librariesDownloadDir)/bin/mono/$(osGroup).$(archType).$(buildConfigUpper) /p:RuntimeFlavor=mono;cp $(Build.SourcesDirectory)/artifacts/bin/testhost/$(_Framework)-$(osGroup)-$(buildConfigUpper)-$(archType)/* $(Build.SourcesDirectory)/.dotnet-mono -r;cp $(Build.SourcesDirectory)/artifacts/bin/coreclr/$(osGroup).$(archType).$(buildConfigUpper)/corerun $(Build.SourcesDirectory)/.dotnet-mono/shared/Microsoft.NETCore.App/5.0.0/corerun"
+ displayName: "Create mono dotnet (Linux)"
+ condition: and(and(succeeded(), eq(variables.runtimeFlavorName, 'Mono')), ne(variables.osGroup, 'Windows_NT'))
diff --git a/eng/pipelines/coreclr/templates/run-performance-job.yml b/eng/pipelines/coreclr/templates/run-performance-job.yml
index 1e37e86c8a6459..881a498fbd20de 100644
--- a/eng/pipelines/coreclr/templates/run-performance-job.yml
+++ b/eng/pipelines/coreclr/templates/run-performance-job.yml
@@ -16,6 +16,7 @@ parameters:
timeoutInMinutes: 320 # optional -- timeout for the job
enableTelemetry: false # optional -- enable for telemetry
liveLibrariesBuildConfig: '' # optional -- live-live libraries configuration to use for the run
+ runtimeType: 'coreclr'
jobs:
- template: xplat-pipeline-job.yml
@@ -103,3 +104,10 @@ jobs:
WorkItemTimeout: 4:00 # 4 hours
WorkItemDirectory: '$(WorkItemDirectory)' # WorkItemDirectory can not be empty, so we send it some docs to keep it happy
CorrelationPayloadDirectory: '$(PayloadDirectory)' # it gets checked out to a folder with shorter path than WorkItemDirectory so we can avoid file name too long exceptions
+ - task: PublishPipelineArtifact@1
+ displayName: Publish Logs
+ inputs:
+ targetPath: $(Build.SourcesDirectory)/artifacts/log
+ artifactName: 'Performance_Run_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)_${{ parameters.runtimeType }}'
+ continueOnError: true
+ condition: always()
diff --git a/eng/pipelines/coreclr/templates/test-job.yml b/eng/pipelines/coreclr/templates/test-job.yml
index e1679923841cb2..9c0cf47dd7f730 100644
--- a/eng/pipelines/coreclr/templates/test-job.yml
+++ b/eng/pipelines/coreclr/templates/test-job.yml
@@ -27,7 +27,7 @@ parameters:
jobs:
- ${{ if and(ne(parameters.corefxTests, true), eq(parameters.osSubgroup, parameters.managedTestBuildOsSubgroup), eq(parameters.osGroup, parameters.managedTestBuildOsGroup)) }}:
- - template: /eng/pipelines/coreclr/templates/build-test-job.yml
+ - template: /eng/pipelines/common/templates/runtimes/build-test-job.yml
parameters:
buildConfig: ${{ parameters.buildConfig }}
liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
@@ -42,7 +42,7 @@ jobs:
variables: ${{ parameters.variables }}
pool: ${{ parameters.pool }}
-- template: /eng/pipelines/coreclr/templates/run-test-job.yml
+- template: /eng/pipelines/common/templates/runtimes/run-test-job.yml
parameters:
buildConfig: ${{ parameters.buildConfig }}
liveLibrariesBuildConfig: ${{ parameters.liveLibrariesBuildConfig }}
diff --git a/eng/pipelines/coreclr/templates/xplat-pipeline-job.yml b/eng/pipelines/coreclr/templates/xplat-pipeline-job.yml
index aad6f7bf69fa40..daa189d88d6da3 100644
--- a/eng/pipelines/coreclr/templates/xplat-pipeline-job.yml
+++ b/eng/pipelines/coreclr/templates/xplat-pipeline-job.yml
@@ -68,13 +68,21 @@ jobs:
- name: binTestsPath
value: '$(Build.SourcesDirectory)/artifacts/tests/coreclr'
-
+
+ # Build product defines what we are trying to build, either coreclr or mono
- name: buildProductArtifactName
- value: 'CoreCLRProduct_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
+ value: 'CoreCLRProduct_${{ parameters.runtimeVariant }}_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
- name: buildProductRootFolderPath
value: '$(Build.SourcesDirectory)/artifacts/bin/coreclr/$(osGroup).$(archType).$(buildConfigUpper)'
+ # We need this because both mono and coreclr build currently depends on CoreClr
+ - name: coreClrProductArtifactName
+ value: 'CoreCLRProduct_${{ parameters.runtimeVariant }}_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
+
+ - name: coreClrProductRootFolderPath
+ value: '$(Build.SourcesDirectory)/artifacts/bin/coreclr/$(osGroup).$(archType).$(buildConfigUpper)'
+
- name: corelibProductArtifactName
value: 'CoreLib_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
@@ -119,4 +127,11 @@ jobs:
- ${{ each variable in parameters.variables }}:
- ${{insert}}: ${{ variable }}
+ - name: osArg
+ value: ''
+
+ - ${{ if eq(parameters.osGroup, 'FreeBSD') }}:
+ - name: osArg
+ value: -os FreeBSD
+
steps: ${{ parameters.steps }}
diff --git a/eng/pipelines/evaluate-changed-paths.sh b/eng/pipelines/evaluate-changed-paths.sh
index 0df618957245b4..bfc5c857b64fe6 100755
--- a/eng/pipelines/evaluate-changed-paths.sh
+++ b/eng/pipelines/evaluate-changed-paths.sh
@@ -162,7 +162,7 @@ probePaths() {
if [[ "$include_path_string" == "" ]]; then
include_path_string=":$_path"
else
- include_path_string="$exclude_path_string :$_path"
+ include_path_string="$include_path_string :$_path"
fi
done
diff --git a/eng/pipelines/global-build.yml b/eng/pipelines/global-build.yml
index 8006c888ee00c2..ff9600d83fea6f 100644
--- a/eng/pipelines/global-build.yml
+++ b/eng/pipelines/global-build.yml
@@ -15,6 +15,7 @@ pr:
- docs/manpages/*
- eng/pipelines/global-build.yml
exclude:
+ - .github/*
- docs/*
- eng/pipelines/coreclr/*.*
- eng/pipelines/libraries/*.*
@@ -91,4 +92,17 @@ jobs:
jobParameters:
testGroup: innerloop
nameSuffix: Mono_Libraries
- buildArgs: -subset mono+libs /p:RuntimeFlavor=Mono
\ No newline at end of file
+ buildArgs: -subset mono+libs /p:RuntimeFlavor=Mono
+
+#
+# SourceBuild Build
+#
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/common/global-build-job.yml
+ buildConfig: release
+ platforms:
+ - Linux_x64
+ jobParameters:
+ nameSuffix: SourceBuild
+ buildArgs: /p:DotNetBuildFromSource=true
\ No newline at end of file
diff --git a/eng/pipelines/installer/installer-matrix.yml b/eng/pipelines/installer/installer-matrix.yml
index bb5e6e46f96c43..e9ae06bf267690 100644
--- a/eng/pipelines/installer/installer-matrix.yml
+++ b/eng/pipelines/installer/installer-matrix.yml
@@ -3,6 +3,7 @@ parameters:
platforms: []
jobParameters: []
buildConfig: Release
+ runtimeVariant: ''
jobs:
@@ -16,5 +17,6 @@ jobs:
platforms: ${{ parameters.platforms }}
passPlatforms: true
runtimeFlavor: ${{ parameters.runtimeFlavor }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
jobParameters:
${{ insert }}: ${{ parameters.jobParameters }}
diff --git a/eng/pipelines/installer/jobs/base-job.yml b/eng/pipelines/installer/jobs/base-job.yml
index 3a6494b0b23df9..8e9c3f1824bb20 100644
--- a/eng/pipelines/installer/jobs/base-job.yml
+++ b/eng/pipelines/installer/jobs/base-job.yml
@@ -13,6 +13,7 @@ parameters:
variables: []
name: ''
displayName: ''
+ runtimeVariant: ''
pool: ''
packageDistroList:
@@ -38,8 +39,8 @@ parameters:
platforms: []
jobs:
-- job: ${{ format('installer_{0}_{1}', coalesce(parameters.name, parameters.platform), parameters.buildConfig) }}
- displayName: ${{ format('Installer Build and Test {0} {1}', coalesce(parameters.name, parameters.platform), parameters.buildConfig) }}
+- job: ${{ format('installer_{0}_{1}_{2}_{3}', parameters.runtimeFlavor, parameters.runtimeVariant, coalesce(parameters.name, parameters.platform), parameters.buildConfig) }}
+ displayName: ${{ format('Installer Build and Test {0} {1} {2} {3}', parameters.runtimeFlavor, parameters.runtimeVariant, coalesce(parameters.name, parameters.platform), parameters.buildConfig) }}
condition: and(succeeded(), ${{ parameters.condition }})
pool: ${{ parameters.pool }}
@@ -65,13 +66,28 @@ jobs:
- name: SkipTests
value: ${{ or(
not(in(parameters.archType, 'x64', 'x86')),
- in(parameters.osGroup, 'iOS', 'tvOS', 'Android'),
+ eq(parameters.runtimeFlavor, 'mono'),
eq(parameters.isOfficialBuild, true),
ne(parameters.crossrootfsDir, '')) }}
+ - name: BuildAction
+ value: -test
+
+ - ${{ if eq(variables.SkipTests, true) }}:
+ - name: BuildAction
+ value: ''
+
- name: SignType
value: test
+ - ${{ if eq(parameters.runtimeVariant, 'llvmjit') }}:
+ - name: llvmParameter
+ value: /p:MonoEnableLLVM=true
+
+ - ${{ if eq(parameters.runtimeVariant, 'llvmaot') }}:
+ - name: llvmParameter
+ value: /p:MonoEnableLLVM=true /p:MonoBundleLLVMOptimizer=true
+
# Set up non-PR build from internal project
- ${{ if eq(parameters.isOfficialBuild, true) }}:
- name: SignType
@@ -80,10 +96,10 @@ jobs:
value: /p:OfficialBuildId=$(Build.BuildNumber)
- name: buildCommandSourcesDirectory
- ${{ if ne(parameters.osGroup, 'Linux') }}:
+ ${{ if not(in(parameters.osGroup, 'Linux', 'FreeBSD')) }}:
value: '$(Build.SourcesDirectory)/'
# This job runs within Docker containers, so Build.SourcesDirectory is not accurate.
- ${{ if eq(parameters.osGroup, 'Linux') }}:
+ ${{ if in(parameters.osGroup, 'Linux', 'FreeBSD') }}:
value: '/root/runtime/'
###
@@ -97,6 +113,8 @@ jobs:
/p:TargetArchitecture=${{ parameters.archType }}
/p:PortableBuild=true
/p:SkipTests=$(SkipTests)
+ /p:RuntimeFlavor=${{ parameters.runtimeFlavor }}
+ $(llvmParameter)
$(OfficialBuildArg)
- name: MsbuildSigningArguments
value: >-
@@ -107,7 +125,8 @@ jobs:
- name: BaseJobBuildCommand
value: >-
- build.cmd -subset installer -test -ci
+ build.cmd -subset installer -ci
+ $(BuildAction)
-configuration $(_BuildConfig)
$(LiveOverridePathArgs)
$(CommonMSBuildArgs)
@@ -119,25 +138,30 @@ jobs:
value: >-
/p:PortableBuild=true
/p:SkipTests=$(SkipTests)
+ /p:RuntimeFlavor=${{ parameters.runtimeFlavor }}
+ $(llvmParameter)
- name: BaseJobBuildCommand
value: >-
- $(Build.SourcesDirectory)/build.sh -subset installer -test -ci
+ $(Build.SourcesDirectory)/build.sh -subset installer -ci
+ $(BuildAction)
-configuration $(_BuildConfig)
$(LiveOverridePathArgs)
$(CommonMSBuildArgs)
$(OfficialBuildArg)
- - ${{ if in(parameters.osGroup, 'iOS', 'tvOS', 'Android') }}:
+ - ${{ if in(parameters.osGroup, 'iOS', 'tvOS', 'Android', 'Browser') }}:
- name: CommonMSBuildArgs
value: >-
/p:PortableBuild=true
/p:SkipTests=$(SkipTests)
+ $(llvmParameter)
- name: BaseJobBuildCommand
value: >-
- $(Build.SourcesDirectory)/build.sh -subset installer --ci --test
+ $(Build.SourcesDirectory)/build.sh -subset installer -ci
+ $(BuildAction)
-configuration $(_BuildConfig)
-os ${{ parameters.osGroup }}
-arch ${{ parameters.archType }}
@@ -146,7 +170,7 @@ jobs:
$(CommonMSBuildArgs)
$(OfficialBuildArg)
- - ${{ if eq(parameters.osGroup, 'Linux') }}:
+ - ${{ if in(parameters.osGroup, 'Linux', 'FreeBSD') }}:
# Preserve the NuGet authentication env vars into the Docker container.
# The 'NuGetAuthenticate' build step may have set these.
@@ -165,10 +189,6 @@ jobs:
-e ROOTFS_DIR=${{ parameters.crossrootfsDir }}
${{ parameters.container }}
- - ${{ if eq(parameters.name, 'FreeBSD_x64') }}:
- - name: RunArguments
- value: export DotNetBootstrapCliTarPath=/dotnet-sdk-freebsd-x64.tar &&
-
- name: BuildScript
value: ./build.sh
- name: MSBuildScript
@@ -183,8 +203,11 @@ jobs:
- name: CommonMSBuildArgs
value: >-
/p:Configuration=$(_BuildConfig)
+ /p:TargetOS=${{ parameters.osGroup }}
/p:TargetArchitecture=${{ parameters.archType }}
+ /p:RuntimeFlavor=${{ parameters.runtimeFlavor }}
$(OfficialBuildArg)
+ $(llvmParameter)
- name: _PortableBuild
value: ${{ eq(parameters.osSubgroup, '') }}
@@ -199,7 +222,8 @@ jobs:
- name: BuildArguments
value: >-
- -subset installer -test -ci
+ -subset installer -ci
+ $(BuildAction)
/p:CrossBuild=${{ ne(parameters.crossrootfsDir, '') }}
/p:PortableBuild=$(_PortableBuild)
/p:SkipTests=$(SkipTests)
@@ -281,7 +305,7 @@ jobs:
/p:RuntimeArtifactsPath=$(buildCommandSourcesDirectory)$(RuntimeDownloadPath)
/p:RuntimeConfiguration=${{ parameters.liveRuntimeBuildConfig }}
- name: RuntimeArtifactName
- value: $(runtimeFlavorName)Product_$(liveRuntimeLegName)
+ value: $(runtimeFlavorName)Product_${{ parameters.runtimeVariant }}_$(liveRuntimeLegName)
- ${{ if ne(parameters.liveLibrariesBuildConfig, '') }}:
- name: liveLibrariesLegName
@@ -320,8 +344,9 @@ jobs:
- checkout
- ${{ parameters.dependsOn }}
- ${{ if ne(parameters.liveRuntimeBuildConfig, '') }}:
- - ${{ format('{0}_product_build_{1}{2}_{3}_{4}',
+ - ${{ format('{0}_{1}_product_build_{2}{3}_{4}_{5}',
parameters.runtimeFlavor,
+ parameters.runtimeVariant,
parameters.osGroup,
parameters.osSubgroup,
parameters.archType,
@@ -336,7 +361,7 @@ jobs:
- libraries_build_allconfigurations_Windows_NT_x64_Release
- ${{ if eq(parameters.buildFullPlatformManifest, true) }}:
- ${{ each platform in parameters.platforms }}:
- - ${{ parameters.runtimeFlavor }}_product_build_${{ platform }}_${{ parameters.liveRuntimeBuildConfig }}
+ - ${{ parameters.runtimeFlavor }}_${{ parameters.runtimeVariant }}_product_build_${{ platform }}_${{ parameters.liveRuntimeBuildConfig }}
- libraries_build_${{ platform }}_${{ parameters.liveLibrariesBuildConfig }}
steps:
@@ -431,11 +456,26 @@ jobs:
displayName: 'Libraries artifacts (AllConfigurations)'
cleanUnpackFolder: false
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS', 'tvOS') }}:
+ - script: $(Build.SourcesDirectory)/eng/install-native-dependencies.sh ${{ parameters.osGroup }}
+ displayName: Install Build Dependencies
+
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
+
- script: $(BaseJobBuildCommand)
displayName: Build
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
# Only in glibc leg, we produce RPMs and Debs
- - ${{ if and(eq(parameters.platform, 'Linux_x64'), eq(parameters.osSubgroup, ''))}}:
+ - ${{ if and(eq(parameters.runtimeFlavor, 'coreclr'), eq(parameters.platform, 'Linux_x64'), eq(parameters.osSubgroup, ''))}}:
- task: CopyFiles@2
displayName: 'Copy built Portable linux-x64 binaries to staging directory'
inputs:
@@ -448,7 +488,6 @@ jobs:
# independent installers on this leg, but we need to do it somewhere.)
- template: steps/build-linux-package.yml
parameters:
- buildTraversalBuildDependencies: true
distroRid: ${{ packageBuild.imageRid }}
image: ${{ packageBuild.image }}
packageStepDescription: Runtime Deps, Runtime, Framework Packs installers
@@ -496,6 +535,8 @@ jobs:
- template: steps/upload-job-artifacts.yml
parameters:
name: ${{ coalesce(parameters.name, parameters.platform) }}
+ runtimeFlavor: ${{ parameters.runtimeFlavor }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
skipTests: $(SkipTests)
isOfficialBuild: ${{ eq(parameters.isOfficialBuild, true) }}
diff --git a/eng/pipelines/installer/jobs/steps/build-linux-package.yml b/eng/pipelines/installer/jobs/steps/build-linux-package.yml
index e9e342b618c1e8..e0129ccff6317c 100644
--- a/eng/pipelines/installer/jobs/steps/build-linux-package.yml
+++ b/eng/pipelines/installer/jobs/steps/build-linux-package.yml
@@ -1,5 +1,4 @@
parameters:
- buildTraversalBuildDependencies: false
distroRid: null
image: null
outputRidArg: ''
@@ -8,18 +7,6 @@ parameters:
subsetArg: ''
steps:
-- ${{ if eq(parameters.buildTraversalBuildDependencies, true) }}:
- - script: |
- set -x
- df -h
- $(DockerRunMSBuild) ${{ parameters.image }} $(MSBuildScript) \
- --ci \
- /root/runtime/tools-local/tasks/installer.tasks/installer.tasks.csproj \
- /t:Restore /t:Build /t:CreateHostMachineInfoFile \
- $(CommonMSBuildArgs) \
- /bl:msbuild.${{ parameters.distroRid }}.traversaldependencies.binlog
- displayName: ====== Build traversal build dependencies - ${{ parameters.distroRid }}
-
- script: |
set -x
df -h
@@ -32,5 +19,6 @@ steps:
${{ parameters.packagingArgs }} \
$(CommonMSBuildArgs) \
${{ parameters.outputRidArg }} \
+ $(LiveOverridePathArgs) \
/bl:artifacts/log/$(_BuildConfig)/msbuild.${{ parameters.distroRid }}.installers.binlog
displayName: Package ${{ parameters.packageStepDescription }} - ${{ parameters.distroRid }}
diff --git a/eng/pipelines/installer/jobs/steps/upload-job-artifacts.yml b/eng/pipelines/installer/jobs/steps/upload-job-artifacts.yml
index 05232836e569c5..884ca0177e7f81 100644
--- a/eng/pipelines/installer/jobs/steps/upload-job-artifacts.yml
+++ b/eng/pipelines/installer/jobs/steps/upload-job-artifacts.yml
@@ -1,6 +1,7 @@
parameters:
name: ''
-
+ runtimeFlavor: 'coreclr'
+ runtimeVariant: ''
isOfficialBuild: false
steps:
@@ -17,7 +18,7 @@ steps:
testResultsFiles: '*.xml'
searchFolder: '$(Build.SourcesDirectory)/artifacts/TestResults/$(_BuildConfig)'
mergeTestResults: true
- testRunTitle: Installer-${{ parameters.name }}-$(_BuildConfig)
+ testRunTitle: Installer-${{ parameters.runtimeFlavor }}-${{ parameters.name }}-$(_BuildConfig)
continueOnError: true
condition: eq(variables.SkipTests, false)
@@ -37,6 +38,6 @@ steps:
displayName: Publish BuildLogs
inputs:
targetPath: '$(Build.StagingDirectory)/BuildLogs'
- artifactName: Installer-Logs-${{ parameters.name }}-$(_BuildConfig)
+ artifactName: Installer-Logs-${{ parameters.runtimeFlavor }}-${{ parameters.runtimeVariant }}-${{ parameters.name }}-$(_BuildConfig)
continueOnError: true
condition: succeededOrFailed()
diff --git a/eng/pipelines/libraries/base-job.yml b/eng/pipelines/libraries/base-job.yml
index df6f5e31a73468..b1a801f9657897 100644
--- a/eng/pipelines/libraries/base-job.yml
+++ b/eng/pipelines/libraries/base-job.yml
@@ -5,8 +5,8 @@ parameters:
osSubgroup: ''
crossrootfsDir: ''
framework: ''
- isOfficialBuild: false
isOfficialAllConfigurations: false
+ isSourceBuild: false
liveRuntimeBuildConfig: ''
runtimeFlavor: 'coreclr'
timeoutInMinutes: 150
@@ -54,7 +54,7 @@ jobs:
- ${{ if ne(parameters.testScope, '') }}:
- _testScopeArg: -testscope ${{ parameters.testScope }}
- - ${{ if eq(parameters.osGroup, 'Linux') }}:
+ - ${{ if in(parameters.osGroup, 'Linux', 'FreeBSD') }}:
- _crossBuildPropertyArg: /p:CrossBuild=${{ ne(parameters.crossrootfsDir, '') }}
- ${{ if and(eq(parameters.osGroup, 'Linux'), eq(parameters.osSubGroup, '_musl')) }}:
@@ -63,20 +63,8 @@ jobs:
- ${{ if and(eq(parameters.osGroup, 'Linux'), eq(parameters.osSubGroup, ''), eq(parameters.archType, 'arm')) }}:
- _runtimeOSArg: /p:RuntimeOS=ubuntu.16.04
- # force a value for OS when cross-building WebAssembly
- - ${{ if eq(parameters.osGroup, 'WebAssembly') }}:
- - _runtimeOSArg: -os ${{ parameters.osGroup }}
-
- # force a value for OS when cross-building tvOS on OSX
- - ${{ if eq(parameters.osGroup, 'tvOS') }}:
- - _runtimeOSArg: -os ${{ parameters.osGroup }}
-
- # force a value for OS when cross-building iOS on OSX
- - ${{ if eq(parameters.osGroup, 'iOS') }}:
- - _runtimeOSArg: -os ${{ parameters.osGroup }}
-
- # force a value for OS when cross-building Android on Linux
- - ${{ if eq(parameters.osGroup, 'Android') }}:
+ # force a value for OS when cross-building
+ - ${{ if in(parameters.osGroup, 'Browser', 'iOS', 'tvOS', 'Android', 'FreeBSD') }}:
- _runtimeOSArg: -os ${{ parameters.osGroup }}
- ${{ if ne(parameters.framework, '') }}:
@@ -103,7 +91,7 @@ jobs:
- _runtimeConfigurationArg: -rc ${{ parameters.liveRuntimeBuildConfig }}
# Download full product dependencies for mono or test
- ${{ if or(ne(parameters.runtimeFlavor, 'coreclr'), ne(parameters.testScope, '')) }}:
- - _runtimeArtifactName: '$(runtimeFlavorName)Product_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.liveRuntimeBuildConfig }}'
+ - _runtimeArtifactName: '$(runtimeFlavorName)Product_${{ parameters.runtimeVariant}}_${{ parameters.osGroup }}${{ parameters.osSubgroup }}_${{ parameters.archType }}_${{ parameters.liveRuntimeBuildConfig }}'
- _runtimeArtifactsPathArg: ' /p:RuntimeArtifactsPath=$(_runtimeDownloadPath)'
- _testRunNamePrefixSuffix: $(runtimeFlavorName)_${{ parameters.liveRuntimeBuildConfig }}
diff --git a/eng/pipelines/libraries/build-job.yml b/eng/pipelines/libraries/build-job.yml
index c541e688803d21..f33f413f457eef 100644
--- a/eng/pipelines/libraries/build-job.yml
+++ b/eng/pipelines/libraries/build-job.yml
@@ -7,6 +7,7 @@ parameters:
framework: ''
isOfficialBuild: false
isOfficialAllConfigurations: false
+ runtimeVariant: ''
# When set to a non-empty value (Debug / Release), it determines the runtime's
# build configuration to use for building libraries and tests. Setting this
@@ -43,6 +44,7 @@ jobs:
container: ${{ parameters.container }}
condition: ${{ parameters.condition }}
pool: ${{ parameters.pool }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
testScope: ${{ parameters.testScope }}
name: build
displayName: 'Build'
@@ -51,13 +53,13 @@ jobs:
dependsOn:
# Use full product dependency for non-coreclr and test builds
- ${{ if or(ne(parameters.runtimeFlavor, 'coreclr'), ne(parameters.testScope, '')) }}:
- - ${{ format('{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeFlavor, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveRuntimeBuildConfig) }}
+ - ${{ format('{0}_{1}_product_build_{2}{3}_{4}_{5}', parameters.runtimeFlavor, parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveRuntimeBuildConfig) }}
variables:
- _subset: libs
- _additionalBuildArguments: ''
- ${{ parameters.variables }}
- - ${{ if eq(parameters.osGroup, 'WebAssembly') }}:
+ - ${{ if eq(parameters.osGroup, 'Browser') }}:
- EMSDK_PATH: /usr/local/emscripten
# for coreclr library builds (when not testing) build corelib as well.
- ${{ if and(eq(parameters.runtimeFlavor, 'coreclr'), eq(parameters.testScope, '')) }}:
@@ -70,24 +72,30 @@ jobs:
- ${{ parameters.variables }}
steps:
- - ${{ if eq(parameters.osGroup, 'OSX') }}:
- - script: |
- brew install pkgconfig icu4c openssl
- brew link --force icu4c
- ln -s /usr/local/opt/openssl/lib/pkgconfig/libcrypto.pc /usr/local/lib/pkgconfig/
- ln -s /usr/local/opt/openssl/lib/pkgconfig/libssl.pc /usr/local/lib/pkgconfig/
- ln -s /usr/local/opt/openssl/lib/pkgconfig/openssl.pc /usr/local/lib/pkgconfig/
- displayName: Install Build Dependencies
-
- ${{ if eq(parameters.isOfficialBuild, true) }}:
- template: /eng/pipelines/common/restore-internal-tools.yml
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS', 'tvOS') }}:
+ - script: $(Build.SourcesDirectory)/eng/install-native-dependencies.sh ${{ parameters.osGroup }}
+ displayName: Install Build Dependencies
+
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
+
- script: $(_buildScript)
-subset $(_subset)
$(_buildArguments)
$(_additionalBuildArguments)
displayName: Restore and Build Product
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
- ${{ if eq(parameters.runTests, false) }}:
- ${{ if ne(parameters.isOfficialBuild, true) }}:
- task: CopyFiles@2
@@ -145,12 +153,6 @@ jobs:
targetFolder: $(Build.ArtifactStagingDirectory)/artifacts/packages
condition: and(succeeded(), eq(variables['_librariesBuildProducedPackages'], true))
- - task: CopyFiles@2
- displayName: Prepare tmp assets to publish
- inputs:
- sourceFolder: $(Build.SourcesDirectory)/artifacts/tmp
- targetFolder: $(Build.ArtifactStagingDirectory)/artifacts/tmp
-
- template: /eng/pipelines/common/upload-artifact-step.yml
parameters:
rootFolder: $(Build.ArtifactStagingDirectory)/artifacts
diff --git a/eng/pipelines/libraries/build-test-job.yml b/eng/pipelines/libraries/build-test-job.yml
index 82da2388581bf7..0ce715add47c9d 100644
--- a/eng/pipelines/libraries/build-test-job.yml
+++ b/eng/pipelines/libraries/build-test-job.yml
@@ -7,6 +7,7 @@ parameters:
isOfficialBuild: false
liveRuntimeBuildConfig: ''
runtimeFlavor: 'coreclr'
+ runtimeVariant: ''
timeoutInMinutes: 150
container: ''
publishTestArtifacs: true
@@ -29,6 +30,7 @@ jobs:
liveRuntimeBuildConfig: ${{ parameters.liveRuntimeBuildConfig }}
timeoutInMinutes: ${{ parameters.timeoutInMinutes }}
container: ${{ parameters.container }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
pool: ${{ parameters.pool }}
testScope: ${{ parameters.testScope }}
name: test_build
@@ -38,7 +40,7 @@ jobs:
- ${{ format('libraries_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
# Libraries Test also depends on Product, now that the libraries build only depends on corelib
- ${{ if ne(parameters.liveRuntimeBuildConfig, '') }}:
- - ${{ format('{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeFlavor, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveRuntimeBuildConfig) }}
+ - ${{ format('{0}_{1}_product_build_{2}{3}_{4}_{5}', parameters.runtimeFlavor, parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveRuntimeBuildConfig) }}
variables:
- librariesTestsArtifactName: ${{ format('libraries_test_assets_{0}_{1}_{2}', parameters.osGroup, parameters.archType, parameters.buildConfig) }}
@@ -55,12 +57,24 @@ jobs:
unpackFolder: $(Build.SourcesDirectory)/artifacts
cleanUnpackFolder: false
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
+
- script: $(_buildScript)
-subset libs.pretest+libs.tests
$(_buildArguments)
$(_archiveTestsParameter)
displayName: Restore and Build
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
- template: /eng/pipelines/common/upload-artifact-step.yml
parameters:
rootFolder: $(Build.SourcesDirectory)/artifacts/helix
diff --git a/eng/pipelines/libraries/helix-queues-setup.yml b/eng/pipelines/libraries/helix-queues-setup.yml
index 10b99697d0b734..7e450f8f4c0d00 100644
--- a/eng/pipelines/libraries/helix-queues-setup.yml
+++ b/eng/pipelines/libraries/helix-queues-setup.yml
@@ -7,6 +7,7 @@ parameters:
container: ''
pool: ''
platform: ''
+ runtimeFlavorDisplayName: ''
jobParameters: {}
jobs:
@@ -18,6 +19,7 @@ jobs:
archType: ${{ parameters.archType }}
container: ${{ parameters.container }}
pool: ${{ parameters.pool }}
+ runtimeFlavorDisplayName: ${{ parameters.runtimeFlavorDisplayName }}
helixQueues:
# Linux arm
@@ -56,8 +58,8 @@ jobs:
- Ubuntu.1804.Amd64.Open
- SLES.12.Amd64.Open
- SLES.15.Amd64.Open
- - (Fedora.29.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:fedora-29-helix-a12566d-20191210224553
- (Fedora.30.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:fedora-30-helix-4f8cef7-20200121150022
+ - (Fedora.32.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:fedora-32-helix-20200512010618-efb9f14
- (Ubuntu.1910.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-19.10-helix-amd64-cfcfd50-20191030180623
- (Debian.10.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:debian-10-helix-amd64-bfcd90a-20200121150006
- ${{ if eq(parameters.jobParameters.isFullMatrix, false) }}:
@@ -67,7 +69,7 @@ jobs:
- Ubuntu.1604.Amd64.Open
- Ubuntu.1804.Amd64.Open
- SLES.15.Amd64.Open
- - (Fedora.29.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:fedora-29-helix-a12566d-20191210224553
+ - (Fedora.30.Amd64.Open)ubuntu.1604.amd64.open@mcr.microsoft.com/dotnet-buildtools/prereqs:fedora-30-helix-4f8cef7-20200121150022
# OSX x64
- ${{ if eq(parameters.platform, 'OSX_x64') }}:
@@ -86,14 +88,16 @@ jobs:
# netcoreapp
- ${{ if notIn(parameters.jobParameters.framework, 'allConfigurations', 'net472') }}:
- ${{ if eq(parameters.jobParameters.isFullMatrix, true) }}:
- - Windows.7.Amd64.Open
+ # Bring back once: https://github.com/dotnet/runtime/issues/35689 is fixed
+ # - Windows.7.Amd64.Open
- Windows.81.Amd64.Open
- Windows.10.Amd64.ServerRS5.Open
- Windows.10.Amd64.Server19H1.Open
- ${{ if ne(parameters.jobParameters.runtimeFlavor, 'mono') }}:
- (Windows.Nano.1809.Amd64.Open)windows.10.amd64.serverrs5.open@mcr.microsoft.com/dotnet-buildtools/prereqs:nanoserver-1809-helix-amd64-08e8e40-20200107182504
- ${{ if eq(parameters.jobParameters.isFullMatrix, false) }}:
- - Windows.7.Amd64.Open
+ # Bring back once: https://github.com/dotnet/runtime/issues/35689 is fixed
+ # - Windows.7.Amd64.Open
- Windows.81.Amd64.Open
- Windows.10.Amd64.Server19H1.ES.Open
- ${{ if ne(parameters.jobParameters.runtimeFlavor, 'mono') }}:
@@ -112,22 +116,30 @@ jobs:
# netcoreapp
- ${{ if notIn(parameters.jobParameters.framework, 'allConfigurations', 'net472') }}:
- ${{ if eq(parameters.jobParameters.isFullMatrix, true) }}:
- # TODO: Reopen when https://github.com/dotnet/runtime/issues/32231 is fixed
- #- Windows.7.Amd64.Open
- #- Windows.81.Amd64.Open
+ - Windows.7.Amd64.Open
+ # Bring back once: https://github.com/dotnet/runtime/issues/35689 is fixed
+ # - Windows.81.Amd64.Open
- Windows.10.Amd64.ServerRS5.Open
- Windows.10.Amd64.Server19H1.Open
- ${{ if eq(parameters.jobParameters.isFullMatrix, false) }}:
- ${{ if eq(parameters.jobParameters.buildConfig, 'Release') }}:
- # TODO: Reopen when https://github.com/dotnet/runtime/issues/32231 is fixed
- #- Windows.7.Amd64.Open
- #- Windows.81.Amd64.Open
- Windows.10.Amd64.Server19H1.ES.Open
- ${{ if eq(parameters.jobParameters.buildConfig, 'Debug') }}:
+ - Windows.7.Amd64.Open
+ # Bring back once: https://github.com/dotnet/runtime/issues/35689 is fixed
+ # - Windows.81.Amd64.Open
- Windows.10.Amd64.Server19H1.Open
# NET472
- ${{ if eq(parameters.jobParameters.framework, 'net472') }}:
- Windows.10.Amd64.Client19H1.Open
+ # Windows_NT arm
+ - ${{ if eq(parameters.platform, 'Windows_NT_arm') }}:
+ - Windows.10.Arm64v8.Open
+
+ # Windows_NT arm64
+ - ${{ if eq(parameters.platform, 'Windows_NT_arm64') }}:
+ - Windows.10.Arm64.Open
+
${{ insert }}: ${{ parameters.jobParameters }}
diff --git a/eng/pipelines/libraries/run-test-job.yml b/eng/pipelines/libraries/run-test-job.yml
index 7d982c09e72024..053d7f90044ae1 100644
--- a/eng/pipelines/libraries/run-test-job.yml
+++ b/eng/pipelines/libraries/run-test-job.yml
@@ -9,6 +9,7 @@ parameters:
runtimeFlavor: 'coreclr'
timeoutInMinutes: 150
pool: ''
+ runtimeVariant: ''
testScope: ''
helixQueues: []
dependsOnTestBuildConfiguration: Debug
@@ -27,6 +28,7 @@ jobs:
isOfficialBuild: ${{ parameters.isOfficialBuild }}
liveRuntimeBuildConfig: ${{ parameters.liveRuntimeBuildConfig }}
runtimeFlavor: ${{ parameters.runtimeFlavor }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
timeoutInMinutes: ${{ parameters.timeoutInMinutes }}
container: '' # we just send to helix, no need to use a container.
condition: ${{ parameters.condition }}
@@ -47,7 +49,7 @@ jobs:
- ${{ format('libraries_build_{0}_{1}{2}_{3}_{4}', parameters.framework, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- ${{ format('libraries_test_build_{0}_{1}_{2}_{3}', parameters.framework, parameters.osGroup, parameters.dependsOnTestArchitecture, parameters.dependsOnTestBuildConfiguration) }}
- ${{ if ne(parameters.liveRuntimeBuildConfig, '') }}:
- - ${{ format('{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeFlavor, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveRuntimeBuildConfig) }}
+ - ${{ format('{0}_{1}_product_build_{2}{3}_{4}_{5}', parameters.runtimeFlavor, parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.liveRuntimeBuildConfig) }}
variables:
- librariesTestsArtifactName: ${{ format('libraries_test_assets_{0}_{1}_{2}', parameters.osGroup, parameters.dependsOnTestArchitecture, parameters.dependsOnTestBuildConfiguration) }}
diff --git a/eng/pipelines/libraries/stress/http.yml b/eng/pipelines/libraries/stress/http.yml
index 9c34a658bfe0a6..2d7dbb6860b2b4 100644
--- a/eng/pipelines/libraries/stress/http.yml
+++ b/eng/pipelines/libraries/stress/http.yml
@@ -56,7 +56,7 @@ jobs:
steps:
- checkout: self
clean: true
- fetchDepth: 1
+ fetchDepth: 5
lfs: false
- pwsh: |
diff --git a/eng/pipelines/libraries/stress/ssl.yml b/eng/pipelines/libraries/stress/ssl.yml
index 11e3f0dba5f234..88e20efce027a1 100644
--- a/eng/pipelines/libraries/stress/ssl.yml
+++ b/eng/pipelines/libraries/stress/ssl.yml
@@ -57,7 +57,7 @@ jobs:
steps:
- checkout: self
clean: true
- fetchDepth: 1
+ fetchDepth: 5
lfs: false
- pwsh: |
diff --git a/eng/pipelines/mono/templates/build-job.yml b/eng/pipelines/mono/templates/build-job.yml
index 40f952dac00522..901bab9a0f6609 100644
--- a/eng/pipelines/mono/templates/build-job.yml
+++ b/eng/pipelines/mono/templates/build-job.yml
@@ -9,7 +9,7 @@ parameters:
variables: {}
pool: ''
condition: true
- llvm: false
+ runtimeVariant: ''
isOfficialBuild: false
crossrootfsDir: ''
@@ -24,20 +24,13 @@ jobs:
helixType: 'build/product/'
enableMicrobuild: true
pool: ${{ parameters.pool }}
- llvm: ${{ parameters.llvm }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
crossrootfsDir: ${{ parameters.crossroofsDir }}
condition: ${{ parameters.condition }}
# Compute job name from template parameters
- ${{ if ne(parameters.llvm, true) }}:
- name: ${{ format('mono_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- displayName: ${{ format('Mono Product Build {0}{1} {2} {3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
-
- # if LLVM enabled, set a variable we can consume
- ${{ if eq(parameters.llvm, true) }}:
- name: ${{ format('mono_llvm_product_build_{0}{1}_{2}_{3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
- displayName: ${{ format('Mono LLVM Product Build {0}{1} {2} {3}', parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
-
+ name: ${{ format('mono_{0}_product_build_{1}{2}_{3}_{4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
+ displayName: ${{ format('Mono {0} Product Build {1}{2} {3} {4}', parameters.runtimeVariant, parameters.osGroup, parameters.osSubgroup, parameters.archType, parameters.buildConfig) }}
# Run all steps in the container.
# Note that the containers are defined in platform-matrix.yml
@@ -74,13 +67,19 @@ jobs:
- ${{ if eq(parameters.osGroup, 'Android') }}:
- name: osOverride
value: -os Android
- - ${{ if eq(parameters.osGroup, 'WebAssembly') }}:
+ - ${{ if eq(parameters.osGroup, 'Browser') }}:
- name: EMSDK_PATH
value: /usr/local/emscripten
- name: archType
value: wasm
- name: osOverride
- value: '-os WebAssembly'
+ value: '-os Browser'
+ - ${{ if eq(parameters.runtimeVariant, 'llvmjit') }}:
+ - name: llvmParameter
+ value: /p:MonoEnableLLVM=true /p:MonoBundleLLVMOptimizer=false
+ - ${{ if eq(parameters.runtimeVariant, 'llvmaot') }}:
+ - name: llvmParameter
+ value: /p:MonoEnableLLVM=true /p:MonoBundleLLVMOptimizer=true
- ${{ parameters.variables }}
steps:
@@ -90,21 +89,33 @@ jobs:
# and FreeBSD builds use a build agent with dependencies
# preinstalled, so we only need this step for OSX and Windows.
- ${{ if in(parameters.osGroup, 'OSX', 'iOS', 'tvOS') }}:
- - script: sh $(Build.SourcesDirectory)/eng/install-native-dependencies.sh $(osGroup)
+ - script: $(Build.SourcesDirectory)/eng/install-native-dependencies.sh $(osGroup)
displayName: Install native dependencies
- ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
# Necessary to install python
- script: $(Build.SourcesDirectory)\eng\common\init-tools-native.cmd -InstallDirectory $(Build.SourcesDirectory)\native-tools -Force
displayName: Install native dependencies
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage before Build
+
# Build
- ${{ if ne(parameters.osGroup, 'Windows_NT') }}:
- - script: ./build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci /p:MonoEnableLLVM=${{ parameters.llvm }}
+ - script: ./build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci $(officialBuildIdArg) $(llvmParameter)
displayName: Build product
- ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
- - script: build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci /p:MonoEnableLLVM=${{ parameters.llvm }}
+ - script: build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci $(officialBuildIdArg) $(llvmParameter)
displayName: Build product
+ - ${{ if in(parameters.osGroup, 'OSX', 'iOS','tvOS') }}:
+ - script: |
+ du -sh $(Build.SourcesDirectory)/*
+ df -h
+ displayName: Disk Usage after Build
+
# Publish product output directory for consumption by tests.
- template: /eng/pipelines/common/upload-artifact-step.yml
parameters:
@@ -117,15 +128,15 @@ jobs:
displayName: 'product build'
# Build packages
- - ${{ if and(ne(parameters.llvm, true), ne(parameters.osGroup, 'Windows_NT')) }}:
- - script: ./build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci $(officialBuildIdArg) /p:MonoEnableLLVM=${{ parameters.llvm }} -pack $(OutputRidArg)
+ - ${{ if ne(parameters.osGroup, 'Windows_NT') }}:
+ - script: ./build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci $(officialBuildIdArg) $(llvmParameter) -pack $(OutputRidArg)
displayName: Build nupkg
- - ${{ if and(ne(parameters.llvm, true), eq(parameters.osGroup, 'Windows_NT')) }}:
- - script: build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci $(officialBuildIdArg) /p:MonoEnableLLVM=${{ parameters.llvm }} -pack $(OutputRidArg)
+ - ${{ if eq(parameters.osGroup, 'Windows_NT') }}:
+ - script: build$(scriptExt) -subset mono -c $(buildConfig) -arch $(archType) $(osOverride) -ci $(officialBuildIdArg) $(llvmParameter) -pack $(OutputRidArg)
displayName: Build nupkg
# Publish official build
- - ${{ if and(ne(parameters.llvm, true), eq(parameters.publishToBlobFeed, 'true')) }}:
+ - ${{ if eq(parameters.publishToBlobFeed, 'true') }}:
- ${{ if ne(parameters.osGroup, 'Windows_NT') }}:
- script: $(Build.SourcesDirectory)/eng/common/build.sh --ci --restore --publish --configuration $(_BuildConfig) /p:DotNetPublishUsingPipelines=true /p:DotNetPublishToBlobFeed=true /p:DotNetPublishBlobFeedUrl=$(dotnetfeedUrl) /p:DotNetPublishBlobFeedKey=$(dotnetfeedPAT) /p:Configuration=$(_BuildConfig) /p:TargetArchitecture=$(archType) /p:TargetOS=$(osGroup) /p:OSIdentifier=$(osGroup)$(osSubgroup) /bl:"$(Build.SourcesDirectory)/artifacts/log/publish-pkgs.binlog" --projects $(Build.SourcesDirectory)/eng/empty.csproj
displayName: Publish packages to blob feed
@@ -148,9 +159,6 @@ jobs:
displayName: Publish Logs
inputs:
targetPath: $(Build.SourcesDirectory)/artifacts/log
- ${{ if ne(parameters.llvm, true) }}:
- artifactName: 'BuildLogs_Mono_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
- ${{ if eq(parameters.llvm, true) }}:
- artifactName: 'BuildLogs_Mono_LLVM_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
+ artifactName: 'BuildLogs_Mono_${{ parameters.runtimeVariant }}_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
continueOnError: true
condition: always()
diff --git a/eng/pipelines/mono/templates/xplat-job.yml b/eng/pipelines/mono/templates/xplat-job.yml
index 2cd61dc7e7f3e4..899f36ef85ad81 100644
--- a/eng/pipelines/mono/templates/xplat-job.yml
+++ b/eng/pipelines/mono/templates/xplat-job.yml
@@ -90,6 +90,12 @@ jobs:
- name: osSubgroup
value: ${{ parameters.osSubgroup }}
+ - name: coreClrRepoRoot
+ value: '$(Build.SourcesDirectory)/src/coreclr'
+
+ - name: coreClrRepoRootDir
+ value: '$(coreClrRepoRoot)$(dir)'
+
- ${{ if and(eq(variables['System.TeamProject'], 'internal'), ne(variables['Build.Reason'], 'PullRequest')) }}:
- name: _HelixSource
value: official/dotnet/runtime/$(Build.SourceBranch)
diff --git a/eng/pipelines/mono/templates/xplat-pipeline-job.yml b/eng/pipelines/mono/templates/xplat-pipeline-job.yml
index a0d65845203929..0701073c669c61 100644
--- a/eng/pipelines/mono/templates/xplat-pipeline-job.yml
+++ b/eng/pipelines/mono/templates/xplat-pipeline-job.yml
@@ -9,7 +9,8 @@ parameters:
liveLibrariesBuildConfig: ''
strategy: ''
pool: ''
- llvm: false
+ runtimeVariant: ''
+ liveRuntimeBuildConfig: 'release'
# arcade-specific parameters
condition: true
@@ -34,7 +35,7 @@ jobs:
container: ${{ parameters.container }}
strategy: ${{ parameters.strategy }}
pool: ${{ parameters.pool }}
- llvm: ${{ parameters.llvm }}
+ runtimeVariant: ${{ parameters.runtimeVariant }}
# arcade-specific parameters
condition: and(succeeded(), ${{ parameters.condition }})
@@ -46,15 +47,50 @@ jobs:
gatherAssetManifests: ${{ parameters.gatherAssetManifests }}
variables:
+ - name: coreClrProductArtifactName
+ value: 'CoreCLRProduct_${{ parameters.runtimeVariant }}_$(osGroup)$(osSubgroup)_$(archType)_${{ parameters.liveRuntimeBuildConfig }}'
+
+ - name: coreClrProductRootFolderPath
+ value: '$(Build.SourcesDirectory)/artifacts/bin/coreclr/$(osGroup).$(archType).$(liveRuntimeBuildConfigUpper)'
+
- name: buildProductArtifactName
- ${{ if ne(parameters.llvm, true) }}:
- value: 'MonoProduct_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
- ${{ if eq(parameters.llvm, true) }}:
- value: 'MonoProduct_LLVM_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
+ value: 'MonoProduct_${{ parameters.runtimeVariant }}_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
+
+ - name: binTestsPath
+ value: '$(Build.SourcesDirectory)/artifacts/tests/coreclr'
- name: buildProductRootFolderPath
value: '$(Build.SourcesDirectory)/artifacts/bin/mono/$(osGroup).$(archType).$(buildConfigUpper)'
+ - name: managedTestArtifactRootFolderPath
+ value: '$(binTestsPath)/$(osGroup).$(archType).$(buildConfigUpper)'
+
+ - name: managedTestArtifactName
+ value: 'CoreCLRManagedTestArtifacts_${{ parameters.managedTestBuildOsGroup }}${{ parameters.managedTestBuildOsSubgroup }}_$(archType)_$(buildConfig)'
+
+ - name: microsoftNetSdkIlFolderPath
+ value: '$(Build.SourcesDirectory)/.packages/microsoft.net.sdk.il'
+
+ - name: microsoftNetSdkIlArtifactName
+ value: 'MicrosoftNetSdkIlPackage_${{ parameters.managedTestBuildOsGroup }}${{ parameters.managedTestBuildOsSubgroup }}_$(archType)_$(buildConfig)'
+
+ - name: monoRepoRoot
+ value: '$(Build.SourcesDirectory)/src/mono'
+
+ - name: nativeTestArtifactName
+ value: 'CoreCLRNativeTestArtifacts_$(osGroup)$(osSubgroup)_$(archType)_$(buildConfig)'
+
+ - name: nativeTestArtifactRootFolderPath
+ value: '$(binTestsPath)/obj/$(osGroup).$(archType).$(buildConfigUpper)'
+
+ - name: liveRuntimeBuildConfigUpper
+ ${{ if eq(parameters.liveRuntimeBuildConfig, 'release') }}:
+ value: 'Release'
+ ${{ if eq(parameters.liveRuntimeBuildConfig, 'checked') }}:
+ value: 'Checked'
+ ${{ if eq(parameters.liveRuntimeBuildConfig, 'debug') }}:
+ value: 'Debug'
+
- librariesBuildArtifactName: ''
- librariesOverrideArg: ''
- librariesDownloadDir: ''
diff --git a/eng/pipelines/official/stages/publish.yml b/eng/pipelines/official/stages/publish.yml
index 260931d01cb438..48171955c3709d 100644
--- a/eng/pipelines/official/stages/publish.yml
+++ b/eng/pipelines/official/stages/publish.yml
@@ -18,8 +18,7 @@ stages:
publishUsingPipelines: true
dependsOn: PrepareSignedArtifacts
pool:
- name: NetCoreInternal-Pool
- queue: buildpool.windows.10.amd64.vs2017
+ vmImage: vs2017-win2016
# Stages-based publishing entry point
- template: /eng/common/templates/post-build/post-build.yml
diff --git a/eng/pipelines/runtime-official.yml b/eng/pipelines/runtime-official.yml
index e2cd3a2d67d962..45715a7bf11832 100644
--- a/eng/pipelines/runtime-official.yml
+++ b/eng/pipelines/runtime-official.yml
@@ -9,6 +9,7 @@ trigger:
- '*'
- docs/manpages/*
exclude:
+ - .github/*
- docs/*
- CODE-OF-CONDUCT.md
- CONTRIBUTING.md
@@ -76,13 +77,15 @@ stages:
- tvOS_x64
- tvOS_arm64
- iOS_x64
- # - iOS_arm # https://github.com/dotnet/runtime/issues/34465
+ - iOS_x86
+ - iOS_arm
- iOS_arm64
- OSX_x64
- Linux_x64
- Linux_arm
- Linux_arm64
- Linux_musl_x64
+ - Browser_wasm
# - Linux_musl_arm64
- Windows_NT_x64
# - Windows_NT_x86
@@ -91,6 +94,49 @@ stages:
jobParameters:
isOfficialBuild: ${{ variables.isOfficialBuild }}
+ #
+ # Build Mono LLVM release
+ #
+ - template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/mono/templates/build-job.yml
+ runtimeFlavor: mono
+ buildConfig: release
+ platforms:
+ - OSX_x64
+ - Linux_x64
+ # - Linux_arm
+ # - Linux_arm64
+ # - Linux_musl_x64
+ # - Linux_musl_arm64
+ # - Windows_NT_x64
+ # - Windows_NT_x86
+ # - Windows_NT_arm
+ # - Windows_NT_arm64
+ jobParameters:
+ runtimeVariant: LLVMJIT
+ isOfficialBuild: ${{ variables.isOfficialBuild }}
+
+ - template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/mono/templates/build-job.yml
+ runtimeFlavor: mono
+ buildConfig: release
+ platforms:
+ - OSX_x64
+ - Linux_x64
+ # - Linux_arm
+ # - Linux_arm64
+ # - Linux_musl_x64
+ # - Linux_musl_arm64
+ # - Windows_NT_x64
+ # - Windows_NT_x86
+ # - Windows_NT_arm
+ # - Windows_NT_arm64
+ jobParameters:
+ runtimeVariant: LLVMAOT
+ isOfficialBuild: ${{ variables.isOfficialBuild }}
+
#
# Build libraries using live CoreLib from CoreCLR
#
@@ -129,8 +175,10 @@ stages:
- tvOS_x64
- tvOS_arm64
- iOS_x64
- # - iOS_arm # https://github.com/dotnet/runtime/issues/34465
+ - iOS_x86
+ - iOS_arm
- iOS_arm64
+ - Browser_wasm
jobParameters:
isOfficialBuild: ${{ variables.isOfficialBuild }}
liveRuntimeBuildConfig: release
@@ -186,15 +234,50 @@ stages:
buildFullPlatformManifest: false
runtimeFlavor: mono
platforms:
+ - OSX_x64
+ - Linux_x64
- tvOS_x64
- tvOS_arm64
- # - iOS_arm # https://github.com/dotnet/runtime/issues/34465
+ - iOS_arm
- iOS_arm64
- iOS_x64
+ - iOS_x86
- Android_arm
- Android_arm64
- Android_x64
- Android_x86
+ - Browser_wasm
+
+ #
+ # Installer Build for platforms using Mono
+ #
+ - template: /eng/pipelines/installer/installer-matrix.yml
+ parameters:
+ jobParameters:
+ liveRuntimeBuildConfig: release
+ liveLibrariesBuildConfig: Release
+ isOfficialBuild: ${{ variables.isOfficialBuild }}
+ useOfficialAllConfigurations: false
+ buildFullPlatformManifest: false
+ runtimeVariant: LLVMJIT
+ runtimeFlavor: mono
+ platforms:
+ - OSX_x64
+ - Linux_x64
+
+ - template: /eng/pipelines/installer/installer-matrix.yml
+ parameters:
+ jobParameters:
+ liveRuntimeBuildConfig: release
+ liveLibrariesBuildConfig: Release
+ isOfficialBuild: ${{ variables.isOfficialBuild }}
+ useOfficialAllConfigurations: false
+ buildFullPlatformManifest: false
+ runtimeVariant: LLVMAOT
+ runtimeFlavor: mono
+ platforms:
+ - OSX_x64
+ - Linux_x64
- ${{ if eq(variables.isOfficialBuild, true) }}:
- template: /eng/pipelines/official/stages/publish.yml
diff --git a/eng/pipelines/runtime.yml b/eng/pipelines/runtime.yml
index 9a7b6d8ef5ea41..8d69c7586b860d 100644
--- a/eng/pipelines/runtime.yml
+++ b/eng/pipelines/runtime.yml
@@ -7,6 +7,7 @@ trigger:
branches:
include:
- master
+ - dev/infrastructure
- release/*.*
paths:
include:
@@ -14,6 +15,7 @@ trigger:
- docs/manpages/*
exclude:
- eng/Version.Details.xml
+ - .github/*
- docs/*
- CODE-OF-CONDUCT.md
- CONTRIBUTING.md
@@ -27,6 +29,7 @@ pr:
branches:
include:
- master
+ - dev/infrastructure
- release/*.*
paths:
include:
@@ -34,6 +37,7 @@ pr:
- docs/manpages/*
exclude:
- eng/Version.Details.xml
+ - .github/*
- docs/*
- CODE-OF-CONDUCT.md
- CONTRIBUTING.md
@@ -74,6 +78,8 @@ jobs:
- subset: mono
include:
- src/libraries/System.Private.CoreLib/*
+ - src/libraries/Native/Unix/System.Globalization.Native/*
+ - src/libraries/Native/Unix/Common/*
exclude:
- eng/Version.Details.xml
- '*.md'
@@ -101,6 +107,10 @@ jobs:
- eng/pipelines/coreclr/*
- eng/pipelines/mono/*
- eng/pipelines/installer/*
+ - subset: runtimetests
+ include:
+ - src/coreclr/tests/*
+ - src/coreclr/build-test.sh
- subset: installer
include:
- docs/manpages/*
@@ -197,6 +207,7 @@ jobs:
- Windows_NT_x86
- Windows_NT_arm
- Windows_NT_arm64
+ - FreeBSD_x64
jobParameters:
testGroup: innerloop
@@ -238,6 +249,7 @@ jobs:
- tvOS_x64
- tvOS_arm64
- iOS_x64
+ - iOS_x86
- iOS_arm
- iOS_arm64
- OSX_x64
@@ -245,7 +257,7 @@ jobs:
- Linux_arm
- Linux_arm64
- Linux_musl_x64
- - WebAssembly_wasm
+ - Browser_wasm
# - Linux_musl_arm64
- Windows_NT_x64
# - Windows_NT_x86
@@ -275,14 +287,14 @@ jobs:
- tvOS_x64
- tvOS_arm64
- iOS_x64
+ - iOS_x86
- iOS_arm
- iOS_arm64
- - OSX_x64
- Linux_x64
- Linux_arm
- Linux_arm64
- Linux_musl_x64
- - WebAssembly_wasm
+ - Browser_wasm
# - Linux_musl_arm64
- Windows_NT_x64
# - Windows_NT_x86
@@ -295,6 +307,27 @@ jobs:
eq(dependencies.checkout.outputs['SetPathVars_mono.containsChange'], true),
eq(variables['isFullMatrix'], true))
+#
+# Build Mono release
+# Only when libraries, mono, or the runtime tests changed
+# Currently only these architectures are needed for the runtime tests.
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/mono/templates/build-job.yml
+ runtimeFlavor: mono
+ buildConfig: release
+ platforms:
+ - OSX_x64
+ jobParameters:
+ condition: >-
+ or(
+ eq(dependencies.checkout.outputs['SetPathVars_libraries.containsChange'], true),
+ eq(dependencies.checkout.outputs['SetPathVars_runtimetests.containsChange'], true),
+ eq(dependencies.checkout.outputs['SetPathVars_mono.containsChange'], true),
+ eq(variables['isFullMatrix'], true))
+
+
+
#
# Build Mono LLVM debug
# Only when libraries or mono changed
@@ -316,7 +349,31 @@ jobs:
# - Windows_NT_arm
# - Windows_NT_arm64
jobParameters:
- llvm: true
+ runtimeVariant: LLVMJIT
+ condition: >-
+ or(
+ eq(dependencies.checkout.outputs['SetPathVars_libraries.containsChange'], true),
+ eq(dependencies.checkout.outputs['SetPathVars_mono.containsChange'], true),
+ eq(variables['isFullMatrix'], true))
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/mono/templates/build-job.yml
+ runtimeFlavor: mono
+ buildConfig: debug
+ platforms:
+ - OSX_x64
+ - Linux_x64
+ # - Linux_arm
+ # - Linux_arm64
+ # - Linux_musl_x64
+ # - Linux_musl_arm64
+ # - Windows_NT_x64
+ # - Windows_NT_x86
+ # - Windows_NT_arm
+ # - Windows_NT_arm64
+ jobParameters:
+ runtimeVariant: LLVMAOT
condition: >-
or(
eq(dependencies.checkout.outputs['SetPathVars_libraries.containsChange'], true),
@@ -344,7 +401,31 @@ jobs:
# - Windows_NT_arm
# - Windows_NT_arm64
jobParameters:
- llvm: true
+ runtimeVariant: LLVMJIT
+ condition: >-
+ or(
+ eq(dependencies.checkout.outputs['SetPathVars_libraries.containsChange'], true),
+ eq(dependencies.checkout.outputs['SetPathVars_mono.containsChange'], true),
+ eq(variables['isFullMatrix'], true))
+
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/mono/templates/build-job.yml
+ runtimeFlavor: mono
+ buildConfig: release
+ platforms:
+ - OSX_x64
+ - Linux_x64
+ # - Linux_arm
+ # - Linux_arm64
+ # - Linux_musl_x64
+ # - Linux_musl_arm64
+ # - Windows_NT_x64
+ # - Windows_NT_x86
+ # - Windows_NT_arm
+ # - Windows_NT_arm64
+ jobParameters:
+ runtimeVariant: LLVMAOT
condition: >-
or(
eq(dependencies.checkout.outputs['SetPathVars_libraries.containsChange'], true),
@@ -380,6 +461,7 @@ jobs:
- Linux_x64
- OSX_x64
- Windows_NT_x64
+ - FreeBSD_x64
jobParameters:
liveRuntimeBuildConfig: release
@@ -395,7 +477,7 @@ jobs:
- Android_x64
- Android_arm
- tvOS_arm64
- # - iOS_arm # https://github.com/dotnet/runtime/issues/34465
+ - iOS_arm
- iOS_x64
jobParameters:
liveRuntimeBuildConfig: release
@@ -410,7 +492,8 @@ jobs:
- Android_arm64
- tvOS_x64
- iOS_arm64
- - WebAssembly_wasm
+ - iOS_x86
+ - Browser_wasm
jobParameters:
liveRuntimeBuildConfig: debug
@@ -487,26 +570,27 @@ jobs:
- template: /eng/pipelines/installer/installer-matrix.yml
parameters:
- buildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+ buildConfig: Release
platforms:
- OSX_x64
- Linux_x64
- Linux_arm64
- Linux_musl_x64
- Windows_NT_x64
+ - FreeBSD_x64
jobParameters:
liveRuntimeBuildConfig: release
liveLibrariesBuildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
- template: /eng/pipelines/installer/installer-matrix.yml
parameters:
- buildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+ buildConfig: Release
runtimeFlavor: mono
platforms:
- Android_x64
- Android_arm
- tvOS_arm64
- # - iOS_arm # https://github.com/dotnet/runtime/issues/34465
+ - iOS_arm
- iOS_x64
jobParameters:
liveRuntimeBuildConfig: release
@@ -521,7 +605,35 @@ jobs:
- Android_arm64
- tvOS_x64
- iOS_arm64
+ - iOS_x86
+ - OSX_x64
+ - Linux_x64
+ - Browser_wasm
+ jobParameters:
+ liveRuntimeBuildConfig: release
+ liveLibrariesBuildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+
+- template: /eng/pipelines/installer/installer-matrix.yml
+ parameters:
+ buildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+ runtimeFlavor: mono
+ platforms:
+ - OSX_x64
+ - Linux_x64
jobParameters:
+ runtimeVariant: LLVMJIT
+ liveRuntimeBuildConfig: release
+ liveLibrariesBuildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+
+- template: /eng/pipelines/installer/installer-matrix.yml
+ parameters:
+ buildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+ runtimeFlavor: mono
+ platforms:
+ - OSX_x64
+ - Linux_x64
+ jobParameters:
+ runtimeVariant: LLVMAOT
liveRuntimeBuildConfig: release
liveLibrariesBuildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
@@ -573,7 +685,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: checked
platforms:
- Linux_arm
@@ -594,7 +706,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/build-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
buildConfig: checked
platforms:
- OSX_x64
@@ -615,7 +727,7 @@ jobs:
#
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
- Linux_arm
@@ -634,7 +746,7 @@ jobs:
- template: /eng/pipelines/common/platform-matrix.yml
parameters:
- jobTemplate: /eng/pipelines/coreclr/templates/run-test-job.yml
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
buildConfig: checked
platforms:
- OSX_x64
@@ -651,6 +763,50 @@ jobs:
eq(dependencies.checkout.outputs['SetPathVars_coreclr.containsChange'], true),
eq(variables['isFullMatrix'], true))
+#
+# Mono Test builds with CoreCLR runtime tests using live libraries debug build
+# Only when Mono is changed
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/common/templates/runtimes/build-test-job.yml
+ buildConfig: release
+ runtimeFlavor: mono
+ platforms:
+ - OSX_x64
+ - Linux_arm64
+ jobParameters:
+ testGroup: innerloop
+ liveLibrariesBuildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+ liveRuntimeBuildConfig: release
+ condition: >-
+ or(
+ eq(dependencies.checkout.outputs['SetPathVars_mono.containsChange'], true),
+ eq(dependencies.checkout.outputs['SetPathVars_runtimetests.containsChange'], true),
+ eq(variables['isFullMatrix'], true))
+
+#
+# Mono CoreCLR runtime Test executions using live libraries
+# Only when Mono is changed
+- template: /eng/pipelines/common/platform-matrix.yml
+ parameters:
+ jobTemplate: /eng/pipelines/common/templates/runtimes/run-test-job.yml
+ buildConfig: release
+ runtimeFlavor: mono
+ platforms:
+ - OSX_x64
+ - Linux_arm64
+ helixQueueGroup: pr
+ helixQueuesTemplate: /eng/pipelines/coreclr/templates/helix-queues-setup.yml
+ jobParameters:
+ testGroup: innerloop
+ liveLibrariesBuildConfig: ${{ variables.debugOnPrReleaseOnRolling }}
+ liveRuntimeBuildConfig: release
+ condition: >-
+ or(
+ eq(dependencies.checkout.outputs['SetPathVars_mono.containsChange'], true),
+ eq(dependencies.checkout.outputs['SetPathVars_runtimetests.containsChange'], true),
+ eq(variables['isFullMatrix'], true))
+
#
# Libraries Release Test Execution against a release mono runtime.
# Only when libraries or mono changed
@@ -689,6 +845,9 @@ jobs:
buildConfig: Release
platforms:
- Windows_NT_x86
+ - ${{ if eq(variables['isFullMatrix'], true) }}:
+ - Windows_NT_arm
+ - Windows_NT_arm64
helixQueuesTemplate: /eng/pipelines/libraries/helix-queues-setup.yml
jobParameters:
isOfficialBuild: false
diff --git a/eng/referenceFromRuntime.targets b/eng/referenceFromRuntime.targets
index 873e7e5ff40192..34d0eb49199c8c 100644
--- a/eng/referenceFromRuntime.targets
+++ b/eng/referenceFromRuntime.targets
@@ -1,5 +1,5 @@
-
+
AddRuntimeProjectReference;
$(PrepareProjectReferencesDependsOn);
@@ -19,7 +19,7 @@
+ Condition="'$(IsTestProject)' != 'true' and '$(IsTestSupportProject)' != 'true' and '@(ReferenceFromRuntime)' != ''">
%(Identity)
@@ -111,7 +111,7 @@
-
+
diff --git a/eng/references.targets b/eng/references.targets
index 0c104db2bb27bc..efcac7d0515214 100644
--- a/eng/references.targets
+++ b/eng/references.targets
@@ -21,7 +21,7 @@
-
@@ -36,7 +36,7 @@
-
+
-
-
\ No newline at end of file
diff --git a/eng/run-test.sh b/eng/run-test.sh
index abd1d920b1615a..5f14e6f6121bec 100644
--- a/eng/run-test.sh
+++ b/eng/run-test.sh
@@ -15,12 +15,12 @@ wait_on_pids()
usage()
{
- echo "Runs .NET CoreFX tests on FreeBSD, NetBSD or Linux"
+ echo "Runs .NET CoreFX tests on FreeBSD, Linux, NetBSD or SunOS"
echo "usage: run-test [options]"
echo
echo "Input sources:"
echo " --runtime Location of root of the binaries directory"
- echo " containing the FreeBSD, NetBSD or Linux runtime"
+ echo " containing the FreeBSD, Linux, NetBSD or SunOS runtime"
echo " default: /bin/testhost/netcoreapp---"
echo " --corefx-tests Location of the root binaries location containing"
echo " the tests to run"
@@ -29,7 +29,7 @@ usage()
echo "Flavor/OS/Architecture options:"
echo " --configuration Configuration to run (Debug/Release)"
echo " default: Debug"
- echo " --os OS to run (FreeBSD, NetBSD or Linux)"
+ echo " --os OS to run (FreeBSD, Linux, NetBSD or SunOS)"
echo " default: detect current OS"
echo " --arch Architecture to run (x64, arm, armel, x86, arm64)"
echo " default: detect current architecture"
@@ -236,34 +236,34 @@ done
# Compute paths to the binaries if they haven't already been computed
-if [ "$Runtime" == "" ]
+if [ -z "$Runtime" ]
then
Runtime="$ProjectRoot/artifacts/bin/testhost/netcoreapp-$OS-$Configuration-$__Arch"
fi
-if [ "$CoreFxTests" == "" ]
+if [ -z "$CoreFxTests" ]
then
CoreFxTests="$ProjectRoot/artifacts/bin"
fi
# Check parameters up front for valid values:
-if [ ! "$Configuration" == "Debug" ] && [ ! "$Configuration" == "Release" ]
+if [ "$Configuration" != "Debug" ] && [ "$Configuration" != "Release" ]
then
echo "error: Configuration should be Debug or Release"
exit 1
fi
-if [ ! "$OS" == "FreeBSD" ] && [ ! "$OS" == "NetBSD" ] && [ ! "$OS" == "Linux" ]
+if [ "$OS" != "FreeBSD" ] && [ "$OS" != "Linux" ] && [ "$OS" != "NetBSD" ] && [ "$OS" != "SunOS" ]
then
- echo "error: OS should be FreeBSD, NetBSD or Linux"
+ echo "error: OS should be FreeBSD, Linux, NetBSD or Linux"
exit 1
fi
export CORECLR_SERVER_GC="$serverGC"
export PAL_OUTPUTDEBUGSTRING="1"
-if [ "$LANG" == "" ]
+if [ -z "$LANG" ]
then
export LANG="en_US.UTF-8"
fi
@@ -285,7 +285,10 @@ if [ $RunTestSequential -eq 1 ]
then
maxProcesses=1;
else
- if [ `uname` = "NetBSD" ] || [ `uname` = "FreeBSD" ]; then
+ platform="$(uname)"
+ if [ "$platform" = "FreeBSD" ]; then
+ maxProcesses=$(sysctl hw.ncpu | awk '{ print $2+1 }')
+ if [ "$platform" = "NetBSD" ] || [ "$platform" = "SunOS" ] ; then
maxProcesses=$(($(getconf NPROCESSORS_ONLN)+1))
else
maxProcesses=$(($(getconf _NPROCESSORS_ONLN)+1))
diff --git a/eng/sdl-tsa-vars.config b/eng/sdl-tsa-vars.config
new file mode 100644
index 00000000000000..0b4659a0fe4f78
--- /dev/null
+++ b/eng/sdl-tsa-vars.config
@@ -0,0 +1,11 @@
+-SourceToolsList @("policheck","credscan")
+-TsaInstanceURL https://devdiv.visualstudio.com/
+-TsaProjectName DEVDIV
+-TsaNotificationEmail runtimerepo-infra@microsoft.com
+-TsaCodebaseAdmin REDMOND\danmose
+-TsaBugAreaPath "DevDiv\NET Runtime\Reliability\Docs"
+-TsaIterationPath DevDiv
+-TsaRepositoryName Runtime
+-TsaCodebaseName Runtime
+-TsaOnboard $True
+-TsaPublish $True
\ No newline at end of file
diff --git a/eng/targetframeworksuffix.props b/eng/targetframeworksuffix.props
new file mode 100644
index 00000000000000..f89923d3ab86ce
--- /dev/null
+++ b/eng/targetframeworksuffix.props
@@ -0,0 +1,84 @@
+
+
+
+
+ true
+ win
+
+
+
+
+ true
+ unix
+
+
+
+
+ true
+ true
+ linux
+
+
+
+
+ true
+ true
+ true
+ android
+
+
+
+
+ true
+ true
+ osx
+
+
+
+
+ true
+ true
+ tvos
+
+
+
+
+ true
+ true
+ ios
+
+
+
+
+ true
+ true
+ freebsd
+
+
+
+
+ true
+ true
+ netbsd
+
+
+
+
+ true
+ true
+ sunos
+
+
+
+
+ true
+ true
+
+
+
+
+ true
+
+
+
+
diff --git a/eng/testing/.runsettings b/eng/testing/.runsettings
new file mode 100644
index 00000000000000..fabc0310a7aa51
--- /dev/null
+++ b/eng/testing/.runsettings
@@ -0,0 +1,53 @@
+
+
+
+
+ 300000
+
+ .\TestResults\
+
+ .\
+
+ $$MAXCPUCOUNT$$
+
+ $$TARGETPLATFORM$$
+
+ $$DISABLEPARALLELIZATION$$
+
+ $$DISABLEAPPDOMAIN$$
+
+ $$TESTCASEFILTER$$
+ $$DOTNETHOSTPATH$$
+
+
+ $$DEVPATH$$
+
+
+
+
+
+
+ Minimal
+
+
+
+
+
+
+
+
+ $$COVERAGE_INCLUDE$$
+ $$COVERAGE_EXCLUDEBYFILE$$
+ $$COVERAGE_INCLUDEDIRECTORY$$
+ opencover
+ false
+ true
+ false
+
+
+
+
+
\ No newline at end of file
diff --git a/eng/testing/AndroidRunnerTemplate.sh b/eng/testing/AndroidRunnerTemplate.sh
new file mode 100644
index 00000000000000..1a683aa348986c
--- /dev/null
+++ b/eng/testing/AndroidRunnerTemplate.sh
@@ -0,0 +1,23 @@
+#!/usr/bin/env bash
+
+EXECUTION_DIR=$(dirname $0)
+TEST_NAME=$1
+TARGET_ARCH=$2
+
+APK=$EXECUTION_DIR/bin/$TEST_NAME.apk
+
+# it doesn't support parallel execution yet, so, here is a hand-made semaphore:
+LOCKDIR=/tmp/androidtests.lock
+while true; do
+ if mkdir "$LOCKDIR"
+ then
+ trap 'rm -rf "$LOCKDIR"' 0
+ break
+ else
+ sleep 5
+ fi
+done
+
+dotnet xharness android test -i="net.dot.MonoRunner" \
+ --package-name="net.dot.$TEST_NAME" \
+ --app=$APK -o=$EXECUTION_DIR/TestResults -v
diff --git a/eng/testing/AppleRunnerTemplate.sh b/eng/testing/AppleRunnerTemplate.sh
new file mode 100644
index 00000000000000..c146f7e0364b13
--- /dev/null
+++ b/eng/testing/AppleRunnerTemplate.sh
@@ -0,0 +1,52 @@
+#!/usr/bin/env bash
+
+EXECUTION_DIR=$(dirname $0)
+TEST_NAME=$1
+TARGET_ARCH=$2
+TARGET=
+SCHEME_SDK=
+
+if [ "$TARGET_ARCH" == "arm" ]; then
+ TARGET=ios-device
+ SCHEME_SDK=Release-iphoneos
+elif [ "$TARGET_ARCH" == "arm64" ]; then
+ TARGET=ios-device
+ SCHEME_SDK=Release-iphoneos
+elif [ "$TARGET_ARCH" == "x64" ]; then
+ TARGET=ios-simulator-64
+ SCHEME_SDK=Release-iphonesimulator
+elif [ "$TARGET_ARCH" == "x86" ]; then
+ TARGET=ios-simulator-32
+ SCHEME_SDK=Release-iphonesimulator
+else
+ echo "Unknown architecture: $TARGET_ARCH"
+ exit 1
+fi
+
+# "Release" in SCHEME_SDK is what xcode produces (see "bool Optimized" property in AppleAppBuilderTask)
+
+APP_BUNDLE=$EXECUTION_DIR/$TEST_NAME/$SCHEME_SDK/$TEST_NAME.app
+
+# it doesn't support parallel execution yet, so, here is a hand-made semaphore:
+LOCKDIR=/tmp/runonsim.lock
+while true; do
+ if mkdir "$LOCKDIR"
+ then
+ trap 'rm -rf "$LOCKDIR"' 0
+ break
+ else
+ sleep 5
+ fi
+done
+
+XHARNESS_OUT="$EXECUTION_DIR/xharness-output"
+
+dotnet xharness ios test --app="$APP_BUNDLE" \
+ --targets=$TARGET \
+ --output-directory=$XHARNESS_OUT
+
+_exitCode=$?
+
+echo "Xharness artifacts: $XHARNESS_OUT"
+
+exit $_exitCode
diff --git a/eng/testing/WasmRunnerTemplate.sh b/eng/testing/WasmRunnerTemplate.sh
new file mode 100644
index 00000000000000..2d4b8f95d4f491
--- /dev/null
+++ b/eng/testing/WasmRunnerTemplate.sh
@@ -0,0 +1,12 @@
+set -ev
+
+EXECUTION_DIR=$(dirname $0)
+TEST_NAME=$1
+TARGET_ARCH=$2
+
+echo "Test: $1 Arch: $2"
+
+cd $EXECUTION_DIR
+v8 --expose_wasm runtime.js -- --enable-gc --run WasmTestRunner.dll $TEST_NAME
+
+exit 0
diff --git a/eng/testing/coverage.props b/eng/testing/coverage.props
deleted file mode 100644
index 7af30267a5625a..00000000000000
--- a/eng/testing/coverage.props
+++ /dev/null
@@ -1,14 +0,0 @@
-
-
- coverage.xml
- 0
- line,branch,method
- opencover
- true
- normal
-
- $(CoverageOutputPath)
- Html
- Info
-
-
diff --git a/eng/testing/coverage.targets b/eng/testing/coverage.targets
index 3638e3efd7ca6b..6f8ac2648f06e7 100644
--- a/eng/testing/coverage.targets
+++ b/eng/testing/coverage.targets
@@ -1,44 +1,10 @@
-
-
-
- "$(TargetFileName)" --target "$(RunCommand)" --targetargs "$(RunArguments)" --format "$(CoverageFormat)" --output "$(CoverageOutputPath)" --threshold "$(CoverageThreshold)" --threshold-type "$(CoverageThresholdType)" --verbosity "$(CoverageVerbosity)"
- $(RunArguments) --use-source-link
- "$(DotNetTool)" tool run coverlet
-
-
-
-
- $([MSBuild]::NormalizeDirectory('$(OutDir)', 'report'))
- $([MSBuild]::NormalizePath('$(CoverageReportDir)', 'index.htm'))
- "$(DotNetTool)" tool run reportgenerator "-reports:$(CoverageReportInputPath)" "-targetdir:$(CoverageReportDir.TrimEnd('\/'))" "-reporttypes:$(CoverageReportTypes)" "-verbosity:$(CoverageReportVerbosity)"
-
-
-
-
-
-
+
-
- --exclude-by-file @(CoverageExcludeFile -> '"%(Identity)"', ' --exclude-by-file ')
- $(RunArguments) $(CoverageExcludeByFileFilter)
-
-
-
- --include-directory @(CoverageProbePath -> '"$(RunScriptHostDir)%(Identity)"', ' --include-directory ')
- $(RunArguments) $(IncludeDirectoriesFilter)
-
-
-
- --exclude @(CoverageExclude -> '"%(Identity)"', ' --exclude ')
- $(RunArguments) $(CoverageExcludeFilter)
-
-
-
+
<_ProjectDirectoryUnderSourceDir>$(MSBuildProjectDirectory.SubString($(LibrariesProjectRoot.Length)))
$(_ProjectDirectoryUnderSourceDir.SubString(0, $(_ProjectDirectoryUnderSourceDir.IndexOfAny("\\/"))))
@@ -48,15 +14,76 @@
CoverageAssemblies can be passed in to the build to gather coverage on additional assemblies.
-->
- <_CoverageAssemblies Include="$(AssemblyBeingTested)" />
- <_CoverageAssemblies Include="System.Private.CoreLib" Condition="'$(TestRuntime)' == 'true'" />
- <_CoverageAssemblies Include="@(AssembliesBeingTested)" />
- <_CoverageAssemblies Include="$(CoverageAssemblies)" Condition="'$(CoverageAssemblies)' != ''" />
+
-
- --include @(_CoverageAssemblies -> '"[%(Identity)]*"', ' --include ')
- $(RunArguments) $(CoverageFilter)
+
+ @(CoverageInclude -> '[%(Identity)]*', ',')
+
+
+ @(CoverageExcludeByFile -> '%(Identity)', ',')
+
+
+
+ @(CoverageIncludeDirectory -> '$(TestHostRootPath)%(Identity)', ',')
+
+
+
+
+
+
+ coverage.opencover.xml
+ $(CoverageOutputPath)
+ $([MSBuild]::NormalizeDirectory('$(OutDir)', 'report'))
+
+ "$(DotNetTool)" tool run coverlet "$(TargetFileName)" --target "$(RunScriptHost)" --targetargs "$(RunScriptCommand.Replace('"$(RunScriptHost)"', ''))" --format "opencover" --output "$(CoverageOutputPath)" --verbosity "normal" --use-source-link
+ $(RunScriptCommand) --exclude-by-file @(CoverageExcludeByFile -> '"%(Identity)"', ' --exclude-by-file ')
+ $(RunScriptCommand) --include-directory @(CoverageIncludeDirectory -> '"$(RunScriptHostDir)%(Identity)"', ' --include-directory ')
+ $(RunScriptCommand) --include @(CoverageInclude -> '"[%(Identity)]*"', ' --include ')
+ "$(DotNetTool)" tool run reportgenerator "-reports:$(CoverageReportInputPath)" "-targetdir:$(CoverageReportDir.TrimEnd('\/'))" "-reporttypes:Html" "-verbosity:Info"
+
+
+
+
+
+
+
+
+
+
+
+
+
+ %(CoverageOutputFile.Identity)
+ Html
+ Info
+ $([MSBuild]::NormalizeDirectory('$(OutDir)', 'TestResults', 'report'))
+ "$(DotNetTool)" tool run reportgenerator "-reports:$(CoverageReportInputPath)" "-targetdir:$(CoverageReportDir.TrimEnd('\/'))" "-reporttypes:$(CoverageReportTypes)" "-verbosity:$(CoverageReportVerbosity)"
+
+
+
+
+
+
+
+
diff --git a/eng/testing/launchSettings.json b/eng/testing/launchSettings.json
deleted file mode 100644
index 62d099feb3b7d8..00000000000000
--- a/eng/testing/launchSettings.json
+++ /dev/null
@@ -1,19 +0,0 @@
-{
- "profiles": {
- ".NET Core xUnit Console": {
- "commandName": "Executable",
- "executablePath": "$(TestHostRootPath)dotnet.exe",
- "commandLineArgs": "$(RunArguments) -parallel none",
- "workingDirectory": "$(RunWorkingDirectory)"
- },
- ".NET Framework xUnit Console": {
- "commandName": "Executable",
- "executablePath": "$(RunWorkingDirectory)$(RunCommand)",
- "commandLineArgs": "$(RunArguments) -parallel none",
- "workingDirectory": "$(RunWorkingDirectory)",
- "environmentVariables": {
- "DEVPATH": "$(TestHostRootPath)"
- }
- }
- }
-}
diff --git a/eng/testing/launchSettings.targets b/eng/testing/launchSettings.targets
deleted file mode 100644
index 6caf9475304570..00000000000000
--- a/eng/testing/launchSettings.targets
+++ /dev/null
@@ -1,22 +0,0 @@
-
-
-
- $(MSBuildThisFileDirectory)launchSettings.json
- $([MSBuild]::NormalizePath('$(MSBuildProjectDirectory)', '$(AppDesignerFolder)', 'launchSettings.json'))
- GenerateLaunchSettingsFile;$(PrepareForRunDependsOn);
-
-
-
-
-
-
\ No newline at end of file
diff --git a/eng/testing/runsettings.targets b/eng/testing/runsettings.targets
new file mode 100644
index 00000000000000..10496127b8a90a
--- /dev/null
+++ b/eng/testing/runsettings.targets
@@ -0,0 +1,53 @@
+
+
+ $(MSBuildThisFileDirectory).runsettings
+ $(ArtifactsObjDir)$(TargetOS)-$(Configuration)-$(TargetArchitecture).runsettings
+ $(OutDir).runsettings
+
+ false
+ $(RunSettingsIntermediateOutputFilePath)
+ $(RunSettingsAppOutputFilePath)
+
+
+ $(RunSettingsAppOutputFilePath)
+
+ $(RunSettingsIntermediateOutputFilePath)
+
+ GenerateRunSettingsFile;$(PrepareForRunDependsOn)
+
+
+
+ <_testFilter Condition="'$(_withCategories)' != ''">$(_withCategories.Replace(';', '&category='))
+ <_testFilter Condition="'$(_withoutCategories)' != ''">$(_testFilter)$(_withoutCategories.Replace(';', '&category!='))
+ <_testFilter>$(_testFilter.Trim('&'))
+
+
+
+
+ $([System.IO.File]::ReadAllText('$(RunSettingsInputFilePath)'))
+ $(RunSettingsFileContent.Replace('$$MAXCPUCOUNT$$', '1'))
+ $(RunSettingsFileContent.Replace('$$MAXCPUCOUNT$$', '0'))
+ $(RunSettingsFileContent.Replace('$$COVERAGE_INCLUDE$$', '$(CoverageIncludeFilter)')
+ .Replace('$$COVERAGE_EXCLUDEBYFILE$$', '$(CoverageExcludeByFileFilter)')
+ .Replace('$$COVERAGE_INCLUDEDIRECTORY$$', '$(CoverageIncludeDirectoryFilter)')
+ .Replace('$$COVERAGE_ENABLED$$', '$([MSBuild]::ValueOrDefault('$(Coverage)', 'false'))')
+ .Replace('$$TARGETPLATFORM$$', '$(TargetArchitecture)')
+ .Replace('$$DISABLEPARALLELIZATION$$', '$([MSBuild]::ValueOrDefault('$(TestDisableParallelization)', 'false'))')
+ .Replace('$$DISABLEAPPDOMAIN$$', '$([MSBuild]::ValueOrDefault('$(TestDisableAppDomain)', 'false'))')
+ .Replace('$$TESTCASEFILTER$$', '$(_testFilter)')
+ .Replace('$$DEVPATH$$', '$(TestHostRootPath)')
+ .Replace('$$DOTNETHOSTPATH$$', '$(TestHostRootPath)$([System.IO.Path]::GetFileName('$(DotNetTool)'))'))
+
+
+
+ $(RunSettingsOutputFilePath)
+
+
+
diff --git a/eng/testing/runtimeConfiguration.targets b/eng/testing/runtimeConfiguration.targets
index fdb81abbb18929..f687adfad40f97 100644
--- a/eng/testing/runtimeConfiguration.targets
+++ b/eng/testing/runtimeConfiguration.targets
@@ -1,10 +1,10 @@
- $(MSBuildThisFileDirectory)netfx.exe.config
+ $(MSBuildThisFileDirectory)netfx.exe.config
- true
+ true
@@ -19,11 +19,11 @@
Tracking issue: https://github.com/dotnet/sdk/issues/1675
-->
diff --git a/eng/testing/tests.mobile.targets b/eng/testing/tests.mobile.targets
new file mode 100644
index 00000000000000..3fd1594b73bd55
--- /dev/null
+++ b/eng/testing/tests.mobile.targets
@@ -0,0 +1,154 @@
+
+
+
+ $([MSBuild]::NormalizeDirectory('$(OutDir)', 'AppBundle'))
+ $([MSBuild]::NormalizePath('$(BundleDir)', '$(RunScriptOutputName)'))
+ true
+
+
+
+
+
+ arm64-v8a
+ armeabi-v7a
+ x86_64
+ x86
+
+
+
+
+
+
+
+
+
+
+ @(MonoAOTCompilerDefaultAotArguments, ';')
+ @(MonoAOTCompilerDefaultProcessArguments, ';')
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ <_runnerFilesToPublish Include="$(AndroidTestRunnerDir)*" Condition="'$(TargetOS)' == 'Android'" />
+ <_runnerFilesToPublish Include="$(AppleTestRunnerDir)*" Condition="'$(TargetOS)' == 'iOS' or '$(TargetOS)' == 'tvOS'" />
+ <_runnerFilesToPublish Include="$(WasmTestRunnerDir)*" Condition="'$(TargetOS)' == 'Browser'" />
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/eng/testing/tests.props b/eng/testing/tests.props
index dfaabfa18db038..cccce13b1c4546 100644
--- a/eng/testing/tests.props
+++ b/eng/testing/tests.props
@@ -5,12 +5,33 @@
Build
$(TestDependsOn);GenerateRunScript;RunTests
+ true
-
-
-
+
+
+ <_withCategories Condition="'$(WithCategories)' != ''">;$(WithCategories.Trim(';'))
+ <_withoutCategories Condition="'$(WithoutCategories)' != ''">;$(WithoutCategories.Trim(';'))
+
+ all
+ <_withCategories Condition="'$(TestScope)' == 'outerloop'">$(_withCategories);OuterLoop
+ <_withoutCategories Condition="'$(ArchiveTests)' == 'true'">$(_withoutCategories);IgnoreForCI
+ <_withoutCategories Condition="'$(TestScope)' == '' or '$(TestScope)' == 'innerloop'">$(_withoutCategories);OuterLoop
+ <_withoutCategories Condition="!$(_withCategories.Contains('failing'))">$(_withoutCategories);failing
+
+
+
+
+ $(NetCoreAppCurrent)-$(Configuration)
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'AppleTestRunner', '$(MobileRunnersDirSuffix)'))
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'AndroidTestRunner', '$(MobileRunnersDirSuffix)'))
+ $([MSBuild]::NormalizeDirectory('$(ArtifactsBinDir)', 'WasmTestRunner', '$(MobileRunnersDirSuffix)'))
+
+ $(PackageRID)
+ true
+ false
+
+
+
+
- $(RunArguments) %RSP_FILE%
- $(RunArguments) $RSP_FILE
+ $(RunScriptCommand) %RSP_FILE%
+ $(RunScriptCommand) $RSP_FILE
-
- $([MSBuild]::Escape('$(RunArguments)'))
-
- $(RunCommand) $(RunArguments)
+
+ $([MSBuild]::Escape('$(RunScriptCommand)'))
@@ -71,42 +75,26 @@
TemplatePath="$(RunScriptInputPath)"
OutputPath="$(RunScriptOutputPath)" />
-
-
-
-
-
-
-
- true
-
-
-
-
+
"$(RunScriptOutputPath)" --runtime-path "$(TestHostRootPath.TrimEnd('\/'))"
$(RunTestsCommand) --rsp-file "$(TestRspFile)"
+ "$(RunScriptOutputPath)" $(AssemblyName) $(TargetArchitecture)
- $(RunWorkingDirectory)$(TestResultsName)
+ $(OutputPath)$(TestResultsName)
One or more tests failed while running tests from '$(TestProjectName)'.
$(TestRunErrorMessage) Please check $(TestResultsPath) for details!
@@ -114,6 +102,7 @@
+
-
-
- en
- testResults.trx
- testResults.html
- $(HtmlTestResultsName)
- $(MSBuildThisFileDirectory)vstest.xunit.json
-
-
-
-
-
diff --git a/eng/testing/xunit/vstest.targets b/eng/testing/xunit/vstest.targets
deleted file mode 100644
index 3a638a442c0998..00000000000000
--- a/eng/testing/xunit/vstest.targets
+++ /dev/null
@@ -1,36 +0,0 @@
-
-
- "$(DotNetTool)"
- dotnet
- test $(TargetFileName)
-
-
- $(RunArguments) --nologo
- $(RunArguments) --logger "trx;LogFileName=$(TrxTestResultsName)"
- $(RunArguments) --logger "html;LogFileName=$(HtmlTestResultsName)"
- $(RunArguments) --framework $(TargetFramework)
- $(RunArguments) --platform $(TargetArchitecture)
- $(RunArguments) --parallel
- $(RunArguments) --blame
-
-
- <_testFilter Condition="'$(_withCategories)' != ''">$(_withCategories.Replace(';', '&category='))
- <_testFilter Condition="'$(_withoutCategories)' != ''">$(_testFilter)$(_withoutCategories.Replace(';', '&category!='))
-
- <_testFilter Condition="'$(TargetOS)' == 'Windows_NT'">$(_testFilter.Replace('!=', '^!='))
- <_testFilter>$(_testFilter.Trim('&'))
-
- <_testFilter Condition="'$(TestFilter)' != ''">$(_testFilter)&$(TestFilter.Replace('!=', '^!='))
-
- $(RunArguments) --filter "($(_testFilter))"
-
-
- $(RunArguments) $(XUnitOptions)
-
-
- $(RunSettingsOptions) RunConfiguration.DisableParallelization=true
- $(RunSettingsOptions) RunConfiguration.DisableAppDomain=true
- $(RunSettingsOptions) RunConfiguration.DotNetHostPath="$(RunScriptHost)"
- $(RunArguments) --$(RunSettingsOptions)
-
-
\ No newline at end of file
diff --git a/eng/testing/xunit/vstest.xunit.json b/eng/testing/xunit/vstest.xunit.json
deleted file mode 100644
index b81a78d00ad56e..00000000000000
--- a/eng/testing/xunit/vstest.xunit.json
+++ /dev/null
@@ -1,5 +0,0 @@
-{
- "diagnosticMessages": false,
- "longRunningTestSeconds": 120,
- "shadowCopy": false
-}
\ No newline at end of file
diff --git a/eng/testing/xunit/xunit.console.json b/eng/testing/xunit/xunit.console.json
deleted file mode 100644
index 5d2ac0433c91fe..00000000000000
--- a/eng/testing/xunit/xunit.console.json
+++ /dev/null
@@ -1,5 +0,0 @@
-{
- "diagnosticMessages": true,
- "longRunningTestSeconds": 120,
- "shadowCopy": false
-}
\ No newline at end of file
diff --git a/eng/testing/xunit/xunit.console.props b/eng/testing/xunit/xunit.console.props
deleted file mode 100644
index ad7ffdb52587fd..00000000000000
--- a/eng/testing/xunit/xunit.console.props
+++ /dev/null
@@ -1,23 +0,0 @@
-
-
- true
- testResults.xml
- $(MSBuildThisFileDirectory)xunit.console.json
-
-
-
-
-
diff --git a/eng/testing/xunit/xunit.console.targets b/eng/testing/xunit/xunit.console.targets
index 059eede7dcf42b..2824bd84107806 100644
--- a/eng/testing/xunit/xunit.console.targets
+++ b/eng/testing/xunit/xunit.console.targets
@@ -1,33 +1,51 @@
- $(TargetFileName)
- $(RunArguments) -xml $(TestResultsName)
- $(RunArguments) -nologo
- $(RunArguments) -nocolor
+ true
+ testResults.xml
+
+
+
+ <_depsFileArgument Condition="'$(GenerateDependencyFile)' == 'true'">--depsfile $(AssemblyName).deps.json
+ "$(RunScriptHost)" exec --runtimeconfig $(AssemblyName).runtimeconfig.json $(_depsFileArgument) xunit.console.dll
+ xunit.console.exe
+
+ $(RunScriptCommand) $(TargetFileName)
+ $(RunScriptCommand) -xml $(TestResultsName)
+ $(RunScriptCommand) -nologo
+ $(RunScriptCommand) -nocolor
- $(RunArguments) -maxthreads 1
- $(RunArguments) -method $(XUnitMethodName)
- $(RunArguments) -class $(XUnitClassName)
- $(RunArguments) -verbose
- $(RunArguments) -noappdomain
+ $(RunScriptCommand) -maxthreads 1
+ $(RunScriptCommand) -method $(XUnitMethodName)
+ $(RunScriptCommand) -class $(XUnitClassName)
+ $(RunScriptCommand) -verbose
+ $(RunScriptCommand) -noappdomain
- $(RunArguments)$(_withCategories.Replace(';', ' -trait category='))
- $(RunArguments)$(_withoutCategories.Replace(';', ' -notrait category='))
+ $(RunScriptCommand)$(_withCategories.Replace(';', ' -trait category='))
+ $(RunScriptCommand)$(_withoutCategories.Replace(';', ' -notrait category='))
- $(RunArguments) $(XUnitOptions)
+ $(RunScriptCommand) $(XUnitOptions)
+
+
+
<_testRunnerConfigSourceFile Include="$(TargetDir)$(TargetName).exe.config" />
- <_testRunnerConfigDestFile Include="$(TargetDir)$(_testRunnerName).config" />
+ <_testRunnerConfigDestFile Include="$(TargetDir)xunit.console.exe.config" />
-
-
- "$(RunScriptHost)"
- <_depsFileRunArgument Condition="'$(GenerateDependencyFile)' == 'true'">--depsfile $(AssemblyName).deps.json
- exec --runtimeconfig $(AssemblyName).runtimeconfig.json $(_depsFileRunArgument) xunit.console.dll $(RunArguments)
-
-
-
- <_testRunnerName>xunit.console.exe
- $(_testRunnerName)
-
-
diff --git a/eng/testing/xunit/xunit.props b/eng/testing/xunit/xunit.props
index 0b6289b9a22669..4032da19347661 100644
--- a/eng/testing/xunit/xunit.props
+++ b/eng/testing/xunit/xunit.props
@@ -1,6 +1,8 @@
- xunit.console
+
+ en
+ $(MSBuildThisFileDirectory)xunit.runner.json
@@ -11,6 +13,22 @@
-
+
+
+
+
+
diff --git a/eng/testing/xunit/xunit.runner.json b/eng/testing/xunit/xunit.runner.json
new file mode 100644
index 00000000000000..a879e62a4379e4
--- /dev/null
+++ b/eng/testing/xunit/xunit.runner.json
@@ -0,0 +1,6 @@
+{
+ "diagnosticMessages": true,
+ "longRunningTestSeconds": 120,
+ "shadowCopy": false,
+ "preEnumerateTheories": false
+}
\ No newline at end of file
diff --git a/eng/testing/xunit/xunit.targets b/eng/testing/xunit/xunit.targets
index 4583d682cfb705..b14d3b7cbf227c 100644
--- a/eng/testing/xunit/xunit.targets
+++ b/eng/testing/xunit/xunit.targets
@@ -1,41 +1,18 @@
+
- nonwindowstests
- nonlinuxtests
- nonosxtests
- nonfreebsdtests
- nonnetbsdtests
-
-
- <_withCategories Condition="'$(WithCategories)' != ''">;$(WithCategories.Trim(';'))
- <_withoutCategories Condition="'$(WithoutCategories)' != ''">;$(WithoutCategories.Trim(';'))
-
- all
- <_withCategories Condition="'$(TestScope)' == 'outerloop'">$(_withCategories);OuterLoop
- <_withoutCategories Condition="'$(ArchiveTests)' == 'true'">$(_withoutCategories);IgnoreForCI
- <_withoutCategories Condition="'$(TestScope)' == '' or '$(TestScope)' == 'innerloop'">$(_withoutCategories);OuterLoop
- <_withoutCategories Condition="!$(_withCategories.Contains('failing'))">$(_withoutCategories);failing
-
- <_targetCategory Condition="'$(TargetsNetCoreApp)' == 'true'">netcoreapp
- <_targetCategory Condition="'$(TargetsNetFx)' == 'true'">netfx
-
- <_withoutCategories>$(_withoutCategories);non$(_targetCategory)tests
- <_withoutCategories Condition="'$(TargetOSCategory)' != ''">$(_withoutCategories);$(TargetOSCategory)
+ $(OutDir)
-
-
+
+ $(DotNetTool)
+ test $(TargetPath) --settings $(OutDir).runsettings
+
-
-
+
+ $(DevEnvDir)Extensions\TestPlatform\vstest.console.exe
+ $(TargetPath) --settings:$(OutDir).runsettings
+
-
diff --git a/eng/versioning.targets b/eng/versioning.targets
index 9c2fc1cf8b3b51..21a442a03f3c0d 100644
--- a/eng/versioning.targets
+++ b/eng/versioning.targets
@@ -10,7 +10,7 @@
-
+
@@ -23,7 +23,7 @@
+ Condition="'$(IsDotNetFrameworkProductAssembly)' == 'true' and '$(IsTestProject)' != 'true' and '$(IsTestSupportProject)' != 'true'">
@@ -97,4 +97,39 @@
+
+
+
+
+ $(ArtifactsObjDir)runtime_version.h
+
+ <_RuntimeVersionFileContents>
+
+
+
+
+
diff --git a/global.json b/global.json
index 1c7dd9061e282d..1f55cf7ca46f2f 100644
--- a/global.json
+++ b/global.json
@@ -1,21 +1,21 @@
{
"sdk": {
- "version": "5.0.100-preview.4.20202.8",
+ "version": "5.0.100-preview.5.20251.2",
"allowPrerelease": true,
"rollForward": "major"
},
"tools": {
- "dotnet": "5.0.100-preview.4.20202.8"
+ "dotnet": "5.0.100-preview.5.20251.2"
},
"native-tools": {
"cmake": "3.14.2",
"python3": "3.7.1"
},
"msbuild-sdks": {
- "Microsoft.DotNet.Build.Tasks.TargetFramework.Sdk": "5.0.0-beta.20201.2",
- "Microsoft.DotNet.Arcade.Sdk": "5.0.0-beta.20201.2",
- "Microsoft.DotNet.Build.Tasks.SharedFramework.Sdk": "5.0.0-beta.20201.2",
- "Microsoft.DotNet.Helix.Sdk": "5.0.0-beta.20201.2",
+ "Microsoft.DotNet.Build.Tasks.TargetFramework.Sdk": "5.0.0-beta.20261.9",
+ "Microsoft.DotNet.Arcade.Sdk": "5.0.0-beta.20261.9",
+ "Microsoft.DotNet.Build.Tasks.SharedFramework.Sdk": "5.0.0-beta.20261.9",
+ "Microsoft.DotNet.Helix.Sdk": "5.0.0-beta.20261.9",
"FIX-85B6-MERGE-9C38-CONFLICT": "1.0.0",
"Microsoft.NET.Sdk.IL": "5.0.0-preview.4.20202.18",
"Microsoft.Build.NoTargets": "1.0.53",
diff --git a/src/coreclr/CMakeLists.txt b/src/coreclr/CMakeLists.txt
index 5fa572c4fcdf9c..efad61086e853d 100644
--- a/src/coreclr/CMakeLists.txt
+++ b/src/coreclr/CMakeLists.txt
@@ -25,12 +25,6 @@ set(GENERATED_EVENTING_DIR ${CMAKE_CURRENT_BINARY_DIR}/Eventing)
set(VERSION_FILE_PATH "${CMAKE_BINARY_DIR}/version.c")
set(PAL_REDEFINES_FILE ${CMAKE_CURRENT_SOURCE_DIR}/src/dlls/mscordac/palredefines.S)
-if(CLR_CMAKE_HOST_UNIX)
- set(CLR_DOTNET_COMMAND ${CLR_REPO_ROOT_DIR}/dotnet.sh)
-elseif(CLR_CMAKE_HOST_WIN32)
- set(CLR_DOTNET_COMMAND ${CLR_REPO_ROOT_DIR}/dotnet.cmd)
-endif(CLR_CMAKE_HOST_UNIX)
-
# Avoid logging when skipping up-to-date copies
set(CMAKE_INSTALL_MESSAGE LAZY)
diff --git a/src/coreclr/build-runtime.cmd b/src/coreclr/build-runtime.cmd
index 7ba07fedafd874..2c1d7db98ee7a5 100644
--- a/src/coreclr/build-runtime.cmd
+++ b/src/coreclr/build-runtime.cmd
@@ -81,6 +81,7 @@ set __CommonMSBuildArgs=
set __BuildNative=1
set __BuildCrossArchNative=0
set __SkipCrossArchNative=0
+set __SkipGenerateVersion=0
set __RestoreOptData=1
set __CrossArch=
set __PgoOptDataPath=
@@ -154,6 +155,7 @@ if /i "%1" == "-configureonly" (set __ConfigureOnly=1&set __BuildNative=1&
if /i "%1" == "-skipconfigure" (set __SkipConfigure=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "-skipnative" (set __BuildNative=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "-skipcrossarchnative" (set __SkipCrossArchNative=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
+if /i "%1" == "-skipgenerateversion" (set __SkipGenerateVersion=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "-skiprestoreoptdata" (set __RestoreOptData=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "-usenmakemakefiles" (set __NMakeMakefiles=1&set __ConfigureOnly=1&set __BuildNative=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "-pgoinstrument" (set __PgoInstrument=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
@@ -166,6 +168,7 @@ if /i "%1" == "configureonly" (set __ConfigureOnly=1&set __BuildNative=1&s
if /i "%1" == "skipconfigure" (set __SkipConfigure=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "skipnative" (set __BuildNative=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "skipcrossarchnative" (set __SkipCrossArchNative=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
+if /i "%1" == "skipgenerateversion" (set __SkipGenerateVersion=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "skiprestoreoptdata" (set __RestoreOptData=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "usenmakemakefiles" (set __NMakeMakefiles=1&set __ConfigureOnly=1&set __BuildNative=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "pgoinstrument" (set __PgoInstrument=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
@@ -317,16 +320,19 @@ REM ============================================================================
@if defined _echo @echo on
-echo %__MsgPrefix%Generating native version headers
-set "__BinLog=%__LogsDir%\GenerateVersionHeaders_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
-powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
- %__RepoRootDir%\eng\empty.csproj /p:NativeVersionFile="%__RootBinDir%\obj\coreclr\_version.h"^
- /t:GenerateNativeVersionFile /restore^
- %__CommonMSBuildArgs% %__UnprocessedBuildArgs% /bl:!__BinLog!
-if not !errorlevel! == 0 (
- set __exitCode=!errorlevel!
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Failed to generate version headers.
- goto ExitWithCode
+if %__SkipGenerateVersion% EQU 0 (
+ echo %__MsgPrefix%Generating native version headers
+ set "__BinLog=%__LogsDir%\GenerateVersionHeaders_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
+ powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
+ %__RepoRootDir%\eng\empty.csproj /t:GenerateRuntimeVersionFile /restore^
+ /p:NativeVersionFile="%__RootBinDir%\obj\coreclr\_version.h"^
+ /p:RuntimeVersionFile="%__RootBinDir%\obj\coreclr\runtime_version.h"^
+ %__CommonMSBuildArgs% %__UnprocessedBuildArgs% /bl:!__BinLog!
+ if not !errorlevel! == 0 (
+ set __exitCode=!errorlevel!
+ echo %__ErrMsgPrefix%%__MsgPrefix%Error: Failed to generate version headers.
+ goto ExitWithCode
+ )
)
REM =========================================================================================
@@ -690,6 +696,7 @@ echo -skipconfigure: skip CMake ^(default: CMake is run^)
echo -skipnative: skip building native components ^(default: native components are built^).
echo -skipcrossarchnative: skip building cross-architecture native components ^(default: components are built^).
echo -skiprestoreoptdata: skip restoring optimization data used by profile-based optimizations.
+echo -skipgenerateversion: skip generating the native version headers.
echo -priority=^ : specify a set of test that will be built and run, with priority N.
echo portable : build for portable RID.
echo.
diff --git a/src/coreclr/build-test.cmd b/src/coreclr/build-test.cmd
index 6ae3904d022f18..01a41c0a91118a 100644
--- a/src/coreclr/build-test.cmd
+++ b/src/coreclr/build-test.cmd
@@ -59,6 +59,7 @@ set __RuntimeId=
set __TargetsWindows=1
set __DoCrossgen=
set __DoCrossgen2=
+set __CompositeBuildMode=
set __CopyNativeTestBinaries=0
set __CopyNativeProjectsAfterCombinedTestBuild=true
set __SkipGenerateLayout=0
@@ -106,6 +107,7 @@ if /i "%1" == "buildagainstpackages" (echo error: Remove /BuildAgainstPackages
if /i "%1" == "skiprestorepackages" (set __SkipRestorePackages=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "crossgen" (set __DoCrossgen=1&set __TestBuildMode=crossgen&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "crossgen2" (set __DoCrossgen2=1&set __TestBuildMode=crossgen2&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
+if /i "%1" == "composite" (set __CompositeBuildMode=1&set __DoCrossgen2=1&set __TestBuildMode=crossgen2&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "runtimeid" (set __RuntimeId=%2&set processedArgs=!processedArgs! %1 %2&shift&shift&goto Arg_Loop)
if /i "%1" == "targetsNonWindows" (set __TargetsWindows=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "Exclude" (set __Exclude=%2&set processedArgs=!processedArgs! %1 %2&shift&shift&goto Arg_Loop)
@@ -115,6 +117,7 @@ if /i "%1" == "targetSpecific" (set "__BuildNeedTargetArg=/p:CLRTestNeedT
if /i "%1" == "copynativeonly" (set __CopyNativeTestBinaries=1&set __SkipNative=1&set __CopyNativeProjectsAfterCombinedTestBuild=false&set __SkipCrossgenFramework=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "skipgeneratelayout" (set __SkipGenerateLayout=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if /i "%1" == "generatelayoutonly" (set __SkipManaged=1&set __SkipNative=1&set __CopyNativeProjectsAfterCombinedTestBuild=false&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
+if /i "%1" == "-excludemonofailures" (set __Mono=1&set processedArgs=!processedArgs!&shift&goto Arg_Loop)
if /i "%1" == "--" (set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
if [!processedArgs!]==[] (
@@ -154,6 +157,9 @@ set "__BinDir=%__RootBinDir%\bin\coreclr\%__TargetOS%.%__BuildArch%.%__BuildType
set "__TestRootDir=%__RootBinDir%\tests\coreclr"
set "__TestBinDir=%__TestRootDir%\%__TargetOS%.%__BuildArch%.%__BuildType%"
+if not defined XunitTestBinBase set XunitTestBinBase=%__TestBinDir%\
+set "CORE_ROOT=%XunitTestBinBase%\Tests\Core_Root"
+
REM We have different managed and native intermediate dirs because the managed bits will include
REM the configuration information deeper in the intermediates path.
REM These variables are used by the msbuild project files.
@@ -287,9 +293,6 @@ if "%__SkipRestorePackages%" == "1" goto SkipRestoreProduct
echo %__MsgPrefix%Restoring CoreCLR product from packages
-if not defined XunitTestBinBase set XunitTestBinBase=%__TestBinDir%\
-set "CORE_ROOT=%XunitTestBinBase%\Tests\Core_Root"
-
set __BuildLogRootName=Restore_Product
set __BuildLog=%__LogsDir%\%__BuildLogRootName%_%__TargetOS%__%__BuildArch%__%__BuildType%.log
set __BuildWrn=%__LogsDir%\%__BuildLogRootName%_%__TargetOS%__%__BuildArch%__%__BuildType%.wrn
@@ -434,12 +437,8 @@ REM Remove any lock folder used for synchronization from previous runs.
powershell -NoProfile "Get-ChildItem -path %__TestBinDir% -Include 'lock' -Recurse -Force | where {$_.Attributes -eq 'Directory'}| Remove-Item -force -Recurse"
set CORE_ROOT=%__TestBinDir%\Tests\Core_Root
-set CORE_ROOT_STAGE=%__TestBinDir%\Tests\Core_Root_Stage
if exist "%CORE_ROOT%" rd /s /q "%CORE_ROOT%"
-if exist "%CORE_ROOT_STAGE%" rd /s /q "%CORE_ROOT_STAGE%"
md "%CORE_ROOT%"
-md "%CORE_ROOT_STAGE%"
-xcopy /s "%__BinDir%" "%CORE_ROOT_STAGE%"
REM =========================================================================================
REM ===
@@ -477,8 +476,6 @@ if errorlevel 1 (
exit /b 1
)
-xcopy /s /y /i "%CORE_ROOT_STAGE%" "%CORE_ROOT%"
-
REM =========================================================================================
REM ===
REM === Create test wrappers.
@@ -502,8 +499,14 @@ set __MsbuildWrn=/flp1:WarningsOnly;LogFile="%__BuildWrn%"
set __MsbuildErr=/flp2:ErrorsOnly;LogFile="%__BuildErr%"
set __Logging=!__MsbuildLog! !__MsbuildWrn! !__MsbuildErr!
+if %%__Mono%%==1 (
+ set RuntimeFlavor="mono"
+) else (
+ set RuntimeFlavor="coreclr"
+)
+
REM Build wrappers using the local SDK's msbuild. As we move to arcade, the other builds should be moved away from run.exe as well.
-call "%__RepoRootDir%\dotnet.cmd" msbuild %__ProjectDir%\tests\src\runtest.proj /nodereuse:false /p:BuildWrappers=true /p:TestBuildMode=%__TestBuildMode% !__Logging! %__msbuildArgs% %TargetsWindowsMsbuildArg% %__SkipFXRestoreArg% %__UnprocessedBuildArgs%
+call "%__RepoRootDir%\dotnet.cmd" msbuild %__ProjectDir%\tests\src\runtest.proj /nodereuse:false /p:BuildWrappers=true /p:TestBuildMode=%__TestBuildMode% !__Logging! %__msbuildArgs% %TargetsWindowsMsbuildArg% %__SkipFXRestoreArg% %__UnprocessedBuildArgs% /p:RuntimeFlavor=%RuntimeFlavor%
if errorlevel 1 (
echo %__ErrMsgPrefix%%__MsgPrefix%Error: XUnit wrapper build failed. Refer to the build log files for details:
echo %__BuildLog%
@@ -556,8 +559,6 @@ if defined __DoCrossgen2 (
:SkipCrossgen
-rd /s /q "%CORE_ROOT_STAGE%"
-
REM =========================================================================================
REM ===
REM === All builds complete!
@@ -627,18 +628,47 @@ exit /b 1
set __TotalPrecompiled=0
set __FailedToPrecompile=0
set __FailedAssemblies=
-for %%F in ("%CORE_ROOT%\System.*.dll";"%CORE_ROOT%\Microsoft.*.dll") do (
+set __CompositeOutputDir=%CORE_ROOT%\composite.out
+set __CompositeResponseFile=%__CompositeOutputDir%\framework-r2r.dll.rsp
+
+if defined __CompositeBuildMode (
+ mkdir !__CompositeOutputDir!
+ echo --composite>>!__CompositeResponseFile!
+ echo -O>>!__CompositeResponseFile!
+ echo --out^:%__CompositeOutputDir%\framework-r2r.dll>>!__CompositeResponseFile!
+)
+
+for %%F in ("%CORE_ROOT%\System.*.dll";"%CORE_ROOT%\Microsoft.*.dll";%CORE_ROOT%\netstandard.dll;%CORE_ROOT%\mscorlib.dll) do (
if not "%%~nxF"=="Microsoft.CodeAnalysis.VisualBasic.dll" (
if not "%%~nxF"=="Microsoft.CodeAnalysis.CSharp.dll" (
if not "%%~nxF"=="Microsoft.CodeAnalysis.dll" (
if not "%%~nxF"=="System.Runtime.WindowsRuntime.dll" (
- call :PrecompileAssembly "%%F" %%~nxF __TotalPrecompiled __FailedToPrecompile __FailedAssemblies
- echo Processed: !__TotalPrecompiled!, failed !__FailedToPrecompile!
+ if defined __CompositeBuildMode (
+ echo %%F>>!__CompositeResponseFile!
+ ) else (
+ call :PrecompileAssembly "%%F" %%~nxF __TotalPrecompiled __FailedToPrecompile __FailedAssemblies
+ echo Processed: !__TotalPrecompiled!, failed !__FailedToPrecompile!
+ )
)))))
)
+if defined __CompositeBuildMode (
+ echo Composite response line^: %__CompositeResponseFile%
+ type "%__CompositeResponseFile%"
+)
+
+if defined __CompositeBuildMode (
+ set __CompositeCommandLine="%__RepoRootDir%\dotnet.cmd"
+ set __CompositeCommandLine=!__CompositeCommandLine! "%CORE_ROOT%\crossgen2\crossgen2.dll"
+ set __CompositeCommandLine=!__CompositeCommandLine! "@%__CompositeResponseFile%"
+ echo Building composite R2R framework^: !__CompositeCommandLine!
+ call !__CompositeCommandLine!
+ set __FailedToPrecompile=!ERRORLEVEL!
+ copy /Y "!__CompositeOutputDir!\*.*" "!CORE_ROOT!\"
+)
+
if !__FailedToPrecompile! NEQ 0 (
- echo Failed assemblies:
+ @echo Failed assemblies:
FOR %%G IN (!__FailedAssemblies!) do echo %%G
)
@@ -650,13 +680,13 @@ REM Compile the managed assemblies in Core_ROOT before running the tests
set AssemblyPath=%1
set AssemblyName=%2
-set __CrossgenExe="%CORE_ROOT%\crossgen.exe"
-if /i "%__BuildArch%" == "arm" ( set __CrossgenExe="%CORE_ROOT%\x86\crossgen.exe" )
-if /i "%__BuildArch%" == "arm64" ( set __CrossgenExe="%CORE_ROOT%\x64\crossgen.exe" )
+set __CrossgenExe="%__BinDir%\crossgen.exe"
+if /i "%__BuildArch%" == "arm" ( set __CrossgenExe="%__BinDir%\x86\crossgen.exe" )
+if /i "%__BuildArch%" == "arm64" ( set __CrossgenExe="%__BinDir%\x64\crossgen.exe" )
set __CrossgenExe=%__CrossgenExe%
if defined __DoCrossgen2 (
- set __CrossgenExe="%CORE_ROOT%\corerun" "%CORE_ROOT%\crossgen2\crossgen2.dll"
+ set __CrossgenExe="%__RepoRootDir%\dotnet.cmd" "%CORE_ROOT%\crossgen2\crossgen2.dll"
)
REM Intentionally avoid using the .dll extension to prevent
@@ -666,12 +696,14 @@ set __CrossgenCmd=
if defined __DoCrossgen (
set __CrossgenCmd=!__CrossgenExe! /Platform_Assemblies_Paths "!CORE_ROOT!" /in !AssemblyPath! /out !__CrossgenOutputFile!
+ echo !__CrossgenCmd!
+ !__CrossgenCmd!
) else (
set __CrossgenCmd=!__CrossgenExe! -r:"!CORE_ROOT!\System.*.dll" -r:"!CORE_ROOT!\Microsoft.*.dll" -r:"!CORE_ROOT!\mscorlib.dll" -r:"!CORE_ROOT!\netstandard.dll" -O --inputbubble --out:!__CrossgenOutputFile! !AssemblyPath!
+ echo !__CrossgenCmd!
+ call !__CrossgenCmd!
)
-echo %__CrossgenCmd%
-%__CrossgenCmd%
set /a __exitCode = !errorlevel!
set /a "%~3+=1"
diff --git a/src/coreclr/build-test.sh b/src/coreclr/build-test.sh
index 65110b5ef3b21c..78d294bd83564f 100755
--- a/src/coreclr/build-test.sh
+++ b/src/coreclr/build-test.sh
@@ -6,9 +6,9 @@ build_test_wrappers()
echo "${__MsgPrefix}Creating test wrappers..."
if [[ $__Mono -eq 1 ]]; then
- export RuntimeFlavor="mono"
+ __RuntimeFlavor="mono"
else
- export RuntimeFlavor="coreclr"
+ __RuntimeFlavor="coreclr"
fi
__Exclude="${__ProjectDir}/tests/issues.targets"
@@ -32,7 +32,7 @@ build_test_wrappers()
__MsbuildErr="/fileloggerparameters2:\"ErrorsOnly;LogFile=${__BuildErr}\""
__Logging="$__MsbuildLog $__MsbuildWrn $__MsbuildErr /consoleloggerparameters:$buildVerbosity"
- nextCommand="\"${__DotNetCli}\" msbuild \"${__ProjectDir}/tests/src/runtest.proj\" /nodereuse:false /p:BuildWrappers=true /p:TestBuildMode=$__TestBuildMode /p:TargetsWindows=false $__Logging /p:TargetOS=$__TargetOS /p:Configuration=$__BuildType /p:TargetArchitecture=$__BuildArch"
+ nextCommand="\"${__DotNetCli}\" msbuild \"${__ProjectDir}/tests/src/runtest.proj\" /nodereuse:false /p:BuildWrappers=true /p:TestBuildMode=$__TestBuildMode /p:TargetsWindows=false $__Logging /p:TargetOS=$__TargetOS /p:Configuration=$__BuildType /p:TargetArchitecture=$__BuildArch /p:RuntimeFlavor=$__RuntimeFlavor \"/bl:${__RepoRootDir}/artifacts/log/${__BuildType}/build_test_wrappers_${__RuntimeFlavor}.binlog\""
eval $nextCommand
local exitCode="$?"
@@ -119,13 +119,10 @@ generate_layout()
mkdir -p "$CORE_ROOT"
- build_MSBuild_projects "Tests_Overlay_Managed" "${__ProjectDir}/tests/src/runtest.proj" "Creating test overlay" "/t:CreateTestOverlay"
-
chmod +x "$__BinDir"/corerun
chmod +x "$__CrossgenExe"
- # Make sure to copy over the pulled down packages
- cp -r "$__BinDir"/* "$CORE_ROOT/" > /dev/null
+ build_MSBuild_projects "Tests_Overlay_Managed" "${__ProjectDir}/tests/src/runtest.proj" "Creating test overlay" "/t:CreateTestOverlay"
if [[ "$__TargetOS" != "OSX" ]]; then
nextCommand="\"$__TestDir/setup-stress-dependencies.sh\" --arch=$__BuildArch --outputDir=$CORE_ROOT"
@@ -183,15 +180,25 @@ precompile_coreroot_fx()
local totalPrecompiled=0
local failedToPrecompile=0
+ local compositeCommandLine="${__DotNetCli}"
+ compositeCommandLine+=" $__BinDir/crossgen2/crossgen2.dll"
+ compositeCommandLine+=" --composite"
+ compositeCommandLine+=" -O"
+ compositeCommandLine+=" --out:$outputDir/framework-r2r.dll"
declare -a failedAssemblies
- filesToPrecompile=$(find -L "$overlayDir" -maxdepth 1 -iname Microsoft.\*.dll -o -iname System.\*.dll -type f)
+ filesToPrecompile=$(find -L "$overlayDir" -maxdepth 1 -iname Microsoft.\*.dll -o -iname System.\*.dll -o -iname netstandard.dll -o -iname mscorlib.dll -type f)
for fileToPrecompile in ${filesToPrecompile}; do
local filename="$fileToPrecompile"
if is_skip_crossgen_test "$(basename $filename)"; then
continue
fi
+ if [[ "$__CompositeBuildMode" != 0 ]]; then
+ compositeCommandLine+=" $filename"
+ continue
+ fi
+
local commandLine=""
if [[ "$__DoCrossgen" != 0 ]]; then
@@ -199,7 +206,7 @@ precompile_coreroot_fx()
fi
if [[ "$__DoCrossgen2" != 0 ]]; then
- commandLine="$overlayDir/corerun $overlayDir/crossgen2/crossgen2.dll $crossgen2References -O --inputbubble --out $outputDir/$(basename $filename) $filename"
+ commandLine="${__DotNetCli} $overlayDir/crossgen2/crossgen2.dll $crossgen2References -O --inputbubble --out $outputDir/$(basename $filename) $filename"
fi
echo Precompiling "$filename"
@@ -224,6 +231,17 @@ precompile_coreroot_fx()
echo "Processed: $totalPrecompiled, failed $failedToPrecompile"
done
+ if [[ "$__CompositeBuildMode" != 0 ]]; then
+ # Compile the entire framework in composite build mode
+ echo "Compiling composite R2R framework: $compositeCommandLine"
+ $compositeCommandLine
+ local exitCode="$?"
+ if [[ "$exitCode" != 0 ]]; then
+ echo Unable to precompile composite framework, exit code is "$exitCode".
+ exit 1
+ fi
+ fi
+
if [[ "$__DoCrossgen2" != 0 ]]; then
# Copy the Crossgen-compiled assemblies back to CORE_ROOT
mv -f "$outputDir"/* "$overlayDir"/
@@ -536,6 +554,12 @@ handle_arguments_local() {
__TestBuildMode=crossgen2
;;
+ composite|-composite)
+ __CompositeBuildMode=1
+ __DoCrossgen2=1
+ __TestBuildMode=crossgen2
+ ;;
+
generatetesthostonly|-generatetesthostonly)
__GenerateTestHostOnly=1
;;
@@ -603,6 +627,7 @@ __CrossBuild=0
__DistroRid=""
__DoCrossgen=0
__DoCrossgen2=0
+__CompositeBuildMode=0
__DotNetCli="$__RepoRootDir/dotnet.sh"
__GenerateLayoutOnly=
__GenerateTestHostOnly=
diff --git a/src/coreclr/build.cmd b/src/coreclr/build.cmd
deleted file mode 100644
index a4955fb4c52a35..00000000000000
--- a/src/coreclr/build.cmd
+++ /dev/null
@@ -1,1017 +0,0 @@
-@if not defined _echo @echo off
-setlocal EnableDelayedExpansion EnableExtensions
-
-:: Define a prefix for most output progress messages that come from this script. That makes
-:: it easier to see where these are coming from. Note that there is a trailing space here.
-set "__MsgPrefix=BUILD: "
-
-echo %__MsgPrefix%Starting Build at %TIME%
-echo %__MsgPrefix%WARNING: This build script is deprecated and will be deleted soon. Use the root build script to build CoreCLR. If you want to build the CoreCLR runtime without using MSBuild, use the build-native.cmd script.
-echo %__MsgPrefix%See https://github.com/dotnet/runtime/issues/32991 for more information.
-
-set __ThisScriptFull="%~f0"
-set __ThisScriptDir="%~dp0"
-
-call "%__ThisScriptDir%"\setup_vs_tools.cmd
-if NOT '%ERRORLEVEL%' == '0' goto ExitWithError
-
-if defined VS160COMNTOOLS (
- set "__VSToolsRoot=%VS160COMNTOOLS%"
- set "__VCToolsRoot=%VS160COMNTOOLS%\..\..\VC\Auxiliary\Build"
- set __VSVersion=vs2019
-) else if defined VS150COMNTOOLS (
- set "__VSToolsRoot=%VS150COMNTOOLS%"
- set "__VCToolsRoot=%VS150COMNTOOLS%\..\..\VC\Auxiliary\Build"
- set __VSVersion=vs2017
-)
-
-:: Note that the msbuild project files (specifically, dir.proj) will use the following variables, if set:
-:: __BuildArch -- default: x64
-:: __BuildType -- default: Debug
-:: __TargetOS -- default: Windows_NT
-:: __ProjectDir -- default: directory of the dir.props file
-:: __RepoRootDir -- default: directory two levels above the dir.props file
-:: __SourceDir -- default: %__ProjectDir%\src\
-:: __RootBinDir -- default: %__RepoRootDir%\artifacts\
-:: __BinDir -- default: %__RootBinDir%\%__TargetOS%.%__BuildArch.%__BuildType%\
-:: __IntermediatesDir
-:: __PackagesBinDir -- default: %__BinDir%\.nuget
-::
-:: Thus, these variables are not simply internal to this script!
-
-:: Set the default arguments for build
-set __BuildArch=x64
-set __BuildType=Debug
-set __TargetOS=Windows_NT
-
-:: Set the various build properties here so that CMake and MSBuild can pick them up
-set "__ProjectDir=%~dp0"
-:: remove trailing slash
-if %__ProjectDir:~-1%==\ set "__ProjectDir=%__ProjectDir:~0,-1%"
-set "__RepoRootDir=%__ProjectDir%\..\.."
-
-set "__ProjectFilesDir=%__ProjectDir%"
-set "__SourceDir=%__ProjectDir%\src"
-set "__RootBinDir=%__RepoRootDir%\artifacts"
-
-set __BuildAll=
-
-set __BuildArchX64=0
-set __BuildArchX86=0
-set __BuildArchArm=0
-set __BuildArchArm64=0
-
-set __BuildTypeDebug=0
-set __BuildTypeChecked=0
-set __BuildTypeRelease=0
-
-set __PgoInstrument=0
-set __PgoOptimize=1
-set __EnforcePgo=0
-set __IbcTuning=
-
-REM __PassThroughArgs is a set of things that will be passed through to nested calls to build.cmd
-REM when using "all".
-set __PassThroughArgs=
-
-REM __UnprocessedBuildArgs are args that we pass to msbuild (e.g. /p:TargetArchitecture=x64)
-set "__args= %*"
-set processedArgs=
-set __UnprocessedBuildArgs=
-set __CommonMSBuildArgs=
-
-set __BuildCoreLib=1
-set __BuildNative=1
-set __BuildCrossArchNative=0
-set __SkipCrossArchNative=0
-set __BuildTests=1
-set __BuildPackages=1
-set __BuildNativeCoreLib=1
-set __BuildManagedTools=1
-set __RestoreOptData=1
-set __GenerateLayout=0
-set __CrossgenAltJit=
-set __SkipRestoreArg=/p:RestoreDuringBuild=true
-set __OfficialBuildIdArg=
-set __CrossArch=
-set __PgoOptDataPath=
-
-@REM CMD has a nasty habit of eating "=" on the argument list, so passing:
-@REM -priority=1
-@REM appears to CMD parsing as "-priority 1". Handle -priority specially to avoid problems,
-@REM and allow the "-priority=1" syntax.
-set __Priority=
-
-:Arg_Loop
-if "%1" == "" goto ArgsDone
-
-if /i "%1" == "/?" goto Usage
-if /i "%1" == "-?" goto Usage
-if /i "%1" == "/h" goto Usage
-if /i "%1" == "-h" goto Usage
-if /i "%1" == "/help" goto Usage
-if /i "%1" == "-help" goto Usage
-if /i "%1" == "--help" goto Usage
-
-if /i "%1" == "-all" (set __BuildAll=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-x64" (set __BuildArchX64=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-x86" (set __BuildArchX86=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-arm" (set __BuildArchArm=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-arm64" (set __BuildArchArm64=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-if /i "%1" == "-debug" (set __BuildTypeDebug=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-checked" (set __BuildTypeChecked=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-release" (set __BuildTypeRelease=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-
-REM TODO these are deprecated remove them eventually
-REM don't add more, use the - syntax instead
-if /i "%1" == "all" (set __BuildAll=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "x64" (set __BuildArchX64=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "x86" (set __BuildArchX86=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "arm" (set __BuildArchArm=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "arm64" (set __BuildArchArm64=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-if /i "%1" == "debug" (set __BuildTypeDebug=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "checked" (set __BuildTypeChecked=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "release" (set __BuildTypeRelease=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-if /i "%1" == "-priority" (set __Priority=%2&shift&set processedArgs=!processedArgs! %1=%2&shift&goto Arg_Loop)
-
-REM Explicitly block -Rebuild.
-if /i "%1" == "Rebuild" (
- echo "ERROR: 'Rebuild' is not supported. Please remove it."
- goto Usage
-)
-if /i "%1" == "-Rebuild" (
- echo "ERROR: 'Rebuild' is not supported. Please remove it."
- goto Usage
-)
-
-
-REM All arguments after this point will be passed through directly to build.cmd on nested invocations
-REM using the "all" argument, and must be added to the __PassThroughArgs variable.
-if [!__PassThroughArgs!]==[] (
- set __PassThroughArgs=%1
-) else (
- set __PassThroughArgs=%__PassThroughArgs% %1
-)
-
-if /i "%1" == "-ci" (set __ArcadeScriptArgs="-ci"&set __ErrMsgPrefix=##vso[task.logissue type=error]&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-OfficialBuildId" (set __OfficialBuildIdArg=/p:OfficialBuildId=%2&set __PassThroughArgs=%__PassThroughArgs% %2&set processedArgs=!processedArgs! %1=%2&shift&shift&goto Arg_Loop)
-
-if /i "%1" == "-alpinedac" (set __BuildCoreLib=0&set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildCrossArchNative=1&set __CrossArch=x64&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=alpine&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-linuxdac" (set __BuildCoreLib=0&set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildCrossArchNative=1&set __CrossArch=x64&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=Linux&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-if /i "%1" == "-freebsdmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=FreeBSD&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-linuxmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=Linux&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-netbsdmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=NetBSD&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-osxmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=OSX&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-windowsmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=Windows_NT&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-nativemscorlib" (set __BuildNativeCoreLib=1&set __BuildCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-configureonly" (set __ConfigureOnly=1&set __BuildNative=1&set __BuildNativeCoreLib=0&set __BuildCoreLib=0&set __BuildTests=0&set __BuildPackages=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skipconfigure" (set __SkipConfigure=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skipmscorlib" (set __BuildCoreLib=0&set __BuildNativeCoreLib=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skipnative" (set __BuildNative=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skipcrossarchnative" (set __SkipCrossArchNative=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skiptests" (set __BuildTests=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skipbuildpackages" (set __BuildPackages=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skipmanagedtools" (set __BuildManagedTools=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-skiprestoreoptdata" (set __RestoreOptData=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-generatelayout" (set __GenerateLayout=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-usenmakemakefiles" (set __NMakeMakefiles=1&set __ConfigureOnly=1&set __BuildNative=1&set __BuildNativeCoreLib=0&set __BuildCoreLib=0&set __BuildTests=0&set __BuildPackages=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-pgoinstrument" (set __PgoInstrument=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-enforcepgo" (set __EnforcePgo=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-nopgooptimize" (set __PgoOptimize=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-ibcinstrument" (set __IbcTuning=/Tuning&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "-crossgenaltjit" (set __CrossgenAltJit=%2&set __PassThroughArgs=%__PassThroughArgs% %2&set processedArgs=!processedArgs! %1 %2&shift&shift&goto Arg_Loop)
-REM TODO remove these once they are no longer used in buildpipeline
-if /i "%1" == "-skiprestore" (set __SkipRestoreArg=/p:RestoreDuringBuild=false&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-REM TODO these are deprecated remove them eventually
-REM don't add more, use the - syntax instead
-if /i "%1" == "freebsdmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=FreeBSD&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "linuxmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=Linux&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "netbsdmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=NetBSD&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "osxmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=OSX&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "windowsmscorlib" (set __BuildNativeCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set __TargetOS=Windows_NT&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "nativemscorlib" (set __BuildNativeCoreLib=1&set __BuildCoreLib=0&set __BuildNative=0&set __BuildTests=0&set __BuildPackages=0&set __BuildManagedTools=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "configureonly" (set __ConfigureOnly=1&set __BuildNative=1&set __BuildNativeCoreLib=0&set __BuildCoreLib=0&set __BuildTests=0&set __BuildPackages=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skipconfigure" (set __SkipConfigure=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skipmscorlib" (set __BuildCoreLib=0&set __BuildNativeCoreLib=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skipnative" (set __BuildNative=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skipcrossarchnative" (set __SkipCrossArchNative=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skiptests" (set __BuildTests=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skipbuildpackages" (set __BuildPackages=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "skiprestoreoptdata" (set __RestoreOptData=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "generatelayout" (set __GenerateLayout=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "usenmakemakefiles" (set __NMakeMakefiles=1&set __ConfigureOnly=1&set __BuildNative=1&set __BuildNativeCoreLib=0&set __BuildCoreLib=0&set __BuildTests=0&set __BuildPackages=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "pgoinstrument" (set __PgoInstrument=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "nopgooptimize" (set __PgoOptimize=0&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "enforcepgo" (set __EnforcePgo=1&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "ibcinstrument" (set __IbcTuning=/Tuning&set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-if /i "%1" == "crossgenaltjit" (set __CrossgenAltJit=%2&set __PassThroughArgs=%__PassThroughArgs% %2set processedArgs=!processedArgs! %1 %2&shift&shift&goto Arg_Loop)
-REM TODO remove this once it's no longer used in buildpipeline
-if /i "%1" == "--" (set processedArgs=!processedArgs! %1&shift&goto Arg_Loop)
-
-if [!processedArgs!]==[] (
- set __UnprocessedBuildArgs=%__args%
-) else (
- set __UnprocessedBuildArgs=%__args%
- for %%t in (!processedArgs!) do (
- set __UnprocessedBuildArgs=!__UnprocessedBuildArgs:*%%t=!
- )
-)
-
-:ArgsDone
-
-@REM Special handling for -priority=N argument.
-if defined __Priority (
- if defined __PassThroughArgs (
- set __PassThroughArgs=%__PassThroughArgs% -priority=%__Priority%
- ) else (
- set __PassThroughArgs=-priority=%__Priority%
- )
-)
-
-if defined __BuildAll goto BuildAll
-
-set /A __TotalSpecifiedBuildArch=__BuildArchX64 + __BuildArchX86 + __BuildArchArm + __BuildArchArm64
-if %__TotalSpecifiedBuildArch% GTR 1 (
- echo Error: more than one build architecture specified, but "all" not specified.
- goto Usage
-)
-
-if %__BuildArchX64%==1 set __BuildArch=x64
-if %__BuildArchX86%==1 set __BuildArch=x86
-if %__BuildArchArm%==1 (
- set __BuildArch=arm
- set __CrossArch=x86
-)
-if %__BuildArchArm64%==1 (
- set __BuildArch=arm64
- set __CrossArch=x64
-)
-
-set /A __TotalSpecifiedBuildType=__BuildTypeDebug + __BuildTypeChecked + __BuildTypeRelease
-if %__TotalSpecifiedBuildType% GTR 1 (
- echo Error: more than one build type specified, but "all" not specified.
- goto Usage
-)
-
-if %__BuildTypeDebug%==1 set __BuildType=Debug
-if %__BuildTypeChecked%==1 set __BuildType=Checked
-if %__BuildTypeRelease%==1 set __BuildType=Release
-
-set __CommonMSBuildArgs=/p:TargetOS=%__TargetOS% /p:Configuration=%__BuildType% /p:TargetArchitecture=%__BuildArch% !__SkipRestoreArg! !__OfficialBuildIdArg!
-
-if %__EnforcePgo%==1 (
- if %__BuildArchArm%==1 (
- echo NOTICE: enforcepgo does nothing on arm architecture
- )
- if %__BuildArchArm64%==1 (
- echo NOTICE: enforcepgo does nothing on arm64 architecture
- )
-)
-
-REM Determine if this is a cross-arch build. Only do cross-arch build if we're also building native.
-
-if %__SkipCrossArchNative% EQU 0 (
- if %__BuildNative% EQU 1 (
- if %__BuildCrossArchNative% EQU 0 (
- if /i not "%__BuildArch%"=="x86" (
- REM Make recursive calls to build the cross OS DAC
- call :BuildCrossOSDac -linuxdac
- if not !errorlevel! == 0 (
- goto ExitWithError
- )
- )
- )
- if /i "%__BuildArch%"=="arm64" (
- set __BuildCrossArchNative=1
- )
- if /i "%__BuildArch%"=="arm" (
- set __BuildCrossArchNative=1
- )
- )
-)
-
-REM Set the remaining variables based upon the determined build configuration
-
-if %__PgoOptimize%==0 (
- set __RestoreOptData=0
-)
-
-set "__BinDir=%__RootBinDir%\bin\coreclr\%__TargetOS%.%__BuildArch%.%__BuildType%"
-set "__IntermediatesDir=%__RootBinDir%\obj\coreclr\%__TargetOS%.%__BuildArch%.%__BuildType%"
-set "__ArtifactsIntermediatesDir=%__RepoRootDir%\artifacts\obj\coreclr\"
-if "%__NMakeMakefiles%"=="1" (set "__IntermediatesDir=%__RootBinDir%\nmakeobj\%__TargetOS%.%__BuildArch%.%__BuildType%")
-set "__PackagesBinDir=%__BinDir%\.nuget"
-set "__CrossComponentBinDir=%__BinDir%"
-set "__CrossCompIntermediatesDir=%__IntermediatesDir%\crossgen"
-set "__LogsDir=%__RootBinDir%\log\!__BuildType!"
-set "__MsbuildDebugLogsDir=%__LogsDir%\MsbuildDebugLogs"
-
-
-if NOT "%__CrossArch%" == "" set __CrossComponentBinDir=%__CrossComponentBinDir%\%__CrossArch%
-set "__CrossGenCoreLibLog=%__LogsDir%\CrossgenCoreLib_%__TargetOS%__%__BuildArch%__%__BuildType%.log"
-set "__CrossgenExe=%__CrossComponentBinDir%\crossgen.exe"
-
-REM Generate path to be set for CMAKE_INSTALL_PREFIX to contain forward slash
-set "__CMakeBinDir=%__BinDir%"
-set "__CMakeBinDir=%__CMakeBinDir:\=/%"
-
-if not exist "%__BinDir%" md "%__BinDir%"
-if not exist "%__IntermediatesDir%" md "%__IntermediatesDir%"
-if not exist "%__LogsDir%" md "%__LogsDir%"
-if not exist "%__MsbuildDebugLogsDir%" md "%__MsbuildDebugLogsDir%"
-
-if not exist "%__RootBinDir%\Directory.Build.props" copy %__ProjectDir%\EmptyProps.props %__RootBinDir%\Directory.Build.props
-if not exist "%__RootBinDir%\Directory.Build.targets" copy %__ProjectDir%\EmptyProps.props %__RootBinDir%\Directory.Build.targets
-
-REM Set up the directory for MSBuild debug logs.
-set MSBUILDDEBUGPATH=%__MsbuildDebugLogsDir%
-
-REM It is convenient to have your Nuget search path include the location where the build
-REM will place packages. However nuget used during the build will fail if that directory
-REM does not exist. Avoid this in at least one case by aggressively creating the directory.
-if not exist "%__BinDir%\.nuget\pkg" md "%__BinDir%\.nuget\pkg"
-
-echo %__MsgPrefix%Commencing CoreCLR product build
-
-REM Set the remaining variables based upon the determined build configuration
-
-echo %__MsgPrefix%Checking prerequisites
-
-set __CMakeNeeded=1
-if %__BuildNative%==0 if %__BuildCrossArchNative%==0 if %__BuildNativeCoreLib%==0 if %__BuildTests%==0 set __CMakeNeeded=0
-if %__CMakeNeeded%==1 (
- REM Eval the output from set-cmake-path.ps1
- for /f "delims=" %%a in ('powershell -NoProfile -ExecutionPolicy ByPass "& ""%__SourceDir%\pal\tools\set-cmake-path.ps1"""') do %%a
- echo %__MsgPrefix%Using CMake from !CMakePath!
-)
-
-REM NumberOfCores is an WMI property providing number of physical cores on machine
-REM processor(s). It is used to set optimal level of CL parallelism during native build step
-if not defined NumberOfCores (
- REM Determine number of physical processor cores available on machine
- set TotalNumberOfCores=0
- for /f "tokens=*" %%I in (
- 'wmic cpu get NumberOfCores /value ^| find "=" 2^>NUL'
- ) do set %%I & set /a TotalNumberOfCores=TotalNumberOfCores+NumberOfCores
- set NumberOfCores=!TotalNumberOfCores!
-)
-echo %__MsgPrefix%Number of processor cores %NumberOfCores%
-
-REM =========================================================================================
-REM ===
-REM === Start the build steps
-REM ===
-REM =========================================================================================
-
-@if defined _echo @echo on
-
-echo %__MsgPrefix%Generating native version headers
-set "__BinLog=%__LogsDir%\GenerateVersionHeaders_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
-powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
- %__RepoRootDir%\eng\empty.csproj /p:NativeVersionFile="%__RootBinDir%\obj\coreclr\_version.h"^
- /t:GenerateNativeVersionFile /restore^
- %__CommonMSBuildArgs% %__UnprocessedBuildArgs% /bl:!__BinLog!
-if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Failed to generate version headers.
- echo !__BinLog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
-)
-
-REM =========================================================================================
-REM ===
-REM === Restore optimization profile data
-REM ===
-REM =========================================================================================
-
-set OptDataProjectFilePath=%__ProjectDir%\src\.nuget\optdata\optdata.csproj
-if %__RestoreOptData% EQU 1 (
- echo %__MsgPrefix%Restoring the OptimizationData Package
- set "__BinLog=%__LogsDir%\OptRestore_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
-
- powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
- %OptDataProjectFilePath% /t:Restore^
- %__CommonMSBuildArgs% %__UnprocessedBuildArgs%^
- /nodereuse:false /bl:!__BinLog!
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Failed to restore the optimization data package.
- echo !__BinLog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-)
-set __PgoOptDataPath=
-if %__PgoOptimize% EQU 1 (
- set PgoDataPackagePathOutputFile="%__IntermediatesDir%\optdatapath.txt"
- set "__BinLog=%__LogsDir%\PgoVersionRead_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
-
- REM Parse the optdata package versions out of msbuild so that we can pass them on to CMake
- powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
- "%OptDataProjectFilePath%" /t:DumpPgoDataPackagePath %__CommonMSBuildArgs% /bl:!__BinLog! /p:PgoDataPackagePathOutputFile="!PgoDataPackagePathOutputFile!"
-
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%Failed to get PGO data package path.
- echo !__BinLog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
- if not exist "!PgoDataPackagePathOutputFile!" (
- echo %__ErrMsgPrefix%Failed to get PGO data package path.
- echo !__BinLog!
- goto ExitWithError
- )
-
- set /p __PgoOptDataPath=<"!PgoDataPackagePathOutputFile!"
-)
-
-REM =========================================================================================
-REM ===
-REM === Generate source files for eventing
-REM ===
-REM =========================================================================================
-
-set __IntermediatesIncDir=%__IntermediatesDir%\src\inc
-set __IntermediatesEventingDir=%__ArtifactsIntermediatesDir%\Eventing\%__BuildArch%\%__BuildType%
-
-REM Find python and set it to the variable PYTHON
-set _C=-c "import sys; sys.stdout.write(sys.executable)"
-(py -3 %_C% || py -2 %_C% || python3 %_C% || python2 %_C% || python %_C%) > %TEMP%\pythonlocation.txt 2> NUL
-set _C=
-set /p PYTHON=<%TEMP%\pythonlocation.txt
-
-if NOT DEFINED PYTHON (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Could not find a python installation
- goto ExitWithError
-)
-
-if %__BuildCoreLib% EQU 1 (
- echo %__MsgPrefix%Laying out dynamically generated EventSource classes
- "!PYTHON!" -B -Wall %__SourceDir%\scripts\genRuntimeEventSources.py --man %__SourceDir%\vm\ClrEtwAll.man --intermediate %__IntermediatesEventingDir% || goto ExitWithError
-)
-
-REM =========================================================================================
-REM ===
-REM === Build Cross-Architecture Native Components (if applicable)
-REM ===
-REM =========================================================================================
-
-if %__BuildCrossArchNative% EQU 1 (
- REM Scope environment changes start {
- setlocal
-
- echo %__MsgPrefix%Commencing build of cross architecture native components for %__TargetOS%.%__BuildArch%.%__BuildType%
-
- REM Set the environment for the cross-arch native build
- set __VCBuildArch=x86_amd64
- if /i "%__CrossArch%" == "x86" ( set __VCBuildArch=x86 )
-
- echo %__MsgPrefix%Using environment: "%__VCToolsRoot%\vcvarsall.bat" !__VCBuildArch!
- call "%__VCToolsRoot%\vcvarsall.bat" !__VCBuildArch!
- @if defined _echo @echo on
-
- if not exist "%__CrossCompIntermediatesDir%" md "%__CrossCompIntermediatesDir%"
- if defined __SkipConfigure goto SkipConfigureCrossBuild
-
- set __CMakeBinDir=%__CrossComponentBinDir%
- set "__CMakeBinDir=!__CMakeBinDir:\=/!"
- set __ExtraCmakeArgs="-DCLR_CROSS_COMPONENTS_BUILD=1" "-DCLR_CMAKE_TARGET_ARCH=%__BuildArch%" "-DCLR_CMAKE_TARGET_OS=%__TargetOS%" "-DCLR_CMAKE_PGO_INSTRUMENT=%__PgoInstrument%" "-DCLR_CMAKE_OPTDATA_PATH=%__PgoOptDataPath%" "-DCLR_CMAKE_PGO_OPTIMIZE=%__PgoOptimize%" "-DCMAKE_SYSTEM_VERSION=10.0" "-DCLR_ENG_NATIVE_DIR=%__RepoRootDir%/eng/native" "-DCLR_REPO_ROOT_DIR=%__RepoRootDir%"
- call "%__SourceDir%\pal\tools\gen-buildsys.cmd" "%__ProjectDir%" "%__CrossCompIntermediatesDir%" %__VSVersion% %__CrossArch% !__ExtraCmakeArgs!
-
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: failed to generate native component build project!
- goto ExitWithError
- )
- @if defined _echo @echo on
-
-:SkipConfigureCrossBuild
- if not exist "%__CrossCompIntermediatesDir%\CMakeCache.txt" (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: unable to find generated native component build project!
- goto ExitWithError
- )
-
- if defined __ConfigureOnly goto SkipCrossCompBuild
-
- set __BuildLogRootName=Cross
- set "__BuildLog=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.log"
- set "__BuildWrn=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.wrn"
- set "__BuildErr=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.err"
- set "__BinLog=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
- set "__MsbuildLog=/flp:Verbosity=normal;LogFile=!__BuildLog!"
- set "__MsbuildWrn=/flp1:WarningsOnly;LogFile=!__BuildWrn!"
- set "__MsbuildErr=/flp2:ErrorsOnly;LogFile=!__BuildErr!"
- set "__MsbuildBinLog=/bl:!__BinLog!"
- set "__Logging=!__MsbuildLog! !__MsbuildWrn! !__MsbuildErr! !__MsbuildBinLog!"
-
- REM We pass the /m flag directly to MSBuild so that we can get both MSBuild and CL parallelism, which is fastest for our builds.
- "%CMakePath%" --build %__CrossCompIntermediatesDir% --target install --config %__BuildType% -- /nologo /m !__Logging!
-
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: cross-arch components build failed.
- echo !__BinLog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-
-:SkipCrossCompBuild
- REM } Scope environment changes end
- endlocal
-)
-
-REM =========================================================================================
-REM ===
-REM === Build the CLR VM
-REM ===
-REM =========================================================================================
-
-if %__BuildNative% EQU 1 (
- REM Scope environment changes start {
- setlocal
-
- echo %__MsgPrefix%Commencing build of native components for %__TargetOS%.%__BuildArch%.%__BuildType%
-
- REM Set the environment for the native build
- set __VCBuildArch=x86_amd64
- if /i "%__BuildArch%" == "x86" ( set __VCBuildArch=x86 )
- if /i "%__BuildArch%" == "arm" (
- set __VCBuildArch=x86_arm
- set ___CrossBuildDefine="-DCLR_CMAKE_CROSS_ARCH=1" "-DCLR_CMAKE_CROSS_HOST_ARCH=%__CrossArch%"
- )
- if /i "%__BuildArch%" == "arm64" (
- set __VCBuildArch=x86_arm64
- set ___CrossBuildDefine="-DCLR_CMAKE_CROSS_ARCH=1" "-DCLR_CMAKE_CROSS_HOST_ARCH=%__CrossArch%"
- )
-
- echo %__MsgPrefix%Using environment: "%__VCToolsRoot%\vcvarsall.bat" !__VCBuildArch!
- call "%__VCToolsRoot%\vcvarsall.bat" !__VCBuildArch!
- @if defined _echo @echo on
-
- if not defined VSINSTALLDIR (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: VSINSTALLDIR variable not defined.
- goto ExitWithError
- )
- if not exist "!VSINSTALLDIR!DIA SDK" goto NoDIA
-
- if defined __SkipConfigure goto SkipConfigure
-
- echo %__MsgPrefix%Regenerating the Visual Studio solution
-
- set __ExtraCmakeArgs="-DCMAKE_SYSTEM_VERSION=10.0" !___CrossBuildDefine! "-DCLR_CMAKE_PGO_INSTRUMENT=%__PgoInstrument%" "-DCLR_CMAKE_OPTDATA_PATH=%__PgoOptDataPath%" "-DCLR_CMAKE_PGO_OPTIMIZE=%__PgoOptimize%" "-DCLR_ENG_NATIVE_DIR=%__RepoRootDir%/eng/native" "-DCLR_REPO_ROOT_DIR=%__RepoRootDir%"
- call "%__SourceDir%\pal\tools\gen-buildsys.cmd" "%__ProjectDir%" "%__IntermediatesDir%" %__VSVersion% %__BuildArch% !__ExtraCmakeArgs!
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: failed to generate native component build project!
- goto ExitWithError
- )
-
- @if defined _echo @echo on
-
-:SkipConfigure
- if not exist "%__IntermediatesDir%\CMakeCache.txt" (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: unable to find generated native component build project!
- goto ExitWithError
- )
-
- if defined __ConfigureOnly goto SkipNativeBuild
-
- set __BuildLogRootName=CoreCLR
- set "__BuildLog=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.log"
- set "__BuildWrn=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.wrn"
- set "__BuildErr=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.err"
- set "__BinLog=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
- set "__MsbuildLog=/flp:Verbosity=normal;LogFile=!__BuildLog!"
- set "__MsbuildWrn=/flp1:WarningsOnly;LogFile=!__BuildWrn!"
- set "__MsbuildErr=/flp2:ErrorsOnly;LogFile=!__BuildErr!"
- set "__MsbuildBinLog=/bl:!__BinLog!"
- set "__Logging=!__MsbuildLog! !__MsbuildWrn! !__MsbuildErr! !__MsbuildBinLog!"
-
- REM We pass the /m flag directly to MSBuild so that we can get both MSBuild and CL parallelism, which is fastest for our builds.
- "%CMakePath%" --build %__IntermediatesDir% --target install --config %__BuildType% -- /nologo /m !__Logging!
-
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: native component build failed.
- echo !__BinLog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-
-:SkipNativeBuild
- REM } Scope environment changes end
- endlocal
-)
-
-REM =========================================================================================
-REM ===
-REM === CoreLib and NuGet package build section.
-REM ===
-REM =========================================================================================
-
-if %__BuildCoreLib% EQU 1 (
- REM Scope environment changes start {
- setlocal
-
- echo %__MsgPrefix%Commencing build of System.Private.CoreLib for %__TargetOS%.%__BuildArch%.%__BuildType%
- rem Explicitly set Platform causes conflicts in CoreLib project files. Clear it to allow building from VS x64 Native Tools Command Prompt
- set Platform=
-
- set __ExtraBuildArgs=
-
- if "%__BuildManagedTools%" == "1" (
- set __ExtraBuildArgs=!__ExtraBuildArgs! /p:BuildManagedTools=true
- )
-
- set __BuildLogRootName=System.Private.CoreLib
- set "__BuildLog=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.log"
- set "__BuildWrn=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.wrn"
- set "__BuildErr=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.err"
- set "__Binlog=%__LogsDir%\!__BuildLogRootName!_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
- set "__MsbuildLog=/flp:Verbosity=normal;LogFile=!__BuildLog!"
- set "__MsbuildWrn=/flp1:WarningsOnly;LogFile=!__BuildWrn!"
- set "__MsbuildErr=/flp2:ErrorsOnly;LogFile=!__BuildErr!"
- set "__MsbuildBinLog=/bl:!__Binlog!"
- set "__Logging=!__MsbuildLog! !__MsbuildWrn! !__MsbuildErr! !__MsbuildBinLog!"
-
- powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
- %__ProjectDir%\src\build.proj /t:Restore^
- /nodeReuse:false /p:PortableBuild=true /maxcpucount /p:IncludeRestoreOnlyProjects=true^
- !__Logging! /bl: %__CommonMSBuildArgs% !__ExtraBuildArgs! %__UnprocessedBuildArgs%
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Managed Product assemblies restore failed. Refer to the build log files for details.
- echo !__BuildLog!
- echo !__BuildWrn!
- echo !__BuildErr!
- echo !__Binlog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-
- powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -Command "%__RepoRootDir%\eng\common\msbuild.ps1" /clp:nosummary %__ArcadeScriptArgs%^
- %__ProjectDir%\src\build.proj /nodeReuse:false /p:PortableBuild=true /maxcpucount^
- '!__MsbuildLog!' '!__MsbuildWrn!' '!__MsbuildErr!' %__CommonMSBuildArgs% !__ExtraBuildArgs! %__UnprocessedBuildArgs%
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Managed Product assemblies build failed. Refer to the build log files for details.
- echo !__BuildLog!
- echo !__BuildWrn!
- echo !__BuildErr!
- echo !__Binlog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-
- if "%__BuildManagedTools%" == "1" (
- echo %__MsgPrefix%Publishing crossgen2...
- call %__RepoRootDir%\dotnet.cmd publish --self-contained -r win-%__BuildArch% -c %__BuildType% -o "%__BinDir%\crossgen2" "%__ProjectDir%\src\tools\crossgen2\crossgen2\crossgen2.csproj" /nologo /p:TargetArchitecture=%__BuildArch%
-
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Failed to build crossgen2.
- echo !__BuildLog!
- echo !__BuildWrn!
- echo !__BuildErr!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-
- copy /Y "%__BinDir%\clrjit.dll" "%__BinDir%\crossgen2\clrjitilc.dll" | find /i /v "file(s) copied"
- copy /Y "%__BinDir%\jitinterface.dll" "%__BinDir%\crossgen2\jitinterface.dll" | find /i /v "file(s) copied"
- )
- REM } Scope environment changes end
- endlocal
-)
-
-REM =========================================================================================
-REM ===
-REM === Build native System.Private.CoreLib.
-REM ===
-REM =========================================================================================
-
-REM Scope environment changes start {
-setlocal
-
-REM Need diasymreader.dll on your path for /CreatePdb
-set PATH=%PATH%;%WinDir%\Microsoft.Net\Framework64\V4.0.30319;%WinDir%\Microsoft.Net\Framework\V4.0.30319
-
-if %__BuildNativeCoreLib% EQU 1 (
- echo %__MsgPrefix%Generating native image of System.Private.CoreLib for %__TargetOS%.%__BuildArch%.%__BuildType%. Logging to "%__CrossGenCoreLibLog%".
- if exist "%__CrossGenCoreLibLog%" del "%__CrossGenCoreLibLog%"
-
- REM Need VS native tools environment for the **target** arch when running instrumented binaries
- if %__PgoInstrument% EQU 1 (
- set __VCExecArch=%__BuildArch%
- if /i [%__BuildArch%] == [x64] set __VCExecArch=amd64
- echo %__MsgPrefix%Using environment: "%__VCToolsRoot%\vcvarsall.bat" !__VCExecArch!
- call "%__VCToolsRoot%\vcvarsall.bat" !__VCExecArch!
- @if defined _echo @echo on
- if NOT !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Failed to load native tools environment for !__VCExecArch!
- goto ExitWithError
- )
-
- REM HACK: Workaround for [dotnet/coreclr#13970](https://github.com/dotnet/coreclr/issues/13970)
- set __PgoRtPath=
- for /f "tokens=*" %%f in ('where pgort*.dll') do (
- if not defined __PgoRtPath set "__PgoRtPath=%%~f"
- )
- echo %__MsgPrefix%Copying "!__PgoRtPath!" into "%__BinDir%"
- copy /y "!__PgoRtPath!" "%__BinDir%" || (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: copy failed
- goto ExitWithError
- )
- REM End HACK
- )
-
- if defined __CrossgenAltJit (
- REM Set altjit flags for the crossgen run. Note that this entire crossgen section is within a setlocal/endlocal scope,
- REM so we don't need to save or unset these afterwards.
- echo %__MsgPrefix%Setting altjit environment variables for %__CrossgenAltJit%.
- echo %__MsgPrefix%Setting altjit environment variables for %__CrossgenAltJit%. >> "%__CrossGenCoreLibLog%"
- set COMPlus_AltJit=*
- set COMPlus_AltJitNgen=*
- set COMPlus_AltJitName=%__CrossgenAltJit%
- set COMPlus_AltJitAssertOnNYI=1
- set COMPlus_NoGuiOnAssert=1
- set COMPlus_ContinueOnAssert=0
- )
-
- set NEXTCMD="%__CrossgenExe%" /nologo %__IbcTuning% /Platform_Assemblies_Paths "%__BinDir%\IL" /out "%__BinDir%\System.Private.CoreLib.dll" "%__BinDir%\IL\System.Private.CoreLib.dll"
- echo %__MsgPrefix%!NEXTCMD!
- echo %__MsgPrefix%!NEXTCMD! >> "%__CrossGenCoreLibLog%"
- !NEXTCMD! >> "%__CrossGenCoreLibLog%" 2>&1
- if NOT !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: CrossGen System.Private.CoreLib build failed. Refer to %__CrossGenCoreLibLog%
- REM Put it in the same log, helpful for Jenkins
- type %__CrossGenCoreLibLog%
- goto ExitWithError
- )
-
- set NEXTCMD="%__CrossgenExe%" /nologo /Platform_Assemblies_Paths "%__BinDir%" /CreatePdb "%__BinDir%\PDB" "%__BinDir%\System.Private.CoreLib.dll"
- echo %__MsgPrefix%!NEXTCMD!
- echo %__MsgPrefix%!NEXTCMD! >> "%__CrossGenCoreLibLog%"
- !NEXTCMD! >> "%__CrossGenCoreLibLog%" 2>&1
- if NOT !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: CrossGen /CreatePdb System.Private.CoreLib build failed. Refer to %__CrossGenCoreLibLog%
- REM Put it in the same log, helpful for Jenkins
- type %__CrossGenCoreLibLog%
- goto ExitWithError
- )
-)
-
-REM } Scope environment changes end
-endlocal
-
-REM =========================================================================================
-REM ===
-REM === Build packages
-REM ===
-REM =========================================================================================
-
-if %__BuildPackages% EQU 1 (
- REM Scope environment changes start {
- setlocal
-
- echo %__MsgPrefix%Building Packages for %__TargetOS%.%__BuildArch%.%__BuildType%
-
- set __BuildLog="%__LogsDir%\Nuget_%__TargetOS%__%__BuildArch%__%__BuildType%.binlog"
-
- REM The conditions as to what to build are captured in the builds file.
- REM Package build uses the Arcade system and scripts, relying on it to restore required toolsets as part of build
- powershell -NoProfile -ExecutionPolicy ByPass -NoLogo -File "%__RepoRootDir%\eng\common\build.ps1"^
- -r -b -projects %__SourceDir%\.nuget\coreclr-packages.proj^
- -verbosity minimal /clp:nosummary /nodeReuse:false /bl:!__BuildLog!^
- /p:PortableBuild=true^
- /p:Platform=%__BuildArch% %__CommonMSBuildArgs% %__UnprocessedBuildArgs%
- if not !errorlevel! == 0 (
- echo %__ErrMsgPrefix%%__MsgPrefix%Error: Nuget package generation failed. Refer to the build log file for details.
- echo !__BuildLog!
- set __exitCode=!errorlevel!
- goto ExitWithCode
- )
-
- REM } Scope environment changes end
- endlocal
-)
-
-REM =========================================================================================
-REM ===
-REM === Test build section
-REM ===
-REM =========================================================================================
-
-if %__BuildTests% EQU 1 (
- echo %__MsgPrefix%Commencing build of tests for %__TargetOS%.%__BuildArch%.%__BuildType%
-
- set __PriorityArg=
- if defined __Priority (
- set __PriorityArg=-priority=%__Priority%
- )
- set NEXTCMD=call %__ProjectDir%\build-test.cmd %__BuildArch% %__BuildType% !__PriorityArg! %__UnprocessedBuildArgs%
- echo %__MsgPrefix%!NEXTCMD!
- !NEXTCMD!
-
- if not !errorlevel! == 0 (
- REM buildtest.cmd has already emitted an error message and mentioned the build log file to examine.
- goto ExitWithError
- )
-) else if %__GenerateLayout% EQU 1 (
- echo %__MsgPrefix%Generating layout for %__TargetOS%.%__BuildArch%.%__BuildType%
-
- set NEXTCMD=call %__ProjectDir%\build-test.cmd %__BuildArch% %__BuildType% generatelayoutonly %__UnprocessedBuildArgs%
- echo %__MsgPrefix%!NEXTCMD!
- !NEXTCMD!
-
- if not !errorlevel! == 0 (
- REM runtest.cmd has already emitted an error message and mentioned the build log file to examine.
- goto ExitWithError
- )
-)
-
-REM =========================================================================================
-REM ===
-REM === All builds complete!
-REM ===
-REM =========================================================================================
-
-echo %__MsgPrefix%Build succeeded. Finished at %TIME%
-echo %__MsgPrefix%Product binaries are available at !__BinDir!
-exit /b 0
-
-REM =========================================================================================
-REM ===
-REM === Handle the "all" case.
-REM ===
-REM =========================================================================================
-
-:BuildAll
-
-set __BuildArchList=
-
-set /A __TotalSpecifiedBuildArch=__BuildArchX64 + __BuildArchX86 + __BuildArchArm + __BuildArchArm64
-if %__TotalSpecifiedBuildArch% EQU 0 (
- REM Nothing specified means we want to build all architectures.
- set __BuildArchList=x64 x86 arm arm64
-)
-
-REM Otherwise, add all the specified architectures to the list.
-
-if %__BuildArchX64%==1 set __BuildArchList=%__BuildArchList% x64
-if %__BuildArchX86%==1 set __BuildArchList=%__BuildArchList% x86
-if %__BuildArchArm%==1 set __BuildArchList=%__BuildArchList% arm
-if %__BuildArchArm64%==1 set __BuildArchList=%__BuildArchList% arm64
-
-set __BuildTypeList=
-
-set /A __TotalSpecifiedBuildType=__BuildTypeDebug + __BuildTypeChecked + __BuildTypeRelease
-if %__TotalSpecifiedBuildType% EQU 0 (
- REM Nothing specified means we want to build all build types.
- set __BuildTypeList=Debug Checked Release
-)
-
-if %__BuildTypeDebug%==1 set __BuildTypeList=%__BuildTypeList% Debug
-if %__BuildTypeChecked%==1 set __BuildTypeList=%__BuildTypeList% Checked
-if %__BuildTypeRelease%==1 set __BuildTypeList=%__BuildTypeList% Release
-
-REM Create a temporary file to collect build results. We always build all flavors specified, and
-REM report a summary of the results at the end.
-
-set __AllBuildSuccess=true
-set __BuildResultFile=%TEMP%\build-all-summary-%RANDOM%.txt
-if exist %__BuildResultFile% del /f /q %__BuildResultFile%
-
-for %%i in (%__BuildArchList%) do (
- for %%j in (%__BuildTypeList%) do (
- call :BuildOne %%i %%j
- )
-)
-
-if %__AllBuildSuccess%==true (
- echo %__MsgPrefix%All builds succeeded!
- exit /b 0
-) else (
- echo %__MsgPrefix%Builds failed:
- type %__BuildResultFile%
- del /f /q %__BuildResultFile%
- goto ExitWithError
-)
-
-REM This code is unreachable, but leaving it nonetheless, just in case things change.
-exit /b 99
-
-:BuildOne
-set __BuildArch=%1
-set __BuildType=%2
-set __NextCmd=call %__ThisScriptFull% %__BuildArch% %__BuildType% %__PassThroughArgs%
-echo %__MsgPrefix%Invoking: %__NextCmd%
-%__NextCmd%
-if not !errorlevel! == 0 (
- echo %__MsgPrefix% %__BuildArch% %__BuildType% %__PassThroughArgs% >> %__BuildResultFile%
- set __AllBuildSuccess=false
-)
-
-
-echo %__MsgPrefix%WARNING: This build script is deprecated and will be deleted soon. Use the root build script to build CoreCLR. If you want to build the CoreCLR runtime without using MSBuild, use the build-native.cmd script.
-echo %__MsgPrefix%See https://github.com/dotnet/runtime/issues/32991 for more information.
-
-exit /b 0
-
-REM =========================================================================================
-REM ===
-REM === Helper routines
-REM ===
-REM =========================================================================================
-
-
-REM =========================================================================================
-REM === These two routines are intended for the exit code to propagate to the parent process
-REM === Like MSBuild or Powershell. If we directly exit /b 1 from within a if statement in
-REM === any of the routines, the exit code is not propagated.
-REM =========================================================================================
-:ExitWithError
-echo %__MsgPrefix%WARNING: This build script is deprecated and will be deleted soon. Use the root build script to build CoreCLR. If you want to build the CoreCLR runtime without using MSBuild, use the build-native.cmd script.
-echo %__MsgPrefix%See https://github.com/dotnet/runtime/issues/32991 for more information.
-exit /b 1
-
-:ExitWithCode
-echo %__MsgPrefix%WARNING: This build script is deprecated and will be deleted soon. Use the root build script to build CoreCLR. If you want to build the CoreCLR runtime without using MSBuild, use the build-native.cmd script.
-echo %__MsgPrefix%See https://github.com/dotnet/runtime/issues/32991 for more information.
-exit /b !__exitCode!
-
-:BuildCrossOSDac
-setlocal
-set __BuildDacOption=%1
-set __NextCmd=call %__ThisScriptFull% %__BuildDacOption% %__BuildArch% %__BuildType% %__PassThroughArgs%
-echo %__MsgPrefix%Invoking: %__NextCmd%
-%__NextCmd%
-if not !errorlevel! == 0 (
- echo %__MsgPrefix% %__BuildDacOption% %__BuildArch% %__BuildType% %__PassThroughArgs%
- endlocal
- goto ExitWithError
-)
-endlocal
-exit /b 0
-
-:Usage
-echo.
-echo Build the CoreCLR repo.
-echo.
-echo Usage:
-echo build.cmd [option1] [option2]
-echo or:
-echo build.cmd all [option1] [option2]
-echo.
-echo All arguments are optional. The options are:
-echo.
-echo.-? -h -help --help: view this message.
-echo -all: Builds all configurations and platforms.
-echo Build architecture: one of -x64, -x86, -arm, -arm64 ^(default: -x64^).
-echo Build type: one of -Debug, -Checked, -Release ^(default: -Debug^).
-echo mscorlib version: one of -freebsdmscorlib, -linuxmscorlib, -netbsdmscorlib, -osxmscorlib,
-echo or -windowsmscorlib. If one of these is passed, only System.Private.CoreLib is built,
-echo for the specified platform ^(FreeBSD, Linux, NetBSD, OS X or Windows,
-echo respectively^).
-echo add nativemscorlib to go further and build the native image for designated mscorlib.
-echo -nopgooptimize: do not use profile guided optimizations.
-echo -enforcepgo: verify after the build that PGO was used for key DLLs, and fail the build if not
-echo -pgoinstrument: generate instrumented code for profile guided optimization enabled binaries.
-echo -ibcinstrument: generate IBC-tuning-enabled native images when invoking crossgen.
-echo -configureonly: skip all builds; only run CMake ^(default: CMake and builds are run^)
-echo -alpinedac: Build a linux musl DAC with minimal support for printing exceptions in a dump on a windows host.
-echo -linuxdac: Build a linux DAC with minimal support for printing exceptions in a dump on a windows host.
-
-echo -skipconfigure: skip CMake ^(default: CMake is run^)
-echo -skipmscorlib: skip building System.Private.CoreLib ^(default: System.Private.CoreLib is built^).
-echo -skipnative: skip building native components ^(default: native components are built^).
-echo -skipcrossarchnative: skip building cross-architecture native components ^(default: components are built^).
-echo -skiptests: skip building tests ^(default: tests are built^).
-echo -skipbuildpackages: skip building nuget packages ^(default: packages are built^).
-echo -skipmanagedtools: skip build tools such as R2R dump and RunInContext
-echo -skiprestoreoptdata: skip restoring optimization data used by profile-based optimizations.
-echo -skiprestore: skip restoring packages ^(default: packages are restored during build^).
-echo -disableoss: Disable Open Source Signing for System.Private.CoreLib.
-echo -priority=^ : specify a set of test that will be built and run, with priority N.
-echo -officialbuildid=^: specify the official build ID to be used by this build.
-echo -crossgenaltjit ^: run crossgen using specified altjit ^(used for JIT testing^).
-echo portable : build for portable RID.
-echo.
-echo If "all" is specified, then all build architectures and types are built. If, in addition,
-echo one or more build architectures or types is specified, then only those build architectures
-echo and types are built.
-echo.
-echo For example:
-echo build -all
-echo -- builds all architectures, and all build types per architecture
-echo build -all -x86
-echo -- builds all build types for x86
-echo build -all -x64 -x86 -Checked -Release
-echo -- builds x64 and x86 architectures, Checked and Release build types for each
-exit /b 1
-
-:NoDIA
-echo Error: DIA SDK is missing at "%VSINSTALLDIR%DIA SDK". ^
-Did you install all the requirements for building on Windows, including the "Desktop Development with C++" workload? ^
-Please see https://github.com/dotnet/runtime/blob/master/docs/workflow/requirements/windows-requirements.md ^
-Another possibility is that you have a parallel installation of Visual Studio and the DIA SDK is there. In this case it ^
-may help to copy its "DIA SDK" folder into "%VSINSTALLDIR%" manually, then try again.
-exit /b 1
diff --git a/src/coreclr/build.sh b/src/coreclr/build.sh
deleted file mode 100755
index 634bcb7af3106e..00000000000000
--- a/src/coreclr/build.sh
+++ /dev/null
@@ -1,553 +0,0 @@
-#!/usr/bin/env bash
-
-# resolve python-version to use
-if [[ -z "$PYTHON" ]]; then
- if ! PYTHON=$(command -v python3 || command -v python2 || command -v python || command -v py)
- then
- echo "Unable to locate build-dependency python!" 1>&2
- exit 1
- fi
-fi
-# validate python-dependency
-# useful in case of explicitly set option.
-if ! command -v "$PYTHON" > /dev/null
-then
- echo "Unable to locate build-dependency python ($PYTHON)!" 1>&2
- exit 1
-fi
-
-export PYTHON
-
-usage_list=("-crossgenonly: only run native image generation.")
-usage_list+=("-disableoss: Disable Open Source Signing for System.Private.CoreLib.")
-usage_list+=("-ibcinstrument: generate IBC-tuning-enabled native images when invoking crossgen.")
-usage_list+=("-nopgooptimize: do not use profile guided optimizations.")
-usage_list+=("-officialbuildid=^: specify the official build ID to be used by this build.")
-usage_list+=("-partialngen: build CoreLib as PartialNGen.")
-usage_list+=("-pgoinstrument: generate instrumented code for profile guided optimization enabled binaries.")
-usage_list+=("-skipcrossgen: skip native image generation.")
-usage_list+=("-skipcrossarchnative: Disable Open Source Signing for System.Private.CoreLib.")
-usage_list+=("-skipmanagedtools: generate instrumented code for profile guided optimization enabled binaries.")
-usage_list+=("-skipmscorlib: generate IBC-tuning-enabled native images when invoking crossgen.")
-usage_list+=("-skipnuget: skip NuGet package generation.")
-usage_list+=("-skiprestore: specify the official build ID to be used by this build.")
-usage_list+=("-skiprestoreoptdata: build CoreLib as PartialNGen.")
-usage_list+=("-staticanalyzer: skip native image generation.")
-
-setup_dirs_local()
-{
- setup_dirs
-
- mkdir -p "$__LogsDir"
- mkdir -p "$__MsbuildDebugLogsDir"
-
- if [[ "$__CrossBuild" == 1 ]]; then
- mkdir -p "$__CrossComponentBinDir"
- fi
-}
-
-restore_optdata()
-{
- local OptDataProjectFilePath="$__ProjectRoot/src/.nuget/optdata/optdata.csproj"
- if [[ "$__SkipRestoreOptData" == 0 && "$__IsMSBuildOnNETCoreSupported" == 1 ]]; then
- echo "Restoring the OptimizationData package"
- "$__RepoRootDir/eng/common/msbuild.sh" /clp:nosummary $__ArcadeScriptArgs \
- $OptDataProjectFilePath /t:Restore /m \
- -bl:"$__LogsDir/OptRestore_$__ConfigTriplet.binlog"\
- $__CommonMSBuildArgs $__UnprocessedBuildArgs \
- /nodereuse:false
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to restore the optimization data package."
- exit "$exit_code"
- fi
- fi
-
- if [[ "$__PgoOptimize" == 1 && "$__IsMSBuildOnNETCoreSupported" == 1 ]]; then
- # Parse the optdata package versions out of msbuild so that we can pass them on to CMake
-
- local PgoDataPackagePathOutputFile="${__IntermediatesDir}/optdatapath.txt"
-
- # Writes into ${PgoDataPackagePathOutputFile}
- "$__RepoRootDir/eng/common/msbuild.sh" /clp:nosummary $__ArcadeScriptArgs $OptDataProjectFilePath /t:DumpPgoDataPackagePath\
- ${__CommonMSBuildArgs} /p:PgoDataPackagePathOutputFile=${PgoDataPackagePathOutputFile} \
- -bl:"$__LogsDir/PgoVersionRead_$__ConfigTriplet.binlog" > /dev/null 2>&1
- local exit_code="$?"
- if [[ "$exit_code" != 0 || ! -f "${PgoDataPackagePathOutputFile}" ]]; then
- echo "${__ErrMsgPrefix}Failed to get PGO data package path."
- exit "$exit_code"
- fi
-
- __PgoOptDataPath=$(<"${PgoDataPackagePathOutputFile}")
- fi
-}
-
-generate_event_logging_sources()
-{
- __OutputEventingDir="$1"
-
- __PythonWarningFlags="-Wall"
- if [[ "$__IgnoreWarnings" == 0 ]]; then
- __PythonWarningFlags="$__PythonWarningFlags -Werror"
- fi
-
- echo "Laying out dynamically generated EventSource classes"
- "$PYTHON" -B $__PythonWarningFlags "$__ProjectRoot/src/scripts/genRuntimeEventSources.py" --man "$__ProjectRoot/src/vm/ClrEtwAll.man" --intermediate "$__OutputEventingDir"
-}
-
-generate_event_logging()
-{
- # Event Logging Infrastructure
- if [[ "$__SkipMSCorLib" == 0 ]]; then
- generate_event_logging_sources "$__ArtifactsIntermediatesDir/Eventing/$__BuildArch/$__BuildType"
- fi
-}
-
-build_cross_architecture_components()
-{
- local intermediatesForBuild="$__IntermediatesDir/Host$__CrossArch/crossgen"
- local crossArchBinDir="$__BinDir/$__CrossArch"
-
- mkdir -p "$intermediatesForBuild"
- mkdir -p "$crossArchBinDir"
-
- generate_event_logging_sources "$intermediatesForBuild" "the crossarch build system"
-
- __SkipCrossArchBuild=1
- # check supported cross-architecture components host(__HostArch)/target(__BuildArch) pair
- if [[ ("$__BuildArch" == "arm" || "$__BuildArch" == "armel") && ("$__CrossArch" == "x86" || "$__CrossArch" == "x64") ]]; then
- __SkipCrossArchBuild=0
- elif [[ "$__BuildArch" == "arm64" && "$__CrossArch" == "x64" ]]; then
- __SkipCrossArchBuild=0
- else
- # not supported
- return
- fi
-
- __CMakeBinDir="$crossArchBinDir"
- CROSSCOMPILE=0
- export __CMakeBinDir CROSSCOMPILE
-
- __CMakeArgs="-DCLR_CMAKE_TARGET_ARCH=$__BuildArch -DCLR_CROSS_COMPONENTS_BUILD=1 $__CMakeArgs"
- build_native "$__CrossArch" "$__ProjectRoot" "$__ProjectRoot" "$intermediatesForBuild" "cross-architecture components"
-
- CROSSCOMPILE=1
- export CROSSCOMPILE
-}
-
-build_CoreLib_ni()
-{
- local __CrossGenExec=$1
- local __CoreLibILDir=$2
-
- if [[ "$__PartialNgen" == 1 ]]; then
- COMPlus_PartialNGen=1
- export COMPlus_PartialNGen
- fi
-
- if [[ -e "$__CrossGenCoreLibLog" ]]; then
- rm "$__CrossGenCoreLibLog"
- fi
- echo "Generating native image of System.Private.CoreLib.dll for $__TargetOS.$__BuildArch.$__BuildType. Logging to \"$__CrossGenCoreLibLog\"."
- echo "$__CrossGenExec /Platform_Assemblies_Paths $__CoreLibILDir $__IbcTuning /out $__BinDir/System.Private.CoreLib.dll $__CoreLibILDir/System.Private.CoreLib.dll"
- "$__CrossGenExec" /nologo /Platform_Assemblies_Paths $__CoreLibILDir $__IbcTuning /out $__BinDir/System.Private.CoreLib.dll $__CoreLibILDir/System.Private.CoreLib.dll >> $__CrossGenCoreLibLog 2>&1
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to generate native image for System.Private.CoreLib. Refer to $__CrossGenCoreLibLog"
- exit "$exit_code"
- fi
-
- if [[ "$__TargetOS" == "Linux" ]]; then
- echo "Generating symbol file for System.Private.CoreLib.dll"
- echo "$__CrossGenExec /Platform_Assemblies_Paths $__BinDir /CreatePerfMap $__BinDir $__BinDir/System.Private.CoreLib.dll"
- "$__CrossGenExec" /nologo /Platform_Assemblies_Paths $__BinDir /CreatePerfMap $__BinDir $__BinDir/System.Private.CoreLib.dll >> $__CrossGenCoreLibLog 2>&1
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to generate symbol file for System.Private.CoreLib. Refer to $__CrossGenCoreLibLog"
- exit "$exit_code"
- fi
- fi
-}
-
-build_CoreLib()
-{
- if [[ "$__IsMSBuildOnNETCoreSupported" == 0 ]]; then
- echo "System.Private.CoreLib.dll build unsupported."
- return
- fi
-
- if [[ "$__SkipMSCorLib" == 1 ]]; then
- echo "Skipping building System.Private.CoreLib."
- return
- fi
-
- echo "Commencing build of managed components for $__TargetOS.$__BuildArch.$__BuildType"
-
- # Invoke MSBuild
- __ExtraBuildArgs=""
-
- if [[ "$__BuildManagedTools" -eq "1" ]]; then
- __ExtraBuildArgs="$__ExtraBuildArgs /p:BuildManagedTools=true"
- fi
-
- "$__RepoRootDir/eng/common/msbuild.sh" /clp:nosummary $__ArcadeScriptArgs \
- $__ProjectDir/src/build.proj /t:Restore \
- /p:PortableBuild=true /maxcpucount /p:IncludeRestoreOnlyProjects=true \
- /flp:Verbosity=normal\;LogFile=$__LogsDir/System.Private.CoreLib_$__ConfigTriplet.log \
- -bl:"$__LogsDir/System.Private.CoreLib_$__ConfigTriplet.binlog" \
- /p:__IntermediatesDir=$__IntermediatesDir /p:__RootBinDir=$__RootBinDir \
- $__CommonMSBuildArgs $__ExtraBuildArgs $__UnprocessedBuildArgs
-
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to restore managed components."
- exit "$exit_code"
- fi
-
- "$__RepoRootDir/eng/common/msbuild.sh" /clp:nosummary $__ArcadeScriptArgs \
- $__ProjectDir/src/build.proj \
- /p:PortableBuild=true /maxcpucount \
- /flp:Verbosity=normal\;LogFile=$__LogsDir/System.Private.CoreLib_$__TargetOS__$__BuildArch__$__BuildType.log \
- -bl:"$__LogsDir/System.Private.CoreLib_$__ConfigTriplet.binlog" \
- /p:__IntermediatesDir=$__IntermediatesDir /p:__RootBinDir=$__RootBinDir \
- $__CommonMSBuildArgs $__ExtraBuildArgs $__UnprocessedBuildArgs
-
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to build managed components."
- exit "$exit_code"
- fi
-
- if [[ "$__BuildManagedTools" -eq "1" ]]; then
- echo "Publishing crossgen2 for $__DistroRid"
- "$__RepoRootDir/dotnet.sh" publish --self-contained -r $__DistroRid -c $__BuildType -o "$__BinDir/crossgen2" "$__ProjectRoot/src/tools/crossgen2/crossgen2/crossgen2.csproj" /nologo /p:TargetArchitecture=$__BuildArch
-
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to build crossgen2."
- exit "$exit_code"
- fi
-
- if [[ "$__HostOS" == "OSX" ]]; then
- cp "$__BinDir/libclrjit.dylib" "$__BinDir/crossgen2/libclrjitilc.dylib"
- cp "$__BinDir/libjitinterface.dylib" "$__BinDir/crossgen2/libjitinterface.dylib"
- else
- cp "$__BinDir/libclrjit.so" "$__BinDir/crossgen2/libclrjitilc.so"
- cp "$__BinDir/libjitinterface.so" "$__BinDir/crossgen2/libjitinterface.so"
- fi
- fi
-
- local __CoreLibILDir="$__BinDir"/IL
-
- if [[ "$__SkipCrossgen" == 1 ]]; then
- echo "Skipping generating native image"
-
- if [[ "$__CrossBuild" == 1 ]]; then
- # Crossgen not performed, so treat the IL version as the final version
- cp "$__CoreLibILDir"/System.Private.CoreLib.dll "$__BinDir"/System.Private.CoreLib.dll
- fi
-
- return
- fi
-
- # The cross build generates a crossgen with the target architecture.
- if [[ "$__CrossBuild" == 0 ]]; then
- if [[ "$__SkipCoreCLR" == 1 ]]; then
- return
- fi
-
- # The architecture of host pc must be same architecture with target.
- if [[ "$__HostArch" == "$__BuildArch" ]]; then
- build_CoreLib_ni "$__BinDir/crossgen" "$__CoreLibILDir"
- elif [[ ( "$__HostArch" == "x64" ) && ( "$__BuildArch" == "x86" ) ]]; then
- build_CoreLib_ni "$__BinDir/crossgen" "$__CoreLibILDir"
- elif [[ ( "$__HostArch" == "arm64" ) && ( "$__BuildArch" == "arm" ) ]]; then
- build_CoreLib_ni "$__BinDir/crossgen" "$__CoreLibILDir"
- else
- exit 1
- fi
- else
- if [[ ( "$__CrossArch" == "x86" ) && ( "$__BuildArch" == "arm" ) ]]; then
- build_CoreLib_ni "$__CrossComponentBinDir/crossgen" "$__CoreLibILDir"
- elif [[ ( "$__CrossArch" == "x64" ) && ( "$__BuildArch" == "arm" ) ]]; then
- build_CoreLib_ni "$__CrossComponentBinDir/crossgen" "$__CoreLibILDir"
- elif [[ ( "$__HostArch" == "x64" ) && ( "$__BuildArch" == "arm64" ) ]]; then
- build_CoreLib_ni "$__CrossComponentBinDir/crossgen" "$__CoreLibILDir"
- else
- # Crossgen not performed, so treat the IL version as the final version
- cp "$__CoreLibILDir"/System.Private.CoreLib.dll "$__BinDir"/System.Private.CoreLib.dll
- fi
- fi
-}
-
-generate_NugetPackages()
-{
- # We can only generate nuget package if we also support building mscorlib as part of this build.
- if [[ "$__IsMSBuildOnNETCoreSupported" == 0 ]]; then
- echo "Nuget package generation unsupported."
- return
- fi
-
- # Since we can build mscorlib for this OS, did we build the native components as well?
- if [[ "$__SkipCoreCLR" == 1 && "$__CrossgenOnly" == 0 ]]; then
- echo "Unable to generate nuget packages since native components were not built."
- return
- fi
-
- echo "Generating nuget packages for $__TargetOS"
- echo "DistroRid is $__DistroRid"
- echo "ROOTFS_DIR is $ROOTFS_DIR"
- # Build the packages
- # Package build uses the Arcade system and scripts, relying on it to restore required toolsets as part of build
- "$__RepoRootDir"/eng/common/build.sh -r -b -projects "$__SourceDir"/.nuget/coreclr-packages.proj \
- -verbosity minimal -bl:"$__LogsDir/Nuget_$__TargetOS__$__BuildArch__$__BuildType.binlog" \
- /p:PortableBuild=true \
- /p:"__IntermediatesDir=$__IntermediatesDir" /p:"__RootBinDir=$__RootBinDir" /p:"__DoCrossArchBuild=$__CrossBuild" \
- $__CommonMSBuildArgs $__UnprocessedBuildArgs
-
- local exit_code="$?"
- if [[ "$exit_code" != 0 ]]; then
- echo "${__ErrMsgPrefix}Failed to generate Nuget packages."
- exit "$exit_code"
- fi
-}
-
-handle_arguments_local() {
- case "$1" in
- crossgenonly|-crossgenonly)
- __SkipMSCorLib=1
- __SkipCoreCLR=1
- __CrossgenOnly=1
- ;;
-
- disableoss|-disableoss)
- __SignTypeArg="/p:SignType=real"
- ;;
-
- ibcinstrument|-ibcinstrument)
- __IbcTuning="/Tuning"
- ;;
-
- ignorewarnings|-ignorewarnings)
- __IgnoreWarnings=1
- __CMakeArgs="-DCLR_CMAKE_WARNINGS_ARE_ERRORS=OFF $__CMakeArgs"
- ;;
-
- nopgooptimize|-nopgooptimize)
- __PgoOptimize=0
- __SkipRestoreOptData=1
- ;;
-
- officialbuildid=*|-officialbuildid=*)
- __Id=$(echo "$1" | cut -d'=' -f 2)
- __OfficialBuildIdArg="/p:OfficialBuildId=$__Id"
- ;;
-
- partialngen|-partialngen)
- __PartialNgen=1
- ;;
-
- pgoinstrument|-pgoinstrument)
- __PgoInstrument=1
- ;;
-
- skipcoreclr|-skipcoreclr)
- # Accept "skipcoreclr" for backwards-compatibility.
- __SkipCoreCLR=1
- ;;
-
- skipcrossarchnative|-skipcrossarchnative)
- __SkipCrossArchNative=1
- ;;
-
- skipcrossgen|-skipcrossgen)
- __SkipCrossgen=1
- ;;
-
- skipmanagedtools|-skipmanagedtools)
- __BuildManagedTools=0
- ;;
-
- skipmscorlib|-skipmscorlib)
- __SkipMSCorLib=1
- ;;
-
- skipnuget|-skipnuget|skipbuildpackages|-skipbuildpackages)
- __SkipNuget=1
- ;;
-
- skiprestore|-skiprestore)
- __SkipRestoreArg="/p:RestoreDuringBuild=false"
- ;;
-
- staticanalyzer|-staticanalyzer)
- __StaticAnalyzer=1
- ;;
-
- *)
- __UnprocessedBuildArgs="$__UnprocessedBuildArgs $1"
- ;;
- esac
-}
-
-echo "Commencing CoreCLR Repo build"
-echo "WARNING: This build script is deprecated and will be deleted soon. Use the root build script to build CoreCLR. If you want to build the CoreCLR runtime without using MSBuild, use the build-native.sh script."
-echo "See https://github.com/dotnet/runtime/issues/32991 for more information."
-
-# Argument types supported by this script:
-#
-# Build architecture - valid values are: x64, ARM.
-# Build Type - valid values are: Debug, Checked, Release
-#
-# Set the default arguments for build
-
-# Obtain the location of the bash script to figure out where the root of the repo is.
-__ProjectRoot="$(cd "$(dirname "$0")"; pwd -P)"
-__RepoRootDir="$(cd "$__ProjectRoot"/../..; pwd -P)"
-
-__BuildArch=
-__BuildType=Debug
-__CodeCoverage=0
-__IgnoreWarnings=0
-
-# Set the various build properties here so that CMake and MSBuild can pick them up
-__BuildManagedTools=1
-__Compiler=clang
-__CompilerMajorVersion=
-__CompilerMinorVersion=
-__CommonMSBuildArgs=
-__ConfigureOnly=0
-__CrossBuild=0
-__CrossgenOnly=0
-__DistroRid=""
-__IbcOptDataPath=""
-__IbcTuning=""
-__IsMSBuildOnNETCoreSupported=0
-__MSBCleanBuildArgs=
-__OfficialBuildIdArg=""
-__PartialNgen=0
-__PgoInstrument=0
-__PgoOptDataPath=""
-__PgoOptimize=1
-__PortableBuild=1
-__ProjectDir="$__ProjectRoot"
-__RootBinDir="$__RepoRootDir/artifacts"
-__SignTypeArg=""
-__SkipConfigure=0
-__SkipCoreCLR=0
-__SkipCrossArchNative=0
-__SkipCrossgen=0
-__SkipGenerateVersion=0
-__SkipMSCorLib=0
-__SkipManaged=0
-__SkipNuget=0
-__SkipRestore=""
-__SkipRestoreArg="/p:RestoreDuringBuild=true"
-__SkipRestoreOptData=0
-__SourceDir="$__ProjectDir/src"
-__StaticAnalyzer=0
-__UnprocessedBuildArgs=
-__UseNinja=0
-__VerboseBuild=0
-__ValidateCrossArg=1
-__CMakeArgs=""
-
-source "$__ProjectRoot"/_build-commons.sh
-
-if [[ "${__BuildArch}" != "${__HostArch}" ]]; then
- __CrossBuild=1
-fi
-
-# Set dependent variables
-__LogsDir="$__RootBinDir/log/$__BuildType"
-__MsbuildDebugLogsDir="$__LogsDir/MsbuildDebugLogs"
-__ConfigTriplet=$__TargetOS__$__BuildArch__$__BuildType
-
-# Set the remaining variables based upon the determined build configuration
-__BinDir="$__RootBinDir/bin/coreclr/$__TargetOS.$__BuildArch.$__BuildType"
-__PackagesBinDir="$__BinDir/.nuget"
-__IntermediatesDir="$__RootBinDir/obj/coreclr/$__TargetOS.$__BuildArch.$__BuildType"
-__ArtifactsIntermediatesDir="$__RepoRootDir/artifacts/obj/coreclr"
-export __IntermediatesDir __ArtifactsIntermediatesDir
-
-__CrossComponentBinDir="$__BinDir"
-
-__CrossArch="$__HostArch"
-if [[ "$__CrossBuild" == 1 ]]; then
- __CrossComponentBinDir="$__CrossComponentBinDir/$__CrossArch"
-fi
-__CrossGenCoreLibLog="$__LogsDir/CrossgenCoreLib_$__ConfigTriplet.log"
-
-# CI_SPECIFIC - On CI machines, $HOME may not be set. In such a case, create a subfolder and set the variable to set.
-# This is needed by CLI to function.
-if [[ -z "$HOME" ]]; then
- if [[ ! -d "$__ProjectDir/temp_home" ]]; then
- mkdir temp_home
- fi
- HOME="$__ProjectDir"/temp_home
- export HOME
- echo "HOME not defined; setting it to $HOME"
-fi
-
-# Specify path to be set for CMAKE_INSTALL_PREFIX.
-# This is where all built CoreClr libraries will copied to.
-__CMakeBinDir="$__BinDir"
-export __CMakeBinDir
-
-# Make the directories necessary for build if they don't exist
-setup_dirs_local
-
-# Set up the directory for MSBuild debug logs.
-MSBUILDDEBUGPATH="${__MsbuildDebugLogsDir}"
-export MSBUILDDEBUGPATH
-
-# Check prereqs.
-check_prereqs
-
-# Restore the package containing profile counts for profile-guided optimizations
-restore_optdata
-
-# Generate event logging infrastructure sources
-generate_event_logging
-
-# Build the coreclr (native) components.
-__CMakeArgs="-DCLR_CMAKE_PGO_INSTRUMENT=$__PgoInstrument -DCLR_CMAKE_OPTDATA_PATH=$__PgoOptDataPath -DCLR_CMAKE_PGO_OPTIMIZE=$__PgoOptimize -DCLR_REPO_ROOT_DIR=\"$__RepoRootDir\" $__CMakeArgs"
-
-if [[ "$__SkipConfigure" == 0 && "$__CodeCoverage" == 1 ]]; then
- __CMakeArgs="-DCLR_CMAKE_ENABLE_CODE_COVERAGE=1 $__CMakeArgs"
-fi
-
-if [[ "$__SkipCoreCLR" == 1 ]]; then
- echo "Skipping CoreCLR component build."
-else
- build_native "$__BuildArch" "$__ProjectRoot" "$__ProjectRoot" "$__IntermediatesDir" "CoreCLR component"
-fi
-
-# Build cross-architecture components
-if [[ "$__SkipCrossArchNative" != 1 ]]; then
- if [[ "$__CrossBuild" == 1 ]]; then
- build_cross_architecture_components
- fi
-fi
-
-# Build System.Private.CoreLib.
-
-build_CoreLib
-
-if [[ "$__CrossgenOnly" == 1 ]]; then
- build_CoreLib_ni "$__BinDir/crossgen"
-fi
-
-# Generate nuget packages
-if [[ "$__SkipNuget" != 1 ]]; then
- generate_NugetPackages
-fi
-
-
-# Build complete
-
-echo "Repo successfully built."
-echo "Product binaries are available at $__BinDir"
-echo "WARNING: This build script is deprecated and will be deleted soon. Use the root build script to build CoreCLR. If you want to build the CoreCLR runtime without using MSBuild, use the build-native.sh script."
-echo "See https://github.com/dotnet/runtime/issues/32991 for more information."
-exit 0
diff --git a/src/coreclr/clrdefinitions.cmake b/src/coreclr/clrdefinitions.cmake
index ce2bc382a99377..469e0090271094 100644
--- a/src/coreclr/clrdefinitions.cmake
+++ b/src/coreclr/clrdefinitions.cmake
@@ -105,7 +105,6 @@ endif(CLR_CMAKE_TARGET_WIN32)
add_definitions(-DFEATURE_BASICFREEZE)
add_definitions(-DFEATURE_CORECLR)
add_definitions(-DFEATURE_CORESYSTEM)
-add_definitions(-DFEATURE_CORRUPTING_EXCEPTIONS)
if(FEATURE_DBGIPC)
add_definitions(-DFEATURE_DBGIPC_TRANSPORT_DI)
add_definitions(-DFEATURE_DBGIPC_TRANSPORT_VM)
@@ -196,6 +195,7 @@ add_compile_definitions($<$>>:F
if (CLR_CMAKE_TARGET_ARCH_AMD64)
add_compile_definitions($<$>>:FEATURE_ON_STACK_REPLACEMENT>)
endif (CLR_CMAKE_TARGET_ARCH_AMD64)
+add_compile_definitions($<$>>:FEATURE_PGO>)
if (CLR_CMAKE_TARGET_WIN32)
add_definitions(-DFEATURE_TYPEEQUIVALENCE)
endif(CLR_CMAKE_TARGET_WIN32)
diff --git a/src/coreclr/crosscomponents.cmake b/src/coreclr/crosscomponents.cmake
index 30d53d585dff58..f8ea417471ca6e 100644
--- a/src/coreclr/crosscomponents.cmake
+++ b/src/coreclr/crosscomponents.cmake
@@ -14,10 +14,6 @@ endif()
if(NOT CLR_CMAKE_HOST_LINUX AND NOT FEATURE_CROSSBITNESS)
list (APPEND CLR_CROSS_COMPONENTS_LIST
mscordaccore
+ mscordbi
)
- if (CLR_CMAKE_HOST_OS STREQUAL CLR_CMAKE_TARGET_OS)
- list (APPEND CLR_CROSS_COMPONENTS_LIST
- mscordbi
- )
- endif (CLR_CMAKE_HOST_OS STREQUAL CLR_CMAKE_TARGET_OS)
endif()
diff --git a/src/coreclr/crossgen-corelib.sh b/src/coreclr/crossgen-corelib.sh
index 73811315afefa0..8350da0f636b74 100755
--- a/src/coreclr/crossgen-corelib.sh
+++ b/src/coreclr/crossgen-corelib.sh
@@ -103,6 +103,7 @@ __LogsDir="$__RootBinDir/log/$__BuildType"
# Set the remaining variables based upon the determined build configuration
__BinDir="$__RootBinDir/bin/coreclr/$__TargetOS.$__BuildArch.$__BuildType"
+__IntermediatesDir="$__RootBinDir/obj/coreclr/$__TargetOS.$__BuildArch.$__BuildType"
__CrossComponentBinDir="$__BinDir"
__CrossArch="$__HostArch"
diff --git a/src/coreclr/dir.common.props b/src/coreclr/dir.common.props
index e4d212b2aee164..2ff54f14de24a2 100644
--- a/src/coreclr/dir.common.props
+++ b/src/coreclr/dir.common.props
@@ -55,10 +55,11 @@
true
true
true
+ true
true
true
- true
+ true
$(__DistroRid)
diff --git a/src/coreclr/run-cppcheck.sh b/src/coreclr/run-cppcheck.sh
index c505fd184dedc3..46e51e1e7471fc 100755
--- a/src/coreclr/run-cppcheck.sh
+++ b/src/coreclr/run-cppcheck.sh
@@ -17,13 +17,13 @@ usage()
check_dependencies()
{
# Check presence of cppcheck on the path
- if [ "$RunCppCheck" == true ]
+ if [ "$RunCppCheck" = "true" ]
then
hash cppcheck 2>/dev/null || { echo >&2 "Please install cppcheck before running this script"; exit 1; }
fi
-
+
# Check presence of sloccount on the path
- if [ "$RunSlocCount" == true ]
+ if [ "$RunSlocCount" = "true" ]
then
hash sloccount 2>/dev/null || { echo >&2 "Please install sloccount before running this script"; exit 1; }
fi
@@ -39,9 +39,10 @@ SloccountOutput="sloccount.sc"
# Get the number of processors available to the scheduler
# Other techniques such as `nproc` only get the number of
# processors available to a single process.
-if [ `uname` = "FreeBSD" ]; then
-NumProc=`sysctl hw.ncpu | awk '{ print $2+1 }'`
-elif [ `uname` = "NetBSD" ]; then
+platform="$(uname)"
+if [ "$platform" = "FreeBSD" ]; then
+NumProc=$(sysctl hw.ncpu | awk '{ print $2+1 }')
+elif [ "$platform" = "NetBSD" || "$platform" = "SunOS" ]; then
NumProc=$(($(getconf NPROCESSORS_ONLN)+1))
else
NumProc=$(($(getconf _NPROCESSORS_ONLN)+1))
@@ -80,19 +81,19 @@ do
esac
done
-if [ "$FilesFromArgs" != "" ];
+if [ -n "$FilesFromArgs" ];
then
Files=$FilesFromArgs
fi
-if [ "$CppCheckOutput" == "" ];
+if [ -z "$CppCheckOutput" ];
then
echo "Expected: file for cppcheck output"
usage
exit 1
fi
-if [ "$SloccountOutput" == "" ];
+if [ -z "$SloccountOutput" ];
then
echo "Expected: file for sloccount output"
usage
@@ -101,14 +102,14 @@ fi
check_dependencies
-if [ "$RunCppCheck" == true ]
+if [ "$RunCppCheck" = "true" ]
then
echo "Running cppcheck for files: $Files"
cppcheck --enable=all -j $NumProc --xml --xml-version=2 --force $Files 2> $CppCheckOutput
CppCheckOutputs="$CppCheckOutput (cppcheck)"
fi
-if [ "$RunSlocCount" == true ]
+if [ "$RunSlocCount" = "true" ]
then
echo "Running sloccount for files: $Files"
sloccount --wide --details $Files > $SloccountOutput
diff --git a/src/coreclr/runtime.proj b/src/coreclr/runtime.proj
index 02c4c5e205205d..a78af666926bf2 100644
--- a/src/coreclr/runtime.proj
+++ b/src/coreclr/runtime.proj
@@ -12,9 +12,14 @@
<_CoreClrBuildArg Condition="'$(CrossBuild)' == 'true'" Include="-cross" />
<_CoreClrBuildArg Condition="!$([MSBuild]::IsOsPlatform(Windows))" Include="-os $(TargetOS)" />
- <_CoreClrBuildArg Condition="$([MSBuild]::IsOsPlatform(Windows)) and ('$(TargetArchitecture)' == 'x86' or '$(TargetArchitecture)' == 'x64') and '$(Configuration)' == 'Release'" Include="-enforcepgo" />
+ <_CoreClrBuildArg Condition="$([MSBuild]::IsOsPlatform(Windows)) and
+ ('$(TargetArchitecture)' == 'x86' or '$(TargetArchitecture)' == 'x64') and
+ '$(Configuration)' == 'Release' and
+ '$(NoPgoOptimize)' != 'true'"
+ Include="-enforcepgo" />
<_CoreClrBuildArg Condition="$([MSBuild]::IsOsPlatform(Windows)) and '$(CrossDac)' != ''" Include="-$(CrossDac)dac" />
<_CoreClrBuildArg Condition="'$(OfficialBuildId)' != ''" Include="/p:OfficialBuildId=$(OfficialBuildId)" />
+ <_CoreClrBuildArg Condition="'$(NoPgoOptimize)' == 'true'" Include="-nopgooptimize" />
diff --git a/src/coreclr/scripts/superpmi.py b/src/coreclr/scripts/superpmi.py
index 1c7f2f22a76f42..8bef741ce7234e 100755
--- a/src/coreclr/scripts/superpmi.py
+++ b/src/coreclr/scripts/superpmi.py
@@ -533,7 +533,7 @@ def collect(self):
if not os.path.isdir(final_mch_dir):
os.makedirs(final_mch_dir)
else:
- default_coreclr_bin_mch_location = os.path.join(coreclr_args.spmi_location, "mch", "{}.{}.{}".format(coreclr_args.host_os, coreclr_args.arch, coreclr_args.build_type))
+ default_coreclr_bin_mch_location = os.path.join(self.coreclr_args.spmi_location, "mch", "{}.{}.{}".format(self.coreclr_args.host_os, self.coreclr_args.arch, self.coreclr_args.build_type))
if not os.path.isdir(default_coreclr_bin_mch_location):
os.makedirs(default_coreclr_bin_mch_location)
self.final_mch_file = os.path.abspath(os.path.join(default_coreclr_bin_mch_location, "{}.{}.{}.mch".format(self.coreclr_args.host_os, self.coreclr_args.arch, self.coreclr_args.build_type)))
@@ -588,7 +588,9 @@ def __collect_mc_files__(self):
env_copy["SuperPMIShimLogPath"] = self.temp_location
env_copy["SuperPMIShimPath"] = self.jit_path
env_copy["COMPlus_AltJit"] = "*"
+ env_copy["COMPlus_AltJitNgen"] = "*"
env_copy["COMPlus_AltJitName"] = self.collection_shim_name
+ env_copy["COMPlus_EnableExtraSuperPmiQueries"] = "1"
if self.coreclr_args.use_zapdisable:
env_copy["COMPlus_ZapDisable"] = "1"
@@ -599,6 +601,7 @@ def __collect_mc_files__(self):
print_platform_specific_environment_vars(self.coreclr_args, "SuperPMIShimPath", self.jit_path)
print_platform_specific_environment_vars(self.coreclr_args, "COMPlus_AltJit", "*")
print_platform_specific_environment_vars(self.coreclr_args, "COMPlus_AltJitName", self.collection_shim_name)
+ print_platform_specific_environment_vars(self.coreclr_args, "COMPlus_AltJitNgen", "*")
print("")
if self.collection_command != None:
diff --git a/src/coreclr/src/.nuget/Directory.Build.props b/src/coreclr/src/.nuget/Directory.Build.props
index e321b384626e0e..2fd932c03b84ee 100644
--- a/src/coreclr/src/.nuget/Directory.Build.props
+++ b/src/coreclr/src/.nuget/Directory.Build.props
@@ -28,7 +28,7 @@
$(OSRid)
- Windows_NT;OSX;Android;Linux;FreeBSD
+ Windows_NT;OSX;Android;Linux;FreeBSD;NetBSD;SunOS
;$(SupportedPackageOSGroups);
+ netbsd-$(TargetArchitecture)
+
+
+
+
+ sunos-$(TargetArchitecture)
+
+ sunos-$(TargetArchitecture)
+
+
android.21-$(TargetArchitecture)
@@ -159,6 +173,12 @@
+
+
+
+
x86
diff --git a/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.Common.targets b/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.Common.targets
index 0b60d9b5f46bf2..452353b37096b2 100644
--- a/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.Common.targets
+++ b/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.Common.targets
@@ -9,7 +9,7 @@ Copyright (c) .NET Foundation. All rights reserved.
diff --git a/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.targets b/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.targets
index 299511fa2a8be4..f2c0a3fb649733 100644
--- a/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.targets
+++ b/src/coreclr/src/.nuget/Microsoft.NET.Sdk.IL/targets/Microsoft.NET.Sdk.IL.targets
@@ -7,7 +7,7 @@ WARNING: DO NOT MODIFY this file unless you are knowledgeable about MSBuild and
created a backup copy. Incorrect changes to this file will make it
impossible to load or build your projects from the command-line or the IDE.
-Copyright (c) .NET Foundation. All rights reserved.
+Copyright (c) .NET Foundation. All rights reserved.
***********************************************************************************************
-->
@@ -24,13 +24,15 @@ Copyright (c) .NET Foundation. All rights reserved.
<_OSPlatform Condition="$([MSBuild]::IsOSPlatform('linux'))">linux
<_OSPlatform Condition="$([MSBuild]::IsOSPlatform('osx'))">osx
<_OSPlatform Condition="$([MSBuild]::IsOSPlatform('freebsd'))">freebsd
+ <_OSPlatform Condition="$([MSBuild]::IsOSPlatform('netbsd'))">netbsd
+ <_OSPlatform Condition="$([MSBuild]::IsOSPlatform('sunos'))">sunos
<_OSArchitecture>$([System.Runtime.InteropServices.RuntimeInformation]::OSArchitecture)
$(_OSPlatform)-$(_OSArchitecture.ToLower())
5.0.0
runtime.$(MicrosoftNetCoreIlasmPackageRuntimeId).microsoft.netcore.ilasm
runtime.$(MicrosoftNetCoreIlasmPackageRuntimeId).microsoft.netcore.ildasm
-
+
<_IlasmDir Condition="'$(ILAsmToolPath)' != ''">$([MSBuild]::NormalizeDirectory($(ILAsmToolPath)))
@@ -68,8 +70,8 @@ Copyright (c) .NET Foundation. All rights reserved.
-
@@ -122,7 +124,7 @@ Copyright (c) .NET Foundation. All rights reserved.
<_KeyFileArgument Condition="'$(KeyOriginatorFile)' != ''">-KEY="$(KeyOriginatorFile)"
- <_IlasmSwitches>-QUIET -NOLOGO
+ <_IlasmSwitches>-QUIET -NOLOGO
<_IlasmSwitches Condition="'$(FoldIdenticalMethods)' == 'True'">$(_IlasmSwitches) -FOLD
<_IlasmSwitches Condition="'$(SizeOfStackReserve)' != ''">$(_IlasmSwitches) -STACK=$(SizeOfStackReserve)
<_IlasmSwitches Condition="'$(DebugType)' == 'Full'">$(_IlasmSwitches) -DEBUG
diff --git a/src/coreclr/src/.nuget/optdata/optdata.csproj b/src/coreclr/src/.nuget/optdata/optdata.csproj
index d19c3125fe5d3e..14ec28443321b3 100644
--- a/src/coreclr/src/.nuget/optdata/optdata.csproj
+++ b/src/coreclr/src/.nuget/optdata/optdata.csproj
@@ -6,6 +6,7 @@
True
True
win7-x64;win7-x86;linux-x64
+ true
<_TargetOSArchLowercase>$(TargetOS.ToLower())-$(TargetArchitecture.ToLower())
diff --git a/src/coreclr/src/System.Private.CoreLib/CreateRuntimeRootILLinkDescriptorFile.targets b/src/coreclr/src/System.Private.CoreLib/CreateRuntimeRootILLinkDescriptorFile.targets
index d06367c480c6f3..a40473eb98ac31 100644
--- a/src/coreclr/src/System.Private.CoreLib/CreateRuntimeRootILLinkDescriptorFile.targets
+++ b/src/coreclr/src/System.Private.CoreLib/CreateRuntimeRootILLinkDescriptorFile.targets
@@ -11,7 +11,7 @@
<_CortypeFilePath Condition=" '$(_CortypeFilePath)' == '' ">$(MSBuildThisFileDirectory)..\inc\cortypeinfo.h
<_RexcepFilePath Condition=" '$(_RexcepFilePath)' == '' ">$(MSBuildThisFileDirectory)..\vm\rexcep.h
<_ILLinkTrimXmlFilePath Condition=" '$(_ILLinkTrimXmlFilePath)' == '' ">$(MSBuildThisFileDirectory)ILLinkTrim.xml
- <_ILLinkTasksToolsDir>$(PkgILLink_Tasks)/tools
+ <_ILLinkTasksToolsDir>$(PkgMicrosoft_NET_ILLink_Tasks)/tools
<_ILLinkTasksDir>$(_ILLinkTasksToolsDir)/$(NetFrameworkCurrent)/
<_ILLinkTasksDir Condition="'$(MSBuildRuntimeType)' == 'Core'">$(_ILLinkTasksToolsDir)/netcoreapp3.0/
diff --git a/src/coreclr/src/System.Private.CoreLib/PinvokeAnalyzerExceptionList.analyzerdata b/src/coreclr/src/System.Private.CoreLib/PinvokeAnalyzerExceptionList.analyzerdata
index 141a5c2a73ce0d..e1c58c0c50381a 100644
--- a/src/coreclr/src/System.Private.CoreLib/PinvokeAnalyzerExceptionList.analyzerdata
+++ b/src/coreclr/src/System.Private.CoreLib/PinvokeAnalyzerExceptionList.analyzerdata
@@ -6,5 +6,5 @@ normaliz.dll!NormalizeString
user32.dll!GetProcessWindowStation
user32.dll!GetUserObjectInformationW
-
+
kernel32.dll!GetGeoInfo
\ No newline at end of file
diff --git a/src/coreclr/src/System.Private.CoreLib/System.Private.CoreLib.csproj b/src/coreclr/src/System.Private.CoreLib/System.Private.CoreLib.csproj
index e1d9a09182ef60..323d68b052b19e 100644
--- a/src/coreclr/src/System.Private.CoreLib/System.Private.CoreLib.csproj
+++ b/src/coreclr/src/System.Private.CoreLib/System.Private.CoreLib.csproj
@@ -149,7 +149,6 @@
-
-
@@ -372,7 +367,6 @@
diff --git a/src/coreclr/src/System.Private.CoreLib/Tools/GenUnicodeProp/GenUnicodeProp.csproj b/src/coreclr/src/System.Private.CoreLib/Tools/GenUnicodeProp/GenUnicodeProp.csproj
index c40c22dbb8168d..73e115381ce756 100644
--- a/src/coreclr/src/System.Private.CoreLib/Tools/GenUnicodeProp/GenUnicodeProp.csproj
+++ b/src/coreclr/src/System.Private.CoreLib/Tools/GenUnicodeProp/GenUnicodeProp.csproj
@@ -7,7 +7,7 @@
-
@@ -43,7 +43,6 @@
- resolver = name => alc.LoadFromAssemblyName(name);
+
+ // Get the requested type.
string typeName = MarshalToString(typeNameNative, nameof(typeNameNative));
+ Type type = Type.GetType(typeName, resolver, null, throwOnError: true)!;
+
+ // Get the method name on the type.
string methodName = MarshalToString(methodNameNative, nameof(methodNameNative));
- string delegateType;
+ // Determine the signature of the type. There are 3 possibilities:
+ // * No delegate type was supplied - use the default (i.e. ComponentEntryPoint).
+ // * A sentinel value was supplied - the function is marked UnmanagedCallersOnly. This means
+ // a function pointer can be returned without creating a delegate.
+ // * A delegate type was supplied - Load the type and create a delegate for that method.
+ Type? delegateType;
if (delegateTypeNative == IntPtr.Zero)
{
- delegateType = typeof(ComponentEntryPoint).AssemblyQualifiedName!;
+ delegateType = typeof(ComponentEntryPoint);
+ }
+ else if (delegateTypeNative == (IntPtr)(-1))
+ {
+ delegateType = null;
}
else
{
- delegateType = MarshalToString(delegateTypeNative, nameof(delegateTypeNative));
+ string delegateTypeName = MarshalToString(delegateTypeNative, nameof(delegateTypeNative));
+ delegateType = Type.GetType(delegateTypeName, resolver, null, throwOnError: true)!;
}
if (reserved != IntPtr.Zero)
@@ -80,17 +100,35 @@ public static int LoadAssemblyAndGetFunctionPointer(IntPtr assemblyPathNative,
throw new ArgumentNullException(nameof(functionHandle));
}
- Delegate d = CreateDelegate(assemblyPath, typeName, methodName, delegateType);
+ IntPtr functionPtr;
+ if (delegateType == null)
+ {
+ // Match search semantics of the CreateDelegate() function below.
+ BindingFlags bindingFlags = BindingFlags.Static | BindingFlags.Public | BindingFlags.NonPublic;
+ MethodInfo? methodInfo = type.GetMethod(methodName, bindingFlags);
+ if (methodInfo == null)
+ throw new MissingMethodException(typeName, methodName);
- IntPtr functionPtr = Marshal.GetFunctionPointerForDelegate(d);
+ // Verify the function is properly marked.
+ if (null == methodInfo.GetCustomAttribute())
+ throw new InvalidOperationException(SR.InvalidOperation_FunctionMissingUnmanagedCallersOnly);
- lock (s_delegates)
+ functionPtr = methodInfo.MethodHandle.GetFunctionPointer();
+ }
+ else
{
- // Keep a reference to the delegate to prevent it from being garbage collected
- s_delegates[functionPtr] = d;
+ Delegate d = Delegate.CreateDelegate(delegateType, type, methodName)!;
+
+ functionPtr = Marshal.GetFunctionPointerForDelegate(d);
+
+ lock (s_delegates)
+ {
+ // Keep a reference to the delegate to prevent it from being garbage collected
+ s_delegates[functionPtr] = d;
+ }
}
- Marshal.WriteIntPtr(functionHandle, functionPtr);
+ *(IntPtr*)functionHandle = functionPtr;
}
catch (Exception e)
{
@@ -100,23 +138,6 @@ public static int LoadAssemblyAndGetFunctionPointer(IntPtr assemblyPathNative,
return 0;
}
- private static Delegate CreateDelegate(string assemblyPath, string typeName, string methodName, string delegateTypeName)
- {
- // Throws
- IsolatedComponentLoadContext alc = GetIsolatedComponentLoadContext(assemblyPath);
-
- Func resolver = name => alc.LoadFromAssemblyName(name);
-
- // Throws
- Type type = Type.GetType(typeName, resolver, null, throwOnError: true)!;
-
- // Throws
- Type delegateType = Type.GetType(delegateTypeName, resolver, null, throwOnError: true)!;
-
- // Throws
- return Delegate.CreateDelegate(delegateType, type, methodName)!;
- }
-
private static IsolatedComponentLoadContext GetIsolatedComponentLoadContext(string assemblyPath)
{
IsolatedComponentLoadContext? alc;
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/ArgIterator.cs b/src/coreclr/src/System.Private.CoreLib/src/System/ArgIterator.cs
index d32d53ae753b6e..8c7039e557b457 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/ArgIterator.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/ArgIterator.cs
@@ -85,7 +85,9 @@ public TypedReference GetNextArg(RuntimeTypeHandle rth)
// malicious caller to increment the pointer to an arbitrary
// location in memory and read the contents.
if (ArgPtr == IntPtr.Zero)
+#pragma warning disable CA2208 // Instantiate argument exceptions correctly, the argument not applicable
throw new ArgumentNullException();
+#pragma warning restore CA2208
TypedReference result = default;
// reference to TypedReference is banned, so have to pass result as pointer
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Array.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Array.CoreCLR.cs
index 55ed9f70b082be..75f6aa40ce4d14 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Array.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Array.CoreCLR.cs
@@ -9,13 +9,6 @@
using System.Reflection;
using Internal.Runtime.CompilerServices;
-#pragma warning disable SA1121 // explicitly using type aliases instead of built-in types
-#if TARGET_64BIT
-using nuint = System.UInt64;
-#else
-using nuint = System.UInt32;
-#endif
-
namespace System
{
// Note that we make a T[] (single-dimensional w/ zero as the lower bound) implement both
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Buffer.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Buffer.CoreCLR.cs
index 8c7bc784ad8961..5e1d8249e3ddda 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Buffer.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Buffer.CoreCLR.cs
@@ -7,15 +7,6 @@
using System.Runtime.InteropServices;
using Internal.Runtime.CompilerServices;
-#pragma warning disable SA1121 // explicitly using type aliases instead of built-in types
-#if TARGET_64BIT
-using nuint = System.UInt64;
-using nint = System.UInt64;
-#else
-using nuint = System.UInt32;
-using nint = System.UInt32;
-#endif
-
namespace System
{
public partial class Buffer
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/Eventing/EventPipe.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/Eventing/EventPipe.CoreCLR.cs
index bd1ad774bea18b..7d3ab6c6af68d8 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/Eventing/EventPipe.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/Eventing/EventPipe.CoreCLR.cs
@@ -33,7 +33,7 @@ private static unsafe extern ulong Enable(
internal static extern IntPtr CreateProvider(string providerName, Interop.Advapi32.EtwEnableCallback callbackFunc);
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
- internal static extern unsafe IntPtr DefineEvent(IntPtr provHandle, uint eventID, long keywords, uint eventVersion, uint level, void* pMetadata, uint metadataLength);
+ internal static extern unsafe IntPtr DefineEvent(IntPtr provHandle, uint eventID, long keywords, uint eventVersion, uint level, void *pMetadata, uint metadataLength);
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
internal static extern IntPtr GetProvider(string providerName);
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/StackFrameHelper.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/StackFrameHelper.cs
index 20a0c57492d8aa..41b1dd72e01023 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/StackFrameHelper.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Diagnostics/StackFrameHelper.cs
@@ -131,7 +131,7 @@ internal void InitializeSourceInfo(int iSkip, bool fNeedFileInfo, Exception? exc
object? target = Activator.CreateInstance(symbolsType);
// Create an instance delegate for the GetSourceLineInfo method
- GetSourceLineInfoDelegate getSourceLineInfo = (GetSourceLineInfoDelegate)symbolsMethodInfo.CreateDelegate(typeof(GetSourceLineInfoDelegate), target);
+ GetSourceLineInfoDelegate getSourceLineInfo = symbolsMethodInfo.CreateDelegate(target);
// We could race with another thread. It doesn't matter if we win or lose, the losing instance will be GC'ed and all threads including this one will
// use the winning instance
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/GC.cs b/src/coreclr/src/System.Private.CoreLib/src/System/GC.cs
index fc8a9650f63b7e..a44047cc4d8e95 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/GC.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/GC.cs
@@ -135,7 +135,7 @@ public static void AddMemoryPressure(long bytesAllocated)
if ((4 == IntPtr.Size) && (bytesAllocated > int.MaxValue))
{
- throw new ArgumentOutOfRangeException("pressure",
+ throw new ArgumentOutOfRangeException(nameof(bytesAllocated),
SR.ArgumentOutOfRange_MustBeNonNegInt32);
}
@@ -353,7 +353,7 @@ public static long GetTotalMemory(bool forceFullCollection)
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
- private static extern IntPtr _RegisterFrozenSegment(IntPtr sectionAddress, IntPtr sectionSize);
+ private static extern IntPtr _RegisterFrozenSegment(IntPtr sectionAddress, nint sectionSize);
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
private static extern void _UnregisterFrozenSegment(IntPtr segmentHandle);
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.Unix.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.Unix.cs
deleted file mode 100644
index dccd60c78ce0d5..00000000000000
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.Unix.cs
+++ /dev/null
@@ -1,24 +0,0 @@
-// Licensed to the .NET Foundation under one or more agreements.
-// The .NET Foundation licenses this file to you under the MIT license.
-// See the LICENSE file in the project root for more information.
-
-namespace System.Globalization
-{
- internal static partial class GlobalizationMode
- {
- private static bool GetGlobalizationInvariantMode()
- {
- bool invariantEnabled = GetInvariantSwitchValue();
- if (!invariantEnabled)
- {
- if (Interop.Globalization.LoadICU() == 0)
- {
- string message = "Couldn't find a valid ICU package installed on the system. " +
- "Set the configuration flag System.Globalization.Invariant to true if you want to run with no globalization support.";
- Environment.FailFast(message);
- }
- }
- return invariantEnabled;
- }
- }
-}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.Windows.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.Windows.cs
deleted file mode 100644
index f5def09ab96ab4..00000000000000
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.Windows.cs
+++ /dev/null
@@ -1,14 +0,0 @@
-// Licensed to the .NET Foundation under one or more agreements.
-// The .NET Foundation licenses this file to you under the MIT license.
-// See the LICENSE file in the project root for more information.
-
-namespace System.Globalization
-{
- internal static partial class GlobalizationMode
- {
- private static bool GetGlobalizationInvariantMode()
- {
- return GetInvariantSwitchValue();
- }
- }
-}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.cs
deleted file mode 100644
index b216677e1a711b..00000000000000
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Globalization/GlobalizationMode.cs
+++ /dev/null
@@ -1,30 +0,0 @@
-// Licensed to the .NET Foundation under one or more agreements.
-// The .NET Foundation licenses this file to you under the MIT license.
-// See the LICENSE file in the project root for more information.
-
-namespace System.Globalization
-{
- internal static partial class GlobalizationMode
- {
- internal static bool Invariant { get; } = GetGlobalizationInvariantMode();
-
- // GetInvariantSwitchValue calls CLRConfig first to detect if the switch is defined in the config file.
- // if the switch is defined we just use the value of this switch. otherwise, we'll try to get the switch
- // value from the environment variable if it is defined.
- internal static bool GetInvariantSwitchValue()
- {
- bool ret = CLRConfig.GetBoolValue("System.Globalization.Invariant", out bool exist);
- if (!exist)
- {
- // Linux doesn't support environment variable names include dots
- string? switchValue = Environment.GetEnvironmentVariable("DOTNET_SYSTEM_GLOBALIZATION_INVARIANT");
- if (switchValue != null)
- {
- ret = bool.IsTrueStringIgnoreCase(switchValue) || switchValue.Equals("1");
- }
- }
-
- return ret;
- }
- }
-}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/IO/FileLoadException.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/IO/FileLoadException.CoreCLR.cs
index 2878b89a49cc41..b426926a95e3f8 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/IO/FileLoadException.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/IO/FileLoadException.CoreCLR.cs
@@ -29,7 +29,7 @@ internal static string FormatFileLoadExceptionMessage(string? fileName, int hRes
else
GetMessageForHR(hResult, new StringHandleOnStack(ref message));
- return string.Format(format, fileName, message);
+ return string.Format(format!, fileName, message);
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Object.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Object.CoreCLR.cs
index 3c7cb5c23982a2..a65358449ee8ca 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Object.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Object.CoreCLR.cs
@@ -4,13 +4,6 @@
using System.Runtime.CompilerServices;
-#pragma warning disable SA1121 // explicitly using type aliases instead of built-in types
-#if TARGET_64BIT
-using nuint = System.UInt64;
-#else
-using nuint = System.UInt32;
-#endif
-
namespace System
{
public partial class Object
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Assembly.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Assembly.CoreCLR.cs
index c227155ef46645..8ef9d01d3ee707 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Assembly.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Assembly.CoreCLR.cs
@@ -62,7 +62,7 @@ internal static RuntimeAssembly GetExecutingAssembly(ref StackCrawlMark stackMar
{
RuntimeAssembly? retAssembly = null;
GetExecutingAssemblyNative(new StackCrawlMarkHandle(ref stackMark), ObjectHandleOnStack.Create(ref retAssembly));
- return retAssembly;
+ return retAssembly!;
}
// Get the assembly that the current code is running from.
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/AssemblyBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/AssemblyBuilder.cs
index 2e0acab5590163..1407f8705246e7 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/AssemblyBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/AssemblyBuilder.cs
@@ -21,6 +21,7 @@
using System.Collections.Generic;
using System.Diagnostics;
+using System.Diagnostics.CodeAnalysis;
using System.Diagnostics.SymbolStore;
using System.Globalization;
using System.IO;
@@ -125,7 +126,7 @@ public sealed class AssemblyBuilder : Assembly
// This is only valid in the "external" AssemblyBuilder
internal AssemblyBuilderData _assemblyData;
private readonly InternalAssemblyBuilder _internalAssemblyBuilder;
- private ModuleBuilder _manifestModuleBuilder = null!;
+ private ModuleBuilder _manifestModuleBuilder;
// Set to true if the manifest module was returned by code:DefineDynamicModule to the user
private bool _isManifestModuleUsedAsDefinedModule;
@@ -191,7 +192,7 @@ internal AssemblyBuilder(AssemblyName name,
new StackCrawlMarkHandle(ref stackMark),
(int)access,
ObjectHandleOnStack.Create(ref retAssembly));
- _internalAssemblyBuilder = (InternalAssemblyBuilder)retAssembly;
+ _internalAssemblyBuilder = (InternalAssemblyBuilder)retAssembly!;
_assemblyData = new AssemblyBuilderData(_internalAssemblyBuilder, access);
@@ -208,6 +209,7 @@ internal AssemblyBuilder(AssemblyName name,
}
}
+ [MemberNotNull(nameof(_manifestModuleBuilder))]
private void InitManifestModule()
{
InternalModuleBuilder modBuilder = (InternalModuleBuilder)GetInMemoryAssemblyModule(GetNativeHandle());
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ConstructorBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ConstructorBuilder.cs
index 80cb55b796c501..fb6b4c623eab93 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ConstructorBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ConstructorBuilder.cs
@@ -19,7 +19,7 @@ internal ConstructorBuilder(string name, MethodAttributes attributes, CallingCon
m_methodBuilder = new MethodBuilder(name, attributes, callingConvention, null, null, null,
parameterTypes, requiredCustomModifiers, optionalCustomModifiers, mod, type);
- type.m_listMethods.Add(m_methodBuilder);
+ type.m_listMethods!.Add(m_methodBuilder);
m_methodBuilder.GetMethodSignature().InternalGetSignature(out _);
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/CustomAttributeBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/CustomAttributeBuilder.cs
index 506c98b28e5e2c..d1e89aaf0c3bf3 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/CustomAttributeBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/CustomAttributeBuilder.cs
@@ -14,91 +14,42 @@
===========================================================*/
using System.Buffers.Binary;
+using System.Diagnostics;
using System.IO;
using System.Text;
-using System.Diagnostics;
namespace System.Reflection.Emit
{
public class CustomAttributeBuilder
{
+ internal ConstructorInfo m_con;
+ private object?[] m_constructorArgs;
+ private byte[] m_blob;
+
// public constructor to form the custom attribute with constructor and constructor
// parameters.
- public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs)
+ public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs) :
+ this(con, constructorArgs, Array.Empty(), Array.Empty(), Array.Empty(), Array.Empty())
{
- InitCustomAttributeBuilder(con, constructorArgs,
- Array.Empty(), Array.Empty(),
- Array.Empty(), Array.Empty());
}
// public constructor to form the custom attribute with constructor, constructor
// parameters and named properties.
- public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs,
- PropertyInfo[] namedProperties, object?[] propertyValues)
+ public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs, PropertyInfo[] namedProperties, object?[] propertyValues) :
+ this(con, constructorArgs, namedProperties, propertyValues, Array.Empty(), Array.Empty())
{
- InitCustomAttributeBuilder(con, constructorArgs, namedProperties,
- propertyValues, Array.Empty(), Array.Empty());
}
// public constructor to form the custom attribute with constructor and constructor
// parameters.
- public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs,
- FieldInfo[] namedFields, object?[] fieldValues)
+ public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs, FieldInfo[] namedFields, object?[] fieldValues) :
+ this(con, constructorArgs, Array.Empty(), Array.Empty(), namedFields, fieldValues)
{
- InitCustomAttributeBuilder(con, constructorArgs, Array.Empty(),
- Array.Empty(), namedFields, fieldValues);
}
// public constructor to form the custom attribute with constructor and constructor
// parameters.
- public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs,
- PropertyInfo[] namedProperties, object?[] propertyValues,
- FieldInfo[] namedFields, object?[] fieldValues)
- {
- InitCustomAttributeBuilder(con, constructorArgs, namedProperties,
- propertyValues, namedFields, fieldValues);
- }
-
- // Check that a type is suitable for use in a custom attribute.
- private bool ValidateType(Type t)
- {
- if (t.IsPrimitive)
- {
- return t != typeof(IntPtr) && t != typeof(UIntPtr);
- }
- if (t == typeof(string) || t == typeof(Type))
- {
- return true;
- }
- if (t.IsEnum)
- {
- switch (Type.GetTypeCode(Enum.GetUnderlyingType(t)))
- {
- case TypeCode.SByte:
- case TypeCode.Byte:
- case TypeCode.Int16:
- case TypeCode.UInt16:
- case TypeCode.Int32:
- case TypeCode.UInt32:
- case TypeCode.Int64:
- case TypeCode.UInt64:
- return true;
- default:
- return false;
- }
- }
- if (t.IsArray)
- {
- if (t.GetArrayRank() != 1)
- return false;
- return ValidateType(t.GetElementType()!);
- }
- return t == typeof(object);
- }
-
- internal void InitCustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs,
- PropertyInfo[] namedProperties, object?[] propertyValues,
- FieldInfo[] namedFields, object?[] fieldValues)
+ public CustomAttributeBuilder(ConstructorInfo con, object?[] constructorArgs, PropertyInfo[] namedProperties, object?[] propertyValues, FieldInfo[] namedFields, object?[] fieldValues)
{
if (con == null)
throw new ArgumentNullException(nameof(con));
@@ -289,6 +240,43 @@ internal void InitCustomAttributeBuilder(ConstructorInfo con, object?[] construc
m_blob = ((MemoryStream)writer.BaseStream).ToArray();
}
+ // Check that a type is suitable for use in a custom attribute.
+ private bool ValidateType(Type t)
+ {
+ if (t.IsPrimitive)
+ {
+ return t != typeof(IntPtr) && t != typeof(UIntPtr);
+ }
+ if (t == typeof(string) || t == typeof(Type))
+ {
+ return true;
+ }
+ if (t.IsEnum)
+ {
+ switch (Type.GetTypeCode(Enum.GetUnderlyingType(t)))
+ {
+ case TypeCode.SByte:
+ case TypeCode.Byte:
+ case TypeCode.Int16:
+ case TypeCode.UInt16:
+ case TypeCode.Int32:
+ case TypeCode.UInt32:
+ case TypeCode.Int64:
+ case TypeCode.UInt64:
+ return true;
+ default:
+ return false;
+ }
+ }
+ if (t.IsArray)
+ {
+ if (t.GetArrayRank() != 1)
+ return false;
+ return ValidateType(t.GetElementType()!);
+ }
+ return t == typeof(object);
+ }
+
private static void VerifyTypeAndPassedObjectType(Type type, Type passedType, string paramName)
{
if (type != typeof(object) && Type.GetTypeCode(passedType) != Type.GetTypeCode(type))
@@ -549,9 +537,5 @@ internal void CreateCustomAttribute(ModuleBuilder mod, int tkOwner, int tkAttrib
TypeBuilder.DefineCustomAttribute(mod, tkOwner, tkAttrib, m_blob, toDisk,
typeof(System.Diagnostics.DebuggableAttribute) == m_con.DeclaringType);
}
-
- internal ConstructorInfo m_con = null!;
- internal object?[] m_constructorArgs = null!;
- internal byte[] m_blob = null!;
}
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicILGenerator.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicILGenerator.cs
index a1a85b47d0bf3b..d8e330dd7f98b2 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicILGenerator.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicILGenerator.cs
@@ -345,7 +345,7 @@ public override void BeginExceptFilterBlock()
if (CurrExcStackCount == 0)
throw new NotSupportedException(SR.Argument_NotInExceptionBlock);
- __ExceptionInfo current = CurrExcStack[CurrExcStackCount - 1];
+ __ExceptionInfo current = CurrExcStack![CurrExcStackCount - 1];
Label endLabel = current.GetEndLabel();
Emit(OpCodes.Leave, endLabel);
@@ -359,7 +359,7 @@ public override void BeginCatchBlock(Type exceptionType)
if (CurrExcStackCount == 0)
throw new NotSupportedException(SR.Argument_NotInExceptionBlock);
- __ExceptionInfo current = CurrExcStack[CurrExcStackCount - 1];
+ __ExceptionInfo current = CurrExcStack![CurrExcStackCount - 1];
RuntimeType? rtType = exceptionType as RuntimeType;
@@ -558,7 +558,7 @@ private int GetTokenForSig(byte[] sig)
internal class DynamicResolver : Resolver
{
#region Private Data Members
- private __ExceptionInfo[] m_exceptions = null!;
+ private __ExceptionInfo[]? m_exceptions;
private byte[]? m_exceptionHeader;
private DynamicMethod m_method;
private byte[] m_code;
@@ -571,7 +571,7 @@ internal class DynamicResolver : Resolver
internal DynamicResolver(DynamicILGenerator ilGenerator)
{
m_stackSize = ilGenerator.GetMaxStackSize();
- m_exceptions = ilGenerator.GetExceptions()!;
+ m_exceptions = ilGenerator.GetExceptions();
m_code = ilGenerator.BakeByteArray()!;
m_localSignature = ilGenerator.m_localSignature.InternalGetSignatureArray();
m_scope = ilGenerator.m_scope;
@@ -586,7 +586,6 @@ internal DynamicResolver(DynamicILInfo dynamicILInfo)
m_code = dynamicILInfo.Code;
m_localSignature = dynamicILInfo.LocalSignature;
m_exceptionHeader = dynamicILInfo.Exceptions;
- // m_exceptions = dynamicILInfo.Exceptions;
m_scope = dynamicILInfo.DynamicScope;
m_method = dynamicILInfo.DynamicMethod;
@@ -740,6 +739,8 @@ internal override byte[] GetLocalsSignature()
internal override unsafe void GetEHInfo(int excNumber, void* exc)
{
+ Debug.Assert(m_exceptions != null);
+
CORINFO_EH_CLAUSE* exception = (CORINFO_EH_CLAUSE*)exc;
for (int i = 0; i < m_exceptions.Length; i++)
{
@@ -819,11 +820,13 @@ internal override void ResolveToken(int token, out IntPtr typeHandle, out IntPtr
{
if (vaMeth.m_dynamicMethod == null)
{
- methodHandle = vaMeth.m_method.MethodHandle.Value;
+ methodHandle = vaMeth.m_method!.MethodHandle.Value;
typeHandle = vaMeth.m_method.GetDeclaringTypeInternal().GetTypeHandleInternal().Value;
}
else
+ {
methodHandle = vaMeth.m_dynamicMethod.GetMethodDescriptor().Value;
+ }
return;
}
@@ -1098,8 +1101,8 @@ internal GenericFieldInfo(RuntimeFieldHandle fieldHandle, RuntimeTypeHandle cont
internal sealed class VarArgMethod
{
- internal RuntimeMethodInfo m_method = null!;
- internal DynamicMethod m_dynamicMethod = null!;
+ internal RuntimeMethodInfo? m_method;
+ internal DynamicMethod? m_dynamicMethod;
internal SignatureHelper m_signature;
internal VarArgMethod(DynamicMethod dm, SignatureHelper signature)
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicMethod.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicMethod.cs
index 35a708a1f867d0..c8c5468801d72e 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicMethod.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/DynamicMethod.cs
@@ -3,6 +3,7 @@
// See the LICENSE file in the project root for more information.
using System.Diagnostics;
+using System.Diagnostics.CodeAnalysis;
using System.Globalization;
using System.Runtime.CompilerServices;
using System.Text;
@@ -12,9 +13,9 @@ namespace System.Reflection.Emit
{
public sealed class DynamicMethod : MethodInfo
{
- private RuntimeType[] m_parameterTypes = null!;
+ private RuntimeType[] m_parameterTypes;
internal IRuntimeMethodInfo? m_methodHandle;
- private RuntimeType m_returnType = null!;
+ private RuntimeType m_returnType;
private DynamicILGenerator? m_ilGenerator;
private DynamicILInfo? m_DynamicILInfo;
private bool m_fInitLocals;
@@ -28,7 +29,7 @@ public sealed class DynamicMethod : MethodInfo
// If we allowed use of RTDynamicMethod, the creator of the DynamicMethod would
// not be able to bound access to the DynamicMethod. Hence, we need to ensure that
// we do not allow direct use of RTDynamicMethod.
- private RTDynamicMethod m_dynMethod = null!;
+ private RTDynamicMethod m_dynMethod;
// needed to keep the object alive during jitting
// assigned by the DynamicResolver ctor
@@ -249,6 +250,9 @@ private static RuntimeModule GetDynamicMethodsModule()
return s_anonymouslyHostedDynamicMethodsModule;
}
+ [MemberNotNull(nameof(m_parameterTypes))]
+ [MemberNotNull(nameof(m_returnType))]
+ [MemberNotNull(nameof(m_dynMethod))]
private void Init(string name,
MethodAttributes attributes,
CallingConventions callingConvention,
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/EnumBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/EnumBuilder.cs
index 4f58098617fdb3..3b0e0350bf9df1 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/EnumBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/EnumBuilder.cs
@@ -91,6 +91,8 @@ public FieldBuilder DefineLiteral(string literalName, object? literalValue)
public override Type? BaseType => m_typeBuilder.BaseType;
+ public override bool IsByRefLike => false;
+
protected override ConstructorInfo? GetConstructorImpl(BindingFlags bindingAttr, Binder? binder,
CallingConventions callConvention, Type[] types, ParameterModifier[]? modifiers)
{
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/GenericTypeParameterBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/GenericTypeParameterBuilder.cs
index 547d160a664262..d0f930e4c763ea 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/GenericTypeParameterBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/GenericTypeParameterBuilder.cs
@@ -52,6 +52,8 @@ public override bool Equals(object? o)
public override Module Module => m_type.Module;
+ public override bool IsByRefLike => false;
+
internal int MetadataTokenInternal => m_type.MetadataTokenInternal;
#endregion
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ILGenerator.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ILGenerator.cs
index 93c517fb23c5c7..354d470bb982a2 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ILGenerator.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/ILGenerator.cs
@@ -40,20 +40,20 @@ internal static T[] EnlargeArray(T[] incoming, int requiredSize)
private int m_length;
private byte[] m_ILStream;
- private int[] m_labelList;
+ private int[]? m_labelList;
private int m_labelCount;
- private __FixupData[] m_fixupData;
+ private __FixupData[]? m_fixupData;
private int m_fixupCount;
- private int[] m_RelocFixupList;
+ private int[]? m_RelocFixupList;
private int m_RelocFixupCount;
private int m_exceptionCount;
private int m_currExcStackCount;
- private __ExceptionInfo[] m_exceptions; // This is the list of all of the exceptions in this ILStream.
- private __ExceptionInfo[] m_currExcStack; // This is the stack of exceptions which we're currently in.
+ private __ExceptionInfo[]? m_exceptions; // This is the list of all of the exceptions in this ILStream.
+ private __ExceptionInfo[]? m_currExcStack; // This is the stack of exceptions which we're currently in.
internal ScopeTree m_ScopeTree; // this variable tracks all debugging scope information
internal LineNumberInfo m_LineNumberInfo; // this variable tracks all line number information
@@ -69,7 +69,7 @@ internal static T[] EnlargeArray(T[] incoming, int requiredSize)
internal int CurrExcStackCount => m_currExcStackCount;
- internal __ExceptionInfo[] CurrExcStack => m_currExcStack;
+ internal __ExceptionInfo[]? CurrExcStack => m_currExcStack;
#endregion
@@ -87,29 +87,12 @@ internal ILGenerator(MethodInfo methodBuilder, int size)
m_ILStream = new byte[Math.Max(size, DefaultSize)];
- m_length = 0;
-
- m_labelCount = 0;
- m_fixupCount = 0;
- m_labelList = null!;
-
- m_fixupData = null!;
-
- m_exceptions = null!;
- m_exceptionCount = 0;
- m_currExcStack = null!;
- m_currExcStackCount = 0;
-
- m_RelocFixupList = null!;
- m_RelocFixupCount = 0;
-
// initialize the scope tree
m_ScopeTree = new ScopeTree();
m_LineNumberInfo = new LineNumberInfo();
m_methodBuilder = methodBuilder;
// initialize local signature
- m_localCount = 0;
MethodBuilder? mb = m_methodBuilder as MethodBuilder;
m_localSignature = SignatureHelper.GetLocalVarSigHelper(mb?.GetTypeBuilder().Module);
}
@@ -215,7 +198,7 @@ private SignatureHelper GetMemberRefSignature(CallingConventions call, Type? ret
// replacing them with their proper values.
for (int i = 0; i < m_fixupCount; i++)
{
- __FixupData fixupData = m_fixupData[i];
+ __FixupData fixupData = m_fixupData![i];
int updateAddr = GetLabelPos(fixupData.m_fixupLabel) - (fixupData.m_fixupPos + fixupData.m_fixupInstSize);
// Handle single byte instructions
@@ -253,7 +236,7 @@ private SignatureHelper GetMemberRefSignature(CallingConventions call, Type? ret
}
var temp = new __ExceptionInfo[m_exceptionCount];
- Array.Copy(m_exceptions, temp, m_exceptionCount);
+ Array.Copy(m_exceptions!, temp, m_exceptionCount);
SortExceptions(temp);
return temp;
}
@@ -288,7 +271,7 @@ private int GetLabelPos(Label lbl)
int index = lbl.GetLabelValue();
- if (index < 0 || index >= m_labelCount)
+ if (index < 0 || index >= m_labelCount || m_labelList is null)
throw new ArgumentException(SR.Argument_BadLabel);
if (m_labelList[index] < 0)
@@ -355,7 +338,7 @@ private static void SortExceptions(__ExceptionInfo[] exceptions)
}
int[] narrowTokens = new int[m_RelocFixupCount];
- Array.Copy(m_RelocFixupList, narrowTokens, m_RelocFixupCount);
+ Array.Copy(m_RelocFixupList!, narrowTokens, m_RelocFixupCount);
return narrowTokens;
}
#endregion
@@ -396,7 +379,90 @@ public virtual void Emit(OpCode opcode, short arg)
public virtual void Emit(OpCode opcode, int arg)
{
- // Puts opcode onto the stream of instructions followed by arg
+ // Special-case several opcodes that have shorter variants for common values.
+ if (opcode.Equals(OpCodes.Ldc_I4))
+ {
+ if (arg >= -1 && arg <= 8)
+ {
+ opcode = arg switch
+ {
+ -1 => OpCodes.Ldc_I4_M1,
+ 0 => OpCodes.Ldc_I4_0,
+ 1 => OpCodes.Ldc_I4_1,
+ 2 => OpCodes.Ldc_I4_2,
+ 3 => OpCodes.Ldc_I4_3,
+ 4 => OpCodes.Ldc_I4_4,
+ 5 => OpCodes.Ldc_I4_5,
+ 6 => OpCodes.Ldc_I4_6,
+ 7 => OpCodes.Ldc_I4_7,
+ _ => OpCodes.Ldc_I4_8,
+ };
+ Emit(opcode);
+ return;
+ }
+
+ if (arg >= -128 && arg <= 127)
+ {
+ Emit(OpCodes.Ldc_I4_S, (sbyte)arg);
+ return;
+ }
+ }
+ else if (opcode.Equals(OpCodes.Ldarg))
+ {
+ if ((uint)arg <= 3)
+ {
+ Emit(arg switch
+ {
+ 0 => OpCodes.Ldarg_0,
+ 1 => OpCodes.Ldarg_1,
+ 2 => OpCodes.Ldarg_2,
+ _ => OpCodes.Ldarg_3,
+ });
+ return;
+ }
+
+ if ((uint)arg <= byte.MaxValue)
+ {
+ Emit(OpCodes.Ldarg_S, (byte)arg);
+ return;
+ }
+
+ if ((uint)arg <= ushort.MaxValue) // this will be true except on misuse of the opcode
+ {
+ Emit(OpCodes.Ldarg, (short)arg);
+ return;
+ }
+ }
+ else if (opcode.Equals(OpCodes.Ldarga))
+ {
+ if ((uint)arg <= byte.MaxValue)
+ {
+ Emit(OpCodes.Ldarga_S, (byte)arg);
+ return;
+ }
+
+ if ((uint)arg <= ushort.MaxValue) // this will be true except on misuse of the opcode
+ {
+ Emit(OpCodes.Ldarga, (short)arg);
+ return;
+ }
+ }
+ else if (opcode.Equals(OpCodes.Starg))
+ {
+ if ((uint)arg <= byte.MaxValue)
+ {
+ Emit(OpCodes.Starg_S, (byte)arg);
+ return;
+ }
+
+ if ((uint)arg <= ushort.MaxValue) // this will be true except on misuse of the opcode
+ {
+ Emit(OpCodes.Starg, (short)arg);
+ return;
+ }
+ }
+
+ // For everything else, put the opcode followed by the arg onto the stream of instructions.
EnsureCapacity(7);
InternalEmit(opcode);
PutInteger4(arg);
@@ -881,7 +947,7 @@ public virtual void EndExceptionBlock()
}
// Pop the current exception block
- __ExceptionInfo current = m_currExcStack[m_currExcStackCount - 1];
+ __ExceptionInfo current = m_currExcStack![m_currExcStackCount - 1];
m_currExcStack[--m_currExcStackCount] = null!;
Label endLabel = current.GetEndLabel();
@@ -905,7 +971,7 @@ public virtual void EndExceptionBlock()
// Check if we've already set this label.
// The only reason why we might have set this is if we have a finally block.
- Label label = m_labelList[endLabel.GetLabelValue()] != -1
+ Label label = m_labelList![endLabel.GetLabelValue()] != -1
? current.m_finallyEndLabel
: endLabel;
@@ -921,7 +987,7 @@ public virtual void BeginExceptFilterBlock()
if (m_currExcStackCount == 0)
throw new NotSupportedException(SR.Argument_NotInExceptionBlock);
- __ExceptionInfo current = m_currExcStack[m_currExcStackCount - 1];
+ __ExceptionInfo current = m_currExcStack![m_currExcStackCount - 1];
Emit(OpCodes.Leave, current.GetEndLabel());
@@ -936,7 +1002,7 @@ public virtual void BeginCatchBlock(Type exceptionType)
{
throw new NotSupportedException(SR.Argument_NotInExceptionBlock);
}
- __ExceptionInfo current = m_currExcStack[m_currExcStackCount - 1];
+ __ExceptionInfo current = m_currExcStack![m_currExcStackCount - 1];
if (current.GetCurrentState() == __ExceptionInfo.State_Filter)
{
@@ -967,7 +1033,7 @@ public virtual void BeginFaultBlock()
{
throw new NotSupportedException(SR.Argument_NotInExceptionBlock);
}
- __ExceptionInfo current = m_currExcStack[m_currExcStackCount - 1];
+ __ExceptionInfo current = m_currExcStack![m_currExcStackCount - 1];
// emit the leave for the clause before this one.
Emit(OpCodes.Leave, current.GetEndLabel());
@@ -981,7 +1047,7 @@ public virtual void BeginFinallyBlock()
{
throw new NotSupportedException(SR.Argument_NotInExceptionBlock);
}
- __ExceptionInfo current = m_currExcStack[m_currExcStackCount - 1];
+ __ExceptionInfo current = m_currExcStack![m_currExcStackCount - 1];
int state = current.GetCurrentState();
Label endLabel = current.GetEndLabel();
int catchEndAddr = 0;
@@ -1031,8 +1097,8 @@ public virtual void MarkLabel(Label loc)
int labelIndex = loc.GetLabelValue();
- // This should never happen.
- if (labelIndex < 0 || labelIndex >= m_labelList.Length)
+ // This should only happen if a label from another generator is used with this one.
+ if (m_labelList is null || labelIndex < 0 || labelIndex >= m_labelList.Length)
{
throw new ArgumentException(SR.Argument_InvalidLabel);
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/MethodBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/MethodBuilder.cs
index c5ae82adaeed65..e3c189f910beb3 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/MethodBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/MethodBuilder.cs
@@ -620,7 +620,7 @@ public MethodToken GetToken()
// We need to lock here to prevent a method from being "tokenized" twice.
// We don't need to synchronize this with Type.DefineMethod because it only appends newly
// constructed MethodBuilders to the end of m_listMethods
- lock (m_containingType.m_listMethods)
+ lock (m_containingType.m_listMethods!)
{
if (m_tkMethod.Token != 0)
{
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/SignatureHelper.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/SignatureHelper.cs
index 0808335d3b8de7..a9db943c8ae588 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/SignatureHelper.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/SignatureHelper.cs
@@ -2,10 +2,11 @@
// The .NET Foundation licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.
-using System.Text;
using System.Buffers.Binary;
using System.Diagnostics;
+using System.Diagnostics.CodeAnalysis;
using System.Runtime.InteropServices;
+using System.Text;
namespace System.Reflection.Emit
{
@@ -185,7 +186,7 @@ internal static SignatureHelper GetTypeSigToken(Module module, Type type)
#endregion
#region Private Data Members
- private byte[] m_signature = null!;
+ private byte[] m_signature;
private int m_currSig; // index into m_signature buffer for next available byte
private int m_sizeLoc; // index into m_signature buffer to put m_argCount (will be NO_SIZE_IN_SIG if no arg count is needed)
private ModuleBuilder? m_module;
@@ -225,6 +226,7 @@ private SignatureHelper(Module mod, Type type)
AddOneArgTypeHelper(type);
}
+ [MemberNotNull(nameof(m_signature))]
private void Init(Module? mod)
{
m_signature = new byte[32];
@@ -238,11 +240,13 @@ private void Init(Module? mod)
throw new ArgumentException(SR.NotSupported_MustBeModuleBuilder);
}
+ [MemberNotNull(nameof(m_signature))]
private void Init(Module? mod, MdSigCallingConvention callingConvention)
{
Init(mod, callingConvention, 0);
}
+ [MemberNotNull(nameof(m_signature))]
private void Init(Module? mod, MdSigCallingConvention callingConvention, int cGenericParam)
{
Init(mod);
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/TypeBuilder.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/TypeBuilder.cs
index f69d99e02a9ec8..65d61ca28adeec 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/TypeBuilder.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/Emit/TypeBuilder.cs
@@ -396,15 +396,15 @@ internal static unsafe void SetConstantValue(ModuleBuilder module, int tk, Type
#region Private Data Members
private List? m_ca;
private TypeToken m_tdType;
- private readonly ModuleBuilder m_module = null!;
+ private readonly ModuleBuilder m_module;
private readonly string? m_strName;
private readonly string? m_strNameSpace;
private string? m_strFullQualName;
private Type? m_typeParent;
- private List m_typeInterfaces = null!;
+ private List? m_typeInterfaces;
private readonly TypeAttributes m_iAttr;
private GenericParameterAttributes m_genParamAttributes;
- internal List m_listMethods = null!;
+ internal List? m_listMethods;
internal int m_lastTokenizedMethod;
private int m_constructorCount;
private readonly int m_iTypeSize;
@@ -430,7 +430,7 @@ internal TypeBuilder(ModuleBuilder module)
{
m_tdType = new TypeToken((int)MetadataTokenType.TypeDef);
m_isHiddenGlobalType = true;
- m_module = (ModuleBuilder)module;
+ m_module = module;
m_listMethods = new List();
// No token has been created so let's initialize it to -1
// The first time we call MethodBuilder.GetToken this will incremented.
@@ -438,8 +438,13 @@ internal TypeBuilder(ModuleBuilder module)
}
// ctor for generic method parameter
- internal TypeBuilder(string szName, int genParamPos, MethodBuilder declMeth) : this(szName, genParamPos)
+ internal TypeBuilder(string szName, int genParamPos, MethodBuilder declMeth)
{
+ m_strName = szName;
+ m_genParamPos = genParamPos;
+ m_bIsGenParam = true;
+ m_typeInterfaces = new List();
+
Debug.Assert(declMeth != null);
m_declMeth = declMeth;
m_DeclaringType = m_declMeth.GetTypeBuilder();
@@ -447,20 +452,16 @@ internal TypeBuilder(string szName, int genParamPos, MethodBuilder declMeth) : t
}
// ctor for generic type parameter
- private TypeBuilder(string szName, int genParamPos, TypeBuilder declType) : this(szName, genParamPos)
- {
- Debug.Assert(declType != null);
- m_DeclaringType = declType;
- m_module = declType.GetModuleBuilder();
- }
-
- // only for delegating to by other ctors
- private TypeBuilder(string szName, int genParamPos)
+ private TypeBuilder(string szName, int genParamPos, TypeBuilder declType)
{
m_strName = szName;
m_genParamPos = genParamPos;
m_bIsGenParam = true;
m_typeInterfaces = new List();
+
+ Debug.Assert(declType != null);
+ m_DeclaringType = declType;
+ m_module = declType.GetModuleBuilder();
}
internal TypeBuilder(
@@ -721,6 +722,8 @@ public override string ToString()
public override Module Module => GetModuleBuilder();
+ public override bool IsByRefLike => false;
+
internal int MetadataTokenInternal => m_tdType.Token;
#endregion
@@ -1293,7 +1296,7 @@ private MethodBuilder DefineMethodNoLock(string name, MethodAttributes attribute
}
}
- m_listMethods.Add(method);
+ m_listMethods!.Add(method);
return method;
}
@@ -1379,7 +1382,7 @@ private MethodBuilder DefinePInvokeMethodHelper(
// and our equals check won't work.
_ = method.GetMethodSignature().InternalGetSignature(out _);
- if (m_listMethods.Contains(method))
+ if (m_listMethods!.Contains(method))
{
throw new ArgumentException(SR.Argument_MethodRedefined);
}
@@ -1952,7 +1955,7 @@ internal void CheckContext(params Type?[]? types)
}
}
- int size = m_listMethods.Count;
+ int size = m_listMethods!.Count;
for (int i = 0; i < size; i++)
{
@@ -2030,12 +2033,12 @@ internal void CheckContext(params Type?[]? types)
m_hasBeenCreated = true;
// Terminate the process.
- RuntimeType cls = null!;
+ RuntimeType? cls = null;
TermCreateClass(new QCallModule(ref module), m_tdType.Token, ObjectHandleOnStack.Create(ref cls));
if (!m_isHiddenGlobalType)
{
- m_bakedRuntimeType = cls;
+ m_bakedRuntimeType = cls!;
// if this type is a nested type, we need to invalidate the cached nested runtime type on the nesting type
if (m_DeclaringType != null && m_DeclaringType.m_bakedRuntimeType != null)
@@ -2103,7 +2106,7 @@ public void AddInterfaceImplementation(Type interfaceType)
ModuleBuilder module = m_module;
AddInterfaceImpl(new QCallModule(ref module), m_tdType.Token, tkInterface.Token);
- m_typeInterfaces.Add(interfaceType);
+ m_typeInterfaces!.Add(interfaceType);
}
public TypeToken TypeToken
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/MethodBase.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/MethodBase.CoreCLR.cs
index 3c467b743290dd..7ab2a594ab52fb 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/MethodBase.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/MethodBase.CoreCLR.cs
@@ -69,7 +69,7 @@ internal object[] CheckArguments(object[] parameters, Binder? binder,
// copy the arguments in a different array so we detach from any user changes
object[] copyOfParameters = new object[parameters.Length];
- ParameterInfo[] p = null!;
+ ParameterInfo[]? p = null;
for (int i = 0; i < parameters.Length; i++)
{
object arg = parameters[i];
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeAssembly.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeAssembly.cs
index 60379a0cf9182e..fd6eeb2bc23cbb 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeAssembly.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeAssembly.cs
@@ -327,7 +327,7 @@ internal static RuntimeAssembly InternalLoad(AssemblyName assemblyName,
throwOnFileNotFound,
ObjectHandleOnStack.Create(ref assemblyLoadContext),
ObjectHandleOnStack.Create(ref retAssembly));
- return retAssembly;
+ return retAssembly!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeConstructorInfo.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeConstructorInfo.cs
index 77367461e462d3..133f825dbcc063 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeConstructorInfo.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeConstructorInfo.cs
@@ -18,11 +18,11 @@ internal sealed class RuntimeConstructorInfo : ConstructorInfo, IRuntimeMethodIn
private RuntimeTypeCache m_reflectedTypeCache;
private string? m_toString;
private ParameterInfo[]? m_parameters; // Created lazily when GetParameters() is called.
-#pragma warning disable CA1823, 414
- private object _empty1 = null!; // These empties are used to ensure that RuntimeConstructorInfo and RuntimeMethodInfo are have a layout which is sufficiently similar
- private object _empty2 = null!;
- private object _empty3 = null!;
-#pragma warning restore CA1823, 414
+#pragma warning disable CA1823, 414, 169
+ private object? _empty1; // These empties are used to ensure that RuntimeConstructorInfo and RuntimeMethodInfo are have a layout which is sufficiently similar
+ private object? _empty2;
+ private object? _empty3;
+#pragma warning restore CA1823, 414, 169
private IntPtr m_handle;
private MethodAttributes m_methodAttributes;
private BindingFlags m_bindingFlags;
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeEventInfo.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeEventInfo.cs
index 0b24a02472d5ad..2a14dc6b9a188c 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeEventInfo.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeEventInfo.cs
@@ -15,20 +15,16 @@ internal sealed unsafe class RuntimeEventInfo : EventInfo
private EventAttributes m_flags;
private string? m_name;
private void* m_utf8name;
- private RuntimeTypeCache m_reflectedTypeCache = null!;
+ private RuntimeTypeCache m_reflectedTypeCache;
private RuntimeMethodInfo? m_addMethod;
private RuntimeMethodInfo? m_removeMethod;
private RuntimeMethodInfo? m_raiseMethod;
private MethodInfo[]? m_otherMethod;
- private RuntimeType m_declaringType = null!;
+ private RuntimeType m_declaringType;
private BindingFlags m_bindingFlags;
#endregion
#region Constructor
- internal RuntimeEventInfo()
- {
- // Used for dummy head node during population
- }
internal RuntimeEventInfo(int tkEvent, RuntimeType declaredType, RuntimeTypeCache reflectedTypeCache, out bool isPrivate)
{
Debug.Assert(declaredType != null);
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeFieldInfo.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeFieldInfo.cs
index 5eb9a5fd3cc209..fc64e1d9713a69 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeFieldInfo.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeFieldInfo.cs
@@ -11,15 +11,11 @@ internal abstract class RuntimeFieldInfo : FieldInfo
{
#region Private Data Members
private BindingFlags m_bindingFlags;
- protected RuntimeTypeCache m_reflectedTypeCache = null!;
- protected RuntimeType m_declaringType = null!;
+ protected RuntimeTypeCache m_reflectedTypeCache;
+ protected RuntimeType m_declaringType;
#endregion
#region Constructor
- protected RuntimeFieldInfo()
- {
- // Used for dummy head node during population
- }
protected RuntimeFieldInfo(RuntimeTypeCache reflectedTypeCache, RuntimeType declaringType, BindingFlags bindingFlags)
{
m_bindingFlags = bindingFlags;
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeParameterInfo.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeParameterInfo.cs
index c7ad03319ddf3c..f8a0ff0b329cea 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeParameterInfo.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Reflection/RuntimeParameterInfo.cs
@@ -113,7 +113,7 @@ internal static ParameterInfo[] GetParameters(
#region Private Data Members
private int m_tkParamDef;
private MetadataImport m_scope;
- private Signature m_signature = null!;
+ private Signature? m_signature;
private volatile bool m_nameIsCached = false;
private readonly bool m_noMetadata = false;
private bool m_noDefaultValue = false;
@@ -217,6 +217,8 @@ public override Type ParameterType
// only instance of ParameterInfo has ClassImpl, all its subclasses don't
if (ClassImpl == null)
{
+ Debug.Assert(m_signature != null);
+
RuntimeType parameterType;
if (PositionImpl == -1)
parameterType = m_signature.ReturnType;
@@ -481,12 +483,16 @@ private static DateTime GetRawDateTimeConstant(CustomAttributeData attr)
public override Type[] GetRequiredCustomModifiers()
{
- return m_signature.GetCustomModifiers(PositionImpl + 1, true);
+ return m_signature is null ?
+ Type.EmptyTypes :
+ m_signature.GetCustomModifiers(PositionImpl + 1, true);
}
public override Type[] GetOptionalCustomModifiers()
{
- return m_signature.GetCustomModifiers(PositionImpl + 1, false);
+ return m_signature is null ?
+ Type.EmptyTypes :
+ m_signature.GetCustomModifiers(PositionImpl + 1, false);
}
#endregion
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CastHelpers.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CastHelpers.cs
index 74148dda4ee6f3..15cad526595576 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CastHelpers.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CastHelpers.cs
@@ -9,13 +9,6 @@
using System.Runtime.Intrinsics;
using System.Runtime.Intrinsics.X86;
-#pragma warning disable SA1121 // explicitly using type aliases instead of built-in types
-#if TARGET_64BIT
-using nuint = System.UInt64;
-#else
-using nuint = System.UInt32;
-#endif
-
namespace System.Runtime.CompilerServices
{
internal static unsafe class CastHelpers
@@ -46,13 +39,13 @@ private struct CastCacheEntry
};
[MethodImpl(MethodImplOptions.AggressiveInlining)]
- private static int KeyToBucket(int[] table, nuint source, nuint target)
+ private static int KeyToBucket(ref int tableData, nuint source, nuint target)
{
// upper bits of addresses do not vary much, so to reduce loss due to cancelling out,
// we do `rotl(source, ) ^ target` for mixing inputs.
// then we use fibonacci hashing to reduce the value to desired size.
- int hashShift = HashShift(table);
+ int hashShift = HashShift(ref tableData);
#if TARGET_64BIT
ulong hash = (((ulong)source << 32) | ((ulong)source >> 32)) ^ (ulong)target;
return (int)((hash * 11400714819323198485ul) >> hashShift);
@@ -63,31 +56,31 @@ private static int KeyToBucket(int[] table, nuint source, nuint target)
}
[MethodImpl(MethodImplOptions.AggressiveInlining)]
- private static ref int AuxData(int[] table)
+ private static ref int TableData(int[] table)
{
// element 0 is used for embedded aux data
return ref MemoryMarshal.GetArrayDataReference(table);
}
[MethodImpl(MethodImplOptions.AggressiveInlining)]
- private static ref CastCacheEntry Element(int[] table, int index)
+ private static ref CastCacheEntry Element(ref int tableData, int index)
{
// element 0 is used for embedded aux data, skip it
- return ref Unsafe.Add(ref Unsafe.As(ref AuxData(table)), index + 1);
+ return ref Unsafe.Add(ref Unsafe.As(ref tableData), index + 1);
}
- // TableMask is "size - 1"
- // we need that more often that we need size
[MethodImpl(MethodImplOptions.AggressiveInlining)]
- private static int TableMask(int[] table)
+ private static int HashShift(ref int tableData)
{
- return AuxData(table);
+ return tableData;
}
+ // TableMask is "size - 1"
+ // we need that more often that we need size
[MethodImpl(MethodImplOptions.AggressiveInlining)]
- private static int HashShift(int[] table)
+ private static int TableMask(ref int tableData)
{
- return Unsafe.Add(ref AuxData(table), 1);
+ return Unsafe.Add(ref tableData, 1);
}
private enum CastResult
@@ -104,57 +97,60 @@ private enum CastResult
private static CastResult TryGet(nuint source, nuint target)
{
const int BUCKET_SIZE = 8;
- int[]? table = s_table;
- // we use NULL as a sentinel for a rare case when a table could not be allocated
- // because we avoid OOMs.
- // we could use 0-element table instead, but then we would have to check the size here.
- if (table != null)
+ // table is initialized and updated by native code that guarantees it is not null.
+ ref int tableData = ref TableData(s_table!);
+
+ int index = KeyToBucket(ref tableData, source, target);
+ for (int i = 0; i < BUCKET_SIZE;)
{
- int index = KeyToBucket(table, source, target);
- for (int i = 0; i < BUCKET_SIZE;)
- {
- ref CastCacheEntry pEntry = ref Element(table, index);
+ ref CastCacheEntry pEntry = ref Element(ref tableData, index);
- // must read in this order: version -> entry parts -> version
- // if version is odd or changes, the entry is inconsistent and thus ignored
- int version = Volatile.Read(ref pEntry._version);
- nuint entrySource = pEntry._source;
+ // must read in this order: version -> [entry parts] -> version
+ // if version is odd or changes, the entry is inconsistent and thus ignored
+ int version = Volatile.Read(ref pEntry._version);
+ nuint entrySource = pEntry._source;
- // mask the lower version bit to make it even.
- // This way we can check if version is odd or changing in just one compare.
- version &= ~1;
+ // mask the lower version bit to make it even.
+ // This way we can check if version is odd or changing in just one compare.
+ version &= ~1;
- if (entrySource == source)
+ if (entrySource == source)
+ {
+ nuint entryTargetAndResult = pEntry._targetAndResult;
+ // target never has its lower bit set.
+ // a matching entryTargetAndResult would the have same bits, except for the lowest one, which is the result.
+ entryTargetAndResult ^= target;
+ if (entryTargetAndResult <= 1)
{
- nuint entryTargetAndResult = Volatile.Read(ref pEntry._targetAndResult);
- // target never has its lower bit set.
- // a matching entryTargetAndResult would the have same bits, except for the lowest one, which is the result.
- entryTargetAndResult ^= target;
- if (entryTargetAndResult <= 1)
+ // make sure 'version' is loaded after 'source' and 'targetAndResults'
+ //
+ // We can either:
+ // - use acquires for both _source and _targetAndResults or
+ // - issue a load barrier before reading _version
+ // benchmarks on available hardware show that use of a read barrier is cheaper.
+ Interlocked.ReadMemoryBarrier();
+ if (version != pEntry._version)
{
- if (version != pEntry._version)
- {
- // oh, so close, the entry is in inconsistent state.
- // it is either changing or has changed while we were reading.
- // treat it as a miss.
- break;
- }
-
- return (CastResult)entryTargetAndResult;
+ // oh, so close, the entry is in inconsistent state.
+ // it is either changing or has changed while we were reading.
+ // treat it as a miss.
+ break;
}
- }
- if (version == 0)
- {
- // the rest of the bucket is unclaimed, no point to search further
- break;
+ return (CastResult)entryTargetAndResult;
}
+ }
- // quadratic reprobe
- i++;
- index = (index + i) & TableMask(table);
+ if (version == 0)
+ {
+ // the rest of the bucket is unclaimed, no point to search further
+ break;
}
+
+ // quadratic reprobe
+ i++;
+ index = (index + i) & TableMask(ref tableData);
}
return CastResult.MaybeCast;
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CrossLoaderAllocatorHashHelpers.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CrossLoaderAllocatorHashHelpers.cs
index 9f45efa3df1c55..89d0773075d8a8 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CrossLoaderAllocatorHashHelpers.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/CrossLoaderAllocatorHashHelpers.cs
@@ -30,7 +30,7 @@ internal class LAHashDependentHashTracker
[StructLayout(LayoutKind.Sequential)]
internal class LAHashKeyToTrackers
{
- private object _trackerOrTrackerSet = null!;
- private object _laLocalKeyValueStore = null!;
+ private object? _trackerOrTrackerSet;
+ private object? _laLocalKeyValueStore;
}
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/GCHeapHash.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/GCHeapHash.cs
index 763ab98ceb3ca3..396967048ff0be 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/GCHeapHash.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/GCHeapHash.cs
@@ -13,7 +13,7 @@ namespace System.Runtime.CompilerServices
[StructLayout(LayoutKind.Sequential)]
internal class GCHeapHash
{
- private Array _data = null!;
+ private Array? _data;
private int _count;
private int _deletedCount;
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/QCallHandles.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/QCallHandles.cs
index 63a8fbf6e9c335..6a3418ade5938e 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/QCallHandles.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/QCallHandles.cs
@@ -15,7 +15,7 @@ internal unsafe ref struct StringHandleOnStack
{
private void* _ptr;
- internal StringHandleOnStack([NotNull] ref string? s)
+ internal StringHandleOnStack(ref string? s)
{
_ptr = Unsafe.AsPointer(ref s);
}
@@ -31,7 +31,7 @@ private ObjectHandleOnStack(void* pObject)
_ptr = pObject;
}
- internal static ObjectHandleOnStack Create([NotNull] ref T o) where T : class?
+ internal static ObjectHandleOnStack Create(ref T o) where T : class?
{
return new ObjectHandleOnStack(Unsafe.AsPointer(ref o));
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/RuntimeHelpers.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/RuntimeHelpers.CoreCLR.cs
index 705e611d7e1645..55d7ee78afc3a0 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/RuntimeHelpers.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/CompilerServices/RuntimeHelpers.CoreCLR.cs
@@ -7,13 +7,6 @@
using System.Runtime.InteropServices;
using Internal.Runtime.CompilerServices;
-#pragma warning disable SA1121 // explicitly using type aliases instead of built-in types
-#if TARGET_64BIT
-using nuint = System.UInt64;
-#else
-using nuint = System.UInt32;
-#endif
-
namespace System.Runtime.CompilerServices
{
public static partial class RuntimeHelpers
@@ -286,8 +279,22 @@ public static IntPtr AllocateTypeAssociatedMemory(Type type, int size)
[DllImport(RuntimeHelpers.QCall)]
private static extern IntPtr AllocateTypeAssociatedMemoryInternal(QCallTypeHandle type, uint size);
- }
+ [MethodImpl(MethodImplOptions.InternalCall)]
+ private static extern IntPtr AllocTailCallArgBuffer(int size, IntPtr gcDesc);
+
+ [MethodImpl(MethodImplOptions.InternalCall)]
+ private static extern void FreeTailCallArgBuffer();
+
+ [MethodImpl(MethodImplOptions.InternalCall)]
+ private static unsafe extern TailCallTls* GetTailCallInfo(IntPtr retAddrSlot, IntPtr* retAddr);
+
+ [MethodImpl(MethodImplOptions.InternalCall)]
+ internal static extern long GetILBytesJitted();
+
+ [MethodImpl(MethodImplOptions.InternalCall)]
+ internal static extern int GetMethodsJittedCount();
+ }
// Helper class to assist with unsafe pinning of arbitrary objects.
// It's used by VM code.
internal class RawData
@@ -340,31 +347,31 @@ internal unsafe struct MethodTable
| 0x40000000 // enum_flag_ComObject
| 0x00400000;// enum_flag_ICastable;
- private const int ParentMethodTableOffset = 0x10
+ private const int DebugClassNamePtr = // adjust for debug_m_szClassName
#if DEBUG
- + sizeof(nuint) // adjust for debug_m_szClassName
-#endif
- ;
-
#if TARGET_64BIT
- private const int ElementTypeOffset = 0x30
+ 8
#else
- private const int ElementTypeOffset = 0x20
+ 4
#endif
-#if DEBUG
- + sizeof(nuint) // adjust for debug_m_szClassName
+#else
+ 0
#endif
- ;
+ ;
+
+ private const int ParentMethodTableOffset = 0x10 + DebugClassNamePtr;
#if TARGET_64BIT
- private const int InterfaceMapOffset = 0x38
+ private const int ElementTypeOffset = 0x30 + DebugClassNamePtr;
#else
- private const int InterfaceMapOffset = 0x24
+ private const int ElementTypeOffset = 0x20 + DebugClassNamePtr;
#endif
-#if DEBUG
- + sizeof(nuint) // adjust for debug_m_szClassName
+
+#if TARGET_64BIT
+ private const int InterfaceMapOffset = 0x38 + DebugClassNamePtr;
+#else
+ private const int InterfaceMapOffset = 0x24 + DebugClassNamePtr;
#endif
- ;
public bool HasComponentSize
{
@@ -421,4 +428,24 @@ public int MultiDimensionalArrayRank
}
}
}
+
+ // Helper structs used for tail calls via helper.
+ [StructLayout(LayoutKind.Sequential)]
+ internal unsafe struct PortableTailCallFrame
+ {
+ public PortableTailCallFrame* Prev;
+ public IntPtr TailCallAwareReturnAddress;
+ public IntPtr NextCall;
+ }
+
+ [StructLayout(LayoutKind.Sequential)]
+ internal unsafe struct TailCallTls
+ {
+ public PortableTailCallFrame* Frame;
+ public IntPtr ArgBuffer;
+ private IntPtr _argBufferSize;
+ private IntPtr _argBufferGCDesc;
+ private fixed byte _argBufferInline[64];
+ }
+
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/ComWrappers.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/ComWrappers.cs
index 0229ac9c0dbc55..6bdd48d7290a90 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/ComWrappers.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/ComWrappers.cs
@@ -56,6 +56,16 @@ public enum CreateObjectFlags
UniqueInstance = 2,
}
+ ///
+ /// Internal enumeration used by the runtime to indicate the scenario for which ComWrappers is being used.
+ ///
+ internal enum ComWrappersScenario
+ {
+ Instance = 0,
+ TrackerSupportGlobalInstance = 1,
+ MarshallingGlobalInstance = 2,
+ }
+
///
/// Class for managing wrappers of COM IUnknown types.
///
@@ -107,9 +117,14 @@ private struct ComInterfaceInstance
}
///
- /// Globally registered instance of the ComWrappers class.
+ /// Globally registered instance of the ComWrappers class for reference tracker support.
///
- private static ComWrappers? s_globalInstance;
+ private static ComWrappers? s_globalInstanceForTrackerSupport;
+
+ ///
+ /// Globally registered instance of the ComWrappers class for marshalling.
+ ///
+ private static ComWrappers? s_globalInstanceForMarshalling;
///
/// Create a COM representation of the supplied object that can be passed to a non-managed environment.
@@ -121,7 +136,7 @@ public IntPtr GetOrCreateComInterfaceForObject(object instance, CreateComInterfa
{
IntPtr ptr;
if (!TryGetOrCreateComInterfaceForObjectInternal(this, instance, flags, out ptr))
- throw new ArgumentException();
+ throw new ArgumentException(null, nameof(instance));
return ptr;
}
@@ -164,10 +179,23 @@ private static bool TryGetOrCreateComInterfaceForObjectInternal(ComWrappers? imp
///
protected unsafe abstract ComInterfaceEntry* ComputeVtables(object obj, CreateComInterfaceFlags flags, out int count);
- // Call to execute the abstract instance function
- internal static unsafe void* CallComputeVtables(ComWrappers? comWrappersImpl, object obj, CreateComInterfaceFlags flags, out int count)
+ // Called by the runtime to execute the abstract instance function
+ internal static unsafe void* CallComputeVtables(ComWrappersScenario scenario, ComWrappers? comWrappersImpl, object obj, CreateComInterfaceFlags flags, out int count)
{
- ComWrappers? impl = comWrappersImpl ?? s_globalInstance;
+ ComWrappers? impl = null;
+ switch (scenario)
+ {
+ case ComWrappersScenario.Instance:
+ impl = comWrappersImpl;
+ break;
+ case ComWrappersScenario.TrackerSupportGlobalInstance:
+ impl = s_globalInstanceForTrackerSupport;
+ break;
+ case ComWrappersScenario.MarshallingGlobalInstance:
+ impl = s_globalInstanceForMarshalling;
+ break;
+ }
+
if (impl is null)
{
count = -1;
@@ -187,7 +215,7 @@ public object GetOrCreateObjectForComInstance(IntPtr externalComObject, CreateOb
{
object? obj;
if (!TryGetOrCreateObjectForComInstanceInternal(this, externalComObject, flags, null, out obj))
- throw new ArgumentNullException();
+ throw new ArgumentNullException(nameof(externalComObject));
return obj!;
}
@@ -203,10 +231,23 @@ public object GetOrCreateObjectForComInstance(IntPtr externalComObject, CreateOb
///
protected abstract object? CreateObject(IntPtr externalComObject, CreateObjectFlags flags);
- // Call to execute the abstract instance function
- internal static object? CallCreateObject(ComWrappers? comWrappersImpl, IntPtr externalComObject, CreateObjectFlags flags)
+ // Called by the runtime to execute the abstract instance function.
+ internal static object? CallCreateObject(ComWrappersScenario scenario, ComWrappers? comWrappersImpl, IntPtr externalComObject, CreateObjectFlags flags)
{
- ComWrappers? impl = comWrappersImpl ?? s_globalInstance;
+ ComWrappers? impl = null;
+ switch (scenario)
+ {
+ case ComWrappersScenario.Instance:
+ impl = comWrappersImpl;
+ break;
+ case ComWrappersScenario.TrackerSupportGlobalInstance:
+ impl = s_globalInstanceForTrackerSupport;
+ break;
+ case ComWrappersScenario.MarshallingGlobalInstance:
+ impl = s_globalInstanceForMarshalling;
+ break;
+ }
+
if (impl == null)
return null;
@@ -230,7 +271,7 @@ public object GetOrRegisterObjectForComInstance(IntPtr externalComObject, Create
object? obj;
if (!TryGetOrCreateObjectForComInstanceInternal(this, externalComObject, flags, wrapper, out obj))
- throw new ArgumentNullException();
+ throw new ArgumentNullException(nameof(externalComObject));
return obj!;
}
@@ -268,32 +309,69 @@ private static bool TryGetOrCreateObjectForComInstanceInternal(ComWrappers? impl
// Call to execute the virtual instance function
internal static void CallReleaseObjects(ComWrappers? comWrappersImpl, IEnumerable objects)
- => (comWrappersImpl ?? s_globalInstance!).ReleaseObjects(objects);
+ => (comWrappersImpl ?? s_globalInstanceForTrackerSupport!).ReleaseObjects(objects);
///
- /// Register this class's implementation to be used as the single global instance.
+ /// Register a
+ ///
/// This function can only be called a single time. Subsequent calls to this function will result
/// in a
- public void RegisterAsGlobalInstance()
+ public static void RegisterForTrackerSupport(ComWrappers instance)
+ {
+ if (instance == null)
+ throw new ArgumentNullException(nameof(instance));
+
+ if (null != Interlocked.CompareExchange(ref s_globalInstanceForTrackerSupport, instance, null))
+ {
+ throw new InvalidOperationException(SR.InvalidOperation_ResetGlobalComWrappersInstance);
+ }
+
+ SetGlobalInstanceRegisteredForTrackerSupport();
+ }
+
+
+ [DllImport(RuntimeHelpers.QCall)]
+ [SuppressGCTransition]
+ private static extern void SetGlobalInstanceRegisteredForTrackerSupport();
+
+ ///
+ /// Register a
+ ///
+ /// This function can only be called a single time. Subsequent calls to this function will result
+ /// in a
+ public static void RegisterForMarshalling(ComWrappers instance)
{
- if (null != Interlocked.CompareExchange(ref s_globalInstance, this, null))
+ if (instance == null)
+ throw new ArgumentNullException(nameof(instance));
+
+ if (null != Interlocked.CompareExchange(ref s_globalInstanceForMarshalling, instance, null))
{
throw new InvalidOperationException(SR.InvalidOperation_ResetGlobalComWrappersInstance);
}
- SetGlobalInstanceRegistered();
+ // Indicate to the runtime that a global instance has been registered for marshalling.
+ // This allows the native runtime know to call into the managed ComWrappers only if a
+ // global instance is registered for marshalling.
+ SetGlobalInstanceRegisteredForMarshalling();
}
[DllImport(RuntimeHelpers.QCall)]
[SuppressGCTransition]
- private static extern void SetGlobalInstanceRegistered();
+ private static extern void SetGlobalInstanceRegisteredForMarshalling();
///
/// Get the runtime provided IUnknown implementation.
@@ -319,4 +397,4 @@ internal static int CallICustomQueryInterface(object customQueryInterfaceMaybe,
return (int)customQueryInterface.GetInterface(ref iid, out ppObject);
}
}
-}
\ No newline at end of file
+}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/ConstantSplittableMap.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/ConstantSplittableMap.cs
index f19d63e4034492..d7cd618a076104 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/ConstantSplittableMap.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/ConstantSplittableMap.cs
@@ -78,9 +78,7 @@ private KeyValuePair[] CreateKeyValueArray(int count, IEnumerator<
public TValue Lookup(TKey key)
{
- bool found = TryGetValue(key, out TValue value);
-
- if (!found)
+ if (!TryGetValue(key, out TValue value))
{
Debug.Assert(key != null);
Exception e = new KeyNotFoundException(SR.Format(SR.Arg_KeyNotFoundWithKey, key.ToString()));
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/DictionaryToMapAdapter.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/DictionaryToMapAdapter.cs
index d24a0c9201d93c..bdacad0d07f3ba 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/DictionaryToMapAdapter.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/DictionaryToMapAdapter.cs
@@ -28,9 +28,7 @@ private DictionaryToMapAdapter()
internal V Lookup(K key) where K : notnull
{
IDictionary _this = Unsafe.As>(this);
- bool keyFound = _this.TryGetValue(key, out V value);
-
- if (!keyFound)
+ if (!_this.TryGetValue(key, out V value))
{
Debug.Assert(key != null);
Exception e = new KeyNotFoundException(SR.Format(SR.Arg_KeyNotFoundWithKey, key.ToString()));
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/IReadOnlyDictionaryToIMapViewAdapter.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/IReadOnlyDictionaryToIMapViewAdapter.cs
index 5ba246996dccb5..81c3a453b17a80 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/IReadOnlyDictionaryToIMapViewAdapter.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/InteropServices/WindowsRuntime/IReadOnlyDictionaryToIMapViewAdapter.cs
@@ -28,9 +28,7 @@ private IReadOnlyDictionaryToIMapViewAdapter()
internal V Lookup(K key) where K : notnull
{
IReadOnlyDictionary _this = Unsafe.As>(this);
- bool keyFound = _this.TryGetValue(key, out V value);
-
- if (!keyFound)
+ if (!_this.TryGetValue(key, out V value))
{
Debug.Assert(key != null);
Exception e = new KeyNotFoundException(SR.Format(SR.Arg_KeyNotFoundWithKey, key.ToString()));
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/Loader/AssemblyLoadContext.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/Loader/AssemblyLoadContext.CoreCLR.cs
index 9027e3bd3598a9..997fa49107dcee 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/Loader/AssemblyLoadContext.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Runtime/Loader/AssemblyLoadContext.CoreCLR.cs
@@ -95,6 +95,16 @@ internal Assembly LoadFromInMemoryModule(IntPtr moduleHandle)
}
#endif
+ // This method is invoked by the VM to resolve a satellite assembly reference
+ // after trying assembly resolution via Load override without success.
+ private static Assembly? ResolveSatelliteAssembly(IntPtr gchManagedAssemblyLoadContext, AssemblyName assemblyName)
+ {
+ AssemblyLoadContext context = (AssemblyLoadContext)(GCHandle.FromIntPtr(gchManagedAssemblyLoadContext).Target)!;
+
+ // Invoke the ResolveSatelliteAssembly method
+ return context.ResolveSatelliteAssembly(assemblyName);
+ }
+
// This method is invoked by the VM when using the host-provided assembly load context
// implementation.
private static IntPtr ResolveUnmanagedDll(string unmanagedDllName, IntPtr gchManagedAssemblyLoadContext)
@@ -111,6 +121,15 @@ private static IntPtr ResolveUnmanagedDllUsingEvent(string unmanagedDllName, Ass
return context.GetResolvedUnmanagedDll(assembly, unmanagedDllName);
}
+ // This method is invoked by the VM to resolve an assembly reference using the Resolving event
+ // after trying assembly resolution via Load override and TPA load context without success.
+ private static Assembly? ResolveUsingResolvingEvent(IntPtr gchManagedAssemblyLoadContext, AssemblyName assemblyName)
+ {
+ AssemblyLoadContext context = (AssemblyLoadContext)(GCHandle.FromIntPtr(gchManagedAssemblyLoadContext).Target)!;
+ // Invoke the AssemblyResolve event callbacks if wired up
+ return context.ResolveUsingEvent(assemblyName);
+ }
+
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
private static extern void LoadTypeForWinRTTypeNameInContextInternal(IntPtr ptrNativeAssemblyLoadContext, string typeName, ObjectHandleOnStack loadedType);
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeHandles.cs b/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeHandles.cs
index 5661ce8130ec5d..c95afb2036300c 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeHandles.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeHandles.cs
@@ -446,10 +446,10 @@ internal static RuntimeType GetTypeByNameUsingCARules(string name, RuntimeModule
if (string.IsNullOrEmpty(name))
throw new ArgumentException(null, nameof(name));
- RuntimeType type = null!;
+ RuntimeType? type = null;
GetTypeByNameUsingCARules(name, new QCallModule(ref scope), ObjectHandleOnStack.Create(ref type));
- return type;
+ return type!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -457,18 +457,18 @@ internal static RuntimeType GetTypeByNameUsingCARules(string name, RuntimeModule
internal RuntimeType[] GetInstantiationInternal()
{
- RuntimeType[] types = null!;
+ RuntimeType[]? types = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
GetInstantiation(new QCallTypeHandle(ref nativeHandle), ObjectHandleOnStack.Create(ref types), Interop.BOOL.TRUE);
- return types;
+ return types!;
}
internal Type[] GetInstantiationPublic()
{
- Type[] types = null!;
+ Type[]? types = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
GetInstantiation(new QCallTypeHandle(ref nativeHandle), ObjectHandleOnStack.Create(ref types), Interop.BOOL.FALSE);
- return types;
+ return types!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -481,11 +481,11 @@ internal RuntimeType Instantiate(Type[]? inst)
fixed (IntPtr* pInst = instHandles)
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
Instantiate(new QCallTypeHandle(ref nativeHandle), pInst, instCount, ObjectHandleOnStack.Create(ref type));
GC.KeepAlive(inst);
- return type;
+ return type!;
}
}
@@ -494,10 +494,10 @@ internal RuntimeType Instantiate(Type[]? inst)
internal RuntimeType MakeArray(int rank)
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
MakeArray(new QCallTypeHandle(ref nativeHandle), rank, ObjectHandleOnStack.Create(ref type));
- return type;
+ return type!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -505,10 +505,10 @@ internal RuntimeType MakeArray(int rank)
internal RuntimeType MakeSZArray()
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
MakeSZArray(new QCallTypeHandle(ref nativeHandle), ObjectHandleOnStack.Create(ref type));
- return type;
+ return type!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -516,10 +516,10 @@ internal RuntimeType MakeSZArray()
internal RuntimeType MakeByRef()
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
MakeByRef(new QCallTypeHandle(ref nativeHandle), ObjectHandleOnStack.Create(ref type));
- return type;
+ return type!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -527,10 +527,10 @@ internal RuntimeType MakeByRef()
internal RuntimeType MakePointer()
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
RuntimeTypeHandle nativeHandle = GetNativeHandle();
MakePointer(new QCallTypeHandle(ref nativeHandle), ObjectHandleOnStack.Create(ref type));
- return type;
+ return type!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -665,15 +665,15 @@ public RuntimeMethodInfoStub(IntPtr methodHandleValue, object keepalive)
private readonly object m_keepalive;
// These unused variables are used to ensure that this class has the same layout as RuntimeMethodInfo
-#pragma warning disable CA1823, 414
- private object m_a = null!;
- private object m_b = null!;
- private object m_c = null!;
- private object m_d = null!;
- private object m_e = null!;
- private object m_f = null!;
- private object m_g = null!;
-#pragma warning restore CA1823, 414
+#pragma warning disable CA1823, 414, 169
+ private object? m_a;
+ private object? m_b;
+ private object? m_c;
+ private object? m_d;
+ private object? m_e;
+ private object? m_f;
+ private object? m_g;
+#pragma warning restore CA1823, 414, 169
public RuntimeMethodHandleInternal m_value;
@@ -861,25 +861,25 @@ internal static MdUtf8String GetUtf8Name(RuntimeMethodHandleInternal method)
internal static RuntimeType[] GetMethodInstantiationInternal(IRuntimeMethodInfo method)
{
- RuntimeType[] types = null!;
+ RuntimeType[]? types = null;
GetMethodInstantiation(EnsureNonNullMethodInfo(method).Value, ObjectHandleOnStack.Create(ref types), Interop.BOOL.TRUE);
GC.KeepAlive(method);
- return types;
+ return types!;
}
internal static RuntimeType[] GetMethodInstantiationInternal(RuntimeMethodHandleInternal method)
{
- RuntimeType[] types = null!;
+ RuntimeType[]? types = null;
GetMethodInstantiation(method, ObjectHandleOnStack.Create(ref types), Interop.BOOL.TRUE);
- return types;
+ return types!;
}
internal static Type[] GetMethodInstantiationPublic(IRuntimeMethodInfo method)
{
- RuntimeType[] types = null!;
+ RuntimeType[]? types = null;
GetMethodInstantiation(EnsureNonNullMethodInfo(method).Value, ObjectHandleOnStack.Create(ref types), Interop.BOOL.FALSE);
GC.KeepAlive(method);
- return types;
+ return types!;
}
[MethodImpl(MethodImplOptions.InternalCall)]
@@ -1000,14 +1000,14 @@ RuntimeFieldHandleInternal Value
internal class RuntimeFieldInfoStub : IRuntimeFieldInfo
{
// These unused variables are used to ensure that this class has the same layout as RuntimeFieldInfo
-#pragma warning disable 414
- private object m_keepalive = null!;
- private object m_c = null!;
- private object m_d = null!;
+#pragma warning disable 414, 169
+ private object? m_keepalive;
+ private object? m_c;
+ private object? m_d;
private int m_b;
- private object m_e = null!;
+ private object? m_e;
private RuntimeFieldHandleInternal m_fieldHandle;
-#pragma warning restore 414
+#pragma warning restore 414, 169
RuntimeFieldHandleInternal IRuntimeFieldInfo.Value => m_fieldHandle;
}
@@ -1209,11 +1209,11 @@ internal static RuntimeType ResolveTypeHandleInternal(RuntimeModule module, int
fixed (IntPtr* typeInstArgs = typeInstantiationContextHandles, methodInstArgs = methodInstantiationContextHandles)
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
ResolveType(new QCallModule(ref module), typeToken, typeInstArgs, typeInstCount, methodInstArgs, methodInstCount, ObjectHandleOnStack.Create(ref type));
GC.KeepAlive(typeInstantiationContext);
GC.KeepAlive(methodInstantiationContext);
- return type;
+ return type!;
}
}
@@ -1288,11 +1288,11 @@ internal static IRuntimeFieldInfo ResolveFieldHandleInternal(RuntimeModule modul
fixed (IntPtr* typeInstArgs = typeInstantiationContextHandles, methodInstArgs = methodInstantiationContextHandles)
{
- IRuntimeFieldInfo field = null!;
+ IRuntimeFieldInfo? field = null;
ResolveField(new QCallModule(ref module), fieldToken, typeInstArgs, typeInstCount, methodInstArgs, methodInstCount, ObjectHandleOnStack.Create(ref field));
GC.KeepAlive(typeInstantiationContext);
GC.KeepAlive(methodInstantiationContext);
- return field;
+ return field!;
}
}
@@ -1318,9 +1318,9 @@ internal static bool ContainsPropertyMatchingHash(RuntimeModule module, int prop
internal static RuntimeType GetModuleType(RuntimeModule module)
{
- RuntimeType type = null!;
+ RuntimeType? type = null;
GetModuleType(new QCallModule(ref module), ObjectHandleOnStack.Create(ref type));
- return type;
+ return type!;
}
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
@@ -1375,6 +1375,8 @@ internal enum MdSigCallingConvention : byte
#endregion
#region FCalls
+ [MemberNotNull(nameof(m_arguments))]
+ [MemberNotNull(nameof(m_returnTypeORfieldType))]
[MethodImpl(MethodImplOptions.InternalCall)]
private extern void GetSignature(
void* pCorSig, int cCorSig,
@@ -1386,9 +1388,9 @@ private extern void GetSignature(
//
// Keep the layout in sync with SignatureNative in the VM
//
- internal RuntimeType[] m_arguments = null!;
- internal RuntimeType m_declaringType = null!; // seems not used
- internal RuntimeType m_returnTypeORfieldType = null!;
+ internal RuntimeType[] m_arguments;
+ internal RuntimeType? m_declaringType;
+ internal RuntimeType m_returnTypeORfieldType;
internal object? m_keepalive;
internal void* m_sig;
internal int m_managedCallingConventionAndArgIteratorFlags; // lowest byte is CallingConvention, upper 3 bytes are ArgIterator flags
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeType.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeType.CoreCLR.cs
index 93cfd86bc167b1..38511276255bed 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeType.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/RuntimeType.CoreCLR.cs
@@ -244,14 +244,17 @@ internal MethodBase AddMethod(RuntimeType declaringType, RuntimeMethodHandleInte
switch (cacheType)
{
case CacheType.Method:
- list = (T[])(object)new RuntimeMethodInfo[1] {
- new RuntimeMethodInfo(method, declaringType, m_runtimeTypeCache, methodAttributes, bindingFlags, null)
- };
+ list = (T[])(object)new RuntimeMethodInfo[1]
+ {
+ new RuntimeMethodInfo(method, declaringType, m_runtimeTypeCache, methodAttributes, bindingFlags, null)
+ };
break;
+
case CacheType.Constructor:
- list = (T[])(object)new RuntimeConstructorInfo[1] {
- new RuntimeConstructorInfo(method, declaringType, m_runtimeTypeCache, methodAttributes, bindingFlags)
- };
+ list = (T[])(object)new RuntimeConstructorInfo[1]
+ {
+ new RuntimeConstructorInfo(method, declaringType, m_runtimeTypeCache, methodAttributes, bindingFlags)
+ };
break;
}
@@ -2752,7 +2755,7 @@ public override InterfaceMapping GetInterfaceMap(Type ifaceType)
protected override PropertyInfo? GetPropertyImpl(
string name, BindingFlags bindingAttr, Binder? binder, Type? returnType, Type[]? types, ParameterModifier[]? modifiers)
{
- if (name == null) throw new ArgumentNullException();
+ if (name == null) throw new ArgumentNullException(nameof(name));
ListBuilder candidates = GetPropertyCandidates(name, bindingAttr, types, false);
@@ -2788,7 +2791,7 @@ public override InterfaceMapping GetInterfaceMap(Type ifaceType)
public override EventInfo? GetEvent(string name, BindingFlags bindingAttr)
{
- if (name is null) throw new ArgumentNullException();
+ if (name is null) throw new ArgumentNullException(nameof(name));
FilterHelper(bindingAttr, ref name, out _, out MemberListType listType);
@@ -2851,7 +2854,7 @@ public override InterfaceMapping GetInterfaceMap(Type ifaceType)
public override Type? GetInterface(string fullname, bool ignoreCase)
{
- if (fullname is null) throw new ArgumentNullException();
+ if (fullname is null) throw new ArgumentNullException(nameof(fullname));
BindingFlags bindingAttr = BindingFlags.Public | BindingFlags.NonPublic;
@@ -2885,7 +2888,7 @@ public override InterfaceMapping GetInterfaceMap(Type ifaceType)
public override Type? GetNestedType(string fullname, BindingFlags bindingAttr)
{
- if (fullname is null) throw new ArgumentNullException();
+ if (fullname is null) throw new ArgumentNullException(nameof(fullname));
bindingAttr &= ~BindingFlags.Static;
string name, ns;
@@ -2913,7 +2916,7 @@ public override InterfaceMapping GetInterfaceMap(Type ifaceType)
public override MemberInfo[] GetMember(string name, MemberTypes type, BindingFlags bindingAttr)
{
- if (name is null) throw new ArgumentNullException();
+ if (name is null) throw new ArgumentNullException(nameof(name));
ListBuilder methods = default;
ListBuilder constructors = default;
@@ -4062,7 +4065,7 @@ internal static Type GetTypeFromCLSIDImpl(Guid clsid, string? server, bool throw
// Handle arguments that are passed as ByRef and those
// arguments that need to be wrapped.
- ParameterModifier[] aParamMod = null!;
+ ParameterModifier[]? aParamMod = null;
if (cArgs > 0)
{
ParameterModifier paramMod = new ParameterModifier(cArgs);
@@ -4087,7 +4090,7 @@ internal static Type GetTypeFromCLSIDImpl(Guid clsid, string? server, bool throw
for (int i = 0; i < cArgs; i++)
{
// Determine if the parameter is ByRef.
- if (aParamMod[0][i] && aArgs[i] != null)
+ if (aParamMod![0][i] && aArgs[i] != null)
{
Type argType = aArgsTypes[i];
if (!ReferenceEquals(argType, aArgs[i].GetType()))
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/StubHelpers.cs b/src/coreclr/src/System.Private.CoreLib/src/System/StubHelpers.cs
index 81c1611be4f56a..51d0138d905d61 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/StubHelpers.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/StubHelpers.cs
@@ -1878,5 +1878,8 @@ internal static void CheckStringLength(uint length)
[MethodImpl(MethodImplOptions.InternalCall)]
internal static extern void MulticastDebuggerTraceHelper(object o, int count);
#endif
+
+ [MethodImplAttribute(MethodImplOptions.InternalCall)]
+ internal static extern IntPtr NextCallReturnAddress();
} // class StubHelpers
}
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Threading/Interlocked.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Threading/Interlocked.CoreCLR.cs
index 33437141e76121..c9153f3cda7539 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Threading/Interlocked.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Threading/Interlocked.CoreCLR.cs
@@ -232,6 +232,15 @@ public static long Read(ref long location) =>
[MethodImpl(MethodImplOptions.InternalCall)]
public static extern void MemoryBarrier();
+ ///
+ /// Synchronizes memory access as follows:
+ /// The processor that executes the current thread cannot reorder instructions in such a way that memory reads before
+ /// the call to
+ [Intrinsic]
+ [MethodImpl(MethodImplOptions.InternalCall)]
+ internal static extern void ReadMemoryBarrier();
+
[DllImport(RuntimeHelpers.QCall, CharSet = CharSet.Unicode)]
private static extern void _MemoryBarrierProcessWide();
diff --git a/src/coreclr/src/System.Private.CoreLib/src/System/Threading/ThreadPool.CoreCLR.cs b/src/coreclr/src/System.Private.CoreLib/src/System/Threading/ThreadPool.CoreCLR.cs
index c2d72e3915cae7..719576c06d0338 100644
--- a/src/coreclr/src/System.Private.CoreLib/src/System/Threading/ThreadPool.CoreCLR.cs
+++ b/src/coreclr/src/System.Private.CoreLib/src/System/Threading/ThreadPool.CoreCLR.cs
@@ -192,6 +192,13 @@ public static partial class ThreadPool
// Time in ms for which ThreadPoolWorkQueue.Dispatch keeps executing work items before returning to the OS
private const uint DispatchQuantum = 30;
+ private static bool GetEnableWorkerTracking()
+ {
+ bool enableWorkerTracking = false;
+ InitializeVMTp(ref enableWorkerTracking);
+ return enableWorkerTracking;
+ }
+
internal static bool KeepDispatching(int startTickCount)
{
// Note: this function may incorrectly return false due to TickCount overflow
@@ -260,7 +267,7 @@ private static extern long PendingUnmanagedWorkItemCount
get;
}
- private static RegisteredWaitHandle RegisterWaitForSingleObject( // throws RegisterWaitException
+ private static RegisteredWaitHandle RegisterWaitForSingleObject(
WaitHandle waitObject,
WaitOrTimerCallback callBack,
object? state,
@@ -302,25 +309,6 @@ bool compressStack
public static unsafe bool UnsafeQueueNativeOverlapped(NativeOverlapped* overlapped) =>
PostQueuedCompletionStatus(overlapped);
- // The thread pool maintains a per-appdomain managed work queue.
- // New thread pool entries are added in the managed queue.
- // The VM is responsible for the actual growing/shrinking of
- // threads.
- private static void EnsureInitialized()
- {
- if (!ThreadPoolGlobals.threadPoolInitialized)
- {
- EnsureVMInitializedCore(); // separate out to help with inlining
- }
- }
-
- [MethodImpl(MethodImplOptions.NoInlining)]
- private static void EnsureVMInitializedCore()
- {
- InitializeVMTp(ref ThreadPoolGlobals.enableWorkerTracking);
- ThreadPoolGlobals.threadPoolInitialized = true;
- }
-
// Native methods:
[MethodImpl(MethodImplOptions.InternalCall)]
@@ -346,7 +334,6 @@ private static void EnsureVMInitializedCore()
internal static void NotifyWorkItemProgress()
{
- EnsureInitialized();
NotifyWorkItemProgressNative();
}
diff --git a/src/coreclr/src/ToolBox/SOS/DacTableGen/CMakeLists.txt b/src/coreclr/src/ToolBox/SOS/DacTableGen/CMakeLists.txt
index dcd39e346c98e4..e3fc3ed9e3a5e1 100644
--- a/src/coreclr/src/ToolBox/SOS/DacTableGen/CMakeLists.txt
+++ b/src/coreclr/src/ToolBox/SOS/DacTableGen/CMakeLists.txt
@@ -2,6 +2,19 @@
project(DacTableGen LANGUAGES CSharp)
+file(TO_CMAKE_PATH "$ENV{VSInstallDir}\\DIA SDK" DIASDK_DIR)
+file(COPY "${DIASDK_DIR}/bin/msdia140.dll" DESTINATION "${CMAKE_CURRENT_BINARY_DIR}")
+
+set (DIALib "${CMAKE_CURRENT_BINARY_DIR}/DIALib.dll")
+FIND_PROGRAM(TLBIMP tlbimp.exe)
+FIND_PROGRAM(MIDL midl.exe)
+add_custom_command(
+ OUTPUT "${DIALib}"
+ COMMAND ${MIDL} /I "${DIASDK_DIR}/include" "${DIASDK_DIR}/idl/dia2.idl" /tlb "${CMAKE_CURRENT_BINARY_DIR}/dia2.tlb"
+ COMMAND ${TLBIMP} dia2.tlb /out:"${DIALib}"
+)
+add_custom_target(gen_dialib DEPENDS "${DIALib}")
+
set(DACTABLEGEN_SOURCES
cvconst.cs
diautil.cs
@@ -13,6 +26,7 @@ set_directory_properties(PROPERTIES COMPILE_DEFINITIONS "")
set(CMAKE_CSharp_FLAGS "/platform:anycpu32bitpreferred")
add_executable(dactablegen ${DACTABLEGEN_SOURCES})
+add_dependencies(dactablegen gen_dialib)
set_target_properties(dactablegen PROPERTIES VS_DOTNET_REFERENCES "System")
-set_target_properties(dactablegen PROPERTIES VS_DOTNET_REFERENCE_DIALib ${CMAKE_CURRENT_SOURCE_DIR}/DIALib.dll)
+set_target_properties(dactablegen PROPERTIES VS_DOTNET_REFERENCE_DIALib "${DIALib}")
diff --git a/src/coreclr/src/ToolBox/SOS/DacTableGen/DIALib.dll b/src/coreclr/src/ToolBox/SOS/DacTableGen/DIALib.dll
deleted file mode 100644
index 06665740dc94db..00000000000000
Binary files a/src/coreclr/src/ToolBox/SOS/DacTableGen/DIALib.dll and /dev/null differ
diff --git a/src/coreclr/src/ToolBox/SOS/DacTableGen/diautil.cs b/src/coreclr/src/ToolBox/SOS/DacTableGen/diautil.cs
index e5c994329de00d..e9e53494cf7b2d 100644
--- a/src/coreclr/src/ToolBox/SOS/DacTableGen/diautil.cs
+++ b/src/coreclr/src/ToolBox/SOS/DacTableGen/diautil.cs
@@ -5,7 +5,7 @@
using System;
using System.Text;
using System.IO;
-using Dia;
+using DIALib;
using System.Runtime.InteropServices;
using System.Diagnostics;
diff --git a/src/coreclr/src/ToolBox/SOS/DacTableGen/main.cs b/src/coreclr/src/ToolBox/SOS/DacTableGen/main.cs
index 0ed7f451d5def4..ab25537d75353a 100644
--- a/src/coreclr/src/ToolBox/SOS/DacTableGen/main.cs
+++ b/src/coreclr/src/ToolBox/SOS/DacTableGen/main.cs
@@ -8,7 +8,7 @@
using System.Collections.Generic;
#if !TARGET_UNIX
-using Dia;
+using DIALib;
using Dia.Util;
#endif // !TARGET_UNIX
using System.Globalization;
diff --git a/src/coreclr/src/ToolBox/superpmi/mcs/verbildump.cpp b/src/coreclr/src/ToolBox/superpmi/mcs/verbildump.cpp
index 8b552af3bdf73a..5a41401cc53d79 100644
--- a/src/coreclr/src/ToolBox/superpmi/mcs/verbildump.cpp
+++ b/src/coreclr/src/ToolBox/superpmi/mcs/verbildump.cpp
@@ -915,12 +915,9 @@ char* DumpAttributeToConsoleBare(DWORD attribute)
if (0)
;
- ifPrint(CORINFO_FLG_STATIC, s_static) ifPrint(CORINFO_FLG_DONT_INLINE, s_dontInline)
- ifPrint(CORINFO_FLG_CONSTRUCTOR, s_constructor) else
- {
- LogError("unknown attribute %x", attribute);
- __debugbreak();
- }
+ ifPrint(CORINFO_FLG_STATIC, s_static)
+ ifPrint(CORINFO_FLG_DONT_INLINE, s_dontInline)
+ ifPrint(CORINFO_FLG_CONSTRUCTOR, s_constructor)
return nullptr;
#undef ifPrint
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/icorjitinfoimpl.h b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/icorjitinfoimpl.h
index d57e7eae48d879..03c722caed8962 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/icorjitinfoimpl.h
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/icorjitinfoimpl.h
@@ -880,8 +880,11 @@ CORINFO_METHOD_HANDLE GetDelegateCtor(CORINFO_METHOD_HANDLE methHnd,
void MethodCompileComplete(CORINFO_METHOD_HANDLE methHnd);
-// return a thunk that will copy the arguments for the given signature.
-void* getTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags);
+bool getTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult);
bool convertPInvokeCalliToCall(CORINFO_RESOLVED_TOKEN * pResolvedToken, bool fMustConvert);
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lwmlist.h b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lwmlist.h
index c8aa01e3a6a03e..1922e7d0f5dfad 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lwmlist.h
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/lwmlist.h
@@ -121,7 +121,7 @@ LWM(GetRelocTypeHint, DWORDLONG, DWORD)
LWM(GetSharedCCtorHelper, DWORDLONG, DWORD)
LWM(GetStringConfigValue, DWORD, DWORD)
LWM(GetSystemVAmd64PassStructInRegisterDescriptor, DWORDLONG, Agnostic_GetSystemVAmd64PassStructInRegisterDescriptor)
-LWM(GetTailCallCopyArgsThunk, Agnostic_GetTailCallCopyArgsThunk, DWORDLONG)
+LWM(GetTailCallHelpers, Agnostic_GetTailCallHelpers, Agnostic_CORINFO_TAILCALL_HELPERS)
LWM(GetThreadTLSIndex, DWORD, DLD)
LWM(GetTokenTypeAsHandle, GetTokenTypeAsHandleValue, DWORDLONG)
LWM(GetTypeForBox, DWORDLONG, DWORDLONG)
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.cpp b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.cpp
index c2c4d8f5e78b83..77603de0a850c6 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.cpp
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.cpp
@@ -5940,44 +5940,76 @@ const WCHAR* MethodContext::repAppendClassName(CORINFO_CLASS_HANDLE cls,
return name;
}
-void MethodContext::recGetTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig,
- CorInfoHelperTailCallSpecialHandling flags,
- void* result)
+void MethodContext::recGetTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
{
- if (GetTailCallCopyArgsThunk == nullptr)
- GetTailCallCopyArgsThunk = new LightWeightMap();
+ if (GetTailCallHelpers == nullptr)
+ GetTailCallHelpers = new LightWeightMap();
- Agnostic_GetTailCallCopyArgsThunk key;
- ZeroMemory(&key, sizeof(Agnostic_GetTailCallCopyArgsThunk)); // We use the input structs as a key and use memcmp to
- // compare.. so we need to zero out padding too
- key.Sig = SpmiRecordsHelper::StoreAgnostic_CORINFO_SIG_INFO(*pSig, GetTailCallCopyArgsThunk);
+ Agnostic_GetTailCallHelpers key;
+ ZeroMemory(&key, sizeof(Agnostic_GetTailCallHelpers));
+
+ key.callToken = SpmiRecordsHelper::StoreAgnostic_CORINFO_RESOLVED_TOKEN(callToken, GetTailCallHelpers);
+ key.sig = SpmiRecordsHelper::StoreAgnostic_CORINFO_SIG_INFO(*sig, GetTailCallHelpers);
key.flags = (DWORD)flags;
- GetTailCallCopyArgsThunk->Add(key, (DWORDLONG)result);
- DEBUG_REC(dmpGetTailCallCopyArgsThunk(key, (DWORDLONG)result));
+ Agnostic_CORINFO_TAILCALL_HELPERS value;
+ ZeroMemory(&value, sizeof(Agnostic_CORINFO_TAILCALL_HELPERS));
+
+ value.result = pResult != nullptr;
+ if (pResult != nullptr)
+ {
+ value.flags = (DWORD)pResult->flags;
+ value.hStoreArgs = (DWORDLONG)pResult->hStoreArgs;
+ value.hCallTarget = (DWORDLONG)pResult->hCallTarget;
+ value.hDispatcher = (DWORDLONG)pResult->hDispatcher;
+ }
+ GetTailCallHelpers->Add(key, value);
+ DEBUG_REC(dmpGetTailCallHelpers(key, value));
}
-void MethodContext::dmpGetTailCallCopyArgsThunk(const Agnostic_GetTailCallCopyArgsThunk& key, DWORDLONG value)
+
+void MethodContext::dmpGetTailCallHelpers(const Agnostic_GetTailCallHelpers& key, const Agnostic_CORINFO_TAILCALL_HELPERS& value)
{
- printf("GetTailCallCopyArgsThunk key sig%s flg-%08X",
- SpmiDumpHelper::DumpAgnostic_CORINFO_SIG_INFO(key.Sig).c_str(), key.flags);
- printf(", value res-%016llX", value);
+ printf("GetTailCallHelpers key callToken-%s sig-%s flg-%08X",
+ SpmiDumpHelper::DumpAgnostic_CORINFO_RESOLVED_TOKEN(key.callToken).c_str(),
+ SpmiDumpHelper::DumpAgnostic_CORINFO_SIG_INFO(key.sig).c_str(),
+ key.flags);
+ printf(", value result-%s flg-%08X hStoreArgs-%016llX hCallTarget-%016llX hDispatcher-%016llX",
+ value.result ? "true" : "false",
+ value.flags,
+ value.hStoreArgs,
+ value.hCallTarget,
+ value.hDispatcher);
}
-void* MethodContext::repGetTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags)
+
+bool MethodContext::repGetTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
{
- AssertCodeMsg(GetTailCallCopyArgsThunk != nullptr, EXCEPTIONCODE_MC, "Didn't find anything for ...");
+ AssertCodeMsg(GetTailCallHelpers != nullptr, EXCEPTIONCODE_MC, "Didn't find anything for ...");
- Agnostic_GetTailCallCopyArgsThunk key;
- ZeroMemory(&key, sizeof(Agnostic_GetTailCallCopyArgsThunk)); // We use the input structs as a key and use memcmp to
- // compare.. so we need to zero out padding too
- key.Sig = SpmiRecordsHelper::RestoreAgnostic_CORINFO_SIG_INFO(*pSig, GetTailCallCopyArgsThunk);
+ Agnostic_GetTailCallHelpers key;
+ ZeroMemory(&key, sizeof(Agnostic_GetTailCallHelpers));
+ key.callToken = SpmiRecordsHelper::RestoreAgnostic_CORINFO_RESOLVED_TOKEN(callToken, GetTailCallHelpers);
+ key.sig = SpmiRecordsHelper::RestoreAgnostic_CORINFO_SIG_INFO(*sig, GetTailCallHelpers);
key.flags = (DWORD)flags;
- AssertCodeMsg(GetTailCallCopyArgsThunk->GetIndex(key) != -1, EXCEPTIONCODE_MC, "Didn't find %016llX",
- (DWORDLONG)key.Sig.retTypeClass);
- void* result = (void*)GetTailCallCopyArgsThunk->Get(key);
- cr->recAddressMap((void*)0x424242, (void*)result, 1);
- DEBUG_REP(dmpGetTailCallCopyArgsThunk(key, (DWORDLONG)result));
- return result;
+ AssertCodeMsg(GetTailCallHelpers->GetIndex(key) != -1, EXCEPTIONCODE_MC, "Could not find matching tail call helper call");
+ Agnostic_CORINFO_TAILCALL_HELPERS value = GetTailCallHelpers->Get(key);
+ if (!value.result)
+ return false;
+
+ pResult->flags = (CORINFO_TAILCALL_HELPERS_FLAGS)value.flags;
+ pResult->hStoreArgs = (CORINFO_METHOD_HANDLE)value.hStoreArgs;
+ pResult->hCallTarget = (CORINFO_METHOD_HANDLE)value.hCallTarget;
+ pResult->hDispatcher = (CORINFO_METHOD_HANDLE)value.hDispatcher;
+ DEBUG_REP(dmpGetTailCallHelpers(key, value));
+ return true;
}
void MethodContext::recGetMethodDefFromMethod(CORINFO_METHOD_HANDLE hMethod, mdMethodDef result)
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.h b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.h
index 84c2042ee367af..1f34c4569e3358 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.h
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shared/methodcontext.h
@@ -436,10 +436,19 @@ class MethodContext
DWORDLONG ProfilerHandle;
DWORD bIndirectedHandles;
};
- struct Agnostic_GetTailCallCopyArgsThunk
+ struct Agnostic_GetTailCallHelpers
{
- Agnostic_CORINFO_SIG_INFO Sig;
- DWORD flags;
+ Agnostic_CORINFO_RESOLVED_TOKEN callToken;
+ Agnostic_CORINFO_SIG_INFO sig;
+ DWORD flags;
+ };
+ struct Agnostic_CORINFO_TAILCALL_HELPERS
+ {
+ bool result;
+ DWORD flags;
+ DWORDLONG hStoreArgs;
+ DWORDLONG hCallTarget;
+ DWORDLONG hDispatcher;
};
struct Agnostic_GetArgClass_Value
{
@@ -1255,9 +1264,17 @@ class MethodContext
void dmpAppendClassName(const Agnostic_AppendClassName& key, DWORD value);
const WCHAR* repAppendClassName(CORINFO_CLASS_HANDLE cls, BOOL fNamespace, BOOL fFullInst, BOOL fAssembly);
- void recGetTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags, void* result);
- void dmpGetTailCallCopyArgsThunk(const Agnostic_GetTailCallCopyArgsThunk& key, DWORDLONG value);
- void* repGetTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags);
+ void recGetTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult);
+ void dmpGetTailCallHelpers(const Agnostic_GetTailCallHelpers& key, const Agnostic_CORINFO_TAILCALL_HELPERS& value);
+ bool repGetTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult);
void recGetMethodDefFromMethod(CORINFO_METHOD_HANDLE hMethod, mdMethodDef result);
void dmpGetMethodDefFromMethod(DWORDLONG key, DWORD value);
@@ -1320,7 +1337,7 @@ class MethodContext
};
// ********************* Please keep this up-to-date to ease adding more ***************
-// Highest packet number: 177
+// Highest packet number: 178
// *************************************************************************************
enum mcPackets
{
@@ -1438,7 +1455,8 @@ enum mcPackets
Packet_GetRelocTypeHint = 84,
Packet_GetSecurityPrologHelper = 85, // Retired 2/18/2020
Packet_GetSharedCCtorHelper = 86,
- Packet_GetTailCallCopyArgsThunk = 87,
+ Packet_GetTailCallCopyArgsThunk = 87, // Retired 4/27/2020
+ Packet_GetTailCallHelpers = 178, // Added 3/18/2020
Packet_GetThreadTLSIndex = 88,
Packet_GetTokenTypeAsHandle = 89,
Packet_GetTypeForBox = 90,
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shim-collector/icorjitinfo.cpp b/src/coreclr/src/ToolBox/superpmi/superpmi-shim-collector/icorjitinfo.cpp
index 505d46c114cfb6..2da8785f96bc23 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shim-collector/icorjitinfo.cpp
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shim-collector/icorjitinfo.cpp
@@ -1857,12 +1857,18 @@ void interceptor_ICJI::MethodCompileComplete(CORINFO_METHOD_HANDLE methHnd)
original_ICorJitInfo->MethodCompileComplete(methHnd);
}
-// return a thunk that will copy the arguments for the given signature.
-void* interceptor_ICJI::getTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags)
-{
- mc->cr->AddCall("getTailCallCopyArgsThunk");
- void* result = original_ICorJitInfo->getTailCallCopyArgsThunk(pSig, flags);
- mc->recGetTailCallCopyArgsThunk(pSig, flags, result);
+bool interceptor_ICJI::getTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
+{
+ mc->cr->AddCall("getTailCallHelpers");
+ bool result = original_ICorJitInfo->getTailCallHelpers(callToken, sig, flags, pResult);
+ if (result)
+ mc->recGetTailCallHelpers(callToken, sig, flags, pResult);
+ else
+ mc->recGetTailCallHelpers(callToken, sig, flags, nullptr);
return result;
}
@@ -2091,4 +2097,4 @@ DWORD interceptor_ICJI::getExpectedTargetArchitecture()
void interceptor_ICJI::notifyInstructionSetUsage(CORINFO_InstructionSet instructionSet, bool supported)
{
original_ICorJitInfo->notifyInstructionSetUsage(instructionSet, supported);
-}
\ No newline at end of file
+}
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shim-counter/icorjitinfo.cpp b/src/coreclr/src/ToolBox/superpmi/superpmi-shim-counter/icorjitinfo.cpp
index ad18047e373749..febd952a655fab 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shim-counter/icorjitinfo.cpp
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shim-counter/icorjitinfo.cpp
@@ -1442,11 +1442,14 @@ void interceptor_ICJI::MethodCompileComplete(CORINFO_METHOD_HANDLE methHnd)
original_ICorJitInfo->MethodCompileComplete(methHnd);
}
-// return a thunk that will copy the arguments for the given signature.
-void* interceptor_ICJI::getTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags)
+bool interceptor_ICJI::getTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
{
- mcs->AddCall("getTailCallCopyArgsThunk");
- return original_ICorJitInfo->getTailCallCopyArgsThunk(pSig, flags);
+ mcs->AddCall("getTailCallHelpers");
+ return original_ICorJitInfo->getTailCallHelpers(callToken, sig, flags, pResult);
}
// Stuff directly on ICorJitInfo
@@ -1668,4 +1671,4 @@ void interceptor_ICJI::notifyInstructionSetUsage(CORINFO_InstructionSet instruct
{
mcs->AddCall("notifyInstructionSetUsage");
original_ICorJitInfo->notifyInstructionSetUsage(instructionSet, supported);
-}
\ No newline at end of file
+}
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi-shim-simple/icorjitinfo.cpp b/src/coreclr/src/ToolBox/superpmi/superpmi-shim-simple/icorjitinfo.cpp
index eab760a30d2926..26141d06068f46 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi-shim-simple/icorjitinfo.cpp
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi-shim-simple/icorjitinfo.cpp
@@ -1285,10 +1285,13 @@ void interceptor_ICJI::MethodCompileComplete(CORINFO_METHOD_HANDLE methHnd)
original_ICorJitInfo->MethodCompileComplete(methHnd);
}
-// return a thunk that will copy the arguments for the given signature.
-void* interceptor_ICJI::getTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags)
+bool interceptor_ICJI::getTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
{
- return original_ICorJitInfo->getTailCallCopyArgsThunk(pSig, flags);
+ return original_ICorJitInfo->getTailCallHelpers(callToken, sig, flags, pResult);
}
// Stuff directly on ICorJitInfo
diff --git a/src/coreclr/src/ToolBox/superpmi/superpmi/icorjitinfo.cpp b/src/coreclr/src/ToolBox/superpmi/superpmi/icorjitinfo.cpp
index 728bd3b2bef8b8..24bc4415e586e0 100644
--- a/src/coreclr/src/ToolBox/superpmi/superpmi/icorjitinfo.cpp
+++ b/src/coreclr/src/ToolBox/superpmi/superpmi/icorjitinfo.cpp
@@ -1540,11 +1540,14 @@ void MyICJI::MethodCompileComplete(CORINFO_METHOD_HANDLE methHnd)
DebugBreakorAV(118);
}
-// return a thunk that will copy the arguments for the given signature.
-void* MyICJI::getTailCallCopyArgsThunk(CORINFO_SIG_INFO* pSig, CorInfoHelperTailCallSpecialHandling flags)
+bool MyICJI::getTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
{
- jitInstance->mc->cr->AddCall("getTailCallCopyArgsThunk");
- return jitInstance->mc->repGetTailCallCopyArgsThunk(pSig, flags);
+ jitInstance->mc->cr->AddCall("getTailCallHelpers");
+ return jitInstance->mc->repGetTailCallHelpers(callToken, sig, flags, pResult);
}
bool MyICJI::convertPInvokeCalliToCall(CORINFO_RESOLVED_TOKEN* pResolvedToken, bool fMustConvert)
@@ -1575,6 +1578,18 @@ bool MyICJI::runWithErrorTrap(void (*function)(void*), void* param)
return RunWithErrorTrap(function, param);
}
+// Ideally we'd just use the copies of this in standardmacros.h
+// however, superpmi is missing various other dependencies as well
+static size_t ALIGN_UP_SPMI(size_t val, size_t alignment)
+{
+ return (val + (alignment - 1)) & ~(alignment - 1);
+}
+
+static void* ALIGN_UP_SPMI(void* val, size_t alignment)
+{
+ return (void*)ALIGN_UP_SPMI((size_t)val, alignment);
+}
+
// get a block of memory for the code, readonly data, and read-write data
void MyICJI::allocMem(ULONG hotCodeSize, /* IN */
ULONG coldCodeSize, /* IN */
@@ -1587,13 +1602,46 @@ void MyICJI::allocMem(ULONG hotCodeSize, /* IN */
)
{
jitInstance->mc->cr->AddCall("allocMem");
- // TODO-Cleanup: investigate if we need to check roDataBlock as well. Could hot block size be ever 0?
+
+ // TODO-Cleanup: Could hot block size be ever 0?
*hotCodeBlock = jitInstance->mc->cr->allocateMemory(hotCodeSize);
+
if (coldCodeSize > 0)
*coldCodeBlock = jitInstance->mc->cr->allocateMemory(coldCodeSize);
else
*coldCodeBlock = nullptr;
- *roDataBlock = jitInstance->mc->cr->allocateMemory(roDataSize);
+
+ if (roDataSize > 0)
+ {
+ size_t roDataAlignment = sizeof(void*);
+ size_t roDataAlignedSize = static_cast(roDataSize);
+
+ if ((flag & CORJIT_ALLOCMEM_FLG_RODATA_32BYTE_ALIGN) != 0)
+ {
+ roDataAlignment = 32;
+ }
+ else if ((flag & CORJIT_ALLOCMEM_FLG_RODATA_16BYTE_ALIGN) != 0)
+ {
+ roDataAlignment = 16;
+ }
+ else if (roDataSize >= 8)
+ {
+ roDataAlignment = 8;
+ }
+
+ // We need to round the roDataSize up to the alignment size and then
+ // overallocate by at most alignment - sizeof(void*) to ensure that
+ // we can offset roDataBlock to be an aligned address and that the
+ // allocation contains at least the originally requested size after
+
+ roDataAlignedSize = ALIGN_UP_SPMI(roDataAlignedSize, roDataAlignment);
+ roDataAlignedSize = roDataAlignedSize + (roDataAlignment - sizeof(void*));
+ *roDataBlock = jitInstance->mc->cr->allocateMemory(roDataAlignedSize);
+ *roDataBlock = ALIGN_UP_SPMI(*roDataBlock, roDataAlignment);
+ }
+ else
+ *roDataBlock = nullptr;
+
jitInstance->mc->cr->recAllocMem(hotCodeSize, coldCodeSize, roDataSize, xcptnsCount, flag, hotCodeBlock,
coldCodeBlock, roDataBlock);
}
diff --git a/src/coreclr/src/binder/assemblybinder.cpp b/src/coreclr/src/binder/assemblybinder.cpp
index 784b91260ee75d..362c2b867802f5 100644
--- a/src/coreclr/src/binder/assemblybinder.cpp
+++ b/src/coreclr/src/binder/assemblybinder.cpp
@@ -14,7 +14,6 @@
#include "assemblybinder.hpp"
#include "assemblyname.hpp"
-
#include "assembly.hpp"
#include "applicationcontext.hpp"
#include "bindertracing.h"
@@ -380,23 +379,36 @@ namespace BINDER_SPACE
_ASSERTE(ppSystemAssembly != NULL);
- StackSString sCoreLibDir(systemDirectory);
ReleaseHolder pSystemAssembly;
- if (!sCoreLibDir.EndsWith(DIRECTORY_SEPARATOR_CHAR_W))
- {
- sCoreLibDir.Append(DIRECTORY_SEPARATOR_CHAR_W);
- }
+ // At run-time, System.Private.CoreLib.dll is expected to be the NI image.
+ // System.Private.CoreLib.dll is expected to be found at one of the following locations:
+ // * Non-single-file app: In systemDirectory, beside coreclr.dll
+ // * Framework-dependent single-file app: In systemDirectory, beside coreclr.dll
+ // * Self-contained single-file app: Within the single-file bundle.
+ //
+ // CoreLib path (sCoreLib):
+ // * Absolute path when looking for a file on disk
+ // * Bundle-relative path when looking within the single-file bundle.
+ StackSString sCoreLibName(CoreLibName_IL_W);
StackSString sCoreLib;
+ BinderTracing::PathSource pathSource = BinderTracing::PathSource::Bundle;
+ BundleFileLocation bundleFileLocation = Bundle::ProbeAppBundle(sCoreLibName, /*pathIsBundleRelative */ true);
+ if (!bundleFileLocation.IsValid())
+ {
+ sCoreLib.Set(systemDirectory);
+ pathSource = BinderTracing::PathSource::ApplicationAssemblies;
+ }
+ CombinePath(sCoreLib, sCoreLibName, sCoreLib);
- // At run-time, System.Private.CoreLib.dll is expected to be the NI image.
- sCoreLib = sCoreLibDir;
- sCoreLib.Append(CoreLibName_IL_W);
IF_FAIL_GO(AssemblyBinder::GetAssembly(sCoreLib,
TRUE /* fIsInGAC */,
fBindToNativeImage,
- &pSystemAssembly));
+ &pSystemAssembly,
+ NULL /* szMDAssemblyPath */,
+ bundleFileLocation));
+ BinderTracing::PathProbed(sCoreLib, pathSource, hr);
*ppSystemAssembly = pSystemAssembly.Extract();
@@ -406,10 +418,10 @@ namespace BINDER_SPACE
/* static */
- HRESULT AssemblyBinder::BindToSystemSatellite(SString &systemDirectory,
- SString &simpleName,
- SString &cultureName,
- Assembly **ppSystemAssembly)
+ HRESULT AssemblyBinder::BindToSystemSatellite(SString& systemDirectory,
+ SString& simpleName,
+ SString& cultureName,
+ Assembly** ppSystemAssembly)
{
// Indirect check that binder was initialized.
_ASSERTE(g_BinderVariables != NULL);
@@ -418,25 +430,43 @@ namespace BINDER_SPACE
_ASSERTE(ppSystemAssembly != NULL);
- StackSString sMscorlibSatellite(systemDirectory);
- ReleaseHolder pSystemAssembly;
+ // Satellite assembly's relative path
+ StackSString relativePath;
// append culture name
if (!cultureName.IsEmpty())
{
- CombinePath(sMscorlibSatellite, cultureName, sMscorlibSatellite);
+ CombinePath(relativePath, cultureName, relativePath);
}
// append satellite assembly's simple name
- CombinePath(sMscorlibSatellite, simpleName, sMscorlibSatellite);
+ CombinePath(relativePath, simpleName, relativePath);
// append extension
- sMscorlibSatellite.Append(W(".dll"));
+ relativePath.Append(W(".dll"));
+ // Satellite assembly's path:
+ // * Absolute path when looking for a file on disk
+ // * Bundle-relative path when looking within the single-file bundle.
+ StackSString sMscorlibSatellite;
+
+ BinderTracing::PathSource pathSource = BinderTracing::PathSource::Bundle;
+ BundleFileLocation bundleFileLocation = Bundle::ProbeAppBundle(relativePath, /*pathIsBundleRelative */ true);
+ if (!bundleFileLocation.IsValid())
+ {
+ sMscorlibSatellite.Set(systemDirectory);
+ pathSource = BinderTracing::PathSource::ApplicationAssemblies;
+ }
+ CombinePath(sMscorlibSatellite, relativePath, sMscorlibSatellite);
+
+ ReleaseHolder pSystemAssembly;
IF_FAIL_GO(AssemblyBinder::GetAssembly(sMscorlibSatellite,
TRUE /* fIsInGAC */,
FALSE /* fExplicitBindToNativeImage */,
- &pSystemAssembly));
+ &pSystemAssembly,
+ NULL /* szMDAssemblyPath */,
+ bundleFileLocation));
+ BinderTracing::PathProbed(sMscorlibSatellite, pathSource, hr);
*ppSystemAssembly = pSystemAssembly.Extract();
@@ -553,7 +583,9 @@ namespace BINDER_SPACE
// specified. Generally only NGEN PDB generation has
// this TRUE.
fExplicitBindToNativeImage,
- &pAssembly));
+ &pAssembly,
+ NULL /* szMDAssemblyPath */,
+ Bundle::ProbeAppBundle(assemblyPath)));
AssemblyName *pAssemblyName;
pAssemblyName = pAssembly->GetAssemblyName();
@@ -721,36 +753,75 @@ namespace BINDER_SPACE
namespace
{
- typedef void (*OnPathProbed)(const WCHAR *path, HRESULT hr);
-
- HRESULT BindSatelliteResourceByProbingPaths(
- const StringArrayList *pResourceRoots,
- AssemblyName *pRequestedAssemblyName,
- BindResult *pBindResult,
- OnPathProbed onPathProbed)
+ HRESULT BindSatelliteResourceFromBundle(
+ AssemblyName* pRequestedAssemblyName,
+ SString &relativePath,
+ BindResult* pBindResult)
{
HRESULT hr = S_OK;
- SString &simpleNameRef = pRequestedAssemblyName->GetSimpleName();
- SString &cultureRef = pRequestedAssemblyName->GetCulture();
+ BundleFileLocation bundleFileLocation = Bundle::ProbeAppBundle(relativePath, /* pathIsBundleRelative */ true);
+ if (!bundleFileLocation.IsValid())
+ {
+ return hr;
+ }
- _ASSERTE(!cultureRef.IsEmpty() && !cultureRef.EqualsCaseInsensitive(g_BinderVariables->cultureNeutral));
+ ReleaseHolder pAssembly;
+ hr = AssemblyBinder::GetAssembly(relativePath,
+ FALSE /* fIsInGAC */,
+ FALSE /* fExplicitBindToNativeImage */,
+ &pAssembly,
+ NULL, // szMDAssemblyPath
+ bundleFileLocation);
+
+ BinderTracing::PathProbed(relativePath, BinderTracing::PathSource::Bundle, hr);
+
+ // Missing files are okay and expected when probing
+ if (hr == HRESULT_FROM_WIN32(ERROR_FILE_NOT_FOUND))
+ {
+ return S_OK;
+ }
+
+ pBindResult->SetAttemptResult(hr, pAssembly);
+ if (FAILED(hr))
+ return hr;
+
+ AssemblyName* pBoundAssemblyName = pAssembly->GetAssemblyName();
+ if (TestCandidateRefMatchesDef(pRequestedAssemblyName, pBoundAssemblyName, false /*tpaListAssembly*/))
+ {
+ pBindResult->SetResult(pAssembly);
+ hr = S_OK;
+ }
+ else
+ {
+ hr = FUSION_E_REF_DEF_MISMATCH;
+ }
+
+ pBindResult->SetAttemptResult(hr, pAssembly);
+ return hr;
+ }
+
+ HRESULT BindSatelliteResourceByProbingPaths(
+ const StringArrayList *pResourceRoots,
+ AssemblyName *pRequestedAssemblyName,
+ SString &relativePath,
+ BindResult *pBindResult,
+ BinderTracing::PathSource pathSource)
+ {
+ HRESULT hr = S_OK;
for (UINT i = 0; i < pResourceRoots->GetCount(); i++)
{
ReleaseHolder pAssembly;
SString &wszBindingPath = (*pResourceRoots)[i];
SString fileName(wszBindingPath);
-
- CombinePath(fileName, cultureRef, fileName);
- CombinePath(fileName, simpleNameRef, fileName);
- fileName.Append(W(".dll"));
+ CombinePath(fileName, relativePath, fileName);
hr = AssemblyBinder::GetAssembly(fileName,
FALSE /* fIsInGAC */,
FALSE /* fExplicitBindToNativeImage */,
&pAssembly);
- onPathProbed(fileName, hr);
+ BinderTracing::PathProbed(fileName, pathSource, hr);
// Missing files are okay and expected when probing
if (hr == HRESULT_FROM_WIN32(ERROR_FILE_NOT_FOUND))
@@ -781,6 +852,59 @@ namespace BINDER_SPACE
return S_OK;
}
+ HRESULT BindSatelliteResource(
+ ApplicationContext* pApplicationContext,
+ AssemblyName* pRequestedAssemblyName,
+ BindResult* pBindResult)
+ {
+ // Satellite resource probing strategy is to look:
+ // * First within the single-file bundle
+ // * Then under each of the Platform Resource Roots
+ // * Then under each of the App Paths.
+ //
+ // During each search, if we find a platform resource file with matching file name, but whose ref-def didn't match,
+ // fall back to application resource lookup to handle case where a user creates resources with the same
+ // names as platform ones.
+
+ HRESULT hr = S_OK;
+ SString& simpleNameRef = pRequestedAssemblyName->GetSimpleName();
+ SString& cultureRef = pRequestedAssemblyName->GetCulture();
+
+ _ASSERTE(!cultureRef.IsEmpty() && !cultureRef.EqualsCaseInsensitive(g_BinderVariables->cultureNeutral));
+
+ ReleaseHolder pAssembly;
+ SString fileName;
+ CombinePath(fileName, cultureRef, fileName);
+ CombinePath(fileName, simpleNameRef, fileName);
+ fileName.Append(W(".dll"));
+
+ hr = BindSatelliteResourceFromBundle(pRequestedAssemblyName, fileName, pBindResult);
+
+ if (pBindResult->HaveResult() || (FAILED(hr) && hr != FUSION_E_CONFIGURATION_ERROR))
+ {
+ return hr;
+ }
+
+ hr = BindSatelliteResourceByProbingPaths(pApplicationContext->GetPlatformResourceRoots(),
+ pRequestedAssemblyName,
+ fileName,
+ pBindResult,
+ BinderTracing::PathSource::PlatformResourceRoots);
+
+ if (pBindResult->HaveResult() || (FAILED(hr) && hr != FUSION_E_CONFIGURATION_ERROR))
+ {
+ return hr;
+ }
+
+ hr = BindSatelliteResourceByProbingPaths(pApplicationContext->GetAppPaths(),
+ pRequestedAssemblyName,
+ fileName,
+ pBindResult,
+ BinderTracing::PathSource::AppPaths);
+
+ return hr;
+ }
+
HRESULT BindAssemblyByProbingPaths(
const StringArrayList *pBindingPaths,
AssemblyName *pRequestedAssemblyName,
@@ -788,7 +912,6 @@ namespace BINDER_SPACE
Assembly **ppAssembly)
{
SString &simpleName = pRequestedAssemblyName->GetSimpleName();
-
BinderTracing::PathSource pathSource = useNativeImages ? BinderTracing::PathSource::AppNativeImagePaths : BinderTracing::PathSource::AppPaths;
// Loop through the binding paths looking for a matching assembly
for (DWORD i = 0; i < pBindingPaths->GetCount(); i++)
@@ -850,6 +973,13 @@ namespace BINDER_SPACE
/*
* BindByTpaList is the entry-point for the custom binding algorithm in CoreCLR.
+ *
+ * The search for assemblies will proceed in the following order:
+ *
+ * If this application is a single-file bundle, the meta-data contained in the bundle
+ * will be probed to find the requested assembly. If the assembly is not found,
+ * The list of platform assemblies (TPAs) are considered next.
+ *
* Platform assemblies are specified as a list of files. This list is the only set of
* assemblies that we will load as platform. They can be specified as IL or NIs.
*
@@ -875,39 +1005,65 @@ namespace BINDER_SPACE
if (!culture.IsEmpty() && !culture.EqualsCaseInsensitive(g_BinderVariables->cultureNeutral))
{
- //
- // Satellite resource probing strategy is to look under each of the Platform Resource Roots
- // followed by App Paths.
- //
+ IF_FAIL_GO(BindSatelliteResource(pApplicationContext, pRequestedAssemblyName, pBindResult));
+ }
+ else
+ {
+ ReleaseHolder pTPAAssembly;
+ SString& simpleName = pRequestedAssemblyName->GetSimpleName();
+
+ // Is assembly in the bundle?
+ // Single-file bundle contents take precedence over TPA.
+ // The list of bundled assemblies is contained in the bundle manifest, and NOT in the TPA.
+ // Therefore the bundle is first probed using the assembly's simple name.
+ // If found, the assembly is loaded from the bundle.
+ if (Bundle::AppIsBundle())
+ {
+ // Search Assembly.ni.dll, then Assembly.dll
+ // The Assembly.ni.dll paths are rare, and intended for supporting managed C++ R2R assemblies.
+ SString candidates[] = { W(".ni.dll"), W(".dll") };
- hr = BindSatelliteResourceByProbingPaths(pApplicationContext->GetPlatformResourceRoots(),
- pRequestedAssemblyName,
- pBindResult,
- [](const WCHAR *path, HRESULT res) { BinderTracing::PathProbed(path, BinderTracing::PathSource::PlatformResourceRoots, res); });
+ // Loop through the binding paths looking for a matching assembly
+ for (int i = 0; i < 2; i++)
+ {
+ SString assemblyFileName(simpleName);
+ assemblyFileName.Append(candidates[i]);
- // We found a platform resource file with matching file name, but whose ref-def didn't match. Fall
- // back to application resource lookup to handle case where a user creates resources with the same
- // names as platform ones.
- if (hr != FUSION_E_CONFIGURATION_ERROR)
- {
- IF_FAIL_GO(hr);
- }
+ SString assemblyFilePath(Bundle::AppBundle->BasePath());
+ assemblyFilePath.Append(assemblyFileName);
- if (!pBindResult->HaveResult())
- {
- IF_FAIL_GO(BindSatelliteResourceByProbingPaths(pApplicationContext->GetAppPaths(),
- pRequestedAssemblyName,
- pBindResult,
- [](const WCHAR *path, HRESULT res) { BinderTracing::PathProbed(path, BinderTracing::PathSource::AppPaths, res); }));
+ BundleFileLocation bundleFileLocation = Bundle::ProbeAppBundle(assemblyFileName, /* pathIsBundleRelative */ true);
+ if (bundleFileLocation.IsValid())
+ {
+ hr = GetAssembly(assemblyFilePath,
+ TRUE, // fIsInGAC
+ FALSE, // fExplicitBindToNativeImage
+ &pTPAAssembly,
+ NULL, // szMDAssemblyPath
+ bundleFileLocation);
+
+ BinderTracing::PathProbed(assemblyFilePath, BinderTracing::PathSource::Bundle, hr);
+
+ if (hr != HRESULT_FROM_WIN32(ERROR_FILE_NOT_FOUND))
+ {
+ // Any other error is fatal
+ IF_FAIL_GO(hr);
+
+ if (TestCandidateRefMatchesDef(pRequestedAssemblyName, pTPAAssembly->GetAssemblyName(), true /*tpaListAssembly*/))
+ {
+ // We have found the requested assembly match in the bundle with validation of the full-qualified name.
+ // Bind to it.
+ pBindResult->SetResult(pTPAAssembly);
+ GO_WITH_HRESULT(S_OK);
+ }
+ }
+ }
+ }
}
- }
- else
- {
+
// Is assembly on TPA list?
- SString &simpleName = pRequestedAssemblyName->GetSimpleName();
SimpleNameToFileNameMap * tpaMap = pApplicationContext->GetTpaList();
const SimpleNameToFileNameMapEntry *pTpaEntry = tpaMap->LookupPtr(simpleName.GetUnicode());
- ReleaseHolder pTPAAssembly;
if (pTpaEntry != nullptr)
{
if (pTpaEntry->m_wszNIFileName != nullptr)
@@ -1020,20 +1176,21 @@ namespace BINDER_SPACE
}
/* static */
- HRESULT AssemblyBinder::GetAssembly(SString &assemblyPath,
- BOOL fIsInGAC,
+ HRESULT AssemblyBinder::GetAssembly(SString &assemblyPath,
+ BOOL fIsInGAC,
// When binding to the native image, should we
// assume assemblyPath explicitly specifies that
// NI? (If not, infer the path to the NI
// implicitly.)
- BOOL fExplicitBindToNativeImage,
+ BOOL fExplicitBindToNativeImage,
- Assembly **ppAssembly,
+ Assembly **ppAssembly,
// If assemblyPath refers to a native image without metadata,
// szMDAssemblyPath gives the alternative file to get metadata.
- LPCTSTR szMDAssemblyPath)
+ LPCTSTR szMDAssemblyPath,
+ BundleFileLocation bundleFileLocation)
{
HRESULT hr = S_OK;
@@ -1053,7 +1210,7 @@ namespace BINDER_SPACE
{
LPCTSTR szAssemblyPath = const_cast(assemblyPath.GetUnicode());
- hr = BinderAcquirePEImage(szAssemblyPath, &pPEImage, &pNativePEImage, fExplicitBindToNativeImage);
+ hr = BinderAcquirePEImage(szAssemblyPath, &pPEImage, &pNativePEImage, fExplicitBindToNativeImage, bundleFileLocation);
IF_FAIL_GO(hr);
// If we found a native image, it might be an MSIL assembly masquerading as an native image
@@ -1068,7 +1225,7 @@ namespace BINDER_SPACE
BinderReleasePEImage(pPEImage);
BinderReleasePEImage(pNativePEImage);
- hr = BinderAcquirePEImage(szAssemblyPath, &pPEImage, &pNativePEImage, false);
+ hr = BinderAcquirePEImage(szAssemblyPath, &pPEImage, &pNativePEImage, false, bundleFileLocation);
IF_FAIL_GO(hr);
}
}
@@ -1094,7 +1251,7 @@ namespace BINDER_SPACE
}
else
{
- hr = BinderAcquirePEImage(szMDAssemblyPath, &pPEImage, NULL, FALSE);
+ hr = BinderAcquirePEImage(szMDAssemblyPath, &pPEImage, NULL, FALSE, bundleFileLocation);
IF_FAIL_GO(hr);
hr = BinderAcquireImport(pPEImage, &pIMetaDataAssemblyImport, dwPAFlags, FALSE);
diff --git a/src/coreclr/src/binder/clrprivbinderassemblyloadcontext.cpp b/src/coreclr/src/binder/clrprivbinderassemblyloadcontext.cpp
index 0881af5c599832..8c1ae4060a6154 100644
--- a/src/coreclr/src/binder/clrprivbinderassemblyloadcontext.cpp
+++ b/src/coreclr/src/binder/clrprivbinderassemblyloadcontext.cpp
@@ -250,12 +250,11 @@ void CLRPrivBinderAssemblyLoadContext::PrepareForLoadContextRelease(INT_PTR ptrM
}
CONTRACTL_END;
- // Replace the weak handle with a strong handle so that the managed assembly load context stays alive until the
+ // Add a strong handle so that the managed assembly load context stays alive until the
// CLRPrivBinderAssemblyLoadContext::ReleaseLoadContext is called.
- OBJECTHANDLE handle = reinterpret_cast(m_ptrManagedAssemblyLoadContext);
- OBJECTHANDLE strongHandle = reinterpret_cast(ptrManagedStrongAssemblyLoadContext);
- DestroyLongWeakHandle(handle);
- m_ptrManagedAssemblyLoadContext = reinterpret_cast(strongHandle);
+ // We keep the weak handle as well since this method can be running on one thread (e.g. the finalizer one)
+ // and other thread can be using the weak handle.
+ m_ptrManagedStrongAssemblyLoadContext = ptrManagedStrongAssemblyLoadContext;
_ASSERTE(m_pAssemblyLoaderAllocator != NULL);
_ASSERTE(m_loaderAllocatorHandle != NULL);
@@ -274,15 +273,19 @@ void CLRPrivBinderAssemblyLoadContext::PrepareForLoadContextRelease(INT_PTR ptrM
CLRPrivBinderAssemblyLoadContext::CLRPrivBinderAssemblyLoadContext()
{
m_pTPABinder = NULL;
+ m_ptrManagedStrongAssemblyLoadContext = NULL;
}
void CLRPrivBinderAssemblyLoadContext::ReleaseLoadContext()
{
VERIFY(m_ptrManagedAssemblyLoadContext != NULL);
+ VERIFY(m_ptrManagedStrongAssemblyLoadContext != NULL);
- // This method is called to release the strong handle on the managed AssemblyLoadContext
+ // This method is called to release the weak and strong handles on the managed AssemblyLoadContext
// once the Unloading event has been fired
OBJECTHANDLE handle = reinterpret_cast(m_ptrManagedAssemblyLoadContext);
+ DestroyLongWeakHandle(handle);
+ handle = reinterpret_cast(m_ptrManagedStrongAssemblyLoadContext);
DestroyHandle(handle);
m_ptrManagedAssemblyLoadContext = NULL;
}
diff --git a/src/coreclr/src/binder/coreclrbindercommon.cpp b/src/coreclr/src/binder/coreclrbindercommon.cpp
index afd64cfc4dc582..e415b9067bb34a 100644
--- a/src/coreclr/src/binder/coreclrbindercommon.cpp
+++ b/src/coreclr/src/binder/coreclrbindercommon.cpp
@@ -7,6 +7,7 @@
#include "assemblybinder.hpp"
#include "coreclrbindercommon.h"
#include "clrprivbindercoreclr.h"
+#include "bundle.h"
using namespace BINDER_SPACE;
diff --git a/src/coreclr/src/binder/inc/assembly.hpp b/src/coreclr/src/binder/inc/assembly.hpp
index 0d5500afb82032..f42cee4e622687 100644
--- a/src/coreclr/src/binder/inc/assembly.hpp
+++ b/src/coreclr/src/binder/inc/assembly.hpp
@@ -27,15 +27,18 @@
#include "clrprivbinderassemblyloadcontext.h"
#endif // !defined(DACCESS_COMPILE) && !defined(CROSSGEN_COMPILE)
-STDAPI BinderAcquirePEImage(LPCTSTR szAssemblyPath,
- PEImage **ppPEImage,
- PEImage **ppNativeImage,
- BOOL fExplicitBindToNativeImage);
-
-STDAPI BinderAcquireImport(PEImage *pPEImage,
- IMDInternalImport **pIMetaDataAssemblyImport,
- DWORD *pdwPAFlags,
- BOOL bNativeImage);
+#include "bundle.h"
+
+STDAPI BinderAcquirePEImage(LPCTSTR szAssemblyPath,
+ PEImage **ppPEImage,
+ PEImage **ppNativeImage,
+ BOOL fExplicitBindToNativeImage,
+ BundleFileLocation bundleFileLocation);
+
+STDAPI BinderAcquireImport(PEImage *pPEImage,
+ IMDInternalImport **pIMetaDataAssemblyImport,
+ DWORD *pdwPAFlags,
+ BOOL bNativeImage);
STDAPI BinderHasNativeHeader(PEImage *pPEImage,
BOOL *result);
diff --git a/src/coreclr/src/binder/inc/assemblybinder.hpp b/src/coreclr/src/binder/inc/assemblybinder.hpp
index 1332b671edc2dd..5246676b1a47f3 100644
--- a/src/coreclr/src/binder/inc/assemblybinder.hpp
+++ b/src/coreclr/src/binder/inc/assemblybinder.hpp
@@ -18,6 +18,7 @@
#include "bindertypes.hpp"
#include "bindresult.hpp"
#include "coreclrbindercommon.h"
+#include "bundle.h"
class CLRPrivBinderAssemblyLoadContext;
class CLRPrivBinderCoreCLR;
@@ -54,7 +55,8 @@ namespace BINDER_SPACE
/* in */ BOOL fIsInGAC,
/* in */ BOOL fExplicitBindToNativeImage,
/* out */ Assembly **ppAssembly,
- /* in */ LPCTSTR szMDAssemblyPath = NULL);
+ /* in */ LPCTSTR szMDAssemblyPath = NULL,
+ /* in */ BundleFileLocation bundleFileLocation = BundleFileLocation::Invalid());
#if !defined(DACCESS_COMPILE) && !defined(CROSSGEN_COMPILE)
static HRESULT BindUsingHostAssemblyResolver (/* in */ INT_PTR pManagedAssemblyLoadContextToBindWithin,
diff --git a/src/coreclr/src/binder/inc/bindertracing.h b/src/coreclr/src/binder/inc/bindertracing.h
index 472197bf5b4e39..6fb5137349e026 100644
--- a/src/coreclr/src/binder/inc/bindertracing.h
+++ b/src/coreclr/src/binder/inc/bindertracing.h
@@ -180,7 +180,8 @@ namespace BinderTracing
AppNativeImagePaths,
AppPaths,
PlatformResourceRoots,
- SatelliteSubdirectory
+ SatelliteSubdirectory,
+ Bundle
};
void PathProbed(const WCHAR *path, PathSource source, HRESULT hr);
diff --git a/src/coreclr/src/binder/inc/clrprivbinderassemblyloadcontext.h b/src/coreclr/src/binder/inc/clrprivbinderassemblyloadcontext.h
index 09695b09fc0108..546779e3f435d7 100644
--- a/src/coreclr/src/binder/inc/clrprivbinderassemblyloadcontext.h
+++ b/src/coreclr/src/binder/inc/clrprivbinderassemblyloadcontext.h
@@ -78,7 +78,13 @@ class CLRPrivBinderAssemblyLoadContext : public AssemblyLoadContext
CLRPrivBinderCoreCLR *m_pTPABinder;
+ // A long weak GC handle to the managed AssemblyLoadContext
INT_PTR m_ptrManagedAssemblyLoadContext;
+ // A strong GC handle to the managed AssemblyLoadContext. This handle is set when the unload of the AssemblyLoadContext is initiated
+ // to keep the managed AssemblyLoadContext alive until the unload is finished.
+ // We still keep the weak handle pointing to the same managed AssemblyLoadContext so that native code can use the handle above
+ // to refer to it during the whole lifetime of the AssemblyLoadContext.
+ INT_PTR m_ptrManagedStrongAssemblyLoadContext;
LoaderAllocator* m_pAssemblyLoaderAllocator;
void* m_loaderAllocatorHandle;
diff --git a/src/coreclr/src/binder/utils.cpp b/src/coreclr/src/binder/utils.cpp
index 27f1d4c6b3f6d9..953da35d8ffa3f 100644
--- a/src/coreclr/src/binder/utils.cpp
+++ b/src/coreclr/src/binder/utils.cpp
@@ -80,7 +80,7 @@ namespace BINDER_SPACE
SString platformPathSeparator(SString::Literal, GetPlatformPathSeparator());
combinedPath.Set(pathA);
- if (!combinedPath.EndsWith(platformPathSeparator))
+ if (!combinedPath.IsEmpty() && !combinedPath.EndsWith(platformPathSeparator))
{
combinedPath.Append(platformPathSeparator);
}
diff --git a/src/coreclr/src/build.proj b/src/coreclr/src/build.proj
deleted file mode 100644
index ad5ff6e63a70a2..00000000000000
--- a/src/coreclr/src/build.proj
+++ /dev/null
@@ -1,42 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- true
- false
-
-
-
-
-
-
-
-
diff --git a/src/coreclr/src/classlibnative/bcltype/stringnative.h b/src/coreclr/src/classlibnative/bcltype/stringnative.h
index 6aea696e41af7f..c8e1fcecc9f352 100644
--- a/src/coreclr/src/classlibnative/bcltype/stringnative.h
+++ b/src/coreclr/src/classlibnative/bcltype/stringnative.h
@@ -42,10 +42,8 @@
class COMString {
public:
//
- // Search/Query Methods
+ // Query Methods
//
- static FCDECL6(INT32, CompareOrdinalEx, StringObject* strA, INT32 indexA, INT32 countA, StringObject* strB, INT32 indexB, INT32 countB);
-
static FCDECL2(FC_CHAR_RET, GetCharAt, StringObject* pThisRef, INT32 index);
static FCDECL1(INT32, Length, StringObject* pThisRef);
diff --git a/src/coreclr/src/debug/CMakeLists.txt b/src/coreclr/src/debug/CMakeLists.txt
index 03fcc8cc596065..4fd69d9a82adc3 100644
--- a/src/coreclr/src/debug/CMakeLists.txt
+++ b/src/coreclr/src/debug/CMakeLists.txt
@@ -3,6 +3,9 @@ add_subdirectory(ildbsymlib)
add_subdirectory(ee)
add_subdirectory(di)
add_subdirectory(shim)
+if(CLR_CMAKE_HOST_WIN32)
+ add_subdirectory(createdump)
+endif(CLR_CMAKE_HOST_WIN32)
if(FEATURE_SINGLE_FILE_DIAGNOSTICS)
add_subdirectory(runtimeinfo)
endif(FEATURE_SINGLE_FILE_DIAGNOSTICS)
diff --git a/src/coreclr/src/debug/createdump/CMakeLists.txt b/src/coreclr/src/debug/createdump/CMakeLists.txt
index f642159fb705ba..0915212448e6d8 100644
--- a/src/coreclr/src/debug/createdump/CMakeLists.txt
+++ b/src/coreclr/src/debug/createdump/CMakeLists.txt
@@ -2,53 +2,77 @@ project(createdump)
set(CMAKE_INCLUDE_CURRENT_DIR ON)
-include(configure.cmake)
-
-# Set the RPATH of createdump so that it can find dependencies without needing to set LD_LIBRARY_PATH
-# For more information: http://www.cmake.org/Wiki/CMake_RPATH_handling.
-if (CORECLR_SET_RPATH)
- set(CMAKE_BUILD_WITH_INSTALL_RPATH TRUE)
- if(CLR_CMAKE_HOST_OSX)
- set(CMAKE_INSTALL_RPATH "@loader_path")
- else()
- set(CMAKE_INSTALL_RPATH "\$ORIGIN")
- endif(CLR_CMAKE_HOST_OSX)
-endif (CORECLR_SET_RPATH)
+include_directories(BEFORE ${VM_DIR})
remove_definitions(-DUNICODE)
remove_definitions(-D_UNICODE)
-include_directories(BEFORE ${VM_DIR})
+if(CLR_CMAKE_HOST_WIN32)
+
+ set(CREATEDUMP_SOURCES
+ main.cpp
+ createdumpwindows.cpp
+ createdump.rc
+ )
+
+ _add_executable(createdump
+ ${CREATEDUMP_SOURCES}
+ )
+
+ target_link_libraries(createdump
+ kernel32.lib
+ ${STATIC_MT_CRT_LIB}
+ advapi32.lib
+ version.lib
+ dbghelp.lib
+ )
+
+else(CLR_CMAKE_HOST_WIN32)
+
+ include(configure.cmake)
+
+ # Set the RPATH of createdump so that it can find dependencies without needing to set LD_LIBRARY_PATH
+ # For more information: http://www.cmake.org/Wiki/CMake_RPATH_handling.
+ if (CORECLR_SET_RPATH)
+ set(CMAKE_BUILD_WITH_INSTALL_RPATH TRUE)
+ if(CLR_CMAKE_HOST_OSX)
+ set(CMAKE_INSTALL_RPATH "@loader_path")
+ else()
+ set(CMAKE_INSTALL_RPATH "\$ORIGIN")
+ endif(CLR_CMAKE_HOST_OSX)
+ endif (CORECLR_SET_RPATH)
+
+ add_definitions(-DPAL_STDCPP_COMPAT)
-add_definitions(-DPAL_STDCPP_COMPAT)
+ set(CREATEDUMP_SOURCES
+ createdump.cpp
+ crashinfo.cpp
+ threadinfo.cpp
+ datatarget.cpp
+ dumpwriter.cpp
+ )
-set(CREATEDUMP_SOURCES
- createdump.cpp
- crashinfo.cpp
- threadinfo.cpp
- datatarget.cpp
- dumpwriter.cpp
-)
+ _add_library(createdump_lib
+ ${CREATEDUMP_SOURCES}
+ )
-_add_library(createdump_lib
- ${CREATEDUMP_SOURCES}
-)
+ _add_executable(createdump
+ main.cpp
+ ${PAL_REDEFINES_FILE}
+ )
-_add_executable(createdump
- main.cpp
- ${PAL_REDEFINES_FILE}
-)
+ add_dependencies(createdump pal_redefines_file)
-add_dependencies(createdump pal_redefines_file)
+ target_link_libraries(createdump
+ createdump_lib
+ corguids
+ dbgutil
+ # share the PAL in the dac module
+ mscordaccore
+ )
-target_link_libraries(createdump
- createdump_lib
- corguids
- dbgutil
- # share the PAL in the dac module
- mscordaccore
-)
+ add_dependencies(createdump mscordaccore)
-add_dependencies(createdump mscordaccore)
+endif(CLR_CMAKE_HOST_WIN32)
install_clr(TARGETS createdump ADDITIONAL_DESTINATION sharedFramework)
diff --git a/src/coreclr/src/debug/createdump/createdump.cpp b/src/coreclr/src/debug/createdump/createdump.cpp
index a4a21f4df3c204..8299054d10b4b0 100644
--- a/src/coreclr/src/debug/createdump/createdump.cpp
+++ b/src/coreclr/src/debug/createdump/createdump.cpp
@@ -7,37 +7,21 @@
bool g_diagnostics = false;
//
-// The common create dump code
+// The Linux create dump code
//
bool
-CreateDumpCommon(const char* dumpPathTemplate, MINIDUMP_TYPE minidumpType, CrashInfo* crashInfo)
+CreateDump(const char* dumpPath, int pid, MINIDUMP_TYPE minidumpType)
{
+ ReleaseHolder dataTarget = new DumpDataTarget(pid);
+ ReleaseHolder crashInfo = new CrashInfo(pid, dataTarget, false);
ReleaseHolder dumpWriter = new DumpWriter(*crashInfo);
bool result = false;
- ArrayHolder dumpPath = new char[PATH_MAX];
- snprintf(dumpPath, PATH_MAX, dumpPathTemplate, crashInfo->Pid());
-
- const char* dumpType = "minidump";
- switch (minidumpType)
+ // The initialize the data target's ReadVirtual support (opens /proc/$pid/mem)
+ if (!dataTarget->Initialize(crashInfo))
{
- case MiniDumpWithPrivateReadWriteMemory:
- dumpType = "minidump with heap";
- break;
-
- case MiniDumpFilterTriage:
- dumpType = "triage minidump";
- break;
-
- case MiniDumpWithFullMemory:
- dumpType = "full dump";
- break;
-
- default:
- break;
+ goto exit;
}
- printf("Writing %s to file %s\n", dumpType, (char*)dumpPath);
-
// Suspend all the threads in the target process and build the list of threads
if (!crashInfo->EnumerateAndSuspendThreads())
{
@@ -61,13 +45,3 @@ CreateDumpCommon(const char* dumpPathTemplate, MINIDUMP_TYPE minidumpType, Crash
crashInfo->ResumeThreads();
return result;
}
-
-//
-// Entry point for SOS createdump command
-//
-bool
-CreateDumpForSOS(const char* programPath, const char* dumpPathTemplate, pid_t pid, MINIDUMP_TYPE minidumpType, ICLRDataTarget* dataTarget)
-{
- ReleaseHolder crashInfo = new CrashInfo(pid, dataTarget, true);
- return CreateDumpCommon(dumpPathTemplate, minidumpType, crashInfo);
-}
diff --git a/src/coreclr/src/debug/createdump/createdump.h b/src/coreclr/src/debug/createdump/createdump.h
index 7627fb6e8611b2..96afcab29199cf 100644
--- a/src/coreclr/src/debug/createdump/createdump.h
+++ b/src/coreclr/src/debug/createdump/createdump.h
@@ -11,16 +11,22 @@
extern bool g_diagnostics;
+#ifdef HOST_UNIX
#define TRACE(args...) \
if (g_diagnostics) { \
printf(args); \
}
+#else
+#define TRACE(args, ...)
+#endif
+#ifdef HOST_UNIX
#include "config.h"
+#endif
+#include
#include
#include
-#include
#include
#include
#include
@@ -34,11 +40,12 @@ extern bool g_diagnostics;
#include
#include
#include
-#include
typedef int T_CONTEXT;
#include
#include
#include
+#ifdef HOST_UNIX
+#include
#include
#include
#include
@@ -56,13 +63,24 @@ typedef int T_CONTEXT;
#include
#define __STDC_FORMAT_MACROS
#include
+#else
+#include
+#endif
#include
#include
#include
#include
#include
+#ifdef HOST_UNIX
#include "datatarget.h"
#include "threadinfo.h"
#include "memoryregion.h"
#include "crashinfo.h"
#include "dumpwriter.h"
+#endif
+
+#ifndef MAX_LONGPATH
+#define MAX_LONGPATH 1024
+#endif
+
+bool CreateDump(const char* dumpPathTemplate, int pid, MINIDUMP_TYPE minidumpType);
diff --git a/src/coreclr/src/debug/createdump/createdump.rc b/src/coreclr/src/debug/createdump/createdump.rc
new file mode 100644
index 00000000000000..f5319668e3395d
--- /dev/null
+++ b/src/coreclr/src/debug/createdump/createdump.rc
@@ -0,0 +1,8 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
+#define FX_VER_FILEDESCRIPTION_STR "Microsoft .NET Runtime Crash Dump Generator\0"
+
+#include
+#include
diff --git a/src/coreclr/src/debug/createdump/createdumpwindows.cpp b/src/coreclr/src/debug/createdump/createdumpwindows.cpp
new file mode 100644
index 00000000000000..d806330724eb0a
--- /dev/null
+++ b/src/coreclr/src/debug/createdump/createdumpwindows.cpp
@@ -0,0 +1,64 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
+#include "createdump.h"
+
+bool g_diagnostics = false;
+
+//
+// The Windows create dump code
+//
+bool
+CreateDump(const char* dumpPath, int pid, MINIDUMP_TYPE minidumpType)
+{
+ HANDLE hFile = INVALID_HANDLE_VALUE;
+ HANDLE hProcess = NULL;
+ bool result = false;
+
+ hProcess = OpenProcess(PROCESS_QUERY_INFORMATION | PROCESS_VM_READ, FALSE, pid);
+ if (hProcess == NULL)
+ {
+ fprintf(stderr, "Invalid process id '%d' error %d\n", pid, GetLastError());
+ goto exit;
+ }
+
+ hFile = CreateFileA(dumpPath, GENERIC_READ | GENERIC_WRITE, 0, NULL, CREATE_ALWAYS, FILE_ATTRIBUTE_NORMAL, NULL);
+ if (hFile == INVALID_HANDLE_VALUE)
+ {
+ fprintf(stderr, "Invalid dump path '%s' error %d\n", dumpPath, GetLastError());
+ goto exit;
+ }
+
+ // Retry the write dump on ERROR_PARTIAL_COPY
+ for (int i = 0; i < 5; i++)
+ {
+ if (MiniDumpWriteDump(hProcess, pid, hFile, minidumpType, NULL, NULL, NULL))
+ {
+ result = true;
+ break;
+ }
+ else
+ {
+ int err = GetLastError();
+ if (err != HRESULT_FROM_WIN32(ERROR_PARTIAL_COPY))
+ {
+ fprintf(stderr, "Write dump FAILED 0x%08x\n", err);
+ break;
+ }
+ }
+ }
+
+exit:
+ if (hProcess != NULL)
+ {
+ CloseHandle(hProcess);
+ }
+
+ if (hFile != INVALID_HANDLE_VALUE)
+ {
+ CloseHandle(hFile);
+ }
+
+ return result;
+}
diff --git a/src/coreclr/src/debug/createdump/main.cpp b/src/coreclr/src/debug/createdump/main.cpp
index ab853be62fbc97..dab69df6305782 100644
--- a/src/coreclr/src/debug/createdump/main.cpp
+++ b/src/coreclr/src/debug/createdump/main.cpp
@@ -4,32 +4,48 @@
#include "createdump.h"
+#ifdef HOST_WINDOWS
+#define DEFAULT_DUMP_PATH "%TEMP%\\"
+#define DEFAULT_DUMP_TEMPLATE "dump.%d.dmp"
+#else
+#define DEFAULT_DUMP_PATH "/tmp/"
+#define DEFAULT_DUMP_TEMPLATE "coredump.%d"
+#endif
+
const char* g_help = "createdump [options] pid\n"
-"-f, --name - dump path and file name. The pid can be placed in the name with %d. The default is '/tmp/coredump.%d'\n"
+"-f, --name - dump path and file name. The pid can be placed in the name with %d. The default is '" DEFAULT_DUMP_PATH DEFAULT_DUMP_TEMPLATE "'\n"
"-n, --normal - create minidump.\n"
"-h, --withheap - create minidump with heap (default).\n"
"-t, --triage - create triage minidump.\n"
"-u, --full - create full core dump.\n"
"-d, --diag - enable diagnostic messages.\n";
-bool CreateDumpCommon(const char* dumpPathTemplate, MINIDUMP_TYPE minidumpType, CrashInfo* crashInfo);
+bool CreateDump(const char* dumpPathTemplate, int pid, MINIDUMP_TYPE minidumpType);
//
// Main entry point
//
int __cdecl main(const int argc, const char* argv[])
{
- MINIDUMP_TYPE minidumpType = MiniDumpWithPrivateReadWriteMemory;
+ MINIDUMP_TYPE minidumpType = (MINIDUMP_TYPE)(MiniDumpWithPrivateReadWriteMemory |
+ MiniDumpWithDataSegs |
+ MiniDumpWithHandleData |
+ MiniDumpWithUnloadedModules |
+ MiniDumpWithFullMemoryInfo |
+ MiniDumpWithThreadInfo |
+ MiniDumpWithTokenInformation);
const char* dumpPathTemplate = nullptr;
- pid_t pid = 0;
+ int exitCode = 0;
+ int pid = 0;
- int exitCode = PAL_InitializeDLL();
+#ifdef HOST_UNIX
+ exitCode = PAL_InitializeDLL();
if (exitCode != 0)
{
fprintf(stderr, "PAL initialization FAILED %d\n", exitCode);
return exitCode;
}
-
+#endif
// Parse the command line options and target pid
argv++;
@@ -43,26 +59,40 @@ int __cdecl main(const int argc, const char* argv[])
}
else if ((strcmp(*argv, "-n") == 0) || (strcmp(*argv, "--normal") == 0))
{
- minidumpType = MiniDumpNormal;
+ minidumpType = (MINIDUMP_TYPE)(MiniDumpNormal |
+ MiniDumpWithThreadInfo);
}
else if ((strcmp(*argv, "-h") == 0) || (strcmp(*argv, "--withheap") == 0))
{
- minidumpType = MiniDumpWithPrivateReadWriteMemory;
+ minidumpType = (MINIDUMP_TYPE)(MiniDumpWithPrivateReadWriteMemory |
+ MiniDumpWithDataSegs |
+ MiniDumpWithHandleData |
+ MiniDumpWithUnloadedModules |
+ MiniDumpWithFullMemoryInfo |
+ MiniDumpWithThreadInfo |
+ MiniDumpWithTokenInformation);
}
else if ((strcmp(*argv, "-t") == 0) || (strcmp(*argv, "--triage") == 0))
{
- minidumpType = MiniDumpFilterTriage;
+ minidumpType = (MINIDUMP_TYPE)(MiniDumpFilterTriage |
+ MiniDumpWithThreadInfo);
}
else if ((strcmp(*argv, "-u") == 0) || (strcmp(*argv, "--full") == 0))
{
- minidumpType = MiniDumpWithFullMemory;
+ minidumpType = (MINIDUMP_TYPE)(MiniDumpWithFullMemory |
+ MiniDumpWithDataSegs |
+ MiniDumpWithHandleData |
+ MiniDumpWithUnloadedModules |
+ MiniDumpWithFullMemoryInfo |
+ MiniDumpWithThreadInfo |
+ MiniDumpWithTokenInformation);
}
else if ((strcmp(*argv, "-d") == 0) || (strcmp(*argv, "--diag") == 0))
{
g_diagnostics = true;
}
else {
- pid = atoll(*argv);
+ pid = atoi(*argv);
}
argv++;
}
@@ -70,15 +100,17 @@ int __cdecl main(const int argc, const char* argv[])
if (pid != 0)
{
+ ArrayHolder tmpPath = new char[MAX_LONGPATH];
+ ArrayHolder dumpPath = new char[MAX_LONGPATH];
+
if (dumpPathTemplate == nullptr)
{
- char tmpPath[MAX_LONGPATH];
if (::GetTempPathA(MAX_LONGPATH, tmpPath) == 0)
{
fprintf(stderr, "GetTempPath failed (0x%08x)", ::GetLastError());
return ::GetLastError();
}
- exitCode = strcat_s(tmpPath, MAX_LONGPATH, "coredump.%d");
+ exitCode = strcat_s(tmpPath, MAX_LONGPATH, DEFAULT_DUMP_TEMPLATE);
if (exitCode != 0)
{
fprintf(stderr, "strcat_s failed (%d)", exitCode);
@@ -86,16 +118,32 @@ int __cdecl main(const int argc, const char* argv[])
}
dumpPathTemplate = tmpPath;
}
- ReleaseHolder dataTarget = new DumpDataTarget(pid);
- ReleaseHolder crashInfo = new CrashInfo(pid, dataTarget, false);
- // The initialize the data target's ReadVirtual support (opens /proc/$pid/mem)
- if (dataTarget->Initialize(crashInfo))
+ snprintf(dumpPath, MAX_LONGPATH, dumpPathTemplate, pid);
+
+ const char* dumpType = "minidump";
+ switch (minidumpType)
{
- if (!CreateDumpCommon(dumpPathTemplate, minidumpType, crashInfo))
- {
- exitCode = -1;
- }
+ case MiniDumpWithPrivateReadWriteMemory:
+ dumpType = "minidump with heap";
+ break;
+
+ case MiniDumpFilterTriage:
+ dumpType = "triage minidump";
+ break;
+
+ case MiniDumpWithFullMemory:
+ dumpType = "full dump";
+ break;
+
+ default:
+ break;
+ }
+ printf("Writing %s to file %s\n", dumpType, (char*)dumpPath);
+
+ if (CreateDump(dumpPath, pid, minidumpType))
+ {
+ printf("Dump successfully written\n");
}
else
{
@@ -108,6 +156,8 @@ int __cdecl main(const int argc, const char* argv[])
fprintf(stderr, "%s", g_help);
exitCode = -1;
}
+#ifdef HOST_UNIX
PAL_TerminateEx(exitCode);
+#endif
return exitCode;
}
diff --git a/src/coreclr/src/debug/daccess/CMakeLists.txt b/src/coreclr/src/debug/daccess/CMakeLists.txt
index b56c37c623e872..b683d762885b47 100644
--- a/src/coreclr/src/debug/daccess/CMakeLists.txt
+++ b/src/coreclr/src/debug/daccess/CMakeLists.txt
@@ -5,6 +5,7 @@ include_directories(BEFORE ${VM_DIR}/${ARCH_SOURCES_DIR})
include_directories(BEFORE ${CMAKE_CURRENT_SOURCE_DIR})
include_directories(${CLR_DIR}/src/debug/ee)
include_directories(${CLR_DIR}/src/gcdump)
+include_directories(${CLR_DIR}/src/interop/inc)
if(CLR_CMAKE_HOST_UNIX)
include_directories(${GENERATED_INCLUDE_DIR})
@@ -41,7 +42,7 @@ target_precompile_header(TARGET daccess HEADER stdafx.h)
add_dependencies(daccess eventing_headers)
-if(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+if(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
add_definitions(-DUSE_DAC_TABLE_RVA)
add_custom_command(
@@ -63,4 +64,4 @@ if(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
)
add_dependencies(daccess dactablerva_header)
-endif(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+endif(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
diff --git a/src/coreclr/src/debug/daccess/daccess.cpp b/src/coreclr/src/debug/daccess/daccess.cpp
index a05d4f09d0d689..444114587c2ab9 100644
--- a/src/coreclr/src/debug/daccess/daccess.cpp
+++ b/src/coreclr/src/debug/daccess/daccess.cpp
@@ -8252,7 +8252,7 @@ void CALLBACK DacHandleWalker::EnumCallbackSOS(PTR_UNCHECKED_OBJECTREF handle, u
if (param->Type == HNDTYPE_DEPENDENT)
data.Secondary = GetDependentHandleSecondary(handle.GetAddr()).GetAddr();
#ifdef FEATURE_COMINTEROP
- else if (param->Type == HNDTYPE_WEAK_WINRT)
+ else if (param->Type == HNDTYPE_WEAK_NATIVE_COM)
data.Secondary = HndGetHandleExtraInfo(handle.GetAddr());
#endif // FEATURE_COMINTEROP
else
diff --git a/src/coreclr/src/debug/daccess/dacdbiimpl.cpp b/src/coreclr/src/debug/daccess/dacdbiimpl.cpp
index 905698ad4fd71e..e3152652fb5f90 100644
--- a/src/coreclr/src/debug/daccess/dacdbiimpl.cpp
+++ b/src/coreclr/src/debug/daccess/dacdbiimpl.cpp
@@ -7491,8 +7491,8 @@ UINT32 DacRefWalker::GetHandleWalkerMask()
if ((mHandleMask & CorHandleWeakRefCount) || (mHandleMask & CorHandleStrongRefCount))
result |= (1 << HNDTYPE_REFCOUNTED);
- if (mHandleMask & CorHandleWeakWinRT)
- result |= (1 << HNDTYPE_WEAK_WINRT);
+ if (mHandleMask & CorHandleWeakNativeCom)
+ result |= (1 << HNDTYPE_WEAK_NATIVE_COM);
#endif // FEATURE_COMINTEROP
if (mHandleMask & CorHandleStrongDependent)
@@ -7667,8 +7667,8 @@ void CALLBACK DacHandleWalker::EnumCallbackDac(PTR_UNCHECKED_OBJECTREF handle, u
data.i64ExtraData = refCnt;
break;
- case HNDTYPE_WEAK_WINRT:
- data.dwType = (DWORD)CorHandleWeakWinRT;
+ case HNDTYPE_WEAK_NATIVE_COM:
+ data.dwType = (DWORD)CorHandleWeakNativeCom;
break;
#endif
diff --git a/src/coreclr/src/debug/daccess/dacimpl.h b/src/coreclr/src/debug/daccess/dacimpl.h
index 958adb1fd91787..29183751fb53e9 100644
--- a/src/coreclr/src/debug/daccess/dacimpl.h
+++ b/src/coreclr/src/debug/daccess/dacimpl.h
@@ -1456,6 +1456,10 @@ class ClrDataAccess
PTR_IUnknown DACGetCOMIPFromCCW(PTR_ComCallWrapper pCCW, int vtableIndex);
#endif
+#ifdef FEATURE_COMWRAPPERS
+ HRESULT DACTryGetComWrappersObjectFromCCW(CLRDATA_ADDRESS ccwPtr, OBJECTREF* objRef);
+#endif
+
static LONG s_procInit;
public:
diff --git a/src/coreclr/src/debug/daccess/enummem.cpp b/src/coreclr/src/debug/daccess/enummem.cpp
index 6a3feec6cf9f5a..5c5f402b99ad06 100644
--- a/src/coreclr/src/debug/daccess/enummem.cpp
+++ b/src/coreclr/src/debug/daccess/enummem.cpp
@@ -1298,7 +1298,7 @@ HRESULT ClrDataAccess::EnumMemDumpAllThreadsStack(CLRDataEnumMemoryFlags flags)
}
-#ifdef FEATURE_COMINTEROP
+#if defined(FEATURE_COMINTEROP) || defined(FEATURE_COMWRAPPERS)
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//
// WinRT stowed exception holds the (CCW)pointer to a managed exception object.
@@ -1431,11 +1431,26 @@ HRESULT ClrDataAccess::DumpStowedExceptionObject(CLRDataEnumMemoryFlags flags, C
if (ccwPtr == NULL)
return S_OK;
+ OBJECTREF managedExceptionObject = NULL;
+
+#ifdef FEATURE_COMINTEROP
// dump the managed exception object wrapped in CCW
// memory of the CCW object itself is dumped later by DacInstanceManager::DumpAllInstances
DacpCCWData ccwData;
GetCCWData(ccwPtr, &ccwData); // this call collects some memory implicitly
- DumpManagedExcepObject(flags, OBJECTREF(TO_TADDR(ccwData.managedObject)));
+ managedExceptionObject = OBJECTREF(CLRDATA_ADDRESS_TO_TADDR(ccwData.managedObject));
+#endif
+#ifdef FEATURE_COMWRAPPERS
+ if (managedExceptionObject == NULL)
+ {
+ OBJECTREF wrappedObjAddress;
+ if (DACTryGetComWrappersObjectFromCCW(ccwPtr, &wrappedObjAddress) == S_OK)
+ {
+ managedExceptionObject = wrappedObjAddress;
+ }
+ }
+#endif
+ DumpManagedExcepObject(flags, managedExceptionObject);
// dump memory of the 2nd slot in the CCW's vtable
// this is used in DACGetCCWFromAddress to identify if the passed in pointer is a valid CCW.
@@ -1450,7 +1465,8 @@ HRESULT ClrDataAccess::DumpStowedExceptionObject(CLRDataEnumMemoryFlags flags, C
CATCH_ALL_EXCEPT_RETHROW_COR_E_OPERATIONCANCELLED
(
- ReportMem(vTableAddress + sizeof(PBYTE)* TEAR_OFF_SLOT, sizeof(TADDR));
+ ReportMem(vTableAddress, sizeof(TADDR)); // Report the QI slot on the vtable for ComWrappers
+ ReportMem(vTableAddress + sizeof(PBYTE) * TEAR_OFF_SLOT, sizeof(TADDR)); // Report the AddRef slot on the vtable for built-in CCWs
);
return S_OK;
diff --git a/src/coreclr/src/debug/daccess/request.cpp b/src/coreclr/src/debug/daccess/request.cpp
index 2be663ebd77ea9..8fc4896abdcd11 100644
--- a/src/coreclr/src/debug/daccess/request.cpp
+++ b/src/coreclr/src/debug/daccess/request.cpp
@@ -20,6 +20,8 @@
#include
#endif // FEATURE_COMINTEROP
+#include
+
#ifndef TARGET_UNIX
// It is unfortunate having to include this header just to get the definition of GenericModeBlock
#include
@@ -3253,7 +3255,7 @@ HRESULT ClrDataAccess::GetHandleEnum(ISOSHandleEnum **ppHandleEnum)
unsigned int types[] = {HNDTYPE_WEAK_SHORT, HNDTYPE_WEAK_LONG, HNDTYPE_STRONG, HNDTYPE_PINNED, HNDTYPE_VARIABLE, HNDTYPE_DEPENDENT,
HNDTYPE_ASYNCPINNED, HNDTYPE_SIZEDREF,
#ifdef FEATURE_COMINTEROP
- HNDTYPE_REFCOUNTED, HNDTYPE_WEAK_WINRT
+ HNDTYPE_REFCOUNTED, HNDTYPE_WEAK_NATIVE_COM
#endif
};
@@ -3291,7 +3293,7 @@ HRESULT ClrDataAccess::GetHandleEnumForGC(unsigned int gen, ISOSHandleEnum **ppH
unsigned int types[] = {HNDTYPE_WEAK_SHORT, HNDTYPE_WEAK_LONG, HNDTYPE_STRONG, HNDTYPE_PINNED, HNDTYPE_VARIABLE, HNDTYPE_DEPENDENT,
HNDTYPE_ASYNCPINNED, HNDTYPE_SIZEDREF,
#ifdef FEATURE_COMINTEROP
- HNDTYPE_REFCOUNTED, HNDTYPE_WEAK_WINRT
+ HNDTYPE_REFCOUNTED, HNDTYPE_WEAK_NATIVE_COM
#endif
};
@@ -4065,6 +4067,76 @@ PTR_IUnknown ClrDataAccess::DACGetCOMIPFromCCW(PTR_ComCallWrapper pCCW, int vtab
}
#endif
+#ifdef FEATURE_COMWRAPPERS
+HRESULT ClrDataAccess::DACTryGetComWrappersObjectFromCCW(CLRDATA_ADDRESS ccwPtr, OBJECTREF* objRef)
+{
+ if (ccwPtr == 0 || objRef == NULL)
+ return E_INVALIDARG;
+
+ SOSDacEnter();
+
+ // Read CCWs QI address and compare it to the managed object wrapper's implementation.
+ ULONG32 bytesRead = 0;
+ TADDR ccw = CLRDATA_ADDRESS_TO_TADDR(ccwPtr);
+ TADDR vTableAddress = NULL;
+ IfFailGo(m_pTarget->ReadVirtual(ccw, (PBYTE)&vTableAddress, sizeof(TADDR), &bytesRead));
+ if (bytesRead != sizeof(TADDR)
+ || vTableAddress == NULL)
+ {
+ hr = E_FAIL;
+ goto ErrExit;
+ }
+
+ TADDR qiAddress = NULL;
+ IfFailGo(m_pTarget->ReadVirtual(vTableAddress, (PBYTE)&qiAddress, sizeof(TADDR), &bytesRead));
+ if (bytesRead != sizeof(TADDR)
+ || qiAddress == NULL)
+ {
+ hr = E_FAIL;
+ goto ErrExit;
+ }
+
+
+#ifdef TARGET_ARM
+ // clear the THUMB bit on qiAddress before comparing with known vtable entry
+ qiAddress &= ~THUMB_CODE;
+#endif
+
+ if (qiAddress != GetEEFuncEntryPoint(ManagedObjectWrapper_QueryInterface))
+ {
+ hr = E_FAIL;
+ goto ErrExit;
+ }
+
+ // Mask the "dispatch pointer" to get a double pointer to the ManagedObjectWrapper
+ TADDR managedObjectWrapperPtrPtr = ccw & InteropLib::ABI::DispatchThisPtrMask;
+
+ // Return ManagedObjectWrapper as an OBJECTHANDLE. (The OBJECTHANDLE is guaranteed to live at offset 0).
+ TADDR managedObjectWrapperPtr;
+ IfFailGo(m_pTarget->ReadVirtual(managedObjectWrapperPtrPtr, (PBYTE)&managedObjectWrapperPtr, sizeof(TADDR), &bytesRead));
+ if (bytesRead != sizeof(TADDR))
+ {
+ hr = E_FAIL;
+ goto ErrExit;
+ }
+
+ OBJECTHANDLE handle;
+ IfFailGo(m_pTarget->ReadVirtual(managedObjectWrapperPtr, (PBYTE)&handle, sizeof(OBJECTHANDLE), &bytesRead));
+ if (bytesRead != sizeof(OBJECTHANDLE))
+ {
+ hr = E_FAIL;
+ goto ErrExit;
+ }
+
+ *objRef = ObjectFromHandle(handle);
+
+ SOSDacLeave();
+
+ return S_OK;
+
+ErrExit: return hr;
+}
+#endif
HRESULT ClrDataAccess::GetCCWData(CLRDATA_ADDRESS ccw, struct DacpCCWData *ccwData)
{
diff --git a/src/coreclr/src/debug/debug-pal/CMakeLists.txt b/src/coreclr/src/debug/debug-pal/CMakeLists.txt
index b06e46092caba1..ac1e48fb5fb4d8 100644
--- a/src/coreclr/src/debug/debug-pal/CMakeLists.txt
+++ b/src/coreclr/src/debug/debug-pal/CMakeLists.txt
@@ -8,11 +8,17 @@ if(CLR_CMAKE_HOST_WIN32)
add_definitions(-DWIN32_LEAN_AND_MEAN)
include_directories(../../inc) #needed for warning control
- set(TWO_WAY_PIPE_SOURCES
- win/diagnosticsipc.cpp
- win/twowaypipe.cpp
- win/processdescriptor.cpp
- )
+ if(CLR_CMAKE_TARGET_WIN32)
+ set(TWO_WAY_PIPE_SOURCES
+ win/diagnosticsipc.cpp
+ win/twowaypipe.cpp
+ win/processdescriptor.cpp
+ )
+ else(CLR_CMAKE_TARGET_WIN32)
+ set(TWO_WAY_PIPE_SOURCES
+ dummy/twowaypipe.cpp
+ )
+ endif(CLR_CMAKE_TARGET_WIN32)
endif(CLR_CMAKE_HOST_WIN32)
if(CLR_CMAKE_HOST_UNIX)
diff --git a/src/coreclr/src/debug/debug-pal/dummy/twowaypipe.cpp b/src/coreclr/src/debug/debug-pal/dummy/twowaypipe.cpp
new file mode 100644
index 00000000000000..ed73fd75cf1731
--- /dev/null
+++ b/src/coreclr/src/debug/debug-pal/dummy/twowaypipe.cpp
@@ -0,0 +1,76 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
+#include
+#include "twowaypipe.h"
+
+// This file contains a dummy implementation of the simple IPC mechanism - bidirectional named pipe.
+// It is used for the cross OS DBI where IPC is not supported.
+
+
+// Creates a server side of the pipe.
+// Id is used to create pipes names and uniquely identify the pipe on the machine.
+// true - success, false - failure (use GetLastError() for more details)
+bool TwoWayPipe::CreateServer(const ProcessDescriptor& pd)
+{
+ return false;
+}
+
+
+// Connects to a previously opened server side of the pipe.
+// Id is used to locate the pipe on the machine.
+// true - success, false - failure (use GetLastError() for more details)
+bool TwoWayPipe::Connect(const ProcessDescriptor& pd)
+{
+ return false;
+}
+
+// Waits for incoming client connections, assumes GetState() == Created
+// true - success, false - failure (use GetLastError() for more details)
+bool TwoWayPipe::WaitForConnection()
+{
+ return false;
+}
+
+// Reads data from pipe. Returns number of bytes read or a negative number in case of an error.
+// use GetLastError() for more details
+int TwoWayPipe::Read(void *buffer, DWORD bufferSize)
+{
+ return -1;
+}
+
+// Writes data to pipe. Returns number of bytes written or a negative number in case of an error.
+// use GetLastError() for more details
+int TwoWayPipe::Write(const void *data, DWORD dataSize)
+{
+ return -1;
+}
+
+// Disconnect server or client side of the pipe.
+// true - success, false - failure (use GetLastError() for more details)
+bool TwoWayPipe::Disconnect()
+{
+ return false;
+}
+
+// Connects to a one sided pipe previously created by CreateOneWayPipe.
+// In order to successfully connect id and inbound flag should be the same.
+HANDLE TwoWayPipe::OpenOneWayPipe(DWORD id, bool inbound)
+{
+ return NULL;
+}
+
+
+// Creates a one way pipe, id and inboud flag are used for naming.
+// Created pipe is supposed to be connected to by OpenOneWayPipe.
+HANDLE TwoWayPipe::CreateOneWayPipe(DWORD id, bool inbound)
+{
+ return NULL;
+}
+
+// Used by debugger side (RS) to cleanup the target (LS) named pipes
+// and semaphores when the debugger detects the debuggee process exited.
+void TwoWayPipe::CleanupTargetProcess()
+{
+}
diff --git a/src/coreclr/src/debug/debug-pal/unix/diagnosticsipc.cpp b/src/coreclr/src/debug/debug-pal/unix/diagnosticsipc.cpp
index e70f35884f510a..046350317cde15 100644
--- a/src/coreclr/src/debug/debug-pal/unix/diagnosticsipc.cpp
+++ b/src/coreclr/src/debug/debug-pal/unix/diagnosticsipc.cpp
@@ -12,13 +12,20 @@
#include "diagnosticsipc.h"
#include "processdescriptor.h"
-IpcStream::DiagnosticsIpc::DiagnosticsIpc(const int serverSocket, sockaddr_un *const pServerAddress) :
+#if __GNUC__
+ #include
+#else
+ #include
+#endif // __GNUC__
+
+IpcStream::DiagnosticsIpc::DiagnosticsIpc(const int serverSocket, sockaddr_un *const pServerAddress, ConnectionMode mode) :
+ mode(mode),
_serverSocket(serverSocket),
_pServerAddress(new sockaddr_un),
- _isClosed(false)
+ _isClosed(false),
+ _isListening(false)
{
_ASSERTE(_pServerAddress != nullptr);
- _ASSERTE(_serverSocket != -1);
_ASSERTE(pServerAddress != nullptr);
if (_pServerAddress == nullptr || pServerAddress == nullptr)
@@ -32,24 +39,8 @@ IpcStream::DiagnosticsIpc::~DiagnosticsIpc()
delete _pServerAddress;
}
-IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const pIpcName, ErrorCallback callback)
+IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const pIpcName, ConnectionMode mode, ErrorCallback callback)
{
-#ifdef __APPLE__
- mode_t prev_mask = umask(~(S_IRUSR | S_IWUSR)); // This will set the default permission bit to 600
-#endif // __APPLE__
-
- const int serverSocket = ::socket(AF_UNIX, SOCK_STREAM, 0);
- if (serverSocket == -1)
- {
- if (callback != nullptr)
- callback(strerror(errno), errno);
-#ifdef __APPLE__
- umask(prev_mask);
-#endif // __APPLE__
- _ASSERTE(!"Failed to create diagnostics IPC socket.");
- return nullptr;
- }
-
sockaddr_un serverAddress{};
serverAddress.sun_family = AF_UNIX;
@@ -71,6 +62,24 @@ IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const p
"socket");
}
+ if (mode == ConnectionMode::CLIENT)
+ return new IpcStream::DiagnosticsIpc(-1, &serverAddress, ConnectionMode::CLIENT);
+
+#ifdef __APPLE__
+ mode_t prev_mask = umask(~(S_IRUSR | S_IWUSR)); // This will set the default permission bit to 600
+#endif // __APPLE__
+
+ const int serverSocket = ::socket(AF_UNIX, SOCK_STREAM, 0);
+ if (serverSocket == -1)
+ {
+ if (callback != nullptr)
+ callback(strerror(errno), errno);
+#ifdef __APPLE__
+ umask(prev_mask);
+#endif // __APPLE__
+ _ASSERTE(!"Failed to create diagnostics IPC socket.");
+ return nullptr;
+ }
#ifndef __APPLE__
if (fchmod(serverSocket, S_IRUSR | S_IWUSR) == -1)
@@ -99,33 +108,52 @@ IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const p
return nullptr;
}
- const int fSuccessfulListen = ::listen(serverSocket, /* backlog */ 255);
+#ifdef __APPLE__
+ umask(prev_mask);
+#endif // __APPLE__
+
+ return new IpcStream::DiagnosticsIpc(serverSocket, &serverAddress, mode);
+}
+
+bool IpcStream::DiagnosticsIpc::Listen(ErrorCallback callback)
+{
+ _ASSERTE(mode == ConnectionMode::SERVER);
+ if (mode != ConnectionMode::SERVER)
+ {
+ if (callback != nullptr)
+ callback("Cannot call Listen on a client connection", -1);
+ return false;
+ }
+
+ if (_isListening)
+ return true;
+
+ const int fSuccessfulListen = ::listen(_serverSocket, /* backlog */ 255);
if (fSuccessfulListen == -1)
{
if (callback != nullptr)
callback(strerror(errno), errno);
_ASSERTE(fSuccessfulListen != -1);
- const int fSuccessUnlink = ::unlink(serverAddress.sun_path);
+ const int fSuccessUnlink = ::unlink(_pServerAddress->sun_path);
_ASSERTE(fSuccessUnlink != -1);
- const int fSuccessClose = ::close(serverSocket);
+ const int fSuccessClose = ::close(_serverSocket);
_ASSERTE(fSuccessClose != -1);
-#ifdef __APPLE__
- umask(prev_mask);
-#endif // __APPLE__
- return nullptr;
+ return false;
+ }
+ else
+ {
+ _isListening = true;
+ return true;
}
-
-#ifdef __APPLE__
- umask(prev_mask);
-#endif // __APPLE__
-
- return new IpcStream::DiagnosticsIpc(serverSocket, &serverAddress);
}
-IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback) const
+IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback)
{
+ _ASSERTE(mode == ConnectionMode::SERVER);
+ _ASSERTE(_isListening);
+
sockaddr_un from;
socklen_t fromlen = sizeof(from);
const int clientSocket = ::accept(_serverSocket, (sockaddr *)&from, &fromlen);
@@ -136,10 +164,117 @@ IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback) const
return nullptr;
}
- return new IpcStream(clientSocket);
+ return new IpcStream(clientSocket, mode);
+}
+
+IpcStream *IpcStream::DiagnosticsIpc::Connect(ErrorCallback callback)
+{
+ _ASSERTE(mode == ConnectionMode::CLIENT);
+
+ sockaddr_un clientAddress{};
+ clientAddress.sun_family = AF_UNIX;
+ const int clientSocket = ::socket(AF_UNIX, SOCK_STREAM, 0);
+ if (clientSocket == -1)
+ {
+ if (callback != nullptr)
+ callback(strerror(errno), errno);
+ return nullptr;
+ }
+
+ // We don't expect this to block since this is a Unix Domain Socket. `connect` may block until the
+ // TCP handshake is complete for TCP/IP sockets, but UDS don't use TCP. `connect` will return even if
+ // the server hasn't called `accept`.
+ if (::connect(clientSocket, (struct sockaddr *)_pServerAddress, sizeof(*_pServerAddress)) < 0)
+ {
+ if (callback != nullptr)
+ callback(strerror(errno), errno);
+ return nullptr;
+ }
+
+ return new IpcStream(clientSocket, ConnectionMode::CLIENT);
}
-void IpcStream::DiagnosticsIpc::Close(ErrorCallback callback)
+int32_t IpcStream::DiagnosticsIpc::Poll(IpcPollHandle *rgIpcPollHandles, uint32_t nHandles, int32_t timeoutMs, ErrorCallback callback)
+{
+ // prepare the pollfd structs
+ pollfd *pollfds = new pollfd[nHandles];
+ for (uint32_t i = 0; i < nHandles; i++)
+ {
+ rgIpcPollHandles[i].revents = 0; // ignore any values in revents
+ int fd = -1;
+ if (rgIpcPollHandles[i].pIpc != nullptr)
+ {
+ // SERVER
+ _ASSERTE(rgIpcPollHandles[i].pIpc->mode == ConnectionMode::SERVER);
+ fd = rgIpcPollHandles[i].pIpc->_serverSocket;
+ }
+ else
+ {
+ // CLIENT
+ _ASSERTE(rgIpcPollHandles[i].pStream != nullptr);
+ fd = rgIpcPollHandles[i].pStream->_clientSocket;
+ }
+
+ pollfds[i].fd = fd;
+ pollfds[i].events = POLLIN;
+ }
+
+ int retval = poll(pollfds, nHandles, timeoutMs);
+
+ // Check results
+ if (retval < 0)
+ {
+ for (uint32_t i = 0; i < nHandles; i++)
+ {
+ if ((pollfds[i].revents & POLLERR) && callback != nullptr)
+ callback(strerror(errno), errno);
+ rgIpcPollHandles[i].revents = (uint8_t)PollEvents::ERR;
+ }
+ delete[] pollfds;
+ return -1;
+ }
+ else if (retval == 0)
+ {
+ // we timed out
+ delete[] pollfds;
+ return 0;
+ }
+
+ for (uint32_t i = 0; i < nHandles; i++)
+ {
+ if (pollfds[i].revents != 0)
+ {
+ // error check FIRST
+ if (pollfds[i].revents & POLLHUP)
+ {
+ // check for hangup first because a closed socket
+ // will technically meet the requirements for POLLIN
+ // i.e., a call to recv/read won't block
+ rgIpcPollHandles[i].revents = (uint8_t)PollEvents::HANGUP;
+ delete[] pollfds;
+ return -1;
+ }
+ else if ((pollfds[i].revents & (POLLERR|POLLNVAL)))
+ {
+ if (callback != nullptr)
+ callback("Poll error", (uint32_t)pollfds[i].revents);
+ rgIpcPollHandles[i].revents = (uint8_t)PollEvents::ERR;
+ delete[] pollfds;
+ return -1;
+ }
+ else if (pollfds[i].revents & POLLIN)
+ {
+ rgIpcPollHandles[i].revents = (uint8_t)PollEvents::SIGNALED;
+ break;
+ }
+ }
+ }
+
+ delete[] pollfds;
+ return 1;
+}
+
+void IpcStream::DiagnosticsIpc::Close(bool isShutdown, ErrorCallback callback)
{
if (_isClosed)
return;
@@ -147,13 +282,19 @@ void IpcStream::DiagnosticsIpc::Close(ErrorCallback callback)
if (_serverSocket != -1)
{
- if (::close(_serverSocket) == -1)
+ // only close the socket if not shutting down, let the OS handle it in that case
+ if (!isShutdown && ::close(_serverSocket) == -1)
{
if (callback != nullptr)
callback(strerror(errno), errno);
_ASSERTE(!"Failed to close unix domain socket.");
}
+ // N.B. - it is safe to unlink the unix domain socket file while the server
+ // is still alive:
+ // "The usual UNIX close-behind semantics apply; the socket can be unlinked
+ // at any time and will be finally removed from the file system when the last
+ // reference to it is closed." - unix(7) man page
Unlink(callback);
}
}
@@ -172,6 +313,11 @@ void IpcStream::DiagnosticsIpc::Unlink(ErrorCallback callback)
}
IpcStream::~IpcStream()
+{
+ Close();
+}
+
+void IpcStream::Close(ErrorCallback)
{
if (_clientSocket != -1)
{
@@ -179,38 +325,89 @@ IpcStream::~IpcStream()
const int fSuccessClose = ::close(_clientSocket);
_ASSERTE(fSuccessClose != -1);
+ _clientSocket = -1;
}
}
-bool IpcStream::Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nBytesRead) const
+bool IpcStream::Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nBytesRead, const int32_t timeoutMs)
{
_ASSERTE(lpBuffer != nullptr);
- const ssize_t ssize = ::recv(_clientSocket, lpBuffer, nBytesToRead, 0);
- const bool fSuccess = ssize != -1;
+ if (timeoutMs != InfiniteTimeout)
+ {
+ pollfd pfd;
+ pfd.fd = _clientSocket;
+ pfd.events = POLLIN;
+ int retval = poll(&pfd, 1, timeoutMs);
+ if (retval <= 0 || pfd.revents != POLLIN)
+ {
+ // timeout or error
+ return false;
+ }
+ // else fallthrough
+ }
+
+ uint8_t *lpBufferCursor = (uint8_t*)lpBuffer;
+ ssize_t currentBytesRead = 0;
+ ssize_t totalBytesRead = 0;
+ bool fSuccess = true;
+ while (fSuccess && nBytesToRead - totalBytesRead > 0)
+ {
+ currentBytesRead = ::recv(_clientSocket, lpBufferCursor, nBytesToRead - totalBytesRead, 0);
+ fSuccess = currentBytesRead != 0;
+ if (!fSuccess)
+ break;
+ totalBytesRead += currentBytesRead;
+ lpBufferCursor += currentBytesRead;
+ }
if (!fSuccess)
{
// TODO: Add error handling.
}
- nBytesRead = static_cast(ssize);
+ nBytesRead = static_cast(totalBytesRead);
return fSuccess;
}
-bool IpcStream::Write(const void *lpBuffer, const uint32_t nBytesToWrite, uint32_t &nBytesWritten) const
+bool IpcStream::Write(const void *lpBuffer, const uint32_t nBytesToWrite, uint32_t &nBytesWritten, const int32_t timeoutMs)
{
_ASSERTE(lpBuffer != nullptr);
- const ssize_t ssize = ::send(_clientSocket, lpBuffer, nBytesToWrite, 0);
- const bool fSuccess = ssize != -1;
+ if (timeoutMs != InfiniteTimeout)
+ {
+ pollfd pfd;
+ pfd.fd = _clientSocket;
+ pfd.events = POLLOUT;
+ int retval = poll(&pfd, 1, timeoutMs);
+ if (retval <= 0 || pfd.revents != POLLOUT)
+ {
+ // timeout or error
+ return false;
+ }
+ // else fallthrough
+ }
+
+ uint8_t *lpBufferCursor = (uint8_t*)lpBuffer;
+ ssize_t currentBytesWritten = 0;
+ ssize_t totalBytesWritten = 0;
+ bool fSuccess = true;
+ while (fSuccess && nBytesToWrite - totalBytesWritten > 0)
+ {
+ currentBytesWritten = ::send(_clientSocket, lpBufferCursor, nBytesToWrite - totalBytesWritten, 0);
+ fSuccess = currentBytesWritten != -1;
+ if (!fSuccess)
+ break;
+ lpBufferCursor += currentBytesWritten;
+ totalBytesWritten += currentBytesWritten;
+ }
if (!fSuccess)
{
// TODO: Add error handling.
}
- nBytesWritten = static_cast(ssize);
+ nBytesWritten = static_cast(totalBytesWritten);
return fSuccess;
}
diff --git a/src/coreclr/src/debug/debug-pal/win/diagnosticsipc.cpp b/src/coreclr/src/debug/debug-pal/win/diagnosticsipc.cpp
index 36c11857cabe98..f7b41b92fc1e6f 100644
--- a/src/coreclr/src/debug/debug-pal/win/diagnosticsipc.cpp
+++ b/src/coreclr/src/debug/debug-pal/win/diagnosticsipc.cpp
@@ -7,9 +7,14 @@
#include
#include "diagnosticsipc.h"
-IpcStream::DiagnosticsIpc::DiagnosticsIpc(const char(&namedPipeName)[MaxNamedPipeNameLength])
+#define _ASSERTE assert
+
+IpcStream::DiagnosticsIpc::DiagnosticsIpc(const char(&namedPipeName)[MaxNamedPipeNameLength], ConnectionMode mode) :
+ mode(mode),
+ _isListening(false)
{
memcpy(_pNamedPipeName, namedPipeName, sizeof(_pNamedPipeName));
+ memset(&_oOverlap, 0, sizeof(OVERLAPPED));
}
IpcStream::DiagnosticsIpc::~DiagnosticsIpc()
@@ -17,7 +22,7 @@ IpcStream::DiagnosticsIpc::~DiagnosticsIpc()
Close();
}
-IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const pIpcName, ErrorCallback callback)
+IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const pIpcName, ConnectionMode mode, ErrorCallback callback)
{
char namedPipeName[MaxNamedPipeNameLength]{};
int nCharactersWritten = -1;
@@ -43,20 +48,32 @@ IpcStream::DiagnosticsIpc *IpcStream::DiagnosticsIpc::Create(const char *const p
{
if (callback != nullptr)
callback("Failed to generate the named pipe name", nCharactersWritten);
- assert(nCharactersWritten != -1);
+ _ASSERTE(nCharactersWritten != -1);
return nullptr;
}
- return new IpcStream::DiagnosticsIpc(namedPipeName);
+ return new IpcStream::DiagnosticsIpc(namedPipeName, mode);
}
-IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback) const
+bool IpcStream::DiagnosticsIpc::Listen(ErrorCallback callback)
{
+ _ASSERTE(mode == ConnectionMode::SERVER);
+ if (mode != ConnectionMode::SERVER)
+ {
+ if (callback != nullptr)
+ callback("Cannot call Listen on a client connection", -1);
+ return false;
+ }
+
+ if (_isListening)
+ return true;
+
const uint32_t nInBufferSize = 16 * 1024;
const uint32_t nOutBufferSize = 16 * 1024;
- HANDLE hPipe = ::CreateNamedPipeA(
+ _hPipe = ::CreateNamedPipeA(
_pNamedPipeName, // pipe name
- PIPE_ACCESS_DUPLEX, // read/write access
+ PIPE_ACCESS_DUPLEX | // read/write access
+ FILE_FLAG_OVERLAPPED, // async listening
PIPE_TYPE_BYTE | PIPE_WAIT | PIPE_REJECT_REMOTE_CLIENTS, // message type pipe, message-read and blocking mode
PIPE_UNLIMITED_INSTANCES, // max. instances
nOutBufferSize, // output buffer size
@@ -64,19 +81,32 @@ IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback) const
0, // default client time-out
NULL); // default security attribute
- if (hPipe == INVALID_HANDLE_VALUE)
+ if (_hPipe == INVALID_HANDLE_VALUE)
{
if (callback != nullptr)
callback("Failed to create an instance of a named pipe.", ::GetLastError());
- return nullptr;
+ return false;
}
- const BOOL fSuccess = ::ConnectNamedPipe(hPipe, NULL) != 0;
+ HANDLE hOverlapEvent = CreateEvent(NULL, true, false, NULL);
+ if (hOverlapEvent == NULL)
+ {
+ if (callback != nullptr)
+ callback("Failed to create overlap event", ::GetLastError());
+ ::CloseHandle(_hPipe);
+ _hPipe = INVALID_HANDLE_VALUE;
+ return false;
+ }
+ _oOverlap.hEvent = hOverlapEvent;
+
+ BOOL fSuccess = ::ConnectNamedPipe(_hPipe, &_oOverlap) != 0;
if (!fSuccess)
{
const DWORD errorCode = ::GetLastError();
switch (errorCode)
{
+ case ERROR_IO_PENDING:
+ // There was a pending connection that can be waited on (will happen in poll)
case ERROR_PIPE_CONNECTED:
// Occurs when a client connects before the function is called.
// In this case, there is a connection between client and
@@ -86,46 +116,333 @@ IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback) const
default:
if (callback != nullptr)
callback("A client process failed to connect.", errorCode);
- ::CloseHandle(hPipe);
- return nullptr;
+ ::CloseHandle(_hPipe);
+ _hPipe = INVALID_HANDLE_VALUE;
+ ::CloseHandle(_oOverlap.hEvent);
+ _oOverlap.hEvent = INVALID_HANDLE_VALUE;
+ return false;
+ }
+ }
+
+ _isListening = true;
+ return true;
+}
+
+IpcStream *IpcStream::DiagnosticsIpc::Accept(ErrorCallback callback)
+{
+ _ASSERTE(_isListening);
+ _ASSERTE(mode == ConnectionMode::SERVER);
+
+ DWORD dwDummy = 0;
+ bool fSuccess = GetOverlappedResult(
+ _hPipe, // handle
+ &_oOverlap, // overlapped
+ &dwDummy, // throw-away dword
+ true); // wait till event signals
+
+ if (!fSuccess)
+ {
+ if (callback != nullptr)
+ callback("Failed to GetOverlappedResults for NamedPipe server", ::GetLastError());
+ return nullptr;
+ }
+
+ // create new IpcStream using handle and reset the Server object so it can listen again
+ IpcStream *pStream = new IpcStream(_hPipe, ConnectionMode::SERVER);
+
+ // reset the server
+ _hPipe = INVALID_HANDLE_VALUE;
+ _isListening = false;
+ ::CloseHandle(_oOverlap.hEvent);
+ memset(&_oOverlap, 0, sizeof(OVERLAPPED)); // clear the overlapped objects state
+ fSuccess = Listen(callback);
+ if (!fSuccess)
+ {
+ delete pStream;
+ return nullptr;
+ }
+
+ return pStream;
+}
+
+IpcStream *IpcStream::DiagnosticsIpc::Connect(ErrorCallback callback)
+{
+ _ASSERTE(mode == ConnectionMode::CLIENT);
+ if (mode != ConnectionMode::CLIENT)
+ {
+ if (callback != nullptr)
+ callback("Cannot call connect on a server connection", 0);
+ return nullptr;
+ }
+
+ HANDLE hPipe = ::CreateFileA(
+ _pNamedPipeName, // pipe name
+ PIPE_ACCESS_DUPLEX, // read/write access
+ 0, // no sharing
+ NULL, // default security attributes
+ OPEN_EXISTING, // opens existing pipe
+ FILE_FLAG_OVERLAPPED, // Overlapped
+ NULL); // no template file
+
+ if (hPipe == INVALID_HANDLE_VALUE)
+ {
+ if (callback != nullptr)
+ callback("Failed to connect to named pipe.", ::GetLastError());
+ return nullptr;
+ }
+
+ return new IpcStream(hPipe, mode);
+}
+
+void IpcStream::DiagnosticsIpc::Close(bool isShutdown, ErrorCallback)
+{
+ // don't attempt cleanup on shutdown and let the OS handle it
+ if (isShutdown)
+ return;
+
+ if (_hPipe != INVALID_HANDLE_VALUE)
+ {
+ if (mode == DiagnosticsIpc::ConnectionMode::SERVER)
+ {
+ const BOOL fSuccessDisconnectNamedPipe = ::DisconnectNamedPipe(_hPipe);
+ _ASSERTE(fSuccessDisconnectNamedPipe != 0);
}
+
+ const BOOL fSuccessCloseHandle = ::CloseHandle(_hPipe);
+ _ASSERTE(fSuccessCloseHandle != 0);
}
- return new IpcStream(hPipe);
+ if (_oOverlap.hEvent != INVALID_HANDLE_VALUE)
+ {
+ ::CloseHandle(_oOverlap.hEvent);
+ }
}
-void IpcStream::DiagnosticsIpc::Close(ErrorCallback)
+IpcStream::IpcStream(HANDLE hPipe, DiagnosticsIpc::ConnectionMode mode) :
+ _hPipe(hPipe),
+ _mode(mode)
{
+ memset(&_oOverlap, 0, sizeof(OVERLAPPED));
+ _oOverlap.hEvent = CreateEvent(NULL, true, false, NULL);
}
IpcStream::~IpcStream()
+{
+ Close();
+}
+
+void IpcStream::Close(ErrorCallback)
{
if (_hPipe != INVALID_HANDLE_VALUE)
{
Flush();
- const BOOL fSuccessDisconnectNamedPipe = ::DisconnectNamedPipe(_hPipe);
- assert(fSuccessDisconnectNamedPipe != 0);
+ if (_mode == DiagnosticsIpc::ConnectionMode::SERVER)
+ {
+ const BOOL fSuccessDisconnectNamedPipe = ::DisconnectNamedPipe(_hPipe);
+ _ASSERTE(fSuccessDisconnectNamedPipe != 0);
+ }
const BOOL fSuccessCloseHandle = ::CloseHandle(_hPipe);
- assert(fSuccessCloseHandle != 0);
+ _ASSERTE(fSuccessCloseHandle != 0);
+ }
+
+ if (_oOverlap.hEvent != INVALID_HANDLE_VALUE)
+ {
+ ::CloseHandle(_oOverlap.hEvent);
+ }
+}
+
+int32_t IpcStream::DiagnosticsIpc::Poll(IpcPollHandle *rgIpcPollHandles, uint32_t nHandles, int32_t timeoutMs, ErrorCallback callback)
+{
+ // load up an array of handles
+ HANDLE *pHandles = new HANDLE[nHandles];
+ for (uint32_t i = 0; i < nHandles; i++)
+ {
+ rgIpcPollHandles[i].revents = 0; // ignore any inputs on revents
+ if (rgIpcPollHandles[i].pIpc != nullptr)
+ {
+ // SERVER
+ _ASSERTE(rgIpcPollHandles[i].pIpc->mode == DiagnosticsIpc::ConnectionMode::SERVER);
+ pHandles[i] = rgIpcPollHandles[i].pIpc->_oOverlap.hEvent;
+ }
+ else
+ {
+ // CLIENT
+ bool fSuccess = false;
+ DWORD dwDummy = 0;
+ if (!rgIpcPollHandles[i].pStream->_isTestReading)
+ {
+ // check for data by doing an asynchronous 0 byte read.
+ // This will signal if the pipe closes (hangup) or the server
+ // sends new data
+ fSuccess = ::ReadFile(
+ rgIpcPollHandles[i].pStream->_hPipe, // handle
+ nullptr, // null buffer
+ 0, // read 0 bytes
+ &dwDummy, // dummy variable
+ &rgIpcPollHandles[i].pStream->_oOverlap); // overlap object to use
+ rgIpcPollHandles[i].pStream->_isTestReading = true;
+ if (!fSuccess)
+ {
+ DWORD error = ::GetLastError();
+ switch (error)
+ {
+ case ERROR_IO_PENDING:
+ pHandles[i] = rgIpcPollHandles[i].pStream->_oOverlap.hEvent;
+ break;
+ case ERROR_PIPE_NOT_CONNECTED:
+ // hangup
+ rgIpcPollHandles[i].revents = (uint8_t)PollEvents::HANGUP;
+ delete[] pHandles;
+ return -1;
+ default:
+ if (callback != nullptr)
+ callback("0 byte async read on client connection failed", error);
+ delete[] pHandles;
+ return -1;
+ }
+ }
+ }
+ else
+ {
+ pHandles[i] = rgIpcPollHandles[i].pStream->_oOverlap.hEvent;
+ }
+ }
+ }
+
+ // call wait for multiple obj
+ DWORD dwWait = WaitForMultipleObjects(
+ nHandles, // count
+ pHandles, // handles
+ false, // Don't wait-all
+ timeoutMs);
+
+ if (dwWait == WAIT_TIMEOUT)
+ {
+ // we timed out
+ delete[] pHandles;
+ return 0;
+ }
+
+ if (dwWait == WAIT_FAILED)
+ {
+ // we errored
+ if (callback != nullptr)
+ callback("WaitForMultipleObjects failed", ::GetLastError());
+ delete[] pHandles;
+ return -1;
+ }
+
+ // determine which of the streams signaled
+ DWORD index = dwWait - WAIT_OBJECT_0;
+ // error check the index
+ if (index < 0 || index > (nHandles - 1))
+ {
+ // check if we abandoned something
+ DWORD abandonedIndex = dwWait - WAIT_ABANDONED_0;
+ if (abandonedIndex > 0 || abandonedIndex < (nHandles - 1))
+ {
+ rgIpcPollHandles[abandonedIndex].revents = (uint8_t)IpcStream::DiagnosticsIpc::PollEvents::HANGUP;
+ delete[] pHandles;
+ return -1;
+ }
+ else
+ {
+ if (callback != nullptr)
+ callback("WaitForMultipleObjects failed", ::GetLastError());
+ delete[] pHandles;
+ return -1;
+ }
}
+
+ // Set revents depending on what signaled the stream
+ if (rgIpcPollHandles[index].pIpc == nullptr)
+ {
+ // CLIENT
+ // check if the connection got hung up
+ DWORD dwDummy = 0;
+ bool fSuccess = GetOverlappedResult(rgIpcPollHandles[index].pStream->_hPipe,
+ &rgIpcPollHandles[index].pStream->_oOverlap,
+ &dwDummy,
+ true);
+ rgIpcPollHandles[index].pStream->_isTestReading = false;
+ if (!fSuccess)
+ {
+ DWORD error = ::GetLastError();
+ if (error == ERROR_PIPE_NOT_CONNECTED)
+ rgIpcPollHandles[index].revents = (uint8_t)IpcStream::DiagnosticsIpc::PollEvents::HANGUP;
+ else
+ {
+ if (callback != nullptr)
+ callback("Client connection error", -1);
+ rgIpcPollHandles[index].revents = (uint8_t)IpcStream::DiagnosticsIpc::PollEvents::ERR;
+ delete[] pHandles;
+ return -1;
+ }
+ }
+ else
+ {
+ rgIpcPollHandles[index].revents = (uint8_t)IpcStream::DiagnosticsIpc::PollEvents::SIGNALED;
+ }
+ }
+ else
+ {
+ // SERVER
+ rgIpcPollHandles[index].revents = (uint8_t)IpcStream::DiagnosticsIpc::PollEvents::SIGNALED;
+ }
+
+ delete[] pHandles;
+ return 1;
}
-bool IpcStream::Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nBytesRead) const
+bool IpcStream::Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nBytesRead, const int32_t timeoutMs)
{
- assert(lpBuffer != nullptr);
+ _ASSERTE(lpBuffer != nullptr);
DWORD nNumberOfBytesRead = 0;
- const bool fSuccess = ::ReadFile(
+ LPOVERLAPPED overlap = &_oOverlap;
+ bool fSuccess = ::ReadFile(
_hPipe, // handle to pipe
lpBuffer, // buffer to receive data
nBytesToRead, // size of buffer
&nNumberOfBytesRead, // number of bytes read
- NULL) != 0; // not overlapped I/O
+ overlap) != 0; // overlapped I/O
if (!fSuccess)
{
+ if (timeoutMs == InfiniteTimeout)
+ {
+ fSuccess = GetOverlappedResult(_hPipe,
+ overlap,
+ &nNumberOfBytesRead,
+ true) != 0;
+ }
+ else
+ {
+ DWORD dwError = GetLastError();
+ if (dwError == ERROR_IO_PENDING)
+ {
+ DWORD dwWait = WaitForSingleObject(_oOverlap.hEvent, (DWORD)timeoutMs);
+ if (dwWait == WAIT_OBJECT_0)
+ {
+ // get the result
+ fSuccess = GetOverlappedResult(_hPipe,
+ overlap,
+ &nNumberOfBytesRead,
+ true) != 0;
+ }
+ else
+ {
+ // cancel IO and ensure the cancel happened
+ if (CancelIo(_hPipe))
+ {
+ // check if the async write beat the cancellation
+ fSuccess = GetOverlappedResult(_hPipe, overlap, &nNumberOfBytesRead, true) != 0;
+ }
+ }
+ }
+ }
// TODO: Add error handling.
}
@@ -133,20 +450,54 @@ bool IpcStream::Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nByt
return fSuccess;
}
-bool IpcStream::Write(const void *lpBuffer, const uint32_t nBytesToWrite, uint32_t &nBytesWritten) const
+bool IpcStream::Write(const void *lpBuffer, const uint32_t nBytesToWrite, uint32_t &nBytesWritten, const int32_t timeoutMs)
{
- assert(lpBuffer != nullptr);
+ _ASSERTE(lpBuffer != nullptr);
DWORD nNumberOfBytesWritten = 0;
- const bool fSuccess = ::WriteFile(
+ LPOVERLAPPED overlap = &_oOverlap;
+ bool fSuccess = ::WriteFile(
_hPipe, // handle to pipe
lpBuffer, // buffer to write from
nBytesToWrite, // number of bytes to write
&nNumberOfBytesWritten, // number of bytes written
- NULL) != 0; // not overlapped I/O
+ overlap) != 0; // overlapped I/O
if (!fSuccess)
{
+ DWORD dwError = GetLastError();
+ if (dwError == ERROR_IO_PENDING)
+ {
+ if (timeoutMs == InfiniteTimeout)
+ {
+ // if we're waiting infinitely, don't bother with extra kernel call
+ fSuccess = GetOverlappedResult(_hPipe,
+ overlap,
+ &nNumberOfBytesWritten,
+ true) != 0;
+ }
+ else
+ {
+ DWORD dwWait = WaitForSingleObject(_oOverlap.hEvent, (DWORD)timeoutMs);
+ if (dwWait == WAIT_OBJECT_0)
+ {
+ // get the result
+ fSuccess = GetOverlappedResult(_hPipe,
+ overlap,
+ &nNumberOfBytesWritten,
+ true) != 0;
+ }
+ else
+ {
+ // cancel IO and ensure the cancel happened
+ if (CancelIo(_hPipe))
+ {
+ // check if the async write beat the cancellation
+ fSuccess = GetOverlappedResult(_hPipe, overlap, &nNumberOfBytesWritten, true) != 0;
+ }
+ }
+ }
+ }
// TODO: Add error handling.
}
diff --git a/src/coreclr/src/debug/di/cordb.cpp b/src/coreclr/src/debug/di/cordb.cpp
index df6679040d1964..71e19a4e4b3931 100644
--- a/src/coreclr/src/debug/di/cordb.cpp
+++ b/src/coreclr/src/debug/di/cordb.cpp
@@ -28,7 +28,7 @@
#endif
//********** Globals. *********************************************************
-#ifndef TARGET_UNIX
+#ifndef HOST_UNIX
HINSTANCE g_hInst; // Instance handle to this piece of code.
#endif
@@ -473,40 +473,6 @@ STDAPI GetRequestedRuntimeInfo(LPCWSTR pExe,
return E_NOTIMPL;
}
-//-----------------------------------------------------------------------------
-// Replacement for legacy shim API GetCORRequiredVersion(...) used in linked libraries.
-// Used in code:TiggerStorage::GetDefaultVersion#CallTo_CLRRuntimeHostInternal_GetImageVersionString.
-//
-// Notes:
-// Mscordbi does not statically link to mscoree.dll.
-// This is used in EnC for IMetadataEmit2::GetSaveSize to computer size of header.
-// see code:TiggerStorage::GetDefaultVersion.
-//
-// Implemented by returning the version we're built for. Mscordbi.dll has a tight coupling with
-// the CLR version, so this will match exactly the build version we're debugging.
-// One potential caveat is that the build version doesn't necessarily match the install string
-// (eg. we may install as "v4.0.x86chk" but that's not captured in the build version). But this should
-// be internal scenarios only, and shouldn't actually matter here. If it did, we could instead get
-// the last components of the directory name the current mscordbi.dll is located in.
-//
-HRESULT
-CLRRuntimeHostInternal_GetImageVersionString(
- __out_ecount_part(*pcchBuffer, *pcchBuffer) LPWSTR wszBuffer,
- DWORD *pcchBuffer)
-{
- // Construct the cannoncial version string we're built as - eg. "v4.0.1234"
- const WCHAR k_wszBuiltFor[] = W("v") VER_PRODUCTVERSION_NO_QFE_STR_L;
-
- // Copy our buffer in
- HRESULT hr = HRESULT_FROM_WIN32(wcscpy_s(wszBuffer, *pcchBuffer, k_wszBuiltFor));
-
- // Hand out length regardless of success - like GetCORRequiredVersion
- *pcchBuffer = _countof(k_wszBuiltFor);
-
- return hr;
-} // CLRRuntimeHostInternal_GetImageVersionString
-
-
#ifdef TARGET_ARM
BOOL
DbiGetThreadContext(HANDLE hThread,
diff --git a/src/coreclr/src/debug/di/module.cpp b/src/coreclr/src/debug/di/module.cpp
index bcf11d206540e0..24911bab1b05a1 100644
--- a/src/coreclr/src/debug/di/module.cpp
+++ b/src/coreclr/src/debug/di/module.cpp
@@ -19,6 +19,7 @@
#include "ildbsymlib.h"
#include "pedecoder.h"
+#include "stgpool.h"
//---------------------------------------------------------------------------------------
// Update an existing metadata importer with a buffer
@@ -1993,14 +1994,17 @@ HRESULT CordbModule::CreateClass(mdTypeDef classMetaDataToken,
HRESULT hr = m_classes.AddBase(pClass);
if (SUCCEEDED(hr))
+ {
*ppClass = pClass;
+ if (classMetaDataToken == COR_GLOBAL_PARENT_TOKEN)
+ {
+ _ASSERTE( m_pClass == NULL ); //redundant create
+ m_pClass.Assign(pClass);
+ }
+ }
else
- delete pClass;
-
- if (classMetaDataToken == COR_GLOBAL_PARENT_TOKEN)
{
- _ASSERTE( m_pClass == NULL ); //redundant create
- m_pClass.Assign(pClass);
+ delete pClass;
}
return hr;
@@ -5331,6 +5335,3 @@ void CordbNativeCode::LoadNativeInfo()
}
} // CordbNativeCode::LoadNativeInfo
-
-
-
diff --git a/src/coreclr/src/debug/di/process.cpp b/src/coreclr/src/debug/di/process.cpp
index 6c45f2c13e9c58..f13e7b9f0eaa1b 100644
--- a/src/coreclr/src/debug/di/process.cpp
+++ b/src/coreclr/src/debug/di/process.cpp
@@ -8981,10 +8981,10 @@ CordbProcess::GetVersion(COR_VERSION* pVersion)
//
// Because we require a matching version of mscordbi.dll to debug a certain version of the runtime,
// we can just use constants found in this particular mscordbi.dll to determine the version of the left side.
- pVersion->dwMajor = CLR_MAJOR_VERSION;
- pVersion->dwMinor = CLR_MINOR_VERSION;
- pVersion->dwBuild = CLR_BUILD_VERSION;
- pVersion->dwSubBuild = CLR_BUILD_VERSION_QFE;
+ pVersion->dwMajor = RuntimeProductMajorVersion;
+ pVersion->dwMinor = RuntimeProductMinorVersion;
+ pVersion->dwBuild = RuntimeProductPatchVersion;
+ pVersion->dwSubBuild = 0;
return S_OK;
}
@@ -10990,8 +10990,7 @@ void CordbWin32EventThread::ThreadProc()
}
// Define a holder that calls code:DeleteIPCEventHelper
-NEW_WRAPPER_TEMPLATE1(DeleteIPCEventHolderHelper, DeleteIPCEventHelper);
-typedef DeleteIPCEventHolderHelper DeleteIPCEventHolder;
+using DeleteIPCEventHolder = SpecializedWrapper;
//---------------------------------------------------------------------------------------
//
diff --git a/src/coreclr/src/debug/ee/amd64/amd64InstrDecode.h b/src/coreclr/src/debug/ee/amd64/amd64InstrDecode.h
index 012436129faff0..1a40c26e9799fd 100644
--- a/src/coreclr/src/debug/ee/amd64/amd64InstrDecode.h
+++ b/src/coreclr/src/debug/ee/amd64/amd64InstrDecode.h
@@ -124,7 +124,7 @@ namespace Amd64InstrDecode
// Instruction which change forms based on modrm.reg are encoded in this extension table.
// Since there are 8 modrm.reg values, they occur is groups of 8.
// Each group is referenced from the other tables below using Extension|(index >> 3).
- static InstrForm instrFormExtension[153]
+ static const InstrForm instrFormExtension[153]
{
MOnly_M4B, // Primary:0xd90/0 fld
None,
@@ -280,7 +280,7 @@ namespace Amd64InstrDecode
MOnly_M8B, // Secondary:0xc73/7 vmptrst
};
- static InstrForm instrFormPrimary[256]
+ static const InstrForm instrFormPrimary[256]
{
M1st_M1B, // 0x000 add
M1st_WP_M8B_or_M4B_or_M2B, // 0x010 add
@@ -540,7 +540,7 @@ namespace Amd64InstrDecode
InstrForm(int(Extension)|0x06), // 0xff0
};
- static InstrForm instrForm3DNow[256]
+ static const InstrForm instrForm3DNow[256]
{
MOp_M8B_I1B, // 0x000
MOp_M8B_I1B, // 0x010
@@ -800,7 +800,7 @@ namespace Amd64InstrDecode
MOp_M8B_I1B, // 0xff0
};
- static InstrForm instrFormSecondary[1024]
+ static const InstrForm instrFormSecondary[1024]
{
MOnly_M2B, // 0x000 lldt,ltr,sldt,str,verr,verw
MOnly_M2B, // 0x001 lldt,ltr,sldt,str,verr,verw
@@ -1828,7 +1828,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormF38[1024]
+ static const InstrForm instrFormF38[1024]
{
MOp_M8B, // 0x000 pshufb
MOp_M16B, // 0x001 pshufb
@@ -2856,7 +2856,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormF3A[1024]
+ static const InstrForm instrFormF3A[1024]
{
None, // 0x000
None, // 0x001
@@ -3884,7 +3884,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormVex1[1024]
+ static const InstrForm instrFormVex1[1024]
{
None, // 0x000
None, // 0x001
@@ -4912,7 +4912,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormVex2[1024]
+ static const InstrForm instrFormVex2[1024]
{
None, // 0x000
MOp_L_M32B_or_M16B, // 0x001 vpshufb
@@ -5940,7 +5940,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormVex3[1024]
+ static const InstrForm instrFormVex3[1024]
{
None, // 0x000
MOp_M32B_I1B, // 0x001 vpermq
@@ -6968,7 +6968,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormXOP8[1024]
+ static const InstrForm instrFormXOP8[1024]
{
None, // 0x000
None, // 0x001
@@ -7996,7 +7996,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormXOP9[1024]
+ static const InstrForm instrFormXOP9[1024]
{
None, // 0x000
None, // 0x001
@@ -9024,7 +9024,7 @@ namespace Amd64InstrDecode
None, // 0xff3
};
- static InstrForm instrFormXOPA[1024]
+ static const InstrForm instrFormXOPA[1024]
{
None, // 0x000
None, // 0x001
diff --git a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.cs b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.cs
index d90a1278c80dcb..ed1dc1c87fc712 100644
--- a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.cs
+++ b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.cs
@@ -1,3 +1,7 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
using System;
using System.Collections.Generic;
using System.Globalization;
@@ -865,7 +869,7 @@ void WriteCode()
Console.WriteLine(" // Since there are 8 modrm.reg values, they occur is groups of 8.");
Console.WriteLine(" // Each group is referenced from the other tables below using Extension|(index >> 3).");
currentExtension += 8;
- Console.WriteLine($" static InstrForm instrFormExtension[{currentExtension + 1}]");
+ Console.WriteLine($" static const InstrForm instrFormExtension[{currentExtension + 1}]");
Console.WriteLine(" {");
for (int i = 0; i < currentExtension; i++)
{
@@ -877,7 +881,7 @@ void WriteCode()
Console.WriteLine(" };");
Console.WriteLine();
- Console.WriteLine($" static InstrForm instrFormPrimary[256]");
+ Console.WriteLine($" static const InstrForm instrFormPrimary[256]");
Console.WriteLine(" {");
for (int i = 0; i < 4096; i+= 16)
{
@@ -889,7 +893,7 @@ void WriteCode()
Console.WriteLine(" };");
Console.WriteLine();
- Console.WriteLine($" static InstrForm instrForm3DNow[256]");
+ Console.WriteLine($" static const InstrForm instrForm3DNow[256]");
Console.WriteLine(" {");
for (int i = 0; i < 4096; i+= 16)
{
@@ -906,7 +910,7 @@ void WriteCode()
foreach((string name, Map map) in mapTuples)
{
Console.WriteLine();
- Console.WriteLine($" static InstrForm instrForm{name}[1024]");
+ Console.WriteLine($" static const InstrForm instrForm{name}[1024]");
Console.WriteLine(" {");
for (int i = 0; i < 4096; i+= 16)
{
diff --git a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.csproj b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.csproj
index 6d647bf4e47327..d1eec22ab87e60 100644
--- a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.csproj
+++ b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/Amd64InstructionTableGenerator.csproj
@@ -2,7 +2,7 @@
Exe
- netcoreapp2.2
+ netcoreapp3.1
diff --git a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/README.md b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/README.md
index d7a3172014923f..9f83da3bcaa320 100644
--- a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/README.md
+++ b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/README.md
@@ -30,8 +30,8 @@ and accurately mechanism to implement
This function needs to be able to decode an arbitrary `amd64`
instruction. The decoder currently must be able to identify:
-- Whether the instruction includes a instruction pointer relative memory accesses
-- The location of the memory displacement withing the instruction
+- Whether the instruction includes an instruction pointer relative memory access
+- The location of the memory displacement within the instruction
- The instruction length in bytes
- The size of the memory operation in bytes
@@ -80,7 +80,7 @@ We will iterate through all the necessary set. Many of these combinations
will lead to invalid/undefined encodings. This will cause the disassembler
to give up and mark the disassemble as bad.
-The disassemble will then resume trying to diassemble at the next boundary.
+The disassemble will then resume trying to disassemble at the next boundary.
To make sure the disassembler attempts to disassemble every instruction,
we need to make sure the preceding instruction is always valid and terminates
@@ -104,7 +104,7 @@ After the modrm byte, the generated instructions always include a
const char* postamble = "0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,\n";
```
-This meets the padding a consistency needs.
+This meets the padding consistency needs.
#### Ordering
@@ -213,7 +213,7 @@ We continue parsing the first line of each group.
#### Ignoring bad encodings
-Many encoding are not valid. For `gdb`, these instructions are marked
+Many encodings are not valid. For `gdb`, these instructions are marked
`(bad)`. We filter and ignore these.
#### Parsing the disassambly for each instruction sample
@@ -247,7 +247,7 @@ To facilitate identifying sets of instructions, the creates an `opCodeExt`.
For the `Primary` map this is simply the encoded opcode from the instruction
shifted left by 4 bits.
-For the #D Now `NOW3D` map this is simply the encoded immediate from the
+For the 3D Now `NOW3D` map this is simply the encoded immediate from the
instruction shifted left by 4 bits.
For the `Secondary` `F38`, and `F39` maps this is the encoded opcode from
@@ -351,10 +351,10 @@ of the disassembler may have disassembly bugs. Using newer disassemblers
would mitigate this to some extent.
### Bugs
-- Inadequate samples. Are thre other bits which modify instruction
-behavior which we missed.
+- Inadequate samples. Are there other bits which modify instruction
+behavior which we missed?
- Parser/Table generator implementation bugs. Does the parser do what it
-was intended to do
+was intended to do?
## Reasons to regenerate the file
diff --git a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/createOpcodes.cpp b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/createOpcodes.cpp
index a127d0f54ac8ff..de4abb70c07ceb 100644
--- a/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/createOpcodes.cpp
+++ b/src/coreclr/src/debug/ee/amd64/gen_amd64InstrDecode/createOpcodes.cpp
@@ -1,3 +1,7 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
#include
int main(int argc, char*argv[])
diff --git a/src/coreclr/src/debug/ee/controller.cpp b/src/coreclr/src/debug/ee/controller.cpp
index 137fcf774067db..cd7dc03273eac3 100644
--- a/src/coreclr/src/debug/ee/controller.cpp
+++ b/src/coreclr/src/debug/ee/controller.cpp
@@ -23,6 +23,7 @@
#include "eeconfig.h"
#include "../../vm/methoditer.h"
+#include "../../vm/tailcallhelp.h"
const char *GetTType( TraceType tt);
@@ -5644,9 +5645,56 @@ bool DebuggerStepper::TrapStepInHelper(
return false;
}
-FORCEINLINE bool IsTailCall(const BYTE * pTargetIP)
+static bool IsTailCallJitHelper(const BYTE * ip)
{
- return TailCallStubManager::IsTailCallStubHelper(reinterpret_cast(pTargetIP));
+ return TailCallStubManager::IsTailCallJitHelper(reinterpret_cast(ip));
+}
+
+// Check whether a call to an IP will be a tailcall dispatched by first
+// returning. When a tailcall cannot be performed just with a jump instruction,
+// the code will be doing a regular call to a managed function called the
+// tailcall dispatcher. This functions dispatches tailcalls in a special way: if
+// there is a previous "tailcall aware" frame, then it will simply record the
+// next tailcall to perform and immediately return. Otherwise it will set up
+// such a tailcall aware frame and dispatch tailcalls. In the former case the
+// control flow will be a little peculiar in that the function will return
+// immediately, so we need special handling in the debugger for it. This
+// function detects that case to be used for those scenarios.
+static bool IsTailCallThatReturns(const BYTE * ip, ControllerStackInfo* info)
+{
+ MethodDesc* pTailCallDispatcherMD = TailCallHelp::GetTailCallDispatcherMD();
+ if (pTailCallDispatcherMD == NULL)
+ {
+ return false;
+ }
+
+ TraceDestination trace;
+ if (!g_pEEInterface->TraceStub(ip, &trace) || !g_pEEInterface->FollowTrace(&trace))
+ {
+ return false;
+ }
+
+ MethodDesc* pTargetMD =
+ trace.GetTraceType() == TRACE_UNJITTED_METHOD
+ ? trace.GetMethodDesc()
+ : g_pEEInterface->GetNativeCodeMethodDesc(trace.GetAddress());
+
+ if (pTargetMD != pTailCallDispatcherMD)
+ {
+ return false;
+ }
+
+ LOG((LF_CORDB, LL_INFO1000, "ITCTR: target %p is the tailcall dispatcher\n", ip));
+
+ _ASSERTE(info->HasReturnFrame());
+ LPVOID retAddr = (LPVOID)GetControlPC(&info->GetReturnFrame().registers);
+ TailCallTls* tls = GetThread()->GetTailCallTls();
+ LPVOID tailCallAwareRetAddr = tls->GetFrame()->TailCallAwareReturnAddress;
+
+ LOG((LF_CORDB,LL_INFO1000, "ITCTR: ret addr is %p, tailcall aware ret addr is %p\n",
+ retAddr, tailCallAwareRetAddr));
+
+ return retAddr == tailCallAwareRetAddr;
}
// bool DebuggerStepper::TrapStep() TrapStep attepts to set a
@@ -5864,11 +5912,18 @@ bool DebuggerStepper::TrapStep(ControllerStackInfo *info, bool in)
fCallingIntoFunclet = IsAddrWithinMethodIncludingFunclet(ji, info->m_activeFrame.md, walker.GetNextIP()) &&
((CORDB_ADDRESS)(SIZE_T)walker.GetNextIP() != ji->m_addrOfCode);
#endif
- // At this point, we know that the call/branch target is not in the current method.
- // So if the current instruction is a jump, this must be a tail call or possibly a jump to the finally.
- // So, check if the call/branch target is the JIT helper for handling tail calls if we are not calling
- // into the funclet.
- if ((fIsJump && !fCallingIntoFunclet) || IsTailCall(walker.GetNextIP()))
+ // At this point, we know that the call/branch target is not
+ // in the current method. The possible cases is that this is
+ // a jump or a tailcall-via-helper. There are two separate
+ // tailcalling mechanisms: on x86 we use a JIT helper which
+ // will look like a regular call and which won't return, so
+ // a step over becomes a step out. On other platforms we use
+ // a separate mechanism that will perform a tailcall by
+ // returning to an IL stub first. A step over in this case
+ // is done by stepping out to the previous user function
+ // (non IL stub).
+ if ((fIsJump && !fCallingIntoFunclet) || IsTailCallJitHelper(walker.GetNextIP()) ||
+ IsTailCallThatReturns(walker.GetNextIP(), info))
{
// A step-over becomes a step-out for a tail call.
if (!in)
@@ -6014,7 +6069,7 @@ bool DebuggerStepper::TrapStep(ControllerStackInfo *info, bool in)
return true;
}
- if (IsTailCall(walker.GetNextIP()))
+ if (IsTailCallJitHelper(walker.GetNextIP()) || IsTailCallThatReturns(walker.GetNextIP(), info))
{
if (!in)
{
@@ -6306,7 +6361,19 @@ void DebuggerStepper::TrapStepOut(ControllerStackInfo *info, bool fForceTraditio
}
else
#endif // FEATURE_MULTICASTSTUB_AS_IL
- if (info->m_activeFrame.managed)
+ if (info->m_activeFrame.md != nullptr && info->m_activeFrame.md->IsILStub() &&
+ info->m_activeFrame.md->AsDynamicMethodDesc()->GetILStubResolver()->GetStubType() == ILStubResolver::TailCallCallTargetStub)
+ {
+ // Normally the stack trace would not include IL stubs, but we
+ // include this specific IL stub so that we can check if a call into
+ // the tailcall dispatcher will result in any user code being
+ // executed or will return and allow a previous tailcall dispatcher
+ // to deal with the tailcall. Thus we just skip that frame here.
+ LOG((LF_CORDB, LL_INFO10000,
+ "DS::TSO: CallTailCallTarget frame.\n"));
+ continue;
+ }
+ else if (info->m_activeFrame.managed)
{
LOG((LF_CORDB, LL_INFO10000,
"DS::TSO: return frame is managed.\n"));
@@ -6488,7 +6555,6 @@ void DebuggerStepper::TrapStepOut(ControllerStackInfo *info, bool fForceTraditio
GetControlPC(&(info->m_activeFrame.registers)),
info->GetReturnFrame().fp.GetSPValue()));
-
AddAndActivateNativePatchForAddress((CORDB_ADDRESS_TYPE *)GetControlPC(&(info->m_activeFrame.registers)),
info->GetReturnFrame().fp,
FALSE,
diff --git a/src/coreclr/src/debug/ee/frameinfo.cpp b/src/coreclr/src/debug/ee/frameinfo.cpp
index f718d144cfc5e5..1f043f710aed67 100644
--- a/src/coreclr/src/debug/ee/frameinfo.cpp
+++ b/src/coreclr/src/debug/ee/frameinfo.cpp
@@ -1559,20 +1559,27 @@ StackWalkAction DebuggerWalkStackProc(CrawlFrame *pCF, void *data)
}
else
#endif // FEATURE_EH_FUNCLETS
- // We should ignore IL stubs with no frames in our stackwalking.
- // The only exception is dynamic methods. We want to report them when SIS is turned on.
+ // We ignore most IL stubs with no frames in our stackwalking. As exceptions
+ // we will always report multicast stubs and the tailcall call target stubs
+ // since we treat them specially in the debugger.
if ((md != NULL) && md->IsILStub() && pCF->IsFrameless())
{
+ _ASSERTE(md->IsDynamicMethod());
+ DynamicMethodDesc* dMD = md->AsDynamicMethodDesc();
#ifdef FEATURE_MULTICASTSTUB_AS_IL
- if(md->AsDynamicMethodDesc()->IsMulticastStub())
+ use |= dMD->IsMulticastStub();
+#endif
+ use |= dMD->GetILStubResolver()->GetStubType() == ILStubResolver::TailCallCallTargetStub;
+
+ if (use)
{
- use = true;
d->info.managed = true;
d->info.internal = false;
}
-#endif
- // We do nothing here.
- LOG((LF_CORDB, LL_INFO100000, "DWSP: Skip frameless IL stub.\n"));
+ else
+ {
+ LOG((LF_CORDB, LL_INFO100000, "DWSP: Skip frameless IL stub.\n"));
+ }
}
else
// For frames w/o method data, send them as an internal stub frame.
diff --git a/src/coreclr/src/debug/ee/rcthread.cpp b/src/coreclr/src/debug/ee/rcthread.cpp
index 85186e080034fa..c119dbcc2dda7b 100644
--- a/src/coreclr/src/debug/ee/rcthread.cpp
+++ b/src/coreclr/src/debug/ee/rcthread.cpp
@@ -241,8 +241,8 @@ HRESULT DebuggerIPCControlBlock::Init(
memset( this, 0, sizeof( DebuggerIPCControlBlock) );
// Setup version checking info.
- m_verMajor = CLR_BUILD_VERSION;
- m_verMinor = CLR_BUILD_VERSION_QFE;
+ m_verMajor = RuntimeFileBuildVersion;
+ m_verMinor = RuntimeFileRevisionVersion;
#ifdef _DEBUG
m_checkedBuild = true;
diff --git a/src/coreclr/src/debug/inc/dbgipcevents.h b/src/coreclr/src/debug/inc/dbgipcevents.h
index e9c095efb2e110..45c6bf9ad100e6 100644
--- a/src/coreclr/src/debug/inc/dbgipcevents.h
+++ b/src/coreclr/src/debug/inc/dbgipcevents.h
@@ -21,8 +21,7 @@
// Get version numbers for IPCHeader stamp
-#include "ndpversion.h"
-
+#include "clrversion.h"
#include "dbgappdomain.h"
#include "./common.h"
diff --git a/src/coreclr/src/debug/inc/diagnosticsipc.h b/src/coreclr/src/debug/inc/diagnosticsipc.h
index eabea6c3ceaea0..225299c2b8992f 100644
--- a/src/coreclr/src/debug/inc/diagnosticsipc.h
+++ b/src/coreclr/src/debug/inc/diagnosticsipc.h
@@ -18,24 +18,80 @@ typedef void (*ErrorCallback)(const char *szMessage, uint32_t code);
class IpcStream final
{
public:
+ static constexpr int32_t InfiniteTimeout = -1;
~IpcStream();
- bool Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nBytesRead) const;
- bool Write(const void *lpBuffer, const uint32_t nBytesToWrite, uint32_t &nBytesWritten) const;
+ bool Read(void *lpBuffer, const uint32_t nBytesToRead, uint32_t &nBytesRead, const int32_t timeoutMs = IpcStream::InfiniteTimeout);
+ bool Write(const void *lpBuffer, const uint32_t nBytesToWrite, uint32_t &nBytesWritten, const int32_t timeoutMs = IpcStream::InfiniteTimeout);
bool Flush() const;
+ void Close(ErrorCallback callback = nullptr);
class DiagnosticsIpc final
{
public:
+ enum ConnectionMode
+ {
+ CLIENT,
+ SERVER
+ };
+
+ enum class PollEvents : uint8_t
+ {
+ TIMEOUT = 0x00, // implies timeout
+ SIGNALED = 0x01, // ready for use
+ HANGUP = 0x02, // connection remotely closed
+ ERR = 0x04 // other error
+ };
+
+ // The bookeeping struct used for polling on server and client structs
+ struct IpcPollHandle
+ {
+ // Only one of these will be non-null, treat as a union
+ DiagnosticsIpc *pIpc;
+ IpcStream *pStream;
+
+ // contains some set of PollEvents
+ // will be set by Poll
+ // Any values here are ignored by Poll
+ uint8_t revents;
+
+ // a cookie assignable by upstream users for additional bookkeeping
+ void *pUserData;
+ };
+
+ // Poll
+ // Parameters:
+ // - IpcPollHandle * rgpIpcPollHandles: Array of IpcPollHandles to poll
+ // - uint32_t nHandles: The number of handles to poll
+ // - int32_t timeoutMs: The timeout in milliseconds for the poll (-1 == infinite)
+ // Returns:
+ // int32_t: -1 on error, 0 on timeout, >0 on successful poll
+ // Remarks:
+ // Check the events returned in revents for each IpcPollHandle to find the signaled handle.
+ // Signaled DiagnosticsIpcs can call Accept() without blocking.
+ // Signaled IpcStreams can call Read(...) without blocking.
+ // The caller is responsible for cleaning up "hung up" connections.
+ static int32_t Poll(IpcPollHandle *rgIpcPollHandles, uint32_t nHandles, int32_t timeoutMs, ErrorCallback callback = nullptr);
+
+ ConnectionMode mode;
+
~DiagnosticsIpc();
- //! Creates an IPC object
- static DiagnosticsIpc *Create(const char *const pIpcName, ErrorCallback callback = nullptr);
+ // Creates an IPC object
+ static DiagnosticsIpc *Create(const char *const pIpcName, ConnectionMode mode, ErrorCallback callback = nullptr);
+
+ // puts the DiagnosticsIpc into Listening Mode
+ // Re-entrant safe
+ bool Listen(ErrorCallback callback = nullptr);
+
+ // produces a connected stream from a server-mode DiagnosticsIpc. Blocks until a connection is available.
+ IpcStream *Accept(ErrorCallback callback = nullptr);
- //! Enables the underlaying IPC implementation to accept connection.
- IpcStream *Accept(ErrorCallback callback = nullptr) const;
+ // Connect to a server and returns a connected stream
+ IpcStream *Connect(ErrorCallback callback = nullptr);
- //! Closes an open IPC.
- void Close(ErrorCallback callback = nullptr);
+ // Closes an open IPC.
+ // Only attempts minimal cleanup if isShutdown==true, i.e., unlinks Unix Domain Socket on Linux, no-op on Windows
+ void Close(bool isShutdown = false, ErrorCallback callback = nullptr);
private:
@@ -44,18 +100,22 @@ class IpcStream final
sockaddr_un *const _pServerAddress;
bool _isClosed;
- DiagnosticsIpc(const int serverSocket, sockaddr_un *const pServerAddress);
+ DiagnosticsIpc(const int serverSocket, sockaddr_un *const pServerAddress, ConnectionMode mode = ConnectionMode::SERVER);
- //! Used to unlink the socket so it can be removed from the filesystem
- //! when the last reference to it is closed.
+ // Used to unlink the socket so it can be removed from the filesystem
+ // when the last reference to it is closed.
void Unlink(ErrorCallback callback = nullptr);
#else
static const uint32_t MaxNamedPipeNameLength = 256;
char _pNamedPipeName[MaxNamedPipeNameLength]; // https://docs.microsoft.com/en-us/windows/desktop/api/winbase/nf-winbase-createnamedpipea
+ HANDLE _hPipe = INVALID_HANDLE_VALUE;
+ OVERLAPPED _oOverlap = {};
- DiagnosticsIpc(const char(&namedPipeName)[MaxNamedPipeNameLength]);
+ DiagnosticsIpc(const char(&namedPipeName)[MaxNamedPipeNameLength], ConnectionMode mode = ConnectionMode::SERVER);
#endif /* TARGET_UNIX */
+ bool _isListening;
+
DiagnosticsIpc() = delete;
DiagnosticsIpc(const DiagnosticsIpc &src) = delete;
DiagnosticsIpc(DiagnosticsIpc &&src) = delete;
@@ -66,12 +126,17 @@ class IpcStream final
private:
#ifdef TARGET_UNIX
int _clientSocket = -1;
- IpcStream(int clientSocket) : _clientSocket(clientSocket) {}
+ IpcStream(int clientSocket, int serverSocket, DiagnosticsIpc::ConnectionMode mode = DiagnosticsIpc::ConnectionMode::SERVER)
+ : _clientSocket(clientSocket), _mode(mode) {}
#else
HANDLE _hPipe = INVALID_HANDLE_VALUE;
- IpcStream(HANDLE hPipe) : _hPipe(hPipe) {}
+ OVERLAPPED _oOverlap = {};
+ BOOL _isTestReading = false; // used to check whether we are already doing a 0-byte read to test for data
+ IpcStream(HANDLE hPipe, DiagnosticsIpc::ConnectionMode mode = DiagnosticsIpc::ConnectionMode::SERVER);
#endif /* TARGET_UNIX */
+ DiagnosticsIpc::ConnectionMode _mode;
+
IpcStream() = delete;
IpcStream(const IpcStream &src) = delete;
IpcStream(IpcStream &&src) = delete;
diff --git a/src/coreclr/src/debug/runtimeinfo/CMakeLists.txt b/src/coreclr/src/debug/runtimeinfo/CMakeLists.txt
index 96a3d464b13366..99b8f5edd08453 100644
--- a/src/coreclr/src/debug/runtimeinfo/CMakeLists.txt
+++ b/src/coreclr/src/debug/runtimeinfo/CMakeLists.txt
@@ -6,6 +6,6 @@ set(RUNTIMEINFO_SOURCES
add_library_clr(runtimeinfo STATIC ${RUNTIMEINFO_SOURCES})
-add_dependencies(runtimeinfo runtime_module_index_header)
-add_dependencies(runtimeinfo dac_module_index_header)
-add_dependencies(runtimeinfo dbi_module_index_header)
+add_dependencies(runtimeinfo coreclr_module_index_header)
+add_dependencies(runtimeinfo mscordaccore_module_index_header)
+add_dependencies(runtimeinfo mscordbi_module_index_header)
diff --git a/src/coreclr/src/dlls/dbgshim/CMakeLists.txt b/src/coreclr/src/dlls/dbgshim/CMakeLists.txt
index b3b326f0bf49da..ef2d0e360782b2 100644
--- a/src/coreclr/src/dlls/dbgshim/CMakeLists.txt
+++ b/src/coreclr/src/dlls/dbgshim/CMakeLists.txt
@@ -26,14 +26,18 @@ else(CLR_CMAKE_TARGET_WIN32)
generate_exports_file(${DEF_SOURCES} ${EXPORTS_FILE})
endif(CLR_CMAKE_TARGET_WIN32)
-if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
# This option is necessary to ensure that the overloaded delete operator defined inside
# of the utilcode will be used instead of the standard library delete operator.
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Xlinker -Bsymbolic")
# Add linker exports file option
- set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
-endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+ if(CLR_CMAKE_HOST_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,-M,${EXPORTS_FILE})
+ else(CLR_CMAKE_HOST_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
+ endif(CLR_CMAKE_HOST_SUNOS)
+endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
if(CLR_CMAKE_HOST_OSX)
# Add linker exports file option
diff --git a/src/coreclr/src/dlls/dbgshim/dbgshim.rc b/src/coreclr/src/dlls/dbgshim/dbgshim.rc
index c1d53acc7d9be5..9e4153871899ee 100644
--- a/src/coreclr/src/dlls/dbgshim/dbgshim.rc
+++ b/src/coreclr/src/dlls/dbgshim/dbgshim.rc
@@ -2,8 +2,6 @@
// The .NET Foundation licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.
-#include "resource.h"
-
#define FX_VER_FILEDESCRIPTION_STR "Microsoft .NET Runtime Multi-CLR Debugging Helper\0"
#include
diff --git a/src/coreclr/src/dlls/dbgshim/resource.h b/src/coreclr/src/dlls/dbgshim/resource.h
deleted file mode 100644
index 45274bad55e154..00000000000000
--- a/src/coreclr/src/dlls/dbgshim/resource.h
+++ /dev/null
@@ -1,3 +0,0 @@
-// Licensed to the .NET Foundation under one or more agreements.
-// The .NET Foundation licenses this file to you under the MIT license.
-// See the LICENSE file in the project root for more information.
diff --git a/src/coreclr/src/dlls/mscordac/CMakeLists.txt b/src/coreclr/src/dlls/mscordac/CMakeLists.txt
index e8e9ef167291b6..ddf66b4a0d45b7 100644
--- a/src/coreclr/src/dlls/mscordac/CMakeLists.txt
+++ b/src/coreclr/src/dlls/mscordac/CMakeLists.txt
@@ -31,9 +31,9 @@ else(CLR_CMAKE_HOST_WIN32)
# Add dependency on export file
add_custom_target(mscordaccore_exports DEPENDS ${EXPORTS_FILE})
- if(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+ if(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
generate_exports_file(${DEF_SOURCES} ${EXPORTS_FILE})
- endif(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+ endif(CLR_CMAKE_HOST_OSX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
if(CLR_CMAKE_HOST_LINUX)
@@ -73,7 +73,7 @@ else(CLR_CMAKE_HOST_WIN32)
endif(CLR_CMAKE_HOST_LINUX)
endif(CLR_CMAKE_HOST_WIN32)
-if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
# This option is necessary to ensure that the overloaded delete operator defined inside
# of the utilcode will be used instead of the standard library delete operator.
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Xlinker -Bsymbolic")
@@ -88,8 +88,12 @@ if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
set(END_WHOLE_ARCHIVE -Wl,--no-whole-archive)
# Add linker exports file option
- set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
-endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+ if(CLR_CMAKE_HOST_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,-M,${EXPORTS_FILE})
+ else(CLR_CMAKE_HOST_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
+ endif(CLR_CMAKE_HOST_SUNOS)
+endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
if(CLR_CMAKE_HOST_OSX)
# Add linker exports file option
@@ -190,24 +194,7 @@ target_link_libraries(mscordaccore PRIVATE ${COREDAC_LIBRARIES})
# Create the DAC module index header file containing the DAC build id
# for xplat and the timestamp/size on Windows.
if(FEATURE_SINGLE_FILE_DIAGNOSTICS)
- set(
- DAC_MODULE_INDEX_FILE
- ${GENERATED_INCLUDE_DIR}/dacmoduleindex.h
- )
- add_custom_command(
- OUTPUT ${DAC_MODULE_INDEX_FILE}
- COMMAND ${CLR_DOTNET_COMMAND} ${CMAKE_INSTALL_PREFIX}/GetModuleIndex/GetModuleIndex.dll $ ${DAC_MODULE_INDEX_FILE}
- DEPENDS mscordaccore
- COMMENT "Generating DAC module index file -> ${DAC_MODULE_INDEX_FILE}"
- )
- set_source_files_properties(
- ${DAC_MODULE_INDEX_FILE}
- PROPERTIES GENERATED TRUE
- )
- add_custom_target(
- dac_module_index_header
- DEPENDS ${DAC_MODULE_INDEX_FILE}
- )
+ generate_module_index(mscordaccore ${GENERATED_INCLUDE_DIR}/dacmoduleindex.h)
endif(FEATURE_SINGLE_FILE_DIAGNOSTICS)
# add the install targets
diff --git a/src/coreclr/src/dlls/mscordbi/CMakeLists.txt b/src/coreclr/src/dlls/mscordbi/CMakeLists.txt
index 3f4568fa75d62f..ffd48ee489aba5 100644
--- a/src/coreclr/src/dlls/mscordbi/CMakeLists.txt
+++ b/src/coreclr/src/dlls/mscordbi/CMakeLists.txt
@@ -19,7 +19,7 @@ if(CLR_CMAKE_HOST_LINUX)
list(APPEND MSCORDBI_SOURCES ${PAL_REDEFINES_FILE})
endif(CLR_CMAKE_HOST_LINUX)
-if(CLR_CMAKE_TARGET_WIN32)
+if(CLR_CMAKE_HOST_WIN32)
add_definitions(-DFX_VER_INTERNALNAME_STR=mscordbi.dll)
list(APPEND MSCORDBI_SOURCES
@@ -35,20 +35,24 @@ if(CLR_CMAKE_TARGET_WIN32)
preprocess_file(${DEF_SOURCES} ${CMAKE_CURRENT_BINARY_DIR}/mscordbi.def)
list(APPEND MSCORDBI_SOURCES ${CMAKE_CURRENT_BINARY_DIR}/mscordbi.def)
-else(CLR_CMAKE_TARGET_WIN32)
+else(CLR_CMAKE_HOST_WIN32)
set(DEF_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/mscordbi_unixexports.src)
set(EXPORTS_FILE ${CMAKE_CURRENT_BINARY_DIR}/mscordbi.exports)
generate_exports_file(${DEF_SOURCES} ${EXPORTS_FILE})
-endif(CLR_CMAKE_TARGET_WIN32)
+endif(CLR_CMAKE_HOST_WIN32)
-if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
# This option is necessary to ensure that the overloaded new/delete operators defined inside
# of the utilcode will be used instead of the standard library delete operator.
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Xlinker -Bsymbolic")
# Add linker exports file option
- set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
-endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+ if(CLR_CMAKE_HOST_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,-M,${EXPORTS_FILE})
+ else(CLR_CMAKE_HOST_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
+ endif(CLR_CMAKE_HOST_SUNOS)
+endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
if(CLR_CMAKE_HOST_OSX)
# Add linker exports file option
@@ -79,9 +83,13 @@ set(COREDBI_LIBRARIES
)
if(CLR_CMAKE_HOST_WIN32)
+ if(CLR_CMAKE_TARGET_WIN32)
+ set(COREDBI_TARGET_WIN32_LIBRARIES mdwinmd_dbi)
+ endif(CLR_CMAKE_TARGET_WIN32)
+
list(APPEND COREDBI_LIBRARIES
mdhotdata-staticcrt
- mdwinmd_dbi
+ ${COREDBI_TARGET_WIN32_LIBRARIES}
kernel32.lib
advapi32.lib
ole32.lib
@@ -120,24 +128,7 @@ endif(CLR_CMAKE_HOST_WIN32)
# Create the DBI module index header file containing the DBI build id
# for xplat and the timestamp/size on Windows.
if(FEATURE_SINGLE_FILE_DIAGNOSTICS)
- set(
- DBI_MODULE_INDEX_FILE
- ${GENERATED_INCLUDE_DIR}/dbimoduleindex.h
- )
- add_custom_command(
- OUTPUT ${DBI_MODULE_INDEX_FILE}
- COMMAND ${CLR_DOTNET_COMMAND} ${CMAKE_INSTALL_PREFIX}/GetModuleIndex/GetModuleIndex.dll $ ${DBI_MODULE_INDEX_FILE}
- DEPENDS mscordbi
- COMMENT "Generating DBI module index file -> ${DBI_MODULE_INDEX_FILE}"
- )
- set_source_files_properties(
- ${DBI_MODULE_INDEX_FILE}
- PROPERTIES GENERATED TRUE
- )
- add_custom_target(
- dbi_module_index_header
- DEPENDS ${DBI_MODULE_INDEX_FILE}
- )
+ generate_module_index(mscordbi ${GENERATED_INCLUDE_DIR}/dbimoduleindex.h)
endif(FEATURE_SINGLE_FILE_DIAGNOSTICS)
# add the install targets
diff --git a/src/coreclr/src/dlls/mscoree/coreclr/CMakeLists.txt b/src/coreclr/src/dlls/mscoree/coreclr/CMakeLists.txt
index 777a2869e4f7ce..918fbf27a68488 100644
--- a/src/coreclr/src/dlls/mscoree/coreclr/CMakeLists.txt
+++ b/src/coreclr/src/dlls/mscoree/coreclr/CMakeLists.txt
@@ -32,7 +32,7 @@ else(CLR_CMAKE_HOST_WIN32)
set(EXPORTS_FILE ${CMAKE_CURRENT_BINARY_DIR}/coreclr.exports)
generate_exports_file(${DEF_SOURCES} ${EXPORTS_FILE})
- if(CLR_CMAKE_TARGET_LINUX OR CLR_CMAKE_TARGET_FREEBSD OR CLR_CMAKE_TARGET_NETBSD)
+ if(CLR_CMAKE_TARGET_LINUX OR CLR_CMAKE_TARGET_FREEBSD OR CLR_CMAKE_TARGET_NETBSD OR CLR_CMAKE_TARGET_SUNOS)
# This option is necessary to ensure that the overloaded delete operator defined inside
# of the utilcode will be used instead of the standard library delete operator.
add_link_options("LINKER:-Bsymbolic")
@@ -46,8 +46,12 @@ else(CLR_CMAKE_HOST_WIN32)
set(START_WHOLE_ARCHIVE -Wl,--whole-archive)
set(END_WHOLE_ARCHIVE -Wl,--no-whole-archive)
- set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
- endif(CLR_CMAKE_TARGET_LINUX OR CLR_CMAKE_TARGET_FREEBSD OR CLR_CMAKE_TARGET_NETBSD)
+ if(CLR_CMAKE_TARGET_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,-M,${EXPORTS_FILE})
+ elseif(CLR_CMAKE_TARGET_SUNOS)
+ set(EXPORTS_LINKER_OPTION -Wl,--version-script=${EXPORTS_FILE})
+ endif(CLR_CMAKE_TARGET_SUNOS)
+ endif(CLR_CMAKE_TARGET_LINUX OR CLR_CMAKE_TARGET_FREEBSD OR CLR_CMAKE_TARGET_NETBSD OR CLR_CMAKE_TARGET_SUNOS)
if(CLR_CMAKE_TARGET_OSX)
# These options are used to force every object to be included even if it's unused.
@@ -59,7 +63,7 @@ else(CLR_CMAKE_HOST_WIN32)
if(CLR_CMAKE_TARGET_ANDROID AND CLR_CMAKE_HOST_ARCH_ARM)
set(EXPORTS_LINKER_OPTION "${EXPORTS_LINKER_OPTION} -Wl,--no-warn-shared-textrel")
- endif()
+ endif(CLR_CMAKE_TARGET_ANDROID AND CLR_CMAKE_HOST_ARCH_ARM)
endif (CLR_CMAKE_HOST_WIN32)
@@ -146,6 +150,10 @@ if(CLR_CMAKE_TARGET_LINUX)
tracepointprovider
${END_WHOLE_ARCHIVE}
)
+elseif(CLR_CMAKE_TARGET_SUNOS)
+ list(APPEND CORECLR_LIBRARIES
+ socket
+ )
endif(CLR_CMAKE_TARGET_LINUX)
if(FEATURE_PERFTRACING)
@@ -167,24 +175,7 @@ target_link_libraries(coreclr ${CORECLR_LIBRARIES})
# Create the runtime module index header file containing the coreclr build id
# for xplat and the timestamp/size on Windows.
if(FEATURE_SINGLE_FILE_DIAGNOSTICS)
- set(
- RUNTIME_MODULE_INDEX_FILE
- ${GENERATED_INCLUDE_DIR}/runtimemoduleindex.h
- )
- add_custom_command(
- OUTPUT ${RUNTIME_MODULE_INDEX_FILE}
- COMMAND ${CLR_DOTNET_COMMAND} ${CMAKE_INSTALL_PREFIX}/GetModuleIndex/GetModuleIndex.dll $ ${RUNTIME_MODULE_INDEX_FILE}
- DEPENDS coreclr
- COMMENT "Generating runtime module index file -> ${RUNTIME_MODULE_INDEX_FILE}"
- )
- set_source_files_properties(
- ${RUNTIME_MODULE_INDEX_FILE}
- PROPERTIES GENERATED TRUE
- )
- add_custom_target(
- runtime_module_index_header
- DEPENDS ${RUNTIME_MODULE_INDEX_FILE}
- )
+ generate_module_index(coreclr ${GENERATED_INCLUDE_DIR}/runtimemoduleindex.h)
endif(FEATURE_SINGLE_FILE_DIAGNOSTICS)
if(CLR_CMAKE_TARGET_WIN32)
diff --git a/src/coreclr/src/dlls/mscoree/mscoree.cpp b/src/coreclr/src/dlls/mscoree/mscoree.cpp
index d87d9bebc0ca02..2ad1e9d6f284ef 100644
--- a/src/coreclr/src/dlls/mscoree/mscoree.cpp
+++ b/src/coreclr/src/dlls/mscoree/mscoree.cpp
@@ -16,8 +16,6 @@
#include "metadataexports.h"
#include "ex.h"
-#include "product_version.h"
-
#include
// Globals
@@ -316,21 +314,6 @@ STDAPI ReOpenMetaDataWithMemoryEx(
return hr;
}
-// Replacement for legacy shim API GetCORRequiredVersion(...) used in linked libraries.
-// Used in code:TiggerStorage::GetDefaultVersion#CallTo_CLRRuntimeHostInternal_GetImageVersionString.
-HRESULT
-CLRRuntimeHostInternal_GetImageVersionString(
- __out_ecount_opt(*pcchBuffer) LPWSTR wszBuffer,
- __inout DWORD *pcchBuffer)
-{
- // Simply forward the call to the ICLRRuntimeHostInternal implementation.
- STATIC_CONTRACT_WRAPPER;
-
- HRESULT hr = GetCORVersionInternal(wszBuffer, *pcchBuffer, pcchBuffer);
-
- return hr;
-} // CLRRuntimeHostInternal_GetImageVersionString
-
STDAPI GetCORSystemDirectoryInternaL(SString& pBuffer)
{
CONTRACTL {
@@ -364,67 +347,6 @@ STDAPI GetCORSystemDirectoryInternaL(SString& pBuffer)
return hr;
}
-//
-// Returns version of the runtime (null-terminated).
-//
-// Arguments:
-// pBuffer - [out] Output buffer allocated by caller of size cchBuffer.
-// cchBuffer - Size of pBuffer in characters.
-// pdwLength - [out] Size of the version string in characters (incl. null-terminator). Will be filled
-// even if ERROR_INSUFFICIENT_BUFFER is returned.
-//
-// Return Value:
-// S_OK - Output buffer contains the version string.
-// HRESULT_FROM_WIN32(ERROR_INSUFFICIENT_BUFFER) - *pdwLength contains required size of the buffer in
-// characters.
-
-STDAPI GetCORVersionInternal(
-__out_ecount_z_opt(cchBuffer) LPWSTR pBuffer,
- DWORD cchBuffer,
- __out DWORD *pdwLength)
-{
- CONTRACTL {
- NOTHROW;
- GC_NOTRIGGER;
- ENTRY_POINT;
- PRECONDITION(CheckPointer(pBuffer, NULL_OK));
- PRECONDITION(CheckPointer(pdwLength));
- } CONTRACTL_END;
-
- HRESULT hr;
- BEGIN_ENTRYPOINT_NOTHROW;
-
- if ((pBuffer != NULL) && (cchBuffer > 0))
- { // Initialize the output for case the function fails
- *pBuffer = W('\0');
- }
-
-#define VERSION_NUMBER_NOSHIM W("v") QUOTE_MACRO_L(CLR_MAJOR_VERSION.CLR_MINOR_VERSION.CLR_BUILD_VERSION)
-
- DWORD length = (DWORD)(wcslen(VERSION_NUMBER_NOSHIM) + 1);
- if (length > cchBuffer)
- {
- hr = HRESULT_FROM_WIN32(ERROR_INSUFFICIENT_BUFFER);
- }
- else
- {
- if (pBuffer == NULL)
- {
- hr = E_POINTER;
- }
- else
- {
- CopyMemory(pBuffer, VERSION_NUMBER_NOSHIM, length * sizeof(WCHAR));
- hr = S_OK;
- }
- }
- *pdwLength = length;
-
- END_ENTRYPOINT_NOTHROW;
- return hr;
-
-}
-
static DWORD g_dwSystemDirectory = 0;
static WCHAR * g_pSystemDirectory = NULL;
diff --git a/src/coreclr/src/dlls/mscoree/unixinterface.cpp b/src/coreclr/src/dlls/mscoree/unixinterface.cpp
index 35d7c56c14c8e4..ca4d452a8edaef 100644
--- a/src/coreclr/src/dlls/mscoree/unixinterface.cpp
+++ b/src/coreclr/src/dlls/mscoree/unixinterface.cpp
@@ -18,6 +18,7 @@
#ifdef FEATURE_GDBJIT
#include "../../vm/gdbjithelpers.h"
#endif // FEATURE_GDBJIT
+#include "bundle.h"
#define ASSERTE_ALL_BUILDS(expr) _ASSERTE_ALL_BUILDS(__FILE__, (expr))
@@ -112,7 +113,8 @@ static void ConvertConfigPropertiesToUnicode(
const char** propertyValues,
int propertyCount,
LPCWSTR** propertyKeysWRef,
- LPCWSTR** propertyValuesWRef)
+ LPCWSTR** propertyValuesWRef,
+ BundleProbe** bundleProbe)
{
LPCWSTR* propertyKeysW = new (nothrow) LPCWSTR[propertyCount];
ASSERTE_ALL_BUILDS(propertyKeysW != nullptr);
@@ -124,17 +126,19 @@ static void ConvertConfigPropertiesToUnicode(
{
propertyKeysW[propertyIndex] = StringToUnicode(propertyKeys[propertyIndex]);
propertyValuesW[propertyIndex] = StringToUnicode(propertyValues[propertyIndex]);
+
+ if (strcmp(propertyKeys[propertyIndex], "BUNDLE_PROBE") == 0)
+ {
+ // If this application is a single-file bundle, the bundle-probe callback
+ // is passed in as the value of "BUNDLE_PROBE" property (encoded as a string).
+ *bundleProbe = (BundleProbe*)_wcstoui64(propertyValuesW[propertyIndex], nullptr, 0);
+ }
}
*propertyKeysWRef = propertyKeysW;
*propertyValuesWRef = propertyValuesW;
}
-#if !defined(FEATURE_MERGE_JIT_AND_ENGINE)
-// Reference to the global holding the path to the JIT
-extern LPCWSTR g_CLRJITPath;
-#endif // !defined(FEATURE_MERGE_JIT_AND_ENGINE)
-
#ifdef FEATURE_GDBJIT
GetInfoForMethodDelegate getInfoForMethodDelegate = NULL;
extern "C" int coreclr_create_delegate(void*, unsigned int, const char*, const char*, const char*, void**);
@@ -188,21 +192,25 @@ int coreclr_initialize(
LPCWSTR* propertyKeysW;
LPCWSTR* propertyValuesW;
+ BundleProbe* bundleProbe = nullptr;
+
ConvertConfigPropertiesToUnicode(
propertyKeys,
propertyValues,
propertyCount,
&propertyKeysW,
- &propertyValuesW);
+ &propertyValuesW,
+ &bundleProbe);
+
+ if (bundleProbe != nullptr)
+ {
+ static Bundle bundle(StringToUnicode(exePath), bundleProbe);
+ Bundle::AppBundle = &bundle;
+ }
// This will take ownership of propertyKeysWTemp and propertyValuesWTemp
Configuration::InitializeConfigurationKnobs(propertyCount, propertyKeysW, propertyValuesW);
-#if !defined(FEATURE_MERGE_JIT_AND_ENGINE)
- // Fetch the path to JIT binary, if specified
- g_CLRJITPath = Configuration::GetKnobStringValue(W("JIT_PATH"));
-#endif // !defined(FEATURE_MERGE_JIT_AND_ENGINE)
-
STARTUP_FLAGS startupFlags;
InitializeStartupFlags(&startupFlags);
diff --git a/src/coreclr/src/dlls/mscorrc/mscorrc.rc b/src/coreclr/src/dlls/mscorrc/mscorrc.rc
index 8a7410ef25b2d5..4573e20be97ae4 100644
--- a/src/coreclr/src/dlls/mscorrc/mscorrc.rc
+++ b/src/coreclr/src/dlls/mscorrc/mscorrc.rc
@@ -344,7 +344,7 @@ BEGIN
IDS_EE_WINRT_NOT_FACTORY_FOR_TYPE "Windows Runtime factory '%1' is not a factory for Windows Runtime type '%2'."
IDS_EE_WINRT_INVALID_FACTORY_FOR_TYPE "Windows Runtime type '%1' has a invalid Windows Runtime factory"
IDS_EE_CANNOTCAST_NOMARSHAL "The Windows Runtime Object can only be used in the threading context where it was created, because it implements INoMarshal or has MarshalingBehaviorAttribute(MarshalingType.None) set."
- IDS_EE_WINRT_WEAKREF_BAD_TYPE "The object resolved by a native IWeakReference has an incompatible type for its managed WeakReference instance.\r\nExpected WeakReference target type: '%1'\r\nNative IWeakReference returned type: '%2'"
+ IDS_EE_NATIVE_COM_WEAKREF_BAD_TYPE "The object resolved by a native IWeakReference has an incompatible type for its managed WeakReference instance.\r\nExpected WeakReference target type: '%1'\r\nNative IWeakReference returned type: '%2'"
#endif // FEATURE_COMINTEROP
IDS_EE_INTEROP_CODE_SIZE_COMMENT "Code size"
diff --git a/src/coreclr/src/dlls/mscorrc/resource.h b/src/coreclr/src/dlls/mscorrc/resource.h
index 342c0570d493bb..4011efb748215d 100644
--- a/src/coreclr/src/dlls/mscorrc/resource.h
+++ b/src/coreclr/src/dlls/mscorrc/resource.h
@@ -600,7 +600,7 @@
#ifdef FEATURE_COMINTEROP
-#define IDS_EE_WINRT_WEAKREF_BAD_TYPE 0x262e
+#define IDS_EE_NATIVE_COM_WEAKREF_BAD_TYPE 0x262e
#endif // FEATURE_COMINTEROP
#define IDS_EE_BADMARSHAL_TYPE_ANSIBSTR 0x262f
diff --git a/src/coreclr/src/gc/env/etmdummy.h b/src/coreclr/src/gc/env/etmdummy.h
index 7435df7f8137b2..ba4c4cf96a5db3 100644
--- a/src/coreclr/src/gc/env/etmdummy.h
+++ b/src/coreclr/src/gc/env/etmdummy.h
@@ -164,6 +164,7 @@
#define FireEtwGCMarkWithType(HeapNum, ClrInstanceID, Type, Bytes) 0
#define FireEtwGCJoin_V2(Heap, JoinTime, JoinType, ClrInstanceID, JoinID) 0
#define FireEtwGCPerHeapHistory_V3(ClrInstanceID, FreeListAllocated, FreeListRejected, EndOfSegAllocated, CondemnedAllocated, PinnedAllocated, PinnedAllocatedAdvance, RunningFreeListEfficiency, CondemnReasons0, CondemnReasons1, CompactMechanisms, ExpandMechanisms, HeapIndex, ExtraGen0Commit, Count, Values_Len_, Values) 0
+#define FireEtwGCGlobalHeapHistory_V2(FinalYoungestDesired, NumHeaps, CondemnedGeneration, Gen0ReductionCount, Reason, GlobalMechanisms, ClrInstanceID, PauseMode, MemoryPressure) 0
#define FireEtwGCGlobalHeapHistory_V3(FinalYoungestDesired, NumHeaps, CondemnedGeneration, Gen0ReductionCount, Reason, GlobalMechanisms, ClrInstanceID, PauseMode, MemoryPressure, CondemnReasons0, CondemnReasons1) 0
#define FireEtwDebugIPCEventStart() 0
#define FireEtwDebugIPCEventEnd() 0
diff --git a/src/coreclr/src/gc/env/gcenv.base.h b/src/coreclr/src/gc/env/gcenv.base.h
index b8fd0862db96b2..837291f345d49a 100644
--- a/src/coreclr/src/gc/env/gcenv.base.h
+++ b/src/coreclr/src/gc/env/gcenv.base.h
@@ -12,6 +12,9 @@
#endif // _MSC_VER
#if !defined(_MSC_VER)
+#ifdef __sun
+#include
+#endif
#define _alloca alloca
#endif //_MSC_VER
diff --git a/src/coreclr/src/gc/env/gcenv.ee.h b/src/coreclr/src/gc/env/gcenv.ee.h
index ab0fe80620ffd9..fa4f2dcd765889 100644
--- a/src/coreclr/src/gc/env/gcenv.ee.h
+++ b/src/coreclr/src/gc/env/gcenv.ee.h
@@ -73,9 +73,9 @@ class GCToEEInterface
static void HandleFatalError(unsigned int exitCode);
static bool EagerFinalized(Object* obj);
static MethodTable* GetFreeObjectMethodTable();
- static bool GetBooleanConfigValue(const char* key, bool* value);
- static bool GetIntConfigValue(const char* key, int64_t* value);
- static bool GetStringConfigValue(const char* key, const char** value);
+ static bool GetBooleanConfigValue(const char* privateKey, const char* publicKey, bool* value);
+ static bool GetIntConfigValue(const char* privateKey, const char* publicKey, int64_t* value);
+ static bool GetStringConfigValue(const char* privateKey, const char* publicKey, const char** value);
static void FreeStringConfigValue(const char* key);
static bool IsGCThread();
static bool WasCurrentThreadCreatedByGC();
diff --git a/src/coreclr/src/gc/env/gcenv.os.h b/src/coreclr/src/gc/env/gcenv.os.h
index ae398e5503e3b8..6a6477f3c46504 100644
--- a/src/coreclr/src/gc/env/gcenv.os.h
+++ b/src/coreclr/src/gc/env/gcenv.os.h
@@ -66,8 +66,9 @@ struct VirtualReserveFlags
// are run on process exit, potentially concurrently with other threads that may still be
// operating on the static event. To avoid these sorts of unsafety, GCEvent chooses to
// not have a destructor at all. The cost of this is leaking a small amount of memory, but
-// this is not a problem since a majority of the uses of GCEvent are static. See CoreCLR#11111
-// for more details on the hazards of static destructors.
+// this is not a problem since a majority of the uses of GCEvent are static.
+// See https://github.com/dotnet/runtime/issues/7919 for more details on the hazards of
+// static destructors.
class GCEvent {
private:
class Impl;
@@ -433,20 +434,19 @@ class GCToOSInterface
// Remarks:
// If a process runs with a restricted memory limit, it returns the limit. If there's no limit
// specified, it returns amount of actual physical memory.
- //
- // PERF TODO: Requires more work to not treat the restricted case to be special.
- // To be removed before 3.0 ships.
static uint64_t GetPhysicalMemoryLimit(bool* is_restricted=NULL);
// Get memory status
// Parameters:
+ // restricted_limit - The amount of physical memory in bytes that the current process is being restricted to. If non-zero, it used to calculate
+ // memory_load and available_physical. If zero, memory_load and available_physical is calculate based on all available memory.
// memory_load - A number between 0 and 100 that specifies the approximate percentage of physical memory
// that is in use (0 indicates no memory use and 100 indicates full memory use).
// available_physical - The amount of physical memory currently available, in bytes.
// available_page_file - The maximum amount of memory the current process can commit, in bytes.
// Remarks:
// Any parameter can be null.
- static void GetMemoryStatus(uint32_t* memory_load, uint64_t* available_physical, uint64_t* available_page_file);
+ static void GetMemoryStatus(uint64_t restricted_limit, uint32_t* memory_load, uint64_t* available_physical, uint64_t* available_page_file);
// Get size of an OS memory page
static size_t GetPageSize();
diff --git a/src/coreclr/src/gc/env/volatile.h b/src/coreclr/src/gc/env/volatile.h
index c7964e9107d8fe..32b6fca3b6a7c6 100644
--- a/src/coreclr/src/gc/env/volatile.h
+++ b/src/coreclr/src/gc/env/volatile.h
@@ -67,8 +67,8 @@
#error The Volatile type is currently only defined for Visual C++ and GNU C++
#endif
-#if defined(__GNUC__) && !defined(HOST_X86) && !defined(HOST_AMD64) && !defined(HOST_ARM) && !defined(HOST_ARM64)
-#error The Volatile type is currently only defined for GCC when targeting x86, AMD64, ARM or ARM64 CPUs
+#if defined(__GNUC__) && !defined(HOST_X86) && !defined(HOST_AMD64) && !defined(HOST_ARM) && !defined(HOST_ARM64) && !defined(HOST_WASM)
+#error The Volatile type is currently only defined for GCC when targeting x86, AMD64, ARM, ARM64 or Wasm
#endif
#if defined(__GNUC__)
diff --git a/src/coreclr/src/gc/gc.cpp b/src/coreclr/src/gc/gc.cpp
index 3e3096e604eae5..3c26bd5b60e2e1 100644
--- a/src/coreclr/src/gc/gc.cpp
+++ b/src/coreclr/src/gc/gc.cpp
@@ -192,6 +192,25 @@ BOOL is_induced_blocking (gc_reason reason)
(reason == reason_lowmemory_host_blocking));
}
+gc_oh_num gen_to_oh(int gen)
+{
+ switch (gen)
+ {
+ case soh_gen0:
+ return gc_oh_num::soh;
+ case soh_gen1:
+ return gc_oh_num::soh;
+ case soh_gen2:
+ return gc_oh_num::soh;
+ case loh_generation:
+ return gc_oh_num::loh;
+ case poh_generation:
+ return gc_oh_num::poh;
+ default:
+ return gc_oh_num::none;
+ }
+}
+
#ifndef DACCESS_COMPILE
int64_t qpf;
size_t start_time;
@@ -1866,7 +1885,14 @@ const int max_snoop_level = 128;
#define MH_TH_CARD_BUNDLE (180*1024*1024)
#endif //CARD_BUNDLE
-#define GC_EPHEMERAL_DECOMMIT_TIMEOUT 5000
+// min size to decommit to make the OS call worthwhile
+#define MIN_DECOMMIT_SIZE (100*OS_PAGE_SIZE)
+
+// max size to decommit per millisecond
+#define DECOMMIT_SIZE_PER_MILLISECOND (160*1024)
+
+// time in milliseconds between decommit steps
+#define DECOMMIT_TIME_STEP_MILLISECONDS (100)
inline
size_t align_on_page (size_t add)
@@ -2060,7 +2086,6 @@ void qsort1(uint8_t** low, uint8_t** high, unsigned int depth);
void* virtual_alloc (size_t size);
void* virtual_alloc (size_t size, bool use_large_pages_p);
-void virtual_free (void* add, size_t size);
/* per heap static initialization */
#if defined(BACKGROUND_GC) && !defined(MULTIPLE_HEAPS)
@@ -2112,6 +2137,8 @@ int* gc_heap::g_mark_stack_busy;
size_t* gc_heap::g_bpromoted;
#endif //BACKGROUND_GC
+BOOL gc_heap::gradual_decommit_in_progress_p = FALSE;
+size_t gc_heap::max_decommit_step_size = 0;
#else //MULTIPLE_HEAPS
size_t gc_heap::g_promoted;
@@ -2138,12 +2165,12 @@ gc_history_global gc_heap::gc_data_global;
size_t gc_heap::gc_last_ephemeral_decommit_time = 0;
-size_t gc_heap::gc_gen0_desired_high;
-
CLRCriticalSection gc_heap::check_commit_cs;
size_t gc_heap::current_total_committed = 0;
+size_t gc_heap::committed_by_oh[total_oh_count] = {0, 0, 0, 0};
+
size_t gc_heap::current_total_committed_bookkeeping = 0;
#ifdef SHORT_PLUGS
@@ -2175,6 +2202,8 @@ uint32_t gc_heap::m_high_memory_load_th;
uint32_t gc_heap::v_high_memory_load_th;
+bool gc_heap::is_restricted_physical_mem;
+
uint64_t gc_heap::total_physical_mem = 0;
uint64_t gc_heap::entry_available_physical_mem = 0;
@@ -3564,9 +3593,6 @@ heap_segment* seg_mapping_table_segment_of (uint8_t* o)
size_t gcard_of ( uint8_t*);
-#define memref(i) *(uint8_t**)(i)
-
-//GC Flags
#define GC_MARKED (size_t)0x1
#define slot(i, j) ((uint8_t**)(i))[(j)+1]
@@ -3944,7 +3970,7 @@ struct initial_memory_details
initial_memory_details memory_details;
-BOOL reserve_initial_memory (size_t normal_size, size_t large_size, size_t pinned_size, int num_heaps, bool use_large_pages_p)
+BOOL gc_heap::reserve_initial_memory (size_t normal_size, size_t large_size, size_t pinned_size, int num_heaps, bool use_large_pages_p)
{
BOOL reserve_success = FALSE;
@@ -4083,7 +4109,7 @@ BOOL reserve_initial_memory (size_t normal_size, size_t large_size, size_t pinne
return reserve_success;
}
-void destroy_initial_memory()
+void gc_heap::destroy_initial_memory()
{
if (memory_details.initial_memory != NULL)
{
@@ -4103,7 +4129,7 @@ void destroy_initial_memory()
virtual_free (memory_details.initial_pinned_heap[0].memory_base,
memory_details.block_count*memory_details.block_size_pinned);
- }
+ }
else
{
assert (memory_details.allocation_pattern == initial_memory_details::EACH_BLOCK);
@@ -4130,7 +4156,8 @@ heap_segment* make_initial_segment (int gen, int h_number)
{
void* mem = memory_details.get_initial_memory (gen, h_number);
size_t size = memory_details.get_initial_size (gen);
- heap_segment* res = gc_heap::make_heap_segment ((uint8_t*)mem, size , h_number);
+ gc_oh_num oh = gen_to_oh (gen);
+ heap_segment* res = gc_heap::make_heap_segment ((uint8_t*)mem, size, oh, h_number);
return res;
}
@@ -4197,14 +4224,6 @@ void* virtual_alloc (size_t size, bool use_large_pages_p)
return aligned_mem;
}
-void virtual_free (void* add, size_t size)
-{
- GCToOSInterface::VirtualRelease (add, size);
- gc_heap::reserved_memory -= size;
- dprintf (2, ("Virtual Free size %Id: [%Ix, %Ix[",
- size, (size_t)add, (size_t)((uint8_t*)add+size)));
-}
-
static size_t get_valid_segment_size (BOOL large_seg=FALSE)
{
size_t seg_size, initial_seg_size;
@@ -4378,7 +4397,7 @@ gc_heap::soh_get_segment_to_expand()
}
}
- heap_segment* result = get_segment (size, FALSE);
+ heap_segment* result = get_segment (size, gc_oh_num::soh);
if(result)
{
@@ -4419,8 +4438,10 @@ gc_heap::soh_get_segment_to_expand()
//returns 0 in case of allocation failure
heap_segment*
-gc_heap::get_segment (size_t size, BOOL loh_p)
+gc_heap::get_segment (size_t size, gc_oh_num oh)
{
+ assert(oh != gc_oh_num::none);
+ BOOL uoh_p = (oh == gc_oh_num::loh) || (oh == gc_oh_num::poh);
if (heap_hard_limit)
return NULL;
@@ -4489,11 +4510,11 @@ gc_heap::get_segment (size_t size, BOOL loh_p)
void* mem = virtual_alloc (size);
if (!mem)
{
- fgm_result.set_fgm (fgm_reserve_segment, size, loh_p);
+ fgm_result.set_fgm (fgm_reserve_segment, size, uoh_p);
return 0;
}
- result = gc_heap::make_heap_segment ((uint8_t*)mem, size, heap_number);
+ result = gc_heap::make_heap_segment ((uint8_t*)mem, size, oh, heap_number);
if (result)
{
@@ -4517,7 +4538,7 @@ gc_heap::get_segment (size_t size, BOOL loh_p)
end = (uint8_t*)g_gc_highest_address;
}
- if (gc_heap::grow_brick_card_tables (start, end, size, result, __this, loh_p) != 0)
+ if (gc_heap::grow_brick_card_tables (start, end, size, result, __this, uoh_p) != 0)
{
virtual_free (mem, size);
return 0;
@@ -4525,7 +4546,7 @@ gc_heap::get_segment (size_t size, BOOL loh_p)
}
else
{
- fgm_result.set_fgm (fgm_commit_segment_beg, SEGMENT_INITIAL_COMMIT, loh_p);
+ fgm_result.set_fgm (fgm_commit_segment_beg, SEGMENT_INITIAL_COMMIT, uoh_p);
virtual_free (mem, size);
}
@@ -4549,11 +4570,11 @@ gc_heap::get_segment (size_t size, BOOL loh_p)
return result;
}
-void release_segment (heap_segment* sg)
+void gc_heap::release_segment (heap_segment* sg)
{
ptrdiff_t delta = 0;
FIRE_EVENT(GCFreeSegment_V1, heap_segment_mem(sg));
- virtual_free (sg, (uint8_t*)heap_segment_reserved (sg)-(uint8_t*)sg);
+ virtual_free (sg, (uint8_t*)heap_segment_reserved (sg)-(uint8_t*)sg, sg);
}
heap_segment* gc_heap::get_segment_for_uoh (int gen_number, size_t size
@@ -4565,7 +4586,8 @@ heap_segment* gc_heap::get_segment_for_uoh (int gen_number, size_t size
#ifndef MULTIPLE_HEAPS
gc_heap* hp = 0;
#endif //MULTIPLE_HEAPS
- heap_segment* res = hp->get_segment (size, TRUE);
+ gc_oh_num oh = gen_to_oh (gen_number);
+ heap_segment* res = hp->get_segment (size, oh);
if (res != 0)
{
#ifdef MULTIPLE_HEAPS
@@ -5398,7 +5420,12 @@ void gc_heap::gc_thread_function ()
if (heap_number == 0)
{
- gc_heap::ee_suspend_event.Wait(INFINITE, FALSE);
+ uint32_t wait_result = gc_heap::ee_suspend_event.Wait(gradual_decommit_in_progress_p ? DECOMMIT_TIME_STEP_MILLISECONDS : INFINITE, FALSE);
+ if (wait_result == WAIT_TIMEOUT)
+ {
+ gradual_decommit_in_progress_p = decommit_step ();
+ continue;
+ }
BEGIN_TIMING(suspend_ee_during_log);
GCToEEInterface::SuspendEE(SUSPEND_FOR_GC);
@@ -5480,6 +5507,12 @@ void gc_heap::gc_thread_function ()
hp->set_gc_done();
}
}
+
+ // check if we should do some decommitting
+ if (gradual_decommit_in_progress_p)
+ {
+ gradual_decommit_in_progress_p = decommit_step ();
+ }
}
else
{
@@ -5524,7 +5557,7 @@ bool gc_heap::virtual_alloc_commit_for_heap (void* addr, size_t size, int h_numb
return GCToOSInterface::VirtualCommit(addr, size);
}
-bool gc_heap::virtual_commit (void* address, size_t size, int h_number, bool* hard_limit_exceeded_p)
+bool gc_heap::virtual_commit (void* address, size_t size, gc_oh_num oh, int h_number, bool* hard_limit_exceeded_p)
{
#ifndef HOST_64BIT
assert (heap_hard_limit == 0);
@@ -5532,9 +5565,9 @@ bool gc_heap::virtual_commit (void* address, size_t size, int h_number, bool* ha
if (heap_hard_limit)
{
- bool exceeded_p = false;
-
check_commit_cs.Enter();
+ committed_by_oh[oh] += size;
+ bool exceeded_p = false;
if ((current_total_committed + size) > heap_hard_limit)
{
@@ -5573,6 +5606,8 @@ bool gc_heap::virtual_commit (void* address, size_t size, int h_number, bool* ha
if (!commit_succeeded_p && heap_hard_limit)
{
check_commit_cs.Enter();
+ committed_by_oh[oh] -= size;
+
dprintf (1, ("commit failed, updating %Id to %Id",
current_total_committed, (current_total_committed - size)));
current_total_committed -= size;
@@ -5581,11 +5616,10 @@ bool gc_heap::virtual_commit (void* address, size_t size, int h_number, bool* ha
check_commit_cs.Leave();
}
-
return commit_succeeded_p;
}
-bool gc_heap::virtual_decommit (void* address, size_t size, int h_number)
+bool gc_heap::virtual_decommit (void* address, size_t size, gc_oh_num oh, int h_number)
{
#ifndef HOST_64BIT
assert (heap_hard_limit == 0);
@@ -5596,6 +5630,7 @@ bool gc_heap::virtual_decommit (void* address, size_t size, int h_number)
if (decommit_succeeded_p && heap_hard_limit)
{
check_commit_cs.Enter();
+ committed_by_oh[oh] -= size;
current_total_committed -= size;
if (h_number < 0)
current_total_committed_bookkeeping -= size;
@@ -5605,6 +5640,18 @@ bool gc_heap::virtual_decommit (void* address, size_t size, int h_number)
return decommit_succeeded_p;
}
+void gc_heap::virtual_free (void* add, size_t allocated_size, heap_segment* sg)
+{
+ assert(!heap_hard_limit);
+ bool release_succeeded_p = GCToOSInterface::VirtualRelease (add, allocated_size);
+ if (release_succeeded_p)
+ {
+ reserved_memory -= allocated_size;
+ dprintf (2, ("Virtual Free size %Id: [%Ix, %Ix[",
+ allocated_size, (size_t)add, (size_t)((uint8_t*)add + allocated_size)));
+ }
+}
+
class mark
{
public:
@@ -7208,7 +7255,7 @@ uint32_t* gc_heap::make_card_table (uint8_t* start, uint8_t* end)
// mark array will be committed separately (per segment).
size_t commit_size = alloc_size - ms;
- if (!virtual_commit (mem, commit_size))
+ if (!virtual_commit (mem, commit_size, gc_oh_num::none))
{
dprintf (1, ("Card table commit failed"));
GCToOSInterface::VirtualRelease (mem, alloc_size);
@@ -7278,7 +7325,7 @@ int gc_heap::grow_brick_card_tables (uint8_t* start,
size_t size,
heap_segment* new_seg,
gc_heap* hp,
- BOOL loh_p)
+ BOOL uoh_p)
{
uint8_t* la = g_gc_lowest_address;
uint8_t* ha = g_gc_highest_address;
@@ -7403,7 +7450,7 @@ int gc_heap::grow_brick_card_tables (uint8_t* start,
if (!mem)
{
- set_fgm_result (fgm_grow_table, alloc_size, loh_p);
+ set_fgm_result (fgm_grow_table, alloc_size, uoh_p);
goto fail;
}
@@ -7414,10 +7461,10 @@ int gc_heap::grow_brick_card_tables (uint8_t* start,
// mark array will be committed separately (per segment).
size_t commit_size = alloc_size - ms;
- if (!virtual_commit (mem, commit_size))
+ if (!virtual_commit (mem, commit_size, gc_oh_num::none))
{
dprintf (GC_TABLE_LOG, ("Table commit failed"));
- set_fgm_result (fgm_commit_table, commit_size, loh_p);
+ set_fgm_result (fgm_commit_table, commit_size, uoh_p);
goto fail;
}
}
@@ -7484,14 +7531,14 @@ int gc_heap::grow_brick_card_tables (uint8_t* start,
if (!commit_new_mark_array_global (new_mark_array))
{
dprintf (GC_TABLE_LOG, ("failed to commit portions in the mark array for existing segments"));
- set_fgm_result (fgm_commit_table, logging_ma_commit_size, loh_p);
+ set_fgm_result (fgm_commit_table, logging_ma_commit_size, uoh_p);
goto fail;
}
if (!commit_mark_array_new_seg (hp, new_seg, translated_ct, saved_g_lowest_address))
{
dprintf (GC_TABLE_LOG, ("failed to commit mark array for the new seg"));
- set_fgm_result (fgm_commit_table, logging_ma_commit_size, loh_p);
+ set_fgm_result (fgm_commit_table, logging_ma_commit_size, uoh_p);
goto fail;
}
}
@@ -7608,7 +7655,7 @@ int gc_heap::grow_brick_card_tables (uint8_t* start,
if (!commit_mark_array_new_seg (hp, new_seg))
{
dprintf (GC_TABLE_LOG, ("failed to commit mark array for the new seg in range"));
- set_fgm_result (fgm_commit_table, logging_ma_commit_size, loh_p);
+ set_fgm_result (fgm_commit_table, logging_ma_commit_size, uoh_p);
return -1;
}
}
@@ -9141,11 +9188,12 @@ int gc_heap::object_gennum_plan (uint8_t* o)
#pragma optimize("", on) // Go back to command line default optimizations
#endif //_MSC_VER && TARGET_X86
-heap_segment* gc_heap::make_heap_segment (uint8_t* new_pages, size_t size, int h_number)
+heap_segment* gc_heap::make_heap_segment (uint8_t* new_pages, size_t size, gc_oh_num oh, int h_number)
{
+ assert(oh != gc_oh_num::none);
size_t initial_commit = SEGMENT_INITIAL_COMMIT;
- if (!virtual_commit (new_pages, initial_commit, h_number))
+ if (!virtual_commit (new_pages, initial_commit, oh, h_number))
{
return 0;
}
@@ -9245,22 +9293,40 @@ void gc_heap::decommit_heap_segment_pages (heap_segment* seg,
uint8_t* page_start = align_on_page (heap_segment_allocated(seg));
size_t size = heap_segment_committed (seg) - page_start;
extra_space = align_on_page (extra_space);
- if (size >= max ((extra_space + 2*OS_PAGE_SIZE), 100*OS_PAGE_SIZE))
+ if (size >= max ((extra_space + 2*OS_PAGE_SIZE), MIN_DECOMMIT_SIZE))
{
page_start += max(extra_space, 32*OS_PAGE_SIZE);
- size -= max (extra_space, 32*OS_PAGE_SIZE);
+ decommit_heap_segment_pages_worker (seg, page_start);
+ }
+}
- virtual_decommit (page_start, size, heap_number);
- dprintf (3, ("Decommitting heap segment [%Ix, %Ix[(%d)",
- (size_t)page_start,
- (size_t)(page_start + size),
- size));
- heap_segment_committed (seg) = page_start;
- if (heap_segment_used (seg) > heap_segment_committed (seg))
+size_t gc_heap::decommit_heap_segment_pages_worker (heap_segment* seg,
+ uint8_t* new_committed)
+{
+ assert (!use_large_pages_p);
+ uint8_t* page_start = align_on_page (new_committed);
+ size_t size = heap_segment_committed (seg) - page_start;
+ if (size > 0)
+ {
+ bool decommit_succeeded_p = virtual_decommit (page_start, size, heap_segment_oh (seg), heap_number);
+ if (decommit_succeeded_p)
{
- heap_segment_used (seg) = heap_segment_committed (seg);
+ dprintf (3, ("Decommitting heap segment [%Ix, %Ix[(%d)",
+ (size_t)page_start,
+ (size_t)(page_start + size),
+ size));
+ heap_segment_committed (seg) = page_start;
+ if (heap_segment_used (seg) > heap_segment_committed (seg))
+ {
+ heap_segment_used (seg) = heap_segment_committed (seg);
+ }
+ }
+ else
+ {
+ dprintf (3, ("Decommitting heap segment failed"));
}
}
+ return size;
}
//decommit all pages except one or 2
@@ -9275,13 +9341,16 @@ void gc_heap::decommit_heap_segment (heap_segment* seg)
#endif //BACKGROUND_GC
size_t size = heap_segment_committed (seg) - page_start;
- virtual_decommit (page_start, size, heap_number);
+ bool decommit_succeeded_p = virtual_decommit (page_start, size, heap_segment_oh (seg), heap_number);
- //re-init the segment object
- heap_segment_committed (seg) = page_start;
- if (heap_segment_used (seg) > heap_segment_committed (seg))
+ if (decommit_succeeded_p)
{
- heap_segment_used (seg) = heap_segment_committed (seg);
+ //re-init the segment object
+ heap_segment_committed (seg) = page_start;
+ if (heap_segment_used (seg) > heap_segment_committed (seg))
+ {
+ heap_segment_used (seg) = heap_segment_committed (seg);
+ }
}
}
@@ -10029,6 +10098,14 @@ gc_heap::init_semi_shared()
}
#endif //MARK_LIST
+#ifdef MULTIPLE_HEAPS
+ // gradual decommit: set size to some reasonable value per time interval
+ max_decommit_step_size = ((DECOMMIT_SIZE_PER_MILLISECOND * DECOMMIT_TIME_STEP_MILLISECONDS) / n_heaps);
+
+ // but do at least MIN_DECOMMIT_SIZE per step to make the OS call worthwhile
+ max_decommit_step_size = max (max_decommit_step_size, MIN_DECOMMIT_SIZE);
+#endif //MULTIPLE_HEAPS
+
#ifdef FEATURE_BASICFREEZE
seg_table = sorted_table::make_sorted_table();
@@ -10899,7 +10976,7 @@ BOOL gc_heap::grow_heap_segment (heap_segment* seg, uint8_t* high_address, bool*
"Growing heap_segment: %Ix high address: %Ix\n",
(size_t)seg, (size_t)high_address);
- bool ret = virtual_commit (heap_segment_committed (seg), c_size, heap_number, hard_limit_exceeded_p);
+ bool ret = virtual_commit (heap_segment_committed (seg), c_size, heap_segment_oh (seg), heap_number, hard_limit_exceeded_p);
if (ret)
{
heap_segment_committed (seg) += c_size;
@@ -15023,11 +15100,12 @@ size_t gc_heap::get_total_allocated_since_last_gc()
// Gets what's allocated on both SOH, LOH, etc that hasn't been collected.
size_t gc_heap::get_current_allocated()
{
- size_t current_alloc = 0;
- for (int i = max_generation; i < total_generation_count; i++)
+ dynamic_data* dd = dynamic_data_of (0);
+ size_t current_alloc = dd_desired_allocation (dd) - dd_new_allocation (dd);
+ for (int i = uoh_start_generation; i < total_generation_count; i++)
{
dynamic_data* dd = dynamic_data_of (i);
- current_alloc = dd_desired_allocation (dd) - dd_new_allocation (dd);
+ current_alloc += dd_desired_allocation (dd) - dd_new_allocation (dd);
}
return current_alloc;
}
@@ -16291,9 +16369,9 @@ void gc_heap::gc1()
int limit = settings.condemned_generation;
if (limit == max_generation)
{
- limit = total_generation_count;
+ limit = total_generation_count-1;
}
- for (int gen = 0; gen < limit; gen++)
+ for (int gen = 0; gen <= limit; gen++)
{
size_t total_desired = 0;
@@ -16973,7 +17051,9 @@ BOOL gc_heap::expand_soh_with_minimal_gc()
return TRUE;
}
else
+ {
return FALSE;
+ }
}
// Only to be done on the thread that calls restart in a join for server GC
@@ -17655,22 +17735,21 @@ gc_heap* gc_heap::heap_of_gc (uint8_t* o)
}
// will find all heap objects (large and small)
-uint8_t* gc_heap::find_object (uint8_t* interior, uint8_t* low)
+//
+// Callers of this method need to guarantee the interior pointer is within the heap range.
+//
+// If you need it to be stricter, eg if you only want to find an object in ephemeral range,
+// you should make sure interior is within that range before calling this method.
+uint8_t* gc_heap::find_object (uint8_t* interior)
{
+ assert (interior != 0);
+
if (!gen0_bricks_cleared)
{
#ifdef MULTIPLE_HEAPS
assert (!"Should have already been done in server GC");
#endif //MULTIPLE_HEAPS
- gen0_bricks_cleared = TRUE;
- //initialize brick table for gen 0
- for (size_t b = brick_of (generation_allocation_start (generation_of (0)));
- b < brick_of (align_on_brick
- (heap_segment_allocated (ephemeral_heap_segment)));
- b++)
- {
- set_brick (b, -1);
- }
+ clear_gen0_bricks();
}
//indicate that in the future this needs to be done during allocation
gen0_must_clear_bricks = FFIND_DECAY;
@@ -17701,7 +17780,7 @@ uint8_t* gc_heap::find_object (uint8_t* interior, uint8_t* low)
uint8_t* next_o = o + Align (size (o), align_const);
assert (next_o > o);
if ((o <= interior) && (interior < next_o))
- return o;
+ return o;
o = next_o;
}
return 0;
@@ -17711,7 +17790,7 @@ uint8_t* gc_heap::find_object (uint8_t* interior, uint8_t* low)
return 0;
}
}
- else if (interior >= low)
+ else
{
heap_segment* seg = find_segment (interior, TRUE);
if (seg)
@@ -17728,8 +17807,6 @@ uint8_t* gc_heap::find_object (uint8_t* interior, uint8_t* low)
else
return 0;
}
- else
- return 0;
}
#ifdef MULTIPLE_HEAPS
@@ -17849,15 +17926,6 @@ BOOL gc_heap::background_mark (uint8_t* o, uint8_t* low, uint8_t* high)
#endif //BACKGROUND_GC
-inline
-uint8_t* gc_heap::next_end (heap_segment* seg, uint8_t* f)
-{
- if (seg == ephemeral_heap_segment)
- return f;
- else
- return heap_segment_allocated (seg);
-}
-
#define new_start() {if (ppstop <= start) {break;} else {parm = start}}
#define ignore_start 0
#define use_start 1
@@ -18725,7 +18793,7 @@ gc_heap::ha_mark_object_simple (uint8_t** po THREAD_NUMBER_DCL)
!((ref >= current_obj) && (ref < (current_obj + current_obj_size))))
{
gc_heap* hp = gc_heap::heap_of (ref);
- current_obj = hp->find_object (ref, hp->lowest_address);
+ current_obj = hp->find_object (ref);
current_obj_size = size (current_obj);
internal_root_array[internal_root_array_index] = current_obj;
@@ -18784,7 +18852,6 @@ void gc_heap::mark_object (uint8_t* o THREAD_NUMBER_DCL)
#ifdef MULTIPLE_HEAPS
else if (o)
{
- //find the heap
gc_heap* hp = heap_of (o);
assert (hp);
if ((o >= hp->gc_low) && (o < hp->gc_high))
@@ -19092,7 +19159,7 @@ void gc_heap::background_promote (Object** ppObject, ScanContext* sc, uint32_t f
if (flags & GC_CALL_INTERIOR)
{
- o = hp->find_object (o, hp->background_saved_lowest_address);
+ o = hp->find_object (o);
if (o == 0)
return;
}
@@ -19193,27 +19260,6 @@ gc_heap::scan_background_roots (promote_func* fn, int hn, ScanContext *pSC)
}
}
-inline
-void gc_heap::background_mark_through_object (uint8_t* oo THREAD_NUMBER_DCL)
-{
- if (contain_pointers (oo))
- {
- size_t total_refs = 0;
- size_t s = size (oo);
- go_through_object_nostart (method_table(oo), oo, s, po,
- {
- uint8_t* o = *po;
- total_refs++;
- background_mark_object (o THREAD_NUMBER_ARG);
- }
- );
-
- dprintf (3,("Background marking through %Ix went through %Id refs",
- (size_t)oo,
- total_refs));
- }
-}
-
uint8_t* gc_heap::background_seg_end (heap_segment* seg, BOOL concurrent_p)
{
if (concurrent_p && (seg == saved_overflow_ephemeral_seg))
@@ -19664,7 +19710,7 @@ void gc_heap::get_memory_info (uint32_t* memory_load,
uint64_t* available_physical,
uint64_t* available_page_file)
{
- GCToOSInterface::GetMemoryStatus(memory_load, available_physical, available_page_file);
+ GCToOSInterface::GetMemoryStatus(is_restricted_physical_mem ? total_physical_mem : 0, memory_load, available_physical, available_page_file);
}
void fire_mark_event (int heap_num, int root_type, size_t bytes_marked)
@@ -20476,25 +20522,21 @@ void gc_heap::mark_phase (int condemned_gen_number, BOOL mark_only_p)
}
inline
-void gc_heap::pin_object (uint8_t* o, uint8_t** ppObject, uint8_t* low, uint8_t* high)
+void gc_heap::pin_object (uint8_t* o, uint8_t** ppObject)
{
- dprintf (3, ("Pinning %Ix", (size_t)o));
- if ((o >= low) && (o < high))
- {
- dprintf(3,("^%Ix^", (size_t)o));
- set_pinned (o);
+ dprintf (3, ("Pinning %Ix->%Ix", (size_t)ppObject, (size_t)o));
+ set_pinned (o);
#ifdef FEATURE_EVENT_TRACE
- if(EVENT_ENABLED(PinObjectAtGCTime))
- {
- fire_etw_pin_object_event(o, ppObject);
- }
+ if(EVENT_ENABLED(PinObjectAtGCTime))
+ {
+ fire_etw_pin_object_event(o, ppObject);
+ }
#endif // FEATURE_EVENT_TRACE
#if defined(ENABLE_PERF_COUNTERS) || defined(FEATURE_EVENT_TRACE)
- num_pinned_objects++;
+ num_pinned_objects++;
#endif //ENABLE_PERF_COUNTERS || FEATURE_EVENT_TRACE
- }
}
#if defined(ENABLE_PERF_COUNTERS) || defined(FEATURE_EVENT_TRACE)
@@ -22224,7 +22266,10 @@ void gc_heap::plan_phase (int condemned_gen_number)
{
if (x >= end)
{
- assert (x == end);
+ if (!use_mark_list)
+ {
+ assert (x == end);
+ }
assert (heap_segment_allocated (seg1) == end);
heap_segment_allocated (seg1) = plug_end;
@@ -24531,8 +24576,6 @@ void gc_heap::relocate_survivors (int condemned_gen_number,
size_t end_brick = brick_of (end_address - 1);
relocate_args args;
- args.low = gc_low;
- args.high = gc_high;
args.is_shortened = FALSE;
args.pinned_plug_entry = 0;
args.last_plug = 0;
@@ -25826,7 +25869,7 @@ BOOL gc_heap::commit_mark_array_by_range (uint8_t* begin, uint8_t* end, uint32_t
size));
#endif //SIMPLE_DPRINTF
- if (virtual_commit (commit_start, size))
+ if (virtual_commit (commit_start, size, gc_oh_num::none))
{
// We can only verify the mark array is cleared from begin to end, the first and the last
// page aren't necessarily all cleared 'cause they could be used by other segments or
@@ -26050,7 +26093,7 @@ void gc_heap::decommit_mark_array_by_seg (heap_segment* seg)
if (decommit_start < decommit_end)
{
- if (!virtual_decommit (decommit_start, size))
+ if (!virtual_decommit (decommit_start, size, gc_oh_num::none))
{
dprintf (GC_TABLE_LOG, ("decommit on %Ix for %Id bytes failed",
decommit_start, size));
@@ -27100,7 +27143,7 @@ void gc_heap::background_promote_callback (Object** ppObject, ScanContext* sc,
if (flags & GC_CALL_INTERIOR)
{
- o = hp->find_object (o, hp->background_saved_lowest_address);
+ o = hp->find_object (o);
if (o == 0)
return;
}
@@ -31766,56 +31809,133 @@ void gc_heap::trim_youngest_desired_low_memory()
void gc_heap::decommit_ephemeral_segment_pages()
{
- if (settings.concurrent)
+ if (settings.concurrent || use_large_pages_p)
{
return;
}
- size_t slack_space = heap_segment_committed (ephemeral_heap_segment) - heap_segment_allocated (ephemeral_heap_segment);
-
- dynamic_data* dd = dynamic_data_of (0);
-
-#ifndef MULTIPLE_HEAPS
- size_t extra_space = (g_low_memory_status ? 0 : (512 * 1024));
- size_t decommit_timeout = (g_low_memory_status ? 0 : GC_EPHEMERAL_DECOMMIT_TIMEOUT);
- size_t ephemeral_elapsed = dd_time_clock(dd) - gc_last_ephemeral_decommit_time;
+ dynamic_data* dd0 = dynamic_data_of (0);
- if (dd_desired_allocation (dd) > gc_gen0_desired_high)
- {
- gc_gen0_desired_high = dd_desired_allocation (dd) + extra_space;
- }
+ // this is how much we are going to allocate in gen 0
+ ptrdiff_t desired_allocation = dd_desired_allocation (dd0) + loh_size_threshold;
- if (ephemeral_elapsed >= decommit_timeout)
+ // estimate how we are going to need in gen 1 - estimate half the free list space gets used
+ dynamic_data* dd1 = dynamic_data_of (1);
+ ptrdiff_t desired_allocation_1 = dd_new_allocation (dd1) - (generation_free_list_space (generation_of (1)) / 2);
+ if (desired_allocation_1 > 0)
{
- slack_space = min (slack_space, gc_gen0_desired_high);
-
- gc_last_ephemeral_decommit_time = dd_time_clock(dd);
- gc_gen0_desired_high = 0;
+ desired_allocation += desired_allocation_1;
}
-#endif //!MULTIPLE_HEAPS
- if (settings.condemned_generation >= (max_generation-1))
- {
- size_t new_slack_space =
+ size_t slack_space =
#ifdef HOST_64BIT
- max(min(min(soh_segment_size/32, dd_max_size(dd)), (generation_size (max_generation) / 10)), dd_desired_allocation(dd));
+ max(min(min(soh_segment_size/32, dd_max_size (dd0)), (generation_size (max_generation) / 10)), (size_t)desired_allocation);
#else
#ifdef FEATURE_CORECLR
- dd_desired_allocation (dd);
+ desired_allocation;
#else
- dd_max_size (dd);
+ dd_max_size (dd0);
#endif //FEATURE_CORECLR
#endif // HOST_64BIT
- slack_space = min (slack_space, new_slack_space);
+ uint8_t *decommit_target = heap_segment_allocated (ephemeral_heap_segment) + slack_space;
+ if (decommit_target < heap_segment_decommit_target (ephemeral_heap_segment))
+ {
+ // we used to have a higher target - do exponential smoothing by computing
+ // essentially decommit_target = 1/3*decommit_target + 2/3*previous_decommit_target
+ // computation below is slightly different to avoid overflow
+ ptrdiff_t target_decrease = heap_segment_decommit_target (ephemeral_heap_segment) - decommit_target;
+ decommit_target += target_decrease * 2 / 3;
+ }
+
+ heap_segment_decommit_target(ephemeral_heap_segment) = decommit_target;
+
+#ifdef MULTIPLE_HEAPS
+ if (decommit_target < heap_segment_committed (ephemeral_heap_segment))
+ {
+ gradual_decommit_in_progress_p = TRUE;
}
+#ifdef _DEBUG
+ // these are only for checking against logic errors
+ ephemeral_heap_segment->saved_committed = heap_segment_committed (ephemeral_heap_segment);
+ ephemeral_heap_segment->saved_desired_allocation = dd_desired_allocation (dd0);
+#endif // _DEBUG
+#endif // MULTIPLE_HEAPS
+
+#ifndef MULTIPLE_HEAPS
+ // we want to limit the amount of decommit we do per time to indirectly
+ // limit the amount of time spent in recommit and page faults
+ size_t ephemeral_elapsed = dd_time_clock (dd0) - gc_last_ephemeral_decommit_time;
+ gc_last_ephemeral_decommit_time = dd_time_clock (dd0);
+
+ // this is the amount we were planning to decommit
+ ptrdiff_t decommit_size = heap_segment_committed (ephemeral_heap_segment) - decommit_target;
+ // we do a max of DECOMMIT_SIZE_PER_MILLISECOND per millisecond of elapsed time since the last GC
+ // we limit the elapsed time to 10 seconds to avoid spending too much time decommitting
+ ptrdiff_t max_decommit_size = min (ephemeral_elapsed, (10*1000)) * DECOMMIT_SIZE_PER_MILLISECOND;
+ decommit_size = min (decommit_size, max_decommit_size);
+
+ slack_space = heap_segment_committed (ephemeral_heap_segment) - heap_segment_allocated (ephemeral_heap_segment) - decommit_size;
decommit_heap_segment_pages (ephemeral_heap_segment, slack_space);
+#endif // !MULTIPLE_HEAPS
gc_history_per_heap* current_gc_data_per_heap = get_gc_data_per_heap();
current_gc_data_per_heap->extra_gen0_committed = heap_segment_committed (ephemeral_heap_segment) - heap_segment_allocated (ephemeral_heap_segment);
}
+#ifdef MULTIPLE_HEAPS
+// return true if we actually decommitted anything
+bool gc_heap::decommit_step ()
+{
+ // should never get here for large pages because decommit_ephemeral_segment_pages
+ // will not do anything if use_large_pages_p is true
+ assert (!use_large_pages_p);
+
+ size_t decommit_size = 0;
+ for (int i = 0; i < n_heaps; i++)
+ {
+ gc_heap* hp = gc_heap::g_heaps[i];
+ decommit_size += hp->decommit_ephemeral_segment_pages_step ();
+ }
+ return (decommit_size != 0);
+}
+
+// return the decommitted size
+size_t gc_heap::decommit_ephemeral_segment_pages_step ()
+{
+ // we rely on desired allocation not being changed outside of GC
+ assert (ephemeral_heap_segment->saved_desired_allocation == dd_desired_allocation (dynamic_data_of (0)));
+
+ uint8_t* decommit_target = heap_segment_decommit_target (ephemeral_heap_segment);
+ size_t EXTRA_SPACE = 2 * OS_PAGE_SIZE;
+ decommit_target += EXTRA_SPACE;
+ uint8_t* committed = heap_segment_committed (ephemeral_heap_segment);
+ if (decommit_target < committed)
+ {
+ // we rely on other threads not messing with committed if we are about to trim it down
+ assert (ephemeral_heap_segment->saved_committed == heap_segment_committed (ephemeral_heap_segment));
+
+ // how much would we need to decommit to get to decommit_target in one step?
+ size_t full_decommit_size = (committed - decommit_target);
+
+ // don't do more than max_decommit_step_size per step
+ size_t decommit_size = min (max_decommit_step_size, full_decommit_size);
+
+ // figure out where the new committed should be
+ uint8_t* new_committed = (committed - decommit_size);
+ size_t size = decommit_heap_segment_pages_worker (ephemeral_heap_segment, new_committed);
+
+#ifdef _DEBUG
+ ephemeral_heap_segment->saved_committed = committed - size;
+#endif // _DEBUG
+
+ return size;
+ }
+ return 0;
+}
+#endif //MULTIPLE_HEAPS
+
//This is meant to be called by decide_on_compacting.
size_t gc_heap::generation_fragmentation (generation* gen,
@@ -33391,11 +33511,6 @@ void gc_heap::sweep_uoh_objects (int gen_num)
void gc_heap::relocate_in_uoh_objects (int gen_num)
{
- relocate_args args;
- args.low = gc_low;
- args.high = gc_high;
- args.last_plug = 0;
-
generation* gen = generation_of (gen_num);
heap_segment* seg = heap_segment_rw (generation_start_segment (gen));
@@ -34969,11 +35084,14 @@ HRESULT GCHeap::Initialize()
g_num_processors = GCToOSInterface::GetTotalProcessorCount();
assert(g_num_processors != 0);
- bool is_restricted;
gc_heap::total_physical_mem = (size_t)GCConfig::GetGCTotalPhysicalMemory();
- if (!(gc_heap::total_physical_mem))
+ if (gc_heap::total_physical_mem != 0)
+ {
+ gc_heap::is_restricted_physical_mem = true;
+ }
+ else
{
- gc_heap::total_physical_mem = GCToOSInterface::GetPhysicalMemoryLimit (&is_restricted);
+ gc_heap::total_physical_mem = GCToOSInterface::GetPhysicalMemoryLimit (&gc_heap::is_restricted_physical_mem);
}
#ifdef HOST_64BIT
@@ -34992,7 +35110,7 @@ HRESULT GCHeap::Initialize()
// running in a container, use this limit for the GC heap.
if (!(gc_heap::heap_hard_limit))
{
- if (is_restricted)
+ if (gc_heap::is_restricted_physical_mem)
{
uint64_t physical_mem_for_gc = gc_heap::total_physical_mem * (uint64_t)75 / (uint64_t)100;
gc_heap::heap_hard_limit = (size_t)max ((20 * 1024 * 1024), physical_mem_for_gc);
@@ -35392,9 +35510,6 @@ Object * GCHeap::NextObj (Object * object)
// returns TRUE if the pointer is in one of the GC heaps.
bool GCHeap::IsHeapPointer (void* vpObject, bool small_heap_only)
{
- // removed STATIC_CONTRACT_CAN_TAKE_LOCK here because find_segment
- // no longer calls GCEvent::Wait which eventually takes a lock.
-
uint8_t* object = (uint8_t*) vpObject;
#ifndef FEATURE_BASICFREEZE
if (!((object < g_gc_highest_address) && (object >= g_gc_lowest_address)))
@@ -35405,7 +35520,6 @@ bool GCHeap::IsHeapPointer (void* vpObject, bool small_heap_only)
return !!hs;
}
-// promote an object
void GCHeap::Promote(Object** ppObject, ScanContext* sc, uint32_t flags)
{
THREAD_NUMBER_FROM_CONTEXT;
@@ -35428,19 +35542,19 @@ void GCHeap::Promote(Object** ppObject, ScanContext* sc, uint32_t flags)
gc_heap* hp = gc_heap::heap_of (o);
+ if ((o < hp->gc_low) || (o >= hp->gc_high))
+ {
+ return;
+ }
+
dprintf (3, ("Promote %Ix", (size_t)o));
if (flags & GC_CALL_INTERIOR)
{
- if ((o < hp->gc_low) || (o >= hp->gc_high))
- {
- return;
- }
- if ( (o = hp->find_object (o, hp->gc_low)) == 0)
+ if ((o = hp->find_object (o)) == 0)
{
return;
}
-
}
#ifdef FEATURE_CONSERVATIVE_GC
@@ -35460,17 +35574,14 @@ void GCHeap::Promote(Object** ppObject, ScanContext* sc, uint32_t flags)
#endif //_DEBUG
if (flags & GC_CALL_PINNED)
- hp->pin_object (o, (uint8_t**) ppObject, hp->gc_low, hp->gc_high);
+ hp->pin_object (o, (uint8_t**) ppObject);
#ifdef STRESS_PINNING
if ((++n_promote % 20) == 1)
- hp->pin_object (o, (uint8_t**) ppObject, hp->gc_low, hp->gc_high);
+ hp->pin_object (o, (uint8_t**) ppObject);
#endif //STRESS_PINNING
- if ((o >= hp->gc_low) && (o < hp->gc_high))
- {
- hpt->mark_object_simple (&o THREAD_NUMBER_ARG);
- }
+ hpt->mark_object_simple (&o THREAD_NUMBER_ARG);
STRESS_LOG_ROOT_PROMOTE(ppObject, o, o ? header(o)->GetMethodTable() : NULL);
}
@@ -35517,7 +35628,7 @@ void GCHeap::Relocate (Object** ppObject, ScanContext* sc,
if (gc_heap::loh_object_p (object))
{
- pheader = hp->find_object (object, 0);
+ pheader = hp->find_object (object);
if (pheader == 0)
{
return;
@@ -35910,7 +36021,7 @@ GCHeap::GetContainingObject (void *pInteriorPtr, bool fCollectedGenOnly)
if (o >= lowest && o < highest)
{
- o = hp->find_object (o, lowest);
+ o = hp->find_object (o);
}
else
{
@@ -38151,13 +38262,12 @@ void initGCShadow()
#define INVALIDGCVALUE (void*)((size_t)0xcccccccd)
- // test to see if 'ptr' was only updated via the write barrier.
+// test to see if 'ptr' was only updated via the write barrier.
inline void testGCShadow(Object** ptr)
{
Object** shadow = (Object**) &g_GCShadow[((uint8_t*) ptr - g_gc_lowest_address)];
if (*ptr != 0 && (uint8_t*) shadow < g_GCShadowEnd && *ptr != *shadow)
{
-
// If you get this assertion, someone updated a GC pointer in the heap without
// using the write barrier. To find out who, check the value of
// dd_collection_count (dynamic_data_of (0)). Also
@@ -38180,7 +38290,6 @@ inline void testGCShadow(Object** ptr)
// TODO: fixed to detect the race. We've only seen this race from VolatileWritePtr,
// TODO: so elect not to fix jithelp.asm at this time. It should be done if we start hitting
// TODO: erroneous asserts in here.
-
if(*shadow!=INVALIDGCVALUE)
{
#ifdef FEATURE_BASICFREEZE
diff --git a/src/coreclr/src/gc/gcconfig.cpp b/src/coreclr/src/gc/gcconfig.cpp
index b3a43f105bb8f2..02004e3d475089 100644
--- a/src/coreclr/src/gc/gcconfig.cpp
+++ b/src/coreclr/src/gc/gcconfig.cpp
@@ -6,23 +6,23 @@
#include "gcenv.h"
#include "gc.h"
-#define BOOL_CONFIG(name, key, default, unused_doc) \
- bool GCConfig::Get##name() { return s_##name; } \
+#define BOOL_CONFIG(name, unused_private_key, unused_public_key, default, unused_doc) \
+ bool GCConfig::Get##name() { return s_##name; } \
bool GCConfig::s_##name = default;
-#define INT_CONFIG(name, key, default, unused_doc) \
- int64_t GCConfig::Get##name() { return s_##name; } \
+#define INT_CONFIG(name, unused_private_key, unused_public_key, default, unused_doc) \
+ int64_t GCConfig::Get##name() { return s_##name; } \
int64_t GCConfig::s_##name = default;
// String configs are not cached because 1) they are rare and
// not on hot paths and 2) they involve transfers of ownership
// of EE-allocated strings, which is potentially complicated.
-#define STRING_CONFIG(name, key, unused_doc) \
- GCConfigStringHolder GCConfig::Get##name() \
- { \
- const char* resultStr = nullptr; \
- GCToEEInterface::GetStringConfigValue(key, &resultStr); \
- return GCConfigStringHolder(resultStr); \
+#define STRING_CONFIG(name, private_key, public_key, unused_doc) \
+ GCConfigStringHolder GCConfig::Get##name() \
+ { \
+ const char* resultStr = nullptr; \
+ GCToEEInterface::GetStringConfigValue(private_key, public_key, &resultStr); \
+ return GCConfigStringHolder(resultStr); \
}
GC_CONFIGURATION_KEYS
@@ -33,18 +33,19 @@ GC_CONFIGURATION_KEYS
void GCConfig::Initialize()
{
-#define BOOL_CONFIG(name, key, default, unused_doc) \
- GCToEEInterface::GetBooleanConfigValue(key, &s_##name);
+#define BOOL_CONFIG(name, private_key, public_key, default, unused_doc) \
+ GCToEEInterface::GetBooleanConfigValue(private_key, public_key, &s_##name);
-#define INT_CONFIG(name, key, default, unused_doc) \
- GCToEEInterface::GetIntConfigValue(key, &s_##name);
+#define INT_CONFIG(name, private_key, public_key, default, unused_doc) \
+ GCToEEInterface::GetIntConfigValue(private_key, public_key, &s_##name);
-#define STRING_CONFIG(unused_name, unused_key, unused_doc)
+#define STRING_CONFIG(unused_name, unused_private_key, unused_public_key, unused_doc)
GC_CONFIGURATION_KEYS
#undef BOOL_CONFIG
#undef INT_CONFIG
+#undef STRING_CONFIG
}
// Parse an integer index or range of two indices separated by '-'.
diff --git a/src/coreclr/src/gc/gcconfig.h b/src/coreclr/src/gc/gcconfig.h
index 75893bb50bc86e..f51191c56a1d6c 100644
--- a/src/coreclr/src/gc/gcconfig.h
+++ b/src/coreclr/src/gc/gcconfig.h
@@ -64,103 +64,81 @@ class GCConfigStringHolder
// Each one of these keys produces a method on GCConfig with the name "Get{name}", where {name}
// is the first parameter of the *_CONFIG macros below.
#define GC_CONFIGURATION_KEYS \
- BOOL_CONFIG(ServerGC, "gcServer", false, "Whether we should be using Server GC") \
- BOOL_CONFIG(ConcurrentGC, "gcConcurrent", true, "Whether we should be using Concurrent GC") \
- BOOL_CONFIG(ConservativeGC, "gcConservative", false, "Enables/Disables conservative GC") \
- BOOL_CONFIG(ForceCompact, "gcForceCompact", false, \
- "When set to true, always do compacting GC") \
- BOOL_CONFIG(RetainVM, "GCRetainVM", false, \
- "When set we put the segments that should be deleted on a standby list (instead of " \
- "releasing them back to the OS) which will be considered to satisfy new segment requests"\
- " (note that the same thing can be specified via API which is the supported way)") \
- BOOL_CONFIG(BreakOnOOM, "GCBreakOnOOM", false, \
- "Does a DebugBreak at the soonest time we detect an OOM") \
- BOOL_CONFIG(NoAffinitize, "GCNoAffinitize", false, \
- "If set, do not affinitize server GC threads") \
- BOOL_CONFIG(LogEnabled, "GCLogEnabled", false, \
- "Specifies if you want to turn on logging in GC") \
- BOOL_CONFIG(ConfigLogEnabled, "GCConfigLogEnabled", false, \
- "Specifies the name of the GC config log file") \
- BOOL_CONFIG(GCNumaAware, "GCNumaAware", true, "Enables numa allocations in the GC") \
- BOOL_CONFIG(GCCpuGroup, "GCCpuGroup", false, "Enables CPU groups in the GC") \
- BOOL_CONFIG(GCLargePages, "GCLargePages", false, "Enables using Large Pages in the GC") \
- INT_CONFIG(HeapVerifyLevel, "HeapVerify", HEAPVERIFY_NONE, \
- "When set verifies the integrity of the managed heap on entry and exit of each GC") \
- INT_CONFIG(LOHCompactionMode, "GCLOHCompact", 0, "Specifies the LOH compaction mode") \
- INT_CONFIG(LOHThreshold, "GCLOHThreshold", LARGE_OBJECT_SIZE, \
- "Specifies the size that will make objects go on LOH") \
- INT_CONFIG(BGCSpinCount, "BGCSpinCount", 140, "Specifies the bgc spin count") \
- INT_CONFIG(BGCSpin, "BGCSpin", 2, "Specifies the bgc spin time") \
- INT_CONFIG(HeapCount, "GCHeapCount", 0, "Specifies the number of server GC heaps") \
- INT_CONFIG(Gen0Size, "GCgen0size", 0, "Specifies the smallest gen0 size") \
- INT_CONFIG(SegmentSize, "GCSegmentSize", 0, "Specifies the managed heap segment size") \
- INT_CONFIG(LatencyMode, "GCLatencyMode", -1, \
- "Specifies the GC latency mode - batch, interactive or low latency (note that the same " \
- "thing can be specified via API which is the supported way") \
- INT_CONFIG(LatencyLevel, "GCLatencyLevel", 1, \
- "Specifies the GC latency level that you want to optimize for. Must be a number from 0" \
- "3. See documentation for more details on each level.") \
- INT_CONFIG(LogFileSize, "GCLogFileSize", 0, "Specifies the GC log file size") \
- INT_CONFIG(CompactRatio, "GCCompactRatio", 0, \
- "Specifies the ratio compacting GCs vs sweeping") \
- INT_CONFIG(GCHeapAffinitizeMask, "GCHeapAffinitizeMask", 0, \
- "Specifies processor mask for Server GC threads") \
- STRING_CONFIG(GCHeapAffinitizeRanges, "GCHeapAffinitizeRanges", \
- "Specifies list of processors for Server GC threads. The format is a comma separated " \
- "list of processor numbers or ranges of processor numbers. On Windows, each entry is " \
- "prefixed by the CPU group number. Example: Unix - 1,3,5,7-9,12, Windows - 0:1,1:7-9") \
- INT_CONFIG(GCHighMemPercent, "GCHighMemPercent", 0, \
- "The percent for GC to consider as high memory") \
- INT_CONFIG(GCProvModeStress, "GCProvModeStress", 0, \
- "Stress the provisional modes") \
- INT_CONFIG(GCGen0MaxBudget, "GCGen0MaxBudget", 0, \
- "Specifies the largest gen0 allocation budget") \
- INT_CONFIG(GCHeapHardLimit, "GCHeapHardLimit", 0, \
- "Specifies a hard limit for the GC heap") \
- INT_CONFIG(GCHeapHardLimitPercent, "GCHeapHardLimitPercent", 0, \
- "Specifies the GC heap usage as a percentage of the total memory") \
- INT_CONFIG(GCTotalPhysicalMemory, "GCTotalPhysicalMemory", 0, \
- "Specifies what the GC should consider to be total physical memory") \
- STRING_CONFIG(LogFile, "GCLogFile", "Specifies the name of the GC log file") \
- STRING_CONFIG(ConfigLogFile, "GCConfigLogFile", \
- "Specifies the name of the GC config log file") \
- INT_CONFIG(BGCFLTuningEnabled, "BGCFLTuningEnabled", 0, "Enables FL tuning") \
- INT_CONFIG(BGCMemGoal, "BGCMemGoal", 75, "Specifies the physical memory load goal") \
- INT_CONFIG(BGCMemGoalSlack, "BGCMemGoalSlack", 10, \
- "Specifies comfort zone of going above goal") \
- INT_CONFIG(BGCFLSweepGoal, "BGCFLSweepGoal", 0, \
- "Specifies the gen2 sweep FL ratio goal") \
- INT_CONFIG(BGCFLSweepGoalLOH, "BGCFLSweepGoalLOH", 0, \
- "Specifies the LOH sweep FL ratio goal") \
- INT_CONFIG(BGCFLkp, "BGCFLkp", 6000, "Specifies kp for above goal tuning") \
- INT_CONFIG(BGCFLki, "BGCFLki", 1000, "Specifies ki for above goal tuning") \
- INT_CONFIG(BGCFLkd, "BGCFLkd", 11, "Specifies kd for above goal tuning") \
- INT_CONFIG(BGCFLff, "BGCFLff", 100, "Specifies ff ratio") \
- INT_CONFIG(BGCFLSmoothFactor, "BGCFLSmoothFactor", 150, "Smoothing over these") \
- INT_CONFIG(BGCFLGradualD, "BGCFLGradualD", 0, \
- "Enable gradual D instead of cutting of at the value") \
- INT_CONFIG(BGCMLkp, "BGCMLkp", 1000, "Specifies kp for ML tuning") \
- INT_CONFIG(BGCMLki, "BGCMLki", 16, "Specifies ki for ML tuning") \
- INT_CONFIG(BGCFLEnableKi, "BGCFLEnableKi", 1, "Enables ki for above goal tuning") \
- INT_CONFIG(BGCFLEnableKd, "BGCFLEnableKd", 0, "Enables kd for above goal tuning") \
- INT_CONFIG(BGCFLEnableSmooth, "BGCFLEnableSmooth", 0, "Enables smoothing") \
- INT_CONFIG(BGCFLEnableTBH, "BGCFLEnableTBH", 0, "Enables TBH") \
- INT_CONFIG(BGCFLEnableFF, "BGCFLEnableFF", 0, "Enables FF") \
- INT_CONFIG(BGCG2RatioStep, "BGCG2RatioStep", 5, "Ratio correction factor for ML loop")
+ BOOL_CONFIG (ServerGC, "gcServer", NULL, false, "Whether we should be using Server GC") \
+ BOOL_CONFIG (ConcurrentGC, "gcConcurrent", NULL, true, "Whether we should be using Concurrent GC") \
+ BOOL_CONFIG (ConservativeGC, "gcConservative", NULL, false, "Enables/Disables conservative GC") \
+ BOOL_CONFIG (ForceCompact, "gcForceCompact", NULL, false, "When set to true, always do compacting GC") \
+ BOOL_CONFIG (RetainVM, "GCRetainVM", NULL, false, "When set we put the segments that should be deleted on a standby list (instead of " \
+ "releasing them back to the OS) which will be considered to satisfy new segment requests" \
+ " (note that the same thing can be specified via API which is the supported way)") \
+ BOOL_CONFIG (BreakOnOOM, "GCBreakOnOOM", NULL, false, "Does a DebugBreak at the soonest time we detect an OOM") \
+ BOOL_CONFIG (NoAffinitize, "GCNoAffinitize", "System.GC.NoAffinitize", false, "If set, do not affinitize server GC threads") \
+ BOOL_CONFIG (LogEnabled, "GCLogEnabled", NULL, false, "Specifies if you want to turn on logging in GC") \
+ BOOL_CONFIG (ConfigLogEnabled, "GCConfigLogEnabled", NULL, false, "Specifies the name of the GC config log file") \
+ BOOL_CONFIG (GCNumaAware, "GCNumaAware", NULL, true, "Enables numa allocations in the GC") \
+ BOOL_CONFIG (GCCpuGroup, "GCCpuGroup", NULL, false, "Enables CPU groups in the GC") \
+ BOOL_CONFIG (GCLargePages, "GCLargePages", "System.GC.LargePages", false, "Enables using Large Pages in the GC") \
+ INT_CONFIG (HeapVerifyLevel, "HeapVerify", NULL, HEAPVERIFY_NONE, "When set verifies the integrity of the managed heap on entry and exit of each GC") \
+ INT_CONFIG (LOHCompactionMode, "GCLOHCompact", NULL, 0, "Specifies the LOH compaction mode") \
+ INT_CONFIG (LOHThreshold, "GCLOHThreshold", NULL, LARGE_OBJECT_SIZE, "Specifies the size that will make objects go on LOH") \
+ INT_CONFIG (BGCSpinCount, "BGCSpinCount", NULL, 140, "Specifies the bgc spin count") \
+ INT_CONFIG (BGCSpin, "BGCSpin", NULL, 2, "Specifies the bgc spin time") \
+ INT_CONFIG (HeapCount, "GCHeapCount", "System.GC.HeapCount", 0, "Specifies the number of server GC heaps") \
+ INT_CONFIG (Gen0Size, "GCgen0size", NULL, 0, "Specifies the smallest gen0 size") \
+ INT_CONFIG (SegmentSize, "GCSegmentSize", NULL, 0, "Specifies the managed heap segment size") \
+ INT_CONFIG (LatencyMode, "GCLatencyMode", NULL, -1, "Specifies the GC latency mode - batch, interactive or low latency (note that the same " \
+ "thing can be specified via API which is the supported way") \
+ INT_CONFIG (LatencyLevel, "GCLatencyLevel", NULL, 1, "Specifies the GC latency level that you want to optimize for. Must be a number from 0" \
+ "3. See documentation for more details on each level.") \
+ INT_CONFIG (LogFileSize, "GCLogFileSize", NULL, 0, "Specifies the GC log file size") \
+ INT_CONFIG (CompactRatio, "GCCompactRatio", NULL, 0, "Specifies the ratio compacting GCs vs sweeping") \
+ INT_CONFIG (GCHeapAffinitizeMask, "GCHeapAffinitizeMask", "System.GC.HeapAffinitizeMask", 0, "Specifies processor mask for Server GC threads") \
+ STRING_CONFIG(GCHeapAffinitizeRanges, "GCHeapAffinitizeRanges", NULL, "Specifies list of processors for Server GC threads. The format is a comma separated " \
+ "list of processor numbers or ranges of processor numbers. On Windows, each entry is " \
+ "prefixed by the CPU group number. Example: Unix - 1,3,5,7-9,12, Windows - 0:1,1:7-9") \
+ INT_CONFIG (GCHighMemPercent, "GCHighMemPercent", NULL, 0, "The percent for GC to consider as high memory") \
+ INT_CONFIG (GCProvModeStress, "GCProvModeStress", NULL, 0, "Stress the provisional modes") \
+ INT_CONFIG (GCGen0MaxBudget, "GCGen0MaxBudget", NULL, 0, "Specifies the largest gen0 allocation budget") \
+ INT_CONFIG (GCHeapHardLimit, "GCHeapHardLimit", NULL, 0, "Specifies a hard limit for the GC heap") \
+ INT_CONFIG (GCHeapHardLimitPercent, "GCHeapHardLimitPercent", "System.GC.HeapHardLimitPercent", 0, "Specifies the GC heap usage as a percentage of the total memory") \
+ INT_CONFIG (GCTotalPhysicalMemory, "GCTotalPhysicalMemory", NULL, 0, "Specifies what the GC should consider to be total physical memory") \
+ STRING_CONFIG(LogFile, "GCLogFile", NULL, "Specifies the name of the GC log file") \
+ STRING_CONFIG(ConfigLogFile, "GCConfigLogFile", NULL, "Specifies the name of the GC config log file") \
+ INT_CONFIG (BGCFLTuningEnabled, "BGCFLTuningEnabled", NULL, 0, "Enables FL tuning") \
+ INT_CONFIG (BGCMemGoal, "BGCMemGoal", NULL, 75, "Specifies the physical memory load goal") \
+ INT_CONFIG (BGCMemGoalSlack, "BGCMemGoalSlack", NULL, 10, "Specifies comfort zone of going above goal") \
+ INT_CONFIG (BGCFLSweepGoal, "BGCFLSweepGoal", NULL, 0, "Specifies the gen2 sweep FL ratio goal") \
+ INT_CONFIG (BGCFLSweepGoalLOH, "BGCFLSweepGoalLOH", NULL, 0, "Specifies the LOH sweep FL ratio goal") \
+ INT_CONFIG (BGCFLkp, "BGCFLkp", NULL, 6000, "Specifies kp for above goal tuning") \
+ INT_CONFIG (BGCFLki, "BGCFLki", NULL, 1000, "Specifies ki for above goal tuning") \
+ INT_CONFIG (BGCFLkd, "BGCFLkd", NULL, 11, "Specifies kd for above goal tuning") \
+ INT_CONFIG (BGCFLff, "BGCFLff", NULL, 100, "Specifies ff ratio") \
+ INT_CONFIG (BGCFLSmoothFactor, "BGCFLSmoothFactor", NULL, 150, "Smoothing over these") \
+ INT_CONFIG (BGCFLGradualD, "BGCFLGradualD", NULL, 0, "Enable gradual D instead of cutting of at the value") \
+ INT_CONFIG (BGCMLkp, "BGCMLkp", NULL, 1000, "Specifies kp for ML tuning") \
+ INT_CONFIG (BGCMLki, "BGCMLki", NULL, 16, "Specifies ki for ML tuning") \
+ INT_CONFIG (BGCFLEnableKi, "BGCFLEnableKi", NULL, 1, "Enables ki for above goal tuning") \
+ INT_CONFIG (BGCFLEnableKd, "BGCFLEnableKd", NULL, 0, "Enables kd for above goal tuning") \
+ INT_CONFIG (BGCFLEnableSmooth, "BGCFLEnableSmooth", NULL, 0, "Enables smoothing") \
+ INT_CONFIG (BGCFLEnableTBH, "BGCFLEnableTBH", NULL, 0, "Enables TBH") \
+ INT_CONFIG (BGCFLEnableFF, "BGCFLEnableFF", NULL, 0, "Enables FF") \
+ INT_CONFIG (BGCG2RatioStep, "BGCG2RatioStep", NULL, 5, "Ratio correction factor for ML loop")
// This class is responsible for retreiving configuration information
// for how the GC should operate.
class GCConfig
{
-#define BOOL_CONFIG(name, unused_key, unused_default, unused_doc) \
+#define BOOL_CONFIG(name, unused_private_key, unused_public_key, unused_default, unused_doc) \
public: static bool Get##name(); \
private: static bool s_##name;
-#define INT_CONFIG(name, unused_key, unused_default, unused_doc) \
+#define INT_CONFIG(name, unused_private_key, unused_public_key, unused_default, unused_doc) \
public: static int64_t Get##name(); \
private: static int64_t s_##name;
-#define STRING_CONFIG(name, unused_key, unused_doc) \
+#define STRING_CONFIG(name, unused_private_key, unused_public_key, unused_doc) \
public: static GCConfigStringHolder Get##name();
+
GC_CONFIGURATION_KEYS
+
#undef BOOL_CONFIG
#undef INT_CONFIG
#undef STRING_CONFIG
diff --git a/src/coreclr/src/gc/gcenv.ee.standalone.inl b/src/coreclr/src/gc/gcenv.ee.standalone.inl
index 7ed523edd6892a..b91d0c4d5b8915 100644
--- a/src/coreclr/src/gc/gcenv.ee.standalone.inl
+++ b/src/coreclr/src/gc/gcenv.ee.standalone.inl
@@ -203,22 +203,22 @@ inline MethodTable* GCToEEInterface::GetFreeObjectMethodTable()
return g_theGCToCLR->GetFreeObjectMethodTable();
}
-inline bool GCToEEInterface::GetBooleanConfigValue(const char* key, bool* value)
+inline bool GCToEEInterface::GetBooleanConfigValue(const char* privateKey, const char* publicKey, bool* value)
{
assert(g_theGCToCLR != nullptr);
- return g_theGCToCLR->GetBooleanConfigValue(key, value);
+ return g_theGCToCLR->GetBooleanConfigValue(privateKey, publicKey, value);
}
-inline bool GCToEEInterface::GetIntConfigValue(const char* key, int64_t* value)
+inline bool GCToEEInterface::GetIntConfigValue(const char* privateKey, const char* publicKey, int64_t* value)
{
assert(g_theGCToCLR != nullptr);
- return g_theGCToCLR->GetIntConfigValue(key, value);
+ return g_theGCToCLR->GetIntConfigValue(privateKey, publicKey, value);
}
-inline bool GCToEEInterface::GetStringConfigValue(const char* key, const char** value)
+inline bool GCToEEInterface::GetStringConfigValue(const char* privateKey, const char* publicKey, const char** value)
{
assert(g_theGCToCLR != nullptr);
- return g_theGCToCLR->GetStringConfigValue(key, value);
+ return g_theGCToCLR->GetStringConfigValue(privateKey, publicKey, value);
}
inline void GCToEEInterface::FreeStringConfigValue(const char* value)
diff --git a/src/coreclr/src/gc/gchandletable.cpp b/src/coreclr/src/gc/gchandletable.cpp
index b7c4bf26872336..d3f93b457521eb 100644
--- a/src/coreclr/src/gc/gchandletable.cpp
+++ b/src/coreclr/src/gc/gchandletable.cpp
@@ -168,7 +168,7 @@ Object* GCHandleManager::InterlockedCompareExchangeObjectInHandle(OBJECTHANDLE h
HandleType GCHandleManager::HandleFetchType(OBJECTHANDLE handle)
{
uint32_t type = ::HandleFetchType(handle);
- assert(type >= HNDTYPE_WEAK_SHORT && type <= HNDTYPE_WEAK_WINRT);
+ assert(type >= HNDTYPE_WEAK_SHORT && type <= HNDTYPE_WEAK_NATIVE_COM);
return static_cast(type);
}
diff --git a/src/coreclr/src/gc/gcinterface.ee.h b/src/coreclr/src/gc/gcinterface.ee.h
index 4d8cb61c0a6d28..bc9a0ab162c34d 100644
--- a/src/coreclr/src/gc/gcinterface.ee.h
+++ b/src/coreclr/src/gc/gcinterface.ee.h
@@ -348,13 +348,13 @@ class IGCToCLR {
// pointer is undefined. Otherwise, true is returned and the config key's value is written to
// the passed-in pointer.
virtual
- bool GetBooleanConfigValue(const char* key, bool* value) = 0;
+ bool GetBooleanConfigValue(const char* privateKey, const char* publicKey, bool* value) = 0;
virtual
- bool GetIntConfigValue(const char* key, int64_t* value) = 0;
+ bool GetIntConfigValue(const char* privateKey, const char* publicKey, int64_t* value) = 0;
virtual
- bool GetStringConfigValue(const char* key, const char** value) = 0;
+ bool GetStringConfigValue(const char* privateKey, const char* publicKey, const char** value) = 0;
virtual
void FreeStringConfigValue(const char* value) = 0;
diff --git a/src/coreclr/src/gc/gcinterface.h b/src/coreclr/src/gc/gcinterface.h
index 122106c2ae273a..e9bef6a502b458 100644
--- a/src/coreclr/src/gc/gcinterface.h
+++ b/src/coreclr/src/gc/gcinterface.h
@@ -422,18 +422,18 @@ typedef enum
HNDTYPE_SIZEDREF = 8,
/*
- * WINRT WEAK HANDLES
+ * NATIVE WEAK HANDLES
*
- * WinRT weak reference handles hold two different types of weak handles to any
+ * Native weak reference handles hold two different types of weak handles to any
* RCW with an underlying COM object that implements IWeakReferenceSource. The
* object reference itself is a short weak handle to the RCW. In addition an
* IWeakReference* to the underlying COM object is stored, allowing the handle
* to create a new RCW if the existing RCW is collected. This ensures that any
- * code holding onto a WinRT weak reference can always access an RCW to the
+ * code holding onto a native weak reference can always access an RCW to the
* underlying COM object as long as it has not been released by all of its strong
* references.
*/
- HNDTYPE_WEAK_WINRT = 9
+ HNDTYPE_WEAK_NATIVE_COM = 9
} HandleType;
typedef enum
diff --git a/src/coreclr/src/gc/gcpriv.h b/src/coreclr/src/gc/gcpriv.h
index 8b7765d20e3744..ac6e746317889f 100644
--- a/src/coreclr/src/gc/gcpriv.h
+++ b/src/coreclr/src/gc/gcpriv.h
@@ -223,6 +223,7 @@ const int policy_expand = 2;
#define JOIN_LOG (MIN_CUSTOM_LOG_LEVEL + 6)
#define SPINLOCK_LOG (MIN_CUSTOM_LOG_LEVEL + 7)
#define SNOOP_LOG (MIN_CUSTOM_LOG_LEVEL + 8)
+#define COMMIT_ACCOUNTING_LOG (MIN_CUSTOM_LOG_LEVEL + 9)
// NOTE! This is for HEAP_BALANCE_INSTRUMENTATION
// This particular one is special and needs to be well formatted because we
@@ -398,6 +399,17 @@ enum gc_tuning_point
tuning_deciding_short_on_seg = 5
};
+enum gc_oh_num
+{
+ soh = 0,
+ loh = 1,
+ poh = 2,
+ none = 3,
+ total_oh_count = 4
+};
+
+gc_oh_num gen_to_oh (int gen);
+
#if defined(TRACE_GC) && defined(BACKGROUND_GC)
static const char * const str_bgc_state[] =
{
@@ -1138,6 +1150,7 @@ class gc_heap
static
heap_segment* make_heap_segment (uint8_t* new_pages,
size_t size,
+ gc_oh_num oh,
int h_number);
static
@@ -1269,6 +1282,11 @@ class gc_heap
#endif // FEATURE_BASICFREEZE
protected:
+ PER_HEAP_ISOLATED
+ BOOL reserve_initial_memory (size_t normal_size, size_t large_size, size_t pinned_size, int num_heaps, bool use_large_pages_p);
+
+ PER_HEAP_ISOLATED
+ void destroy_initial_memory();
PER_HEAP_ISOLATED
void walk_heap (walk_fn fn, void* context, int gen_number, BOOL walk_large_object_heap_p);
@@ -1631,7 +1649,9 @@ class gc_heap
PER_HEAP
heap_segment* soh_get_segment_to_expand();
PER_HEAP
- heap_segment* get_segment (size_t size, BOOL loh_p);
+ heap_segment* get_segment (size_t size, gc_oh_num oh);
+ PER_HEAP_ISOLATED
+ void release_segment (heap_segment* sg);
PER_HEAP_ISOLATED
void seg_mapping_table_add_segment (heap_segment* seg, gc_heap* hp);
PER_HEAP_ISOLATED
@@ -1651,13 +1671,21 @@ class gc_heap
PER_HEAP
void decommit_heap_segment_pages (heap_segment* seg, size_t extra_space);
PER_HEAP
+ size_t decommit_ephemeral_segment_pages_step ();
+ PER_HEAP
+ size_t decommit_heap_segment_pages_worker (heap_segment* seg, uint8_t *new_committed);
+ PER_HEAP_ISOLATED
+ bool decommit_step ();
+ PER_HEAP
void decommit_heap_segment (heap_segment* seg);
PER_HEAP_ISOLATED
bool virtual_alloc_commit_for_heap (void* addr, size_t size, int h_number);
PER_HEAP_ISOLATED
- bool virtual_commit (void* address, size_t size, int h_number=-1, bool* hard_limit_exceeded_p=NULL);
+ bool virtual_commit (void* address, size_t size, gc_oh_num oh, int h_number=-1, bool* hard_limit_exceeded_p=NULL);
PER_HEAP_ISOLATED
- bool virtual_decommit (void* address, size_t size, int h_number=-1);
+ bool virtual_decommit (void* address, size_t size, gc_oh_num oh, int h_number=-1);
+ PER_HEAP_ISOLATED
+ void virtual_free (void* add, size_t size, heap_segment* sg=NULL);
PER_HEAP
void clear_gen0_bricks();
#ifdef BACKGROUND_GC
@@ -1878,7 +1906,7 @@ class gc_heap
size_t& promoted_bytes (int);
PER_HEAP
- uint8_t* find_object (uint8_t* o, uint8_t* low);
+ uint8_t* find_object (uint8_t* o);
PER_HEAP
dynamic_data* dynamic_data_of (int gen_number);
@@ -2012,8 +2040,6 @@ class gc_heap
PER_HEAP
void background_sweep ();
PER_HEAP
- void background_mark_through_object (uint8_t* oo THREAD_NUMBER_DCL);
- PER_HEAP
uint8_t* background_seg_end (heap_segment* seg, BOOL concurrent_p);
PER_HEAP
uint8_t* background_first_overflow (uint8_t* min_add,
@@ -2300,8 +2326,6 @@ class gc_heap
#endif //BACKGROUND_GC
- PER_HEAP
- uint8_t* next_end (heap_segment* seg, uint8_t* f);
PER_HEAP
void mark_through_object (uint8_t* oo, BOOL mark_class_object_p THREAD_NUMBER_DCL);
PER_HEAP
@@ -2329,7 +2353,7 @@ class gc_heap
void mark_phase (int condemned_gen_number, BOOL mark_only_p);
PER_HEAP
- void pin_object (uint8_t* o, uint8_t** ppObject, uint8_t* low, uint8_t* high);
+ void pin_object (uint8_t* o, uint8_t** ppObject);
#if defined(ENABLE_PERF_COUNTERS) || defined(FEATURE_EVENT_TRACE)
PER_HEAP_ISOLATED
@@ -2450,8 +2474,6 @@ class gc_heap
void check_loh_compact_mode (BOOL all_heaps_compacted_p);
#endif //FEATURE_LOH_COMPACTION
- PER_HEAP
- void decommit_ephemeral_segment_pages (int condemned_gen_number);
PER_HEAP
void fix_generation_bounds (int condemned_gen_number,
generation* consing_gen);
@@ -2487,8 +2509,6 @@ class gc_heap
struct relocate_args
{
uint8_t* last_plug;
- uint8_t* low;
- uint8_t* high;
BOOL is_shortened;
mark* pinned_plug_entry;
};
@@ -3261,9 +3281,6 @@ class gc_heap
PER_HEAP_ISOLATED
size_t gc_last_ephemeral_decommit_time;
- PER_HEAP_ISOLATED
- size_t gc_gen0_desired_high;
-
PER_HEAP
size_t gen0_big_free_spaces;
@@ -3295,6 +3312,9 @@ class gc_heap
PER_HEAP_ISOLATED
uint32_t v_high_memory_load_th;
+ PER_HEAP_ISOLATED
+ bool is_restricted_physical_mem;
+
PER_HEAP_ISOLATED
uint64_t mem_one_percent;
@@ -3369,6 +3389,9 @@ class gc_heap
PER_HEAP_ISOLATED
size_t current_total_committed;
+ PER_HEAP_ISOLATED
+ size_t committed_by_oh[total_oh_count];
+
// This is what GC uses for its own bookkeeping.
PER_HEAP_ISOLATED
size_t current_total_committed_bookkeeping;
@@ -3788,6 +3811,14 @@ class gc_heap
PER_HEAP_ISOLATED
BOOL proceed_with_gc_p;
+#ifdef MULTIPLE_HEAPS
+ PER_HEAP_ISOLATED
+ BOOL gradual_decommit_in_progress_p;
+
+ PER_HEAP_ISOLATED
+ size_t max_decommit_step_size;
+#endif //MULTIPLE_HEAPS
+
#define youngest_generation (generation_of (0))
#define large_object_generation (generation_of (loh_generation))
#define pinned_object_generation (generation_of (poh_generation))
@@ -4126,7 +4157,6 @@ class gc_heap
#endif //HEAP_ANALYZE
- /* ----------------------- global members ----------------------- */
public:
PER_HEAP
@@ -4702,7 +4732,12 @@ class heap_segment
uint8_t* background_allocated;
#ifdef MULTIPLE_HEAPS
gc_heap* heap;
+#ifdef _DEBUG
+ uint8_t* saved_committed;
+ size_t saved_desired_allocation;
+#endif // _DEBUG
#endif //MULTIPLE_HEAPS
+ uint8_t* decommit_target;
uint8_t* plan_allocated;
uint8_t* saved_bg_allocated;
@@ -4739,6 +4774,11 @@ uint8_t*& heap_segment_committed (heap_segment* inst)
return inst->committed;
}
inline
+uint8_t*& heap_segment_decommit_target (heap_segment* inst)
+{
+ return inst->decommit_target;
+}
+inline
uint8_t*& heap_segment_used (heap_segment* inst)
{
return inst->used;
@@ -4775,6 +4815,22 @@ BOOL heap_segment_uoh_p (heap_segment * inst)
return !!(inst->flags & (heap_segment_flags_loh | heap_segment_flags_poh));
}
+inline gc_oh_num heap_segment_oh (heap_segment * inst)
+{
+ if ((inst->flags & heap_segment_flags_loh) != 0)
+ {
+ return gc_oh_num::loh;
+ }
+ else if ((inst->flags & heap_segment_flags_poh) != 0)
+ {
+ return gc_oh_num::poh;
+ }
+ else
+ {
+ return gc_oh_num::soh;
+ }
+}
+
#ifdef BACKGROUND_GC
inline
BOOL heap_segment_decommitted_p (heap_segment * inst)
diff --git a/src/coreclr/src/gc/handletable.cpp b/src/coreclr/src/gc/handletable.cpp
index 898e843419341b..1b56c74c791cff 100644
--- a/src/coreclr/src/gc/handletable.cpp
+++ b/src/coreclr/src/gc/handletable.cpp
@@ -409,10 +409,10 @@ void HndDestroyHandleOfUnknownType(HHANDLETABLE hTable, OBJECTHANDLE handle)
_ASSERTE(handle);
#ifdef FEATURE_COMINTEROP
- // If we're being asked to destroy a WinRT weak handle, that will cause a leak
+ // If we're being asked to destroy a native COM weak handle, that will cause a leak
// of the IWeakReference* that it holds in its extra data. Instead of using this
- // API use DestroyWinRTWeakHandle instead.
- _ASSERTE(HandleFetchType(handle) != HNDTYPE_WEAK_WINRT);
+ // API use DestroyNativeComWeakHandle instead.
+ _ASSERTE(HandleFetchType(handle) != HNDTYPE_WEAK_NATIVE_COM);
#endif // FEATURE_COMINTEROP
// fetch the type and then free normally
diff --git a/src/coreclr/src/gc/objecthandle.cpp b/src/coreclr/src/gc/objecthandle.cpp
index 4a4f201ca03bd0..e6a5160d7ee543 100644
--- a/src/coreclr/src/gc/objecthandle.cpp
+++ b/src/coreclr/src/gc/objecthandle.cpp
@@ -426,7 +426,7 @@ void CALLBACK ScanPointerForProfilerAndETW(_UNCHECKED_OBJECTREF *pObjRef, uintpt
case HNDTYPE_WEAK_SHORT:
case HNDTYPE_WEAK_LONG:
#ifdef FEATURE_COMINTEROP
- case HNDTYPE_WEAK_WINRT:
+ case HNDTYPE_WEAK_NATIVE_COM:
#endif // FEATURE_COMINTEROP
rootFlags |= kEtwGCRootFlagsWeakRef;
break;
@@ -520,7 +520,7 @@ static const uint32_t s_rgTypeFlags[] =
HNDF_EXTRAINFO, // HNDTYPE_DEPENDENT
HNDF_NORMAL, // HNDTYPE_ASYNCPINNED
HNDF_EXTRAINFO, // HNDTYPE_SIZEDREF
- HNDF_EXTRAINFO, // HNDTYPE_WEAK_WINRT
+ HNDF_EXTRAINFO, // HNDTYPE_WEAK_NATIVE_COM
};
int getNumberOfSlots()
@@ -1380,7 +1380,7 @@ void Ref_CheckAlive(uint32_t condemned, uint32_t maxgen, uintptr_t lp1)
{
HNDTYPE_WEAK_SHORT
#ifdef FEATURE_COMINTEROP
- , HNDTYPE_WEAK_WINRT
+ , HNDTYPE_WEAK_NATIVE_COM
#endif // FEATURE_COMINTEROP
};
uint32_t flags = (((ScanContext*) lp1)->concurrent) ? HNDGCF_ASYNC : HNDGCF_NORMAL;
@@ -1439,7 +1439,7 @@ void Ref_UpdatePointers(uint32_t condemned, uint32_t maxgen, ScanContext* sc, Re
HNDTYPE_REFCOUNTED,
#endif // FEATURE_COMINTEROP || FEATURE_REDHAWK
#ifdef FEATURE_COMINTEROP
- HNDTYPE_WEAK_WINRT,
+ HNDTYPE_WEAK_NATIVE_COM,
#endif // FEATURE_COMINTEROP
HNDTYPE_SIZEDREF,
};
@@ -1485,7 +1485,7 @@ void Ref_ScanHandlesForProfilerAndETW(uint32_t maxgen, uintptr_t lp1, handle_sca
HNDTYPE_REFCOUNTED,
#endif // FEATURE_COMINTEROP || FEATURE_REDHAWK
#ifdef FEATURE_COMINTEROP
- HNDTYPE_WEAK_WINRT,
+ HNDTYPE_WEAK_NATIVE_COM,
#endif // FEATURE_COMINTEROP
HNDTYPE_PINNED,
// HNDTYPE_VARIABLE,
@@ -1631,7 +1631,7 @@ void Ref_AgeHandles(uint32_t condemned, uint32_t maxgen, uintptr_t lp1)
HNDTYPE_REFCOUNTED,
#endif // FEATURE_COMINTEROP || FEATURE_REDHAWK
#ifdef FEATURE_COMINTEROP
- HNDTYPE_WEAK_WINRT,
+ HNDTYPE_WEAK_NATIVE_COM,
#endif // FEATURE_COMINTEROP
HNDTYPE_ASYNCPINNED,
HNDTYPE_SIZEDREF,
@@ -1674,7 +1674,7 @@ void Ref_RejuvenateHandles(uint32_t condemned, uint32_t maxgen, uintptr_t lp1)
HNDTYPE_REFCOUNTED,
#endif // FEATURE_COMINTEROP || FEATURE_REDHAWK
#ifdef FEATURE_COMINTEROP
- HNDTYPE_WEAK_WINRT,
+ HNDTYPE_WEAK_NATIVE_COM,
#endif // FEATURE_COMINTEROP
HNDTYPE_ASYNCPINNED,
HNDTYPE_SIZEDREF,
@@ -1716,7 +1716,7 @@ void Ref_VerifyHandleTable(uint32_t condemned, uint32_t maxgen, ScanContext* sc)
HNDTYPE_REFCOUNTED,
#endif // FEATURE_COMINTEROP || FEATURE_REDHAWK
#ifdef FEATURE_COMINTEROP
- HNDTYPE_WEAK_WINRT,
+ HNDTYPE_WEAK_NATIVE_COM,
#endif // FEATURE_COMINTEROP
HNDTYPE_ASYNCPINNED,
HNDTYPE_SIZEDREF,
diff --git a/src/coreclr/src/gc/sample/gcenv.ee.cpp b/src/coreclr/src/gc/sample/gcenv.ee.cpp
index 9dad62e20bf1a1..6f5151ee1534cd 100644
--- a/src/coreclr/src/gc/sample/gcenv.ee.cpp
+++ b/src/coreclr/src/gc/sample/gcenv.ee.cpp
@@ -275,17 +275,17 @@ bool GCToEEInterface::EagerFinalized(Object* obj)
return false;
}
-bool GCToEEInterface::GetBooleanConfigValue(const char* key, bool* value)
+bool GCToEEInterface::GetBooleanConfigValue(const char* privateKey, const char* publicKey, bool* value)
{
return false;
}
-bool GCToEEInterface::GetIntConfigValue(const char* key, int64_t* value)
+bool GCToEEInterface::GetIntConfigValue(const char* privateKey, const char* publicKey, int64_t* value)
{
return false;
}
-bool GCToEEInterface::GetStringConfigValue(const char* key, const char** value)
+bool GCToEEInterface::GetStringConfigValue(const char* privateKey, const char* publicKey, const char** value)
{
return false;
}
diff --git a/src/coreclr/src/gc/unix/cgroup.cpp b/src/coreclr/src/gc/unix/cgroup.cpp
index 5d8ea5320a89f6..9cdc5b14df021c 100644
--- a/src/coreclr/src/gc/unix/cgroup.cpp
+++ b/src/coreclr/src/gc/unix/cgroup.cpp
@@ -54,6 +54,8 @@ Module Name:
#define CGROUP1_CFS_PERIOD_FILENAME "/cpu.cfs_period_us"
#define CGROUP2_CPU_MAX_FILENAME "/cpu.max"
+extern bool ReadMemoryValueFromFile(const char* filename, uint64_t* val);
+
class CGroup
{
// the cgroup version number or 0 to indicate cgroups are not found or not enabled
@@ -132,6 +134,10 @@ class CGroup
// modes because both of those involve cgroup v1 controllers managing
// resources.
+#if !HAVE_NON_LEGACY_STATFS
+ return 0;
+#else
+
struct statfs stats;
int result = statfs("/sys/fs/cgroup", &stats);
if (result != 0)
@@ -145,6 +151,7 @@ class CGroup
assert(!"Unexpected file system type for /sys/fs/cgroup");
return 0;
}
+#endif
}
static bool IsCGroup1MemorySubsystem(const char *strTok){
@@ -415,52 +422,6 @@ class CGroup
return result;
}
- static bool ReadMemoryValueFromFile(const char* filename, uint64_t* val)
- {
- bool result = false;
- char *line = nullptr;
- size_t lineLen = 0;
- char* endptr = nullptr;
- uint64_t num = 0, l, multiplier;
- FILE* file = nullptr;
-
- if (val == nullptr)
- goto done;
-
- file = fopen(filename, "r");
- if (file == nullptr)
- goto done;
-
- if (getline(&line, &lineLen, file) == -1)
- goto done;
-
- errno = 0;
- num = strtoull(line, &endptr, 0);
- if (line == endptr || errno != 0)
- goto done;
-
- multiplier = 1;
- switch(*endptr)
- {
- case 'g':
- case 'G': multiplier = 1024;
- case 'm':
- case 'M': multiplier = multiplier*1024;
- case 'k':
- case 'K': multiplier = multiplier*1024;
- }
-
- *val = num * multiplier;
- result = true;
- if (*val/multiplier != num)
- result = false;
- done:
- if (file)
- fclose(file);
- free(line);
- return result;
- }
-
static bool GetCGroup1CpuLimit(uint32_t *val)
{
long long quota;
diff --git a/src/coreclr/src/gc/unix/config.gc.h.in b/src/coreclr/src/gc/unix/config.gc.h.in
index a1d60d3e1fda2d..ad33f95b6bdc81 100644
--- a/src/coreclr/src/gc/unix/config.gc.h.in
+++ b/src/coreclr/src/gc/unix/config.gc.h.in
@@ -14,6 +14,7 @@
#cmakedefine01 HAVE_SCHED_GETCPU
#cmakedefine01 HAVE_NUMA_H
#cmakedefine01 HAVE_VM_ALLOCATE
+#cmakedefine01 HAVE_SWAPCTL
#cmakedefine01 HAVE_SYSCTLBYNAME
#cmakedefine01 HAVE_PTHREAD_CONDATTR_SETCLOCK
#cmakedefine01 HAVE_MACH_ABSOLUTE_TIME
diff --git a/src/coreclr/src/gc/unix/configure.cmake b/src/coreclr/src/gc/unix/configure.cmake
index 9ed93b95b7159d..cc7fb90265d8be 100644
--- a/src/coreclr/src/gc/unix/configure.cmake
+++ b/src/coreclr/src/gc/unix/configure.cmake
@@ -98,6 +98,7 @@ check_library_exists(${PTHREAD_LIBRARY} pthread_getaffinity_np "" HAVE_PTHREAD_G
check_cxx_symbol_exists(_SC_PHYS_PAGES unistd.h HAVE__SC_PHYS_PAGES)
check_cxx_symbol_exists(_SC_AVPHYS_PAGES unistd.h HAVE__SC_AVPHYS_PAGES)
+check_cxx_symbol_exists(swapctl sys/swap.h HAVE_SWAPCTL)
check_function_exists(sysctl HAVE_SYSCTL)
check_function_exists(sysinfo HAVE_SYSINFO)
check_function_exists(sysconf HAVE_SYSCONF)
diff --git a/src/coreclr/src/gc/unix/gcenv.unix.cpp b/src/coreclr/src/gc/unix/gcenv.unix.cpp
index 855f2da02a9822..9b78b70f53abbb 100644
--- a/src/coreclr/src/gc/unix/gcenv.unix.cpp
+++ b/src/coreclr/src/gc/unix/gcenv.unix.cpp
@@ -22,6 +22,10 @@
#include "gcenv.unix.inl"
#include "volatile.h"
+#if HAVE_SWAPCTL
+#include
+#endif
+
#undef min
#undef max
@@ -731,7 +735,7 @@ bool GCToOSInterface::VirtualReset(void * address, size_t size, bool unlock)
#endif
{
// In case the MADV_FREE is not supported, use MADV_DONTNEED
- st = madvise(address, size, MADV_DONTNEED);
+ st = posix_madvise(address, size, MADV_DONTNEED);
}
return (st == 0);
@@ -768,6 +772,52 @@ bool GCToOSInterface::GetWriteWatch(bool resetState, void* address, size_t size,
return false;
}
+bool ReadMemoryValueFromFile(const char* filename, uint64_t* val)
+{
+ bool result = false;
+ char* line = nullptr;
+ size_t lineLen = 0;
+ char* endptr = nullptr;
+ uint64_t num = 0, l, multiplier;
+ FILE* file = nullptr;
+
+ if (val == nullptr)
+ goto done;
+
+ file = fopen(filename, "r");
+ if (file == nullptr)
+ goto done;
+
+ if (getline(&line, &lineLen, file) == -1)
+ goto done;
+
+ errno = 0;
+ num = strtoull(line, &endptr, 0);
+ if (line == endptr || errno != 0)
+ goto done;
+
+ multiplier = 1;
+ switch (*endptr)
+ {
+ case 'g':
+ case 'G': multiplier = 1024;
+ case 'm':
+ case 'M': multiplier = multiplier * 1024;
+ case 'k':
+ case 'K': multiplier = multiplier * 1024;
+ }
+
+ *val = num * multiplier;
+ result = true;
+ if (*val / multiplier != num)
+ result = false;
+done:
+ if (file)
+ fclose(file);
+ free(line);
+ return result;
+}
+
static size_t GetLogicalProcessorCacheSizeFromOS()
{
size_t cacheSize = 0;
@@ -785,6 +835,49 @@ static size_t GetLogicalProcessorCacheSizeFromOS()
cacheSize = std::max(cacheSize, ( size_t) sysconf(_SC_LEVEL4_CACHE_SIZE));
#endif
+#if defined(HOST_ARM64)
+ if (cacheSize == 0)
+ {
+ size_t size;
+
+ if (ReadMemoryValueFromFile("/sys/devices/system/cpu/cpu0/cache/index0/size", &size))
+ cacheSize = std::max(cacheSize, size);
+ if (ReadMemoryValueFromFile("/sys/devices/system/cpu/cpu0/cache/index1/size", &size))
+ cacheSize = std::max(cacheSize, size);
+ if (ReadMemoryValueFromFile("/sys/devices/system/cpu/cpu0/cache/index2/size", &size))
+ cacheSize = std::max(cacheSize, size);
+ if (ReadMemoryValueFromFile("/sys/devices/system/cpu/cpu0/cache/index3/size", &size))
+ cacheSize = std::max(cacheSize, size);
+ if (ReadMemoryValueFromFile("/sys/devices/system/cpu/cpu0/cache/index4/size", &size))
+ cacheSize = std::max(cacheSize, size);
+ }
+
+ if (cacheSize == 0)
+ {
+ // It is currently expected to be missing cache size info
+ //
+ // _SC_LEVEL*_*CACHE_SIZE is not yet present. Work is in progress to enable this for arm64
+ //
+ // /sys/devices/system/cpu/cpu*/cache/index*/ is also not yet present in most systems.
+ // Arm64 patch is in Linux kernel tip.
+ //
+ // midr_el1 is available in "/sys/devices/system/cpu/cpu0/regs/identification/midr_el1",
+ // but without an exhaustive list of ARM64 processors any decode of midr_el1
+ // Would likely be incomplete
+
+ // Published information on ARM64 architectures is limited.
+ // If we use recent high core count chips as a guide for state of the art, we find
+ // total L3 cache to be 1-2MB/core. As always, there are exceptions.
+
+ // Estimate cache size based on CPU count
+ // Assume lower core count are lighter weight parts which are likely to have smaller caches
+ // Assume L3$/CPU grows linearly from 256K to 1.5M/CPU as logicalCPUs grows from 2 to 12 CPUs
+ DWORD logicalCPUs = g_totalCpuCount;
+
+ cacheSize = logicalCPUs * std::min(1536, std::max(256, (int)logicalCPUs * 128)) * 1024;
+ }
+#endif
+
#if HAVE_SYSCTLBYNAME
if (cacheSize == 0)
{
@@ -953,7 +1046,7 @@ uint32_t GCToOSInterface::GetCurrentProcessCpuCount()
// Return the size of the user-mode portion of the virtual address space of this process.
// Return:
-// non zero if it has succeeded, 0 if it has failed
+// non zero if it has succeeded, (size_t)-1 if not available
size_t GCToOSInterface::GetVirtualMemoryLimit()
{
#ifdef HOST_64BIT
@@ -1112,6 +1205,13 @@ uint64_t GetAvailablePageFile()
available += avail * pagesize;
}
}
+#elif HAVE_SWAPCTL
+ struct anoninfo ai;
+ if (swapctl(SC_AINFO, &ai) != -1)
+ {
+ int pagesize = getpagesize();
+ available = ai.ani_free * pagesize;
+ }
#elif HAVE_SYSINFO
// Linux
struct sysinfo info;
@@ -1132,11 +1232,13 @@ uint64_t GetAvailablePageFile()
// Get memory status
// Parameters:
+// restricted_limit - The amount of physical memory in bytes that the current process is being restricted to. If non-zero, it used to calculate
+// memory_load and available_physical. If zero, memory_load and available_physical is calculate based on all available memory.
// memory_load - A number between 0 and 100 that specifies the approximate percentage of physical memory
// that is in use (0 indicates no memory use and 100 indicates full memory use).
// available_physical - The amount of physical memory currently available, in bytes.
// available_page_file - The maximum amount of memory the current process can commit, in bytes.
-void GCToOSInterface::GetMemoryStatus(uint32_t* memory_load, uint64_t* available_physical, uint64_t* available_page_file)
+void GCToOSInterface::GetMemoryStatus(uint64_t restricted_limit, uint32_t* memory_load, uint64_t* available_physical, uint64_t* available_page_file)
{
uint64_t available = 0;
uint32_t load = 0;
@@ -1144,16 +1246,14 @@ void GCToOSInterface::GetMemoryStatus(uint32_t* memory_load, uint64_t* available
if (memory_load != nullptr || available_physical != nullptr)
{
size_t used;
- bool isRestricted;
- uint64_t total = GetPhysicalMemoryLimit(&isRestricted);
- if (isRestricted)
+ if (restricted_limit != 0)
{
// Get the physical memory in use - from it, we can get the physical memory available.
// We do this only when we have the total physical memory available.
if (GetPhysicalMemoryUsed(&used))
{
- available = total > used ? total-used : 0;
- load = (uint32_t)(((float)used * 100) / (float)total);
+ available = restricted_limit > used ? restricted_limit - used : 0;
+ load = (uint32_t)(((float)used * 100) / (float)restricted_limit);
}
}
else
@@ -1162,7 +1262,9 @@ void GCToOSInterface::GetMemoryStatus(uint32_t* memory_load, uint64_t* available
if (memory_load != NULL)
{
- uint32_t load = 0;
+ bool isRestricted;
+ uint64_t total = GetPhysicalMemoryLimit(&isRestricted);
+
if (total > available)
{
used = total - available;
@@ -1180,7 +1282,6 @@ void GCToOSInterface::GetMemoryStatus(uint32_t* memory_load, uint64_t* available
if (available_page_file != nullptr)
*available_page_file = GetAvailablePageFile();
-
}
// Get a high precision performance counter
diff --git a/src/coreclr/src/gc/windows/gcenv.windows.cpp b/src/coreclr/src/gc/windows/gcenv.windows.cpp
index 2aaf7ba19aa5e3..a9504bd4b69adf 100644
--- a/src/coreclr/src/gc/windows/gcenv.windows.cpp
+++ b/src/coreclr/src/gc/windows/gcenv.windows.cpp
@@ -18,22 +18,12 @@
GCSystemInfo g_SystemInfo;
-typedef BOOL (WINAPI *PGET_PROCESS_MEMORY_INFO)(HANDLE handle, PROCESS_MEMORY_COUNTERS* memCounters, uint32_t cb);
-static PGET_PROCESS_MEMORY_INFO GCGetProcessMemoryInfo = 0;
-
static size_t g_RestrictedPhysicalMemoryLimit = (size_t)UINTPTR_MAX;
-// For 32-bit processes the virtual address range could be smaller than the amount of physical
-// memory on the machine/in the container, we need to restrict by the VM.
-static bool g_UseRestrictedVirtualMemory = false;
-
static bool g_SeLockMemoryPrivilegeAcquired = false;
static AffinitySet g_processAffinitySet;
-typedef BOOL (WINAPI *PIS_PROCESS_IN_JOB)(HANDLE processHandle, HANDLE jobHandle, BOOL* result);
-typedef BOOL (WINAPI *PQUERY_INFORMATION_JOB_OBJECT)(HANDLE jobHandle, JOBOBJECTINFOCLASS jobObjectInfoClass, void* lpJobObjectInfo, DWORD cbJobObjectInfoLength, LPDWORD lpReturnLength);
-
namespace {
static bool g_fEnableGCNumaAware;
@@ -297,36 +287,14 @@ static size_t GetRestrictedPhysicalMemoryLimit()
uint64_t total_virtual = 0;
uint64_t total_physical = 0;
BOOL in_job_p = FALSE;
- HINSTANCE hinstKernel32 = 0;
-
- PIS_PROCESS_IN_JOB GCIsProcessInJob = 0;
- PQUERY_INFORMATION_JOB_OBJECT GCQueryInformationJobObject = 0;
-
- hinstKernel32 = LoadLibraryEx(L"kernel32.dll", nullptr, LOAD_LIBRARY_SEARCH_SYSTEM32);
- if (!hinstKernel32)
- goto exit;
- GCIsProcessInJob = (PIS_PROCESS_IN_JOB)GetProcAddress(hinstKernel32, "IsProcessInJob");
- if (!GCIsProcessInJob)
- goto exit;
-
- if (!GCIsProcessInJob(GetCurrentProcess(), NULL, &in_job_p))
+ if (!IsProcessInJob(GetCurrentProcess(), NULL, &in_job_p))
goto exit;
if (in_job_p)
{
- GCGetProcessMemoryInfo = (PGET_PROCESS_MEMORY_INFO)GetProcAddress(hinstKernel32, "K32GetProcessMemoryInfo");
-
- if (!GCGetProcessMemoryInfo)
- goto exit;
-
- GCQueryInformationJobObject = (PQUERY_INFORMATION_JOB_OBJECT)GetProcAddress(hinstKernel32, "QueryInformationJobObject");
-
- if (!GCQueryInformationJobObject)
- goto exit;
-
JOBOBJECT_EXTENDED_LIMIT_INFORMATION limit_info;
- if (GCQueryInformationJobObject (NULL, JobObjectExtendedLimitInformation, &limit_info,
+ if (QueryInformationJobObject (NULL, JobObjectExtendedLimitInformation, &limit_info,
sizeof(limit_info), NULL))
{
size_t job_memory_limit = (size_t)UINTPTR_MAX;
@@ -373,13 +341,6 @@ static size_t GetRestrictedPhysicalMemoryLimit()
if (job_physical_memory_limit == (size_t)UINTPTR_MAX)
{
job_physical_memory_limit = 0;
-
- if (hinstKernel32 != 0)
- {
- FreeLibrary(hinstKernel32);
- hinstKernel32 = 0;
- GCGetProcessMemoryInfo = 0;
- }
}
// Check to see if we are limited by VM.
@@ -399,15 +360,8 @@ static size_t GetRestrictedPhysicalMemoryLimit()
if (total_virtual < total_physical)
{
- if (hinstKernel32 != 0)
- {
- // We can also free the lib here - if we are limited by VM we will not be calling
- // GetProcessMemoryInfo.
- FreeLibrary(hinstKernel32);
- GCGetProcessMemoryInfo = 0;
- }
- g_UseRestrictedVirtualMemory = true;
- job_physical_memory_limit = (size_t)total_virtual;
+ // Limited by virtual address space
+ job_physical_memory_limit = 0;
}
VolatileStore(&g_RestrictedPhysicalMemoryLimit, job_physical_memory_limit);
@@ -1044,7 +998,7 @@ uint32_t GCToOSInterface::GetCurrentProcessCpuCount()
// Return the size of the user-mode portion of the virtual address space of this process.
// Return:
-// non zero if it has succeeded, 0 if it has failed
+// non zero if it has succeeded, (size_t)-1 if not available
size_t GCToOSInterface::GetVirtualMemoryLimit()
{
MEMORYSTATUSEX memStatus;
@@ -1067,7 +1021,7 @@ uint64_t GCToOSInterface::GetPhysicalMemoryLimit(bool* is_restricted)
size_t restricted_limit = GetRestrictedPhysicalMemoryLimit();
if (restricted_limit != 0)
{
- if (is_restricted && !g_UseRestrictedVirtualMemory)
+ if (is_restricted)
*is_restricted = true;
return restricted_limit;
@@ -1081,23 +1035,22 @@ uint64_t GCToOSInterface::GetPhysicalMemoryLimit(bool* is_restricted)
// Get memory status
// Parameters:
+// restricted_limit - The amount of physical memory in bytes that the current process is being restricted to. If non-zero, it used to calculate
+// memory_load and available_physical. If zero, memory_load and available_physical is calculate based on all available memory.
// memory_load - A number between 0 and 100 that specifies the approximate percentage of physical memory
// that is in use (0 indicates no memory use and 100 indicates full memory use).
// available_physical - The amount of physical memory currently available, in bytes.
// available_page_file - The maximum amount of memory the current process can commit, in bytes.
-void GCToOSInterface::GetMemoryStatus(uint32_t* memory_load, uint64_t* available_physical, uint64_t* available_page_file)
+void GCToOSInterface::GetMemoryStatus(uint64_t restricted_limit, uint32_t* memory_load, uint64_t* available_physical, uint64_t* available_page_file)
{
- uint64_t restricted_limit = GetRestrictedPhysicalMemoryLimit();
if (restricted_limit != 0)
{
size_t workingSetSize;
BOOL status = FALSE;
- if (!g_UseRestrictedVirtualMemory)
- {
- PROCESS_MEMORY_COUNTERS pmc;
- status = GCGetProcessMemoryInfo(GetCurrentProcess(), &pmc, sizeof(pmc));
- workingSetSize = pmc.WorkingSetSize;
- }
+
+ PROCESS_MEMORY_COUNTERS pmc;
+ status = GetProcessMemoryInfo(GetCurrentProcess(), &pmc, sizeof(pmc));
+ workingSetSize = pmc.WorkingSetSize;
if(status)
{
@@ -1123,9 +1076,10 @@ void GCToOSInterface::GetMemoryStatus(uint32_t* memory_load, uint64_t* available
MEMORYSTATUSEX ms;
::GetProcessMemoryLoad(&ms);
- if (g_UseRestrictedVirtualMemory)
+ // For 32-bit processes the virtual address range could be smaller than the amount of physical
+ // memory on the machine/in the container, we need to restrict by the VM.
+ if (ms.ullTotalVirtual < ms.ullTotalPhys)
{
- _ASSERTE (ms.ullTotalVirtual == restricted_limit);
if (memory_load != NULL)
*memory_load = (uint32_t)((float)(ms.ullTotalVirtual - ms.ullAvailVirtual) * 100.0 / (float)ms.ullTotalVirtual);
if (available_physical != NULL)
diff --git a/src/coreclr/src/hosts/corerun/corerun.cpp b/src/coreclr/src/hosts/corerun/corerun.cpp
index 75c73b68a5ebd4..1643922a3b593f 100644
--- a/src/coreclr/src/hosts/corerun/corerun.cpp
+++ b/src/coreclr/src/hosts/corerun/corerun.cpp
@@ -767,6 +767,7 @@ bool TryRun(const int argc, const wchar_t* argv[], Logger &log, const bool verbo
hr = InitializeHost(log, hostEnvironment, appPath, appNiPath, nativeDllSearchDirs, appLocalWinmetadata, &hostHandle, (unsigned int*)&domainId);
if (FAILED(hr))
{
+ exitCode = hr;
return false;
}
diff --git a/src/coreclr/src/hosts/unixcoreruncommon/config.h.in b/src/coreclr/src/hosts/unixcoreruncommon/config.h.in
index 0e457b411c3c8d..8adb7098ef11b8 100644
--- a/src/coreclr/src/hosts/unixcoreruncommon/config.h.in
+++ b/src/coreclr/src/hosts/unixcoreruncommon/config.h.in
@@ -6,5 +6,6 @@
#define __CONFIG_H__
#cmakedefine01 HAVE_GETAUXVAL
+#cmakedefine01 HAVE_DIRENT_D_TYPE
#endif // __CONFIG_H__
diff --git a/src/coreclr/src/hosts/unixcoreruncommon/configure.cmake b/src/coreclr/src/hosts/unixcoreruncommon/configure.cmake
index ea90cc8a3551c4..61c98113949945 100644
--- a/src/coreclr/src/hosts/unixcoreruncommon/configure.cmake
+++ b/src/coreclr/src/hosts/unixcoreruncommon/configure.cmake
@@ -1,4 +1,5 @@
check_symbol_exists(getauxval sys/auxv.h HAVE_GETAUXVAL)
+check_struct_has_member ("struct dirent" d_type dirent.h HAVE_DIRENT_D_TYPE)
configure_file(
${CMAKE_CURRENT_SOURCE_DIR}/config.h.in
diff --git a/src/coreclr/src/hosts/unixcoreruncommon/coreruncommon.cpp b/src/coreclr/src/hosts/unixcoreruncommon/coreruncommon.cpp
index a2c00b1c3b4ab4..1b6e1fa8204103 100644
--- a/src/coreclr/src/hosts/unixcoreruncommon/coreruncommon.cpp
+++ b/src/coreclr/src/hosts/unixcoreruncommon/coreruncommon.cpp
@@ -35,6 +35,13 @@
#define SUCCEEDED(Status) ((Status) >= 0)
#endif // !SUCCEEDED
+#if !HAVE_DIRENT_D_TYPE
+#define DT_UNKNOWN 0
+#define DT_DIR 4
+#define DT_REG 8
+#define DT_LNK 10
+#endif
+
// Name of the environment variable controlling server GC.
// If set to 1, server GC is enabled on startup. If 0, server GC is
// disabled. Server GC is off by default.
@@ -109,6 +116,34 @@ bool GetEntrypointExecutableAbsolutePath(std::string& entrypointExecutable)
{
result = false;
}
+#elif defined(__sun)
+ const char *path;
+ if ((path = getexecname()) == NULL)
+ {
+ result = false;
+ }
+ else if (*path != '/')
+ {
+ char *cwd;
+ if ((cwd = getcwd(NULL, PATH_MAX)) == NULL)
+ {
+ result = false;
+ }
+ else
+ {
+ entrypointExecutable
+ .assign(cwd)
+ .append("/")
+ .append(path);
+ result = true;
+ free(cwd);
+ }
+ }
+ else
+ {
+ entrypointExecutable.assign(path);
+ result = true;
+ }
#else
#if HAVE_GETAUXVAL && defined(AT_EXECFN)
@@ -216,8 +251,14 @@ void AddFilesFromDirectoryToTpaList(const char* directory, std::string& tpaList)
// For all entries in the directory
while ((entry = readdir(dir)) != nullptr)
{
+#if HAVE_DIRENT_D_TYPE
+ int dirEntryType = entry->d_type;
+#else
+ int dirEntryType = DT_UNKNOWN;
+#endif
+
// We are interested in files only
- switch (entry->d_type)
+ switch (dirEntryType)
{
case DT_REG:
break;
diff --git a/src/coreclr/src/ilasm/CMakeLists.txt b/src/coreclr/src/ilasm/CMakeLists.txt
index e8f1460f3c414f..94fe6b83d3a414 100644
--- a/src/coreclr/src/ilasm/CMakeLists.txt
+++ b/src/coreclr/src/ilasm/CMakeLists.txt
@@ -52,7 +52,7 @@ if(CLR_CMAKE_HOST_UNIX)
set_source_files_properties( prebuilt/asmparse.cpp PROPERTIES COMPILE_FLAGS "-O0" )
endif(CLR_CMAKE_HOST_UNIX)
-if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
# This option is necessary to ensure that the overloaded delete operator defined inside
# of the utilcode will be used instead of the standard library delete operator.
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Xlinker -Bsymbolic")
@@ -61,8 +61,7 @@ if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
# ensure proper resolving of circular references between a subset of the libraries.
set(START_LIBRARY_GROUP -Wl,--start-group)
set(END_LIBRARY_GROUP -Wl,--end-group)
-endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
-
+endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
_add_executable(ilasm
${ILASM_SOURCES}
diff --git a/src/coreclr/src/ilasm/ilasmpch.h b/src/coreclr/src/ilasm/ilasmpch.h
index 56e86c21d0c07e..31be491abc8a6a 100644
--- a/src/coreclr/src/ilasm/ilasmpch.h
+++ b/src/coreclr/src/ilasm/ilasmpch.h
@@ -24,4 +24,7 @@
#include "openum.h" // for CEE_*
#include // for vararg macros
+#include "mdfileformat.h"
+#include "stgpooli.h"
+
#endif
diff --git a/src/coreclr/src/ilasm/main.cpp b/src/coreclr/src/ilasm/main.cpp
index 188733f5829cb7..3257323446d77f 100644
--- a/src/coreclr/src/ilasm/main.cpp
+++ b/src/coreclr/src/ilasm/main.cpp
@@ -9,7 +9,7 @@
#include "ilasmpch.h"
#include "asmparse.h"
-#include "ndpversion.h"
+#include "clrversion.h"
#include "shimload.h"
#include "strsafe.h"
@@ -149,7 +149,7 @@ extern "C" int _cdecl wmain(int argc, __in WCHAR **argv)
#pragma warning(pop)
#endif
{
- printf("\nMicrosoft (R) .NET Framework IL Assembler version " VER_FILEVERSION_STR);
+ printf("\nMicrosoft (R) .NET IL Assembler version " CLR_PRODUCT_VERSION);
printf("\n%S\n\n", VER_LEGALCOPYRIGHT_LOGO_STR_L);
goto PrintUsageAndExit;
@@ -643,7 +643,7 @@ extern "C" int _cdecl wmain(int argc, __in WCHAR **argv)
//======================================================================
if(bLogo)
{
- printf("\nMicrosoft (R) .NET Framework IL Assembler. Version " VER_FILEVERSION_STR);
+ printf("\nMicrosoft (R) .NET IL Assembler. Version " CLR_PRODUCT_VERSION);
printf("\n%S", VER_LEGALCOPYRIGHT_LOGO_STR_L);
}
diff --git a/src/coreclr/src/ildasm/dasm.cpp b/src/coreclr/src/ildasm/dasm.cpp
index 667857ea1b5d54..2a46f33548fefa 100644
--- a/src/coreclr/src/ildasm/dasm.cpp
+++ b/src/coreclr/src/ildasm/dasm.cpp
@@ -23,7 +23,7 @@
//#define MAX_FILENAME_LENGTH 2048 //moved to dis.h
#include
-#include
+#include
// Disable the "initialization of static local vars is no thread safe" error
#ifdef _MSC_VER
@@ -40,6 +40,9 @@
DECLARE_NATIVE_STRING_RESOURCE_TABLE(NATIVE_STRING_RESOURCE_NAME);
#endif
+#include "mdfileformat.h"
+
+
struct MIDescriptor
{
mdToken tkClass; // defining class token
@@ -6955,7 +6958,7 @@ void DumpPreamble()
else if(g_fDumpRTF)
{
}
- sprintf_s(szString,SZSTRING_SIZE,"// Microsoft (R) .NET Framework IL Disassembler. Version " VER_FILEVERSION_STR);
+ sprintf_s(szString,SZSTRING_SIZE,"// Microsoft (R) .NET IL Disassembler. Version " CLR_PRODUCT_VERSION);
printLine(g_pFile,COMMENT(szString));
if(g_fDumpHTML)
{
diff --git a/src/coreclr/src/ildasm/dasm_mi.cpp b/src/coreclr/src/ildasm/dasm_mi.cpp
index f345b19a28b957..38fee079cfe25a 100644
--- a/src/coreclr/src/ildasm/dasm_mi.cpp
+++ b/src/coreclr/src/ildasm/dasm_mi.cpp
@@ -4,5 +4,8 @@
#include "ildasmpch.h"
+#include "mdfileformat.h"
+
+
#include "../tools/metainfo/mdinfo.cpp"
#include "../tools/metainfo/mdobj.cpp"
diff --git a/src/coreclr/src/ildasm/exe/CMakeLists.txt b/src/coreclr/src/ildasm/exe/CMakeLists.txt
index 7ce367ee048971..87a0fa01f820fb 100644
--- a/src/coreclr/src/ildasm/exe/CMakeLists.txt
+++ b/src/coreclr/src/ildasm/exe/CMakeLists.txt
@@ -47,7 +47,7 @@ if (CLR_CMAKE_TARGET_WIN32)
list(APPEND ILDASM_SOURCES ${ILDASM_HEADERS})
endif(CLR_CMAKE_TARGET_WIN32)
-if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
# This option is necessary to ensure that the overloaded delete operator defined inside
# of the utilcode will be used instead of the standard library delete operator.
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Xlinker -Bsymbolic")
@@ -56,7 +56,7 @@ if(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
# ensure proper resolving of circular references between a subset of the libraries.
set(START_LIBRARY_GROUP -Wl,--start-group)
set(END_LIBRARY_GROUP -Wl,--end-group)
-endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD)
+endif(CLR_CMAKE_HOST_LINUX OR CLR_CMAKE_HOST_FREEBSD OR CLR_CMAKE_HOST_NETBSD OR CLR_CMAKE_HOST_SUNOS)
_add_executable(ildasm
${ILDASM_SOURCES}
diff --git a/src/coreclr/src/ildasm/ildasmpch.h b/src/coreclr/src/ildasm/ildasmpch.h
index ff939ede748c5f..071bedbcb2c76a 100644
--- a/src/coreclr/src/ildasm/ildasmpch.h
+++ b/src/coreclr/src/ildasm/ildasmpch.h
@@ -22,4 +22,8 @@
#include
#include
+#ifndef Debug_ReportError
+#define Debug_ReportError(strMessage)
+#endif
+
#endif
diff --git a/src/coreclr/src/ildasm/util.hpp b/src/coreclr/src/ildasm/util.hpp
index 8ad5bc4b3bad5c..c5c4c44a55dac3 100644
--- a/src/coreclr/src/ildasm/util.hpp
+++ b/src/coreclr/src/ildasm/util.hpp
@@ -13,7 +13,6 @@
#if defined(_DEBUG)
#include
-#undef _ASSERTE // utilcode defines a custom _ASSERTE
#endif
#include "utilcode.h"
diff --git a/src/coreclr/src/ildasm/windasm.cpp b/src/coreclr/src/ildasm/windasm.cpp
index 21062b2daf1adb..41a7a67bed2791 100644
--- a/src/coreclr/src/ildasm/windasm.cpp
+++ b/src/coreclr/src/ildasm/windasm.cpp
@@ -15,7 +15,7 @@
#include "dasmenum.hpp"
#include "dis.h"
-#include
+#include
#include "resource.h"
#include "new.hpp"
@@ -97,7 +97,7 @@ FILE* OpenOutput(__in __nullterminated const char* szFileName);
void PrintLogo()
{
- printf("Microsoft (R) .NET Framework IL Disassembler. Version " VER_FILEVERSION_STR);
+ printf("Microsoft (R) .NET IL Disassembler. Version " CLR_PRODUCT_VERSION);
printf("\n%S\n\n", VER_LEGALCOPYRIGHT_LOGO_STR_L);
}
diff --git a/src/coreclr/src/inc/CrstTypes.def b/src/coreclr/src/inc/CrstTypes.def
index 06f900a79be900..1cd949cbe97ff2 100644
--- a/src/coreclr/src/inc/CrstTypes.def
+++ b/src/coreclr/src/inc/CrstTypes.def
@@ -283,9 +283,6 @@ Crst GCCover
AcquiredBefore LoaderHeap CodeVersioning
End
-Crst GCMemoryPressure
-End
-
Crst GlobalStrLiteralMap
AcquiredBefore HandleTable IbcProfile SyncBlockCache SystemDomainDelayedUnloadList ThreadStore UniqueStack
End
diff --git a/src/coreclr/src/inc/MSCOREE.IDL b/src/coreclr/src/inc/MSCOREE.IDL
index 8a19345f86c163..6c2c5122bc8360 100644
--- a/src/coreclr/src/inc/MSCOREE.IDL
+++ b/src/coreclr/src/inc/MSCOREE.IDL
@@ -129,61 +129,6 @@ typedef struct _BucketParameters
WCHAR pszParams[BucketParamsCount][BucketParamLength]; // Parameter strings.
} BucketParameters;
-
-typedef enum
-{
- OPR_ThreadAbort,
- OPR_ThreadRudeAbortInNonCriticalRegion,
- OPR_ThreadRudeAbortInCriticalRegion,
- OPR_AppDomainUnload,
- OPR_AppDomainRudeUnload,
- OPR_ProcessExit,
- OPR_FinalizerRun,
- MaxClrOperation
- // Do not add anything after this
-} EClrOperation;
-
-typedef enum
-{
- FAIL_NonCriticalResource,
- FAIL_CriticalResource,
- FAIL_FatalRuntime,
- FAIL_OrphanedLock,
- FAIL_StackOverflow,
- // In CoreCLR, we will treat AV specially, based upon the escalation policy.
- // Currently only used in CoreCLR.
- FAIL_AccessViolation,
- FAIL_CodeContract,
- MaxClrFailure
- // Do not add anything after this
-} EClrFailure;
-
-typedef enum
-{
- eRuntimeDeterminedPolicy, // default
- eHostDeterminedPolicy, // revert back to Everett behavior, i.e. swallow all exception
-} EClrUnhandledException;
-
-typedef enum
-{
- // !!! Please keep these ordered by severity
- // !!! If you don't, you need to change EEPolicy::IsValidActionForOperation
- // !!! and EEPolicy::IsValidActionForFailure
- eNoAction,
- eThrowException,
- eAbortThread,
- eRudeAbortThread,
- eUnloadAppDomain,
- eRudeUnloadAppDomain,
- eExitProcess,
- // Look at CorHost2::Stop. For eFastExitProcess, eRudeExitProcess, eDisableRuntime,
- // Stop bypasses finalizer run.
- eFastExitProcess,
- eRudeExitProcess,
- MaxPolicyAction
-} EPolicyAction;
-
-
//*****************************************************************************
// New interface for hosting mscoree
//*****************************************************************************
diff --git a/src/coreclr/src/inc/appxutil.h b/src/coreclr/src/inc/appxutil.h
index c5fce6967eed7c..644d3b9fce04ac 100644
--- a/src/coreclr/src/inc/appxutil.h
+++ b/src/coreclr/src/inc/appxutil.h
@@ -14,8 +14,6 @@
//---------------------------------------------------------------------------------------------
// Forward declarations
-template
-class NewArrayHolder;
BOOL WinRTSupported();
diff --git a/src/coreclr/src/inc/bundle.h b/src/coreclr/src/inc/bundle.h
new file mode 100644
index 00000000000000..00fc186ab9ff0c
--- /dev/null
+++ b/src/coreclr/src/inc/bundle.h
@@ -0,0 +1,62 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
+/*****************************************************************************
+ ** **
+ ** bundle.h - Information about applications bundled as a single-file **
+ ** **
+ *****************************************************************************/
+
+#ifndef _BUNDLE_H_
+#define _BUNDLE_H_
+
+#include
+
+class Bundle;
+
+struct BundleFileLocation
+{
+ INT64 Size;
+ INT64 Offset;
+
+ BundleFileLocation()
+ {
+ LIMITED_METHOD_CONTRACT;
+
+ Size = 0;
+ Offset = 0;
+ }
+
+ static BundleFileLocation Invalid() { LIMITED_METHOD_CONTRACT; return BundleFileLocation(); }
+
+ const SString &Path() const;
+
+ bool IsValid() const { LIMITED_METHOD_CONTRACT; return Offset != 0; }
+};
+
+typedef bool(__stdcall BundleProbe)(LPCWSTR, INT64*, INT64*);
+
+class Bundle
+{
+public:
+ Bundle(LPCWSTR bundlePath, BundleProbe *probe);
+ BundleFileLocation Probe(LPCWSTR path, bool pathIsBundleRelative = false) const;
+
+ const SString &Path() const { LIMITED_METHOD_CONTRACT; return m_path; }
+ const SString &BasePath() const { LIMITED_METHOD_CONTRACT; return m_basePath; }
+
+ static Bundle* AppBundle; // The BundleInfo for the current app, initialized by coreclr_initialize.
+ static bool AppIsBundle() { LIMITED_METHOD_CONTRACT; return AppBundle != nullptr; }
+ static BundleFileLocation ProbeAppBundle(LPCWSTR path, bool pathIsBundleRelative = false);
+
+private:
+
+ SString m_path; // The path to single-file executable
+ BundleProbe *m_probe;
+
+ SString m_basePath; // The prefix to denote a path within the bundle
+};
+
+#endif // _BUNDLE_H_
+// EOF =======================================================================
diff --git a/src/coreclr/src/inc/clrconfig.h b/src/coreclr/src/inc/clrconfig.h
index 4f0cb11978dd47..42d8a24efd8c2e 100644
--- a/src/coreclr/src/inc/clrconfig.h
+++ b/src/coreclr/src/inc/clrconfig.h
@@ -46,10 +46,6 @@ class CLRConfig
IgnoreHKLM = 0x4,
// If set, don't look in HKCU in the registry.
IgnoreHKCU = 0x8,
- // If set, don't look in any config files
- IgnoreConfigFiles = 0x10,
- // If set, look in config file(s) before looking in env/registry.
- FavorConfigFile = 0x20,
// If set, look only in the system config file, ignoring other config files.
// (This option does not affect environment variable and registry lookups)
ConfigFile_SystemOnly = 0x40,
@@ -60,8 +56,6 @@ class CLRConfig
// *string* configuration values.)
TrimWhiteSpaceFromStringValue = 0x100,
- // Legacy REGUTIL-style lookup.
- REGUTIL_default = IgnoreConfigFiles,
// Legacy EEConfig-style lookup.
EEConfig_default = 0,
};
diff --git a/src/coreclr/src/inc/clrconfigvalues.h b/src/coreclr/src/inc/clrconfigvalues.h
index df0d44af48e927..109c3c83553011 100644
--- a/src/coreclr/src/inc/clrconfigvalues.h
+++ b/src/coreclr/src/inc/clrconfigvalues.h
@@ -123,104 +123,104 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_JitPitchMaxVal, W("JitPitchMaxVal"), (DWORD)0x
///
/// Assembly Loader
///
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_DesignerNamespaceResolutionEnabled, W("designerNamespaceResolution"), FALSE, "Set it to 1 to enable DesignerNamespaceResolve event for WinRT types", CLRConfig::IgnoreEnv | CLRConfig::IgnoreHKLM | CLRConfig::IgnoreHKCU | CLRConfig::FavorConfigFile)
-CONFIG_DWORD_INFO_EX(INTERNAL_GetAssemblyIfLoadedIgnoreRidMap, W("GetAssemblyIfLoadedIgnoreRidMap"), 0, "Used to force loader to ignore assemblies cached in the rid-map", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_DesignerNamespaceResolutionEnabled, W("designerNamespaceResolution"), FALSE, "Set it to 1 to enable DesignerNamespaceResolve event for WinRT types", CLRConfig::IgnoreEnv | CLRConfig::IgnoreHKLM | CLRConfig::IgnoreHKCU)
+CONFIG_DWORD_INFO_EX(INTERNAL_GetAssemblyIfLoadedIgnoreRidMap, W("GetAssemblyIfLoadedIgnoreRidMap"), 0, "Used to force loader to ignore assemblies cached in the rid-map", CLRConfig::EEConfig_default)
///
/// Conditional breakpoints
///
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_BreakOnBadExit, W("BreakOnBadExit"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_BreakOnBadExit, W("BreakOnBadExit"), 0, "", CLRConfig::EEConfig_default)
CONFIG_STRING_INFO(INTERNAL_BreakOnClassBuild, W("BreakOnClassBuild"), "Very useful for debugging class layout code.")
CONFIG_STRING_INFO(INTERNAL_BreakOnClassLoad, W("BreakOnClassLoad"), "Very useful for debugging class loading code.")
CONFIG_STRING_INFO(INTERNAL_BreakOnComToClrNativeInfoInit, W("BreakOnComToClrNativeInfoInit"), "Throws an assert when native information about a COM -> CLR call are about to be gathered.")
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnDebugBreak, W("BreakOnDebugBreak"), 0, "Allows an assert in debug builds when a user break is hit", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnDILoad, W("BreakOnDILoad"), 0, "Allows an assert when the DI is loaded", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnDumpToken, W("BreakOnDumpToken"), 0xffffffff, "Breaks when using internal logging on a particular token value.", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_BreakOnEELoad, W("BreakOnEELoad"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnDebugBreak, W("BreakOnDebugBreak"), 0, "Allows an assert in debug builds when a user break is hit", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnDILoad, W("BreakOnDILoad"), 0, "Allows an assert when the DI is loaded", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnDumpToken, W("BreakOnDumpToken"), 0xffffffff, "Breaks when using internal logging on a particular token value.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_BreakOnEELoad, W("BreakOnEELoad"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_BreakOnEEShutdown, W("BreakOnEEShutdown"), 0, "")
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnExceptionInGetThrowable, W("BreakOnExceptionInGetThrowable"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnExceptionInGetThrowable, W("BreakOnExceptionInGetThrowable"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_BreakOnFindMethod, W("BreakOnFindMethod"), 0, "Breaks in findMethodInternal when it searches for the specified token.")
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnFirstPass, W("BreakOnFirstPass"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnHR, W("BreakOnHR"), 0, "Debug.cpp, IfFailxxx use this macro to stop if hr matches ", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnFirstPass, W("BreakOnFirstPass"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnHR, W("BreakOnHR"), 0, "Debug.cpp, IfFailxxx use this macro to stop if hr matches ", CLRConfig::EEConfig_default)
CONFIG_STRING_INFO(INTERNAL_BreakOnInstantiation, W("BreakOnInstantiation"), "Very useful for debugging generic class instantiation.")
CONFIG_STRING_INFO(INTERNAL_BreakOnInteropStubSetup, W("BreakOnInteropStubSetup"), "Throws an assert when marshaling stub for the given method is about to be built.")
-CONFIG_STRING_INFO_EX(INTERNAL_BreakOnInteropVTableBuild, W("BreakOnInteropVTableBuild"), "Specifies a type name for which an assert should be thrown when building interop v-table.", CLRConfig::REGUTIL_default)
+CONFIG_STRING_INFO_EX(INTERNAL_BreakOnInteropVTableBuild, W("BreakOnInteropVTableBuild"), "Specifies a type name for which an assert should be thrown when building interop v-table.", CLRConfig::EEConfig_default)
CONFIG_STRING_INFO(INTERNAL_BreakOnMethodName, W("BreakOnMethodName"), "Very useful for debugging method override placement code.")
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnNotify, W("BreakOnNotify"), 0, "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnRetailAssert, W("BreakOnRetailAssert"), 0, "Used for debugging \"retail\" asserts (fatal errors)", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnSecondPass, W("BreakOnSecondPass"), 0, "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_BreakOnSO, W("BreakOnSO"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnNotify, W("BreakOnNotify"), 0, "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnRetailAssert, W("BreakOnRetailAssert"), 0, "Used for debugging \"retail\" asserts (fatal errors)", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnSecondPass, W("BreakOnSecondPass"), 0, "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_BreakOnSO, W("BreakOnSO"), 0, "", CLRConfig::EEConfig_default)
CONFIG_STRING_INFO(INTERNAL_BreakOnStructMarshalSetup, W("BreakOnStructMarshalSetup"), "Throws an assert when field marshalers for the given type with layout are about to be created.")
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnUEF, W("BreakOnUEF"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnUncaughtException, W("BreakOnUncaughtException"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnUEF, W("BreakOnUEF"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_BreakOnUncaughtException, W("BreakOnUncaughtException"), 0, "", CLRConfig::EEConfig_default)
///
/// Debugger
///
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_EnableDiagnostics, W("EnableDiagnostics"), 1, "Allows the debugger, profiler, and EventPipe diagnostics to be disabled", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_D__FCE, W("D::FCE"), 0, "Allows an assert when crawling the managed stack for an exception handler", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakIfLocksUnavailable, W("DbgBreakIfLocksUnavailable"), 0, "Allows an assert when the debugger can't take a lock ", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnErr, W("DbgBreakOnErr"), 0, "Allows an assert when we get a failing hresult", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnMapPatchToDJI, W("DbgBreakOnMapPatchToDJI"), 0, "Allows an assert when mapping a patch to an address", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnRawInt3, W("DbgBreakOnRawInt3"), 0, "Allows an assert for test coverage for debug break or other int3 breaks", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnSendBreakpoint, W("DbgBreakOnSendBreakpoint"), 0, "Allows an assert when sending a breakpoint to the right side", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnSetIP, W("DbgBreakOnSetIP"), 0, "Allows an assert when setting the IP", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgCheckInt3, W("DbgCheckInt3"), 0, "Asserts if the debugger explicitly writes int3 instead of calling SetUnmanagedBreakpoint", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_EnableDiagnostics, W("EnableDiagnostics"), 1, "Allows the debugger, profiler, and EventPipe diagnostics to be disabled", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_D__FCE, W("D::FCE"), 0, "Allows an assert when crawling the managed stack for an exception handler", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakIfLocksUnavailable, W("DbgBreakIfLocksUnavailable"), 0, "Allows an assert when the debugger can't take a lock ", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnErr, W("DbgBreakOnErr"), 0, "Allows an assert when we get a failing hresult", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnMapPatchToDJI, W("DbgBreakOnMapPatchToDJI"), 0, "Allows an assert when mapping a patch to an address", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnRawInt3, W("DbgBreakOnRawInt3"), 0, "Allows an assert for test coverage for debug break or other int3 breaks", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnSendBreakpoint, W("DbgBreakOnSendBreakpoint"), 0, "Allows an assert when sending a breakpoint to the right side", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgBreakOnSetIP, W("DbgBreakOnSetIP"), 0, "Allows an assert when setting the IP", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgCheckInt3, W("DbgCheckInt3"), 0, "Asserts if the debugger explicitly writes int3 instead of calling SetUnmanagedBreakpoint", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_DbgDACAssertOnMismatch, W("DbgDACAssertOnMismatch"), "Allows an assert when the mscordacwks and mscorwks dll versions don't match")
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgDACEnableAssert, W("DbgDACEnableAssert"), 0, "Enables extra validity checking in DAC - assumes target isn't corrupt", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_DbgDACSkipVerifyDlls, W("DbgDACSkipVerifyDlls"), 0, "Allows disabling the check to ensure mscordacwks and mscorwks dll versions match", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgDelayHelper, W("DbgDelayHelper"), 0, "Varies the wait in the helper thread startup for testing race between threads", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_DbgDisableDynamicSymsCompat, W("DbgDisableDynamicSymsCompat"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgDisableTargetConsistencyAsserts, W("DbgDisableTargetConsistencyAsserts"), 0, "Allows explicitly testing with corrupt targets", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_DbgEnableMixedModeDebugging, W("DbgEnableMixedModeDebuggingInternalOnly"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreads, W("DbgExtraThreads"), 0, "Allows extra unmanaged threads to run and throw debug events for stress testing", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreadsCantStop, W("DbgExtraThreadsCantStop"), 0, "Allows extra unmanaged threads in can't stop region to run and throw debug events for stress testing", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreadsIB, W("DbgExtraThreadsIB"), 0, "Allows extra in-band unmanaged threads to run and throw debug events for stress testing", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreadsOOB, W("DbgExtraThreadsOOB"), 0, "Allows extra out of band unmanaged threads to run and throw debug events for stress testing", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgFaultInHandleIPCEvent, W("DbgFaultInHandleIPCEvent"), 0, "Allows testing the unhandled event filter", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgInjectFEE, W("DbgInjectFEE"), 0, "Allows injecting a fatal execution error for testing Watson", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgLeakCheck, W("DbgLeakCheck"), 0, "Allows checking for leaked Cordb objects", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgNo2ndChance, W("DbgNo2ndChance"), 0, "Allows breaking on (and catching bogus) 2nd chance exceptions", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgNoDebugger, W("DbgNoDebugger"), 0, "Allows breaking if we don't want to lazily initialize the debugger", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgNoForceContinue, W("DbgNoForceContinue"), 1, "Used to force a continue on longhorn", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgNoOpenMDByFile, W("DbgNoOpenMDByFile"), 0, "Allows opening MD by memory for perf testing", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgDACEnableAssert, W("DbgDACEnableAssert"), 0, "Enables extra validity checking in DAC - assumes target isn't corrupt", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_DbgDACSkipVerifyDlls, W("DbgDACSkipVerifyDlls"), 0, "Allows disabling the check to ensure mscordacwks and mscorwks dll versions match", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgDelayHelper, W("DbgDelayHelper"), 0, "Varies the wait in the helper thread startup for testing race between threads", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_DbgDisableDynamicSymsCompat, W("DbgDisableDynamicSymsCompat"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgDisableTargetConsistencyAsserts, W("DbgDisableTargetConsistencyAsserts"), 0, "Allows explicitly testing with corrupt targets", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_DbgEnableMixedModeDebugging, W("DbgEnableMixedModeDebuggingInternalOnly"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreads, W("DbgExtraThreads"), 0, "Allows extra unmanaged threads to run and throw debug events for stress testing", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreadsCantStop, W("DbgExtraThreadsCantStop"), 0, "Allows extra unmanaged threads in can't stop region to run and throw debug events for stress testing", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreadsIB, W("DbgExtraThreadsIB"), 0, "Allows extra in-band unmanaged threads to run and throw debug events for stress testing", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgExtraThreadsOOB, W("DbgExtraThreadsOOB"), 0, "Allows extra out of band unmanaged threads to run and throw debug events for stress testing", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgFaultInHandleIPCEvent, W("DbgFaultInHandleIPCEvent"), 0, "Allows testing the unhandled event filter", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgInjectFEE, W("DbgInjectFEE"), 0, "Allows injecting a fatal execution error for testing Watson", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgLeakCheck, W("DbgLeakCheck"), 0, "Allows checking for leaked Cordb objects", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgNo2ndChance, W("DbgNo2ndChance"), 0, "Allows breaking on (and catching bogus) 2nd chance exceptions", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgNoDebugger, W("DbgNoDebugger"), 0, "Allows breaking if we don't want to lazily initialize the debugger", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgNoForceContinue, W("DbgNoForceContinue"), 1, "Used to force a continue on longhorn", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgNoOpenMDByFile, W("DbgNoOpenMDByFile"), 0, "Allows opening MD by memory for perf testing", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_DbgOOBinFEEE, W("DbgOOBinFEEE"), 0, "Allows forcing oob breakpoints when a fatal error occurs")
RETAIL_CONFIG_STRING_INFO_DIRECT_ACCESS(EXTERNAL_DbgPackShimPath, W("DbgPackShimPath"), "CoreCLR path to dbgshim.dll - we are trying to figure out if we can remove this")
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgPingInterop, W("DbgPingInterop"), 0, "Allows checking for deadlocks in interop debugging", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgRace, W("DbgRace"), 0, "Allows pausing for native debug events to get hijicked", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgRedirect, W("DbgRedirect"), 0, "Allows for redirecting the event pipeline", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgPingInterop, W("DbgPingInterop"), 0, "Allows checking for deadlocks in interop debugging", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgRace, W("DbgRace"), 0, "Allows pausing for native debug events to get hijicked", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgRedirect, W("DbgRedirect"), 0, "Allows for redirecting the event pipeline", CLRConfig::EEConfig_default)
RETAIL_CONFIG_STRING_INFO_DIRECT_ACCESS(EXTERNAL_DbgRedirectApplication, W("DbgRedirectApplication"), "Specifies the auxiliary debugger application to launch.")
RETAIL_CONFIG_STRING_INFO_DIRECT_ACCESS(EXTERNAL_DbgRedirectAttachCmd, W("DbgRedirectAttachCmd"), "Specifies command parameters for attaching the auxiliary debugger.")
RETAIL_CONFIG_STRING_INFO_DIRECT_ACCESS(EXTERNAL_DbgRedirectCommonCmd, W("DbgRedirectCommonCmd"), "Specifies a command line format string for the auxiliary debugger.")
RETAIL_CONFIG_STRING_INFO_DIRECT_ACCESS(EXTERNAL_DbgRedirectCreateCmd, W("DbgRedirectCreateCmd"), "Specifies command parameters when creating the auxiliary debugger.")
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgShortcutCanary, W("DbgShortcutCanary"), 0, "Allows a way to force canary to fail to be able to test failure paths", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgSkipMEOnStep, W("DbgSkipMEOnStep"), 0, "Turns off MethodEnter checks", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgSkipVerCheck, W("DbgSkipVerCheck"), 0, "Allows different RS and LS versions (for servicing work)", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgTC, W("DbgTC"), 0, "Allows checking boundary compression for offset mappings", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgTransportFaultInject, W("DbgTransportFaultInject"), 0, "Allows injecting a fault for testing the debug transport", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgShortcutCanary, W("DbgShortcutCanary"), 0, "Allows a way to force canary to fail to be able to test failure paths", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgSkipMEOnStep, W("DbgSkipMEOnStep"), 0, "Turns off MethodEnter checks", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgSkipVerCheck, W("DbgSkipVerCheck"), 0, "Allows different RS and LS versions (for servicing work)", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgTC, W("DbgTC"), 0, "Allows checking boundary compression for offset mappings", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgTransportFaultInject, W("DbgTransportFaultInject"), 0, "Allows injecting a fault for testing the debug transport", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_DbgTransportLog, W("DbgTransportLog"), "Turns on logging for the debug transport")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_DbgTransportLogClass, W("DbgTransportLogClass"), "Mask to control what is logged in DbgTransportLog")
-RETAIL_CONFIG_STRING_INFO_EX(UNSUPPORTED_DbgTransportProxyAddress, W("DbgTransportProxyAddress"), "Allows specifying the transport proxy address", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgTrapOnSkip, W("DbgTrapOnSkip"), 0, "Allows breaking when we skip a breakpoint", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgWaitTimeout, W("DbgWaitTimeout"), 1, "Specifies the timeout value for waits", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgWFDETimeout, W("DbgWFDETimeout"), 25, "Specifies the timeout value for wait when waiting for a debug event", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_RaiseExceptionOnAssert, W("RaiseExceptionOnAssert"), 0, "Raise a first chance (if set to 1) or second chance (if set to 2) exception on asserts.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DebugBreakOnAssert, W("DebugBreakOnAssert"), 0, "If DACCESS_COMPILE is defined, break on asserts.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_DebugBreakOnVerificationFailure, W("DebugBreakOnVerificationFailure"), 0, "Halts the jit on verification failure", CLRConfig::REGUTIL_default)
-CONFIG_STRING_INFO_EX(INTERNAL_DebuggerBreakPoint, W("DebuggerBreakPoint"), "Allows counting various debug events", CLRConfig::REGUTIL_default)
-CONFIG_STRING_INFO_EX(INTERNAL_DebugVerify, W("DebugVerify"), "Control for tracing in peverify", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(UNSUPPORTED_DbgTransportProxyAddress, W("DbgTransportProxyAddress"), "Allows specifying the transport proxy address", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgTrapOnSkip, W("DbgTrapOnSkip"), 0, "Allows breaking when we skip a breakpoint", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgWaitTimeout, W("DbgWaitTimeout"), 1, "Specifies the timeout value for waits", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgWFDETimeout, W("DbgWFDETimeout"), 25, "Specifies the timeout value for wait when waiting for a debug event", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_RaiseExceptionOnAssert, W("RaiseExceptionOnAssert"), 0, "Raise a first chance (if set to 1) or second chance (if set to 2) exception on asserts.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DebugBreakOnAssert, W("DebugBreakOnAssert"), 0, "If DACCESS_COMPILE is defined, break on asserts.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DebugBreakOnVerificationFailure, W("DebugBreakOnVerificationFailure"), 0, "Halts the jit on verification failure", CLRConfig::EEConfig_default)
+CONFIG_STRING_INFO_EX(INTERNAL_DebuggerBreakPoint, W("DebuggerBreakPoint"), "Allows counting various debug events", CLRConfig::EEConfig_default)
+CONFIG_STRING_INFO_EX(INTERNAL_DebugVerify, W("DebugVerify"), "Control for tracing in peverify", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_EncApplyChanges, W("EncApplyChanges"), 0, "Allows breaking when ApplyEditAndContinue is called")
-CONFIG_DWORD_INFO_EX(INTERNAL_EnCBreakOnRemapComplete, W("EnCBreakOnRemapComplete"), 0, "Allows breaking after N RemapCompletes", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_EnCBreakOnRemapOpportunity, W("EnCBreakOnRemapOpportunity"), 0, "Allows breaking after N RemapOpportunities", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_EnCBreakOnRemapComplete, W("EnCBreakOnRemapComplete"), 0, "Allows breaking after N RemapCompletes", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_EnCBreakOnRemapOpportunity, W("EnCBreakOnRemapOpportunity"), 0, "Allows breaking after N RemapOpportunities", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_EncDumpApplyChanges, W("EncDumpApplyChanges"), 0, "Allows dumping edits in delta metadata and il files")
CONFIG_DWORD_INFO(INTERNAL_EncFixupFieldBreak, W("EncFixupFieldBreak"), 0, "Unlikely that this is used anymore.")
CONFIG_DWORD_INFO(INTERNAL_EncJitUpdatedFunction, W("EncJitUpdatedFunction"), 0, "Allows breaking when an updated function is jitted")
CONFIG_DWORD_INFO(INTERNAL_EnCResolveField, W("EnCResolveField"), 0, "Allows breaking when computing the address of an EnC-added field")
CONFIG_DWORD_INFO(INTERNAL_EncResumeInUpdatedFunction, W("EncResumeInUpdatedFunction"), 0, "Allows breaking when execution resumes in a new EnC version of a function")
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgAssertOnDebuggeeDebugBreak, W("DbgAssertOnDebuggeeDebugBreak"), 0, "If non-zero causes the managed-only debugger to assert on unhandled breakpoints in the debuggee", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgAssertOnDebuggeeDebugBreak, W("DbgAssertOnDebuggeeDebugBreak"), 0, "If non-zero causes the managed-only debugger to assert on unhandled breakpoints in the debuggee", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_DbgDontResumeThreadsOnUnhandledException, W("UNSUPPORTED_DbgDontResumeThreadsOnUnhandledException"), 0, "If non-zero, then don't try to unsuspend threads after continuing a 2nd-chance native exception")
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgSkipStackCheck, W("DbgSkipStackCheck"), 0, "Skip the stack pointer check during stackwalking", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DbgSkipStackCheck, W("DbgSkipStackCheck"), 0, "Skip the stack pointer check during stackwalking", CLRConfig::EEConfig_default)
#ifdef DACCESS_COMPILE
CONFIG_DWORD_INFO(INTERNAL_DumpGeneration_IntentionallyCorruptDataFromTarget, W("IntentionallyCorruptDataFromTarget"), 0, "Intentionally fakes bad data retrieved from target to try and break dump generation.")
#endif
@@ -231,17 +231,17 @@ CONFIG_DWORD_INFO(UNSUPPORTED_Debugging_RequiredVersion, W("UNSUPPORTED_Debuggin
RETAIL_CONFIG_DWORD_INFO(INTERNAL_MiniMdBufferCapacity, W("MiniMdBufferCapacity"), 64 * 1024, "The max size of the buffer to store mini metadata information for triage- and mini-dumps.")
#endif // FEATURE_MINIMETADATA_IN_TRIAGEDUMPS
-CONFIG_DWORD_INFO_EX(INTERNAL_DbgNativeCodeBpBindsAcrossVersions, W("DbgNativeCodeBpBindsAcrossVersions"), 0, "If non-zero causes native breakpoints at offset 0 to bind in all tiered compilation versions of the given method", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_DbgNativeCodeBpBindsAcrossVersions, W("DbgNativeCodeBpBindsAcrossVersions"), 0, "If non-zero causes native breakpoints at offset 0 to bind in all tiered compilation versions of the given method", CLRConfig::EEConfig_default)
///
/// Diagnostics (internal general-purpose)
///
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_ConditionalContracts, W("ConditionalContracts"), "If ENABLE_CONTRACTS_IMPL is defined, sets whether contracts are conditional. (?)")
CONFIG_DWORD_INFO(INTERNAL_ConsistencyCheck, W("ConsistencyCheck"), 0, "")
-CONFIG_DWORD_INFO_EX(INTERNAL_ContinueOnAssert, W("ContinueOnAssert"), 0, "If set, doesn't break on asserts.", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_disableStackOverflowProbing, W("disableStackOverflowProbing"), 0, "", CLRConfig::FavorConfigFile)
+CONFIG_DWORD_INFO_EX(INTERNAL_ContinueOnAssert, W("ContinueOnAssert"), 0, "If set, doesn't break on asserts.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_disableStackOverflowProbing, W("disableStackOverflowProbing"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_InjectFatalError, W("InjectFatalError"), "")
-CONFIG_DWORD_INFO_EX(INTERNAL_InjectFault, W("InjectFault"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_InjectFault, W("InjectFault"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_SuppressChecks, W("SuppressChecks"), "")
#ifdef FEATURE_EH_FUNCLETS
CONFIG_DWORD_INFO(INTERNAL_SuppressLockViolationsOnReentryFromOS, W("SuppressLockViolationsOnReentryFromOS"), 0, "64 bit OOM tests re-enter the CLR via RtlVirtualUnwind. This indicates whether to suppress resulting locking violations.")
@@ -251,11 +251,10 @@ CONFIG_DWORD_INFO(INTERNAL_SuppressLockViolationsOnReentryFromOS, W("SuppressLoc
/// Exception Handling
///
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_AssertOnFailFast, W("AssertOnFailFast"), "")
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_legacyCorruptedStateExceptionsPolicy, W("legacyCorruptedStateExceptionsPolicy"), 0, "Enabled Pre-V4 CSE behavior", CLRConfig::FavorConfigFile)
-CONFIG_DWORD_INFO_EX(INTERNAL_SuppressLostExceptionTypeAssert, W("SuppressLostExceptionTypeAssert"), 0, "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_FailFastOnCorruptedStateException, W("FailFastOnCorruptedStateException"), 0, "Failfast if a CSE is encountered", CLRConfig::FavorConfigFile)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_UseEntryPointFilter, W("UseEntryPointFilter"), 0, "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_Corhost_Swallow_Uncaught_Exceptions, W("Corhost_Swallow_Uncaught_Exceptions"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_legacyCorruptedStateExceptionsPolicy, W("legacyCorruptedStateExceptionsPolicy"), 0, "Enabled Pre-V4 CSE behavior", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_SuppressLostExceptionTypeAssert, W("SuppressLostExceptionTypeAssert"), 0, "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_UseEntryPointFilter, W("UseEntryPointFilter"), 0, "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_Corhost_Swallow_Uncaught_Exceptions, W("Corhost_Swallow_Uncaught_Exceptions"), 0, "", CLRConfig::EEConfig_default)
///
/// Garbage collector
@@ -271,77 +270,49 @@ RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_gcConservative, W("gcConservative"), 0, "En
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_gcServer, W("gcServer"), 0, "Enables server GC")
CONFIG_STRING_INFO(INTERNAL_GcCoverage, W("GcCoverage"), "Specify a method or regular expression of method names to run with GCStress")
CONFIG_STRING_INFO(INTERNAL_SkipGCCoverage, W("SkipGcCoverage"), "Specify a list of assembly names to skip with GC Coverage")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_gcForceCompact, W("gcForceCompact"), "When set to true, always do compacting GC")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_GCgen0size, W("GCgen0size"), "Specifies the smallest gen0 size")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_GCGen0MaxBudget, W("GCGen0MaxBudget"), "Specifies the largest gen0 allocation budget")
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_StatsUpdatePeriod, W("StatsUpdatePeriod"), 60, "Specifies the interval, in seconds, at which to update the statistics")
-RETAIL_CONFIG_STRING_INFO(UNSUPPORTED_SuspendTimeLog, W("SuspendTimeLog"), "Specifies the name of the log file for suspension statistics")
-CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_GCLatencyMode, W("GCLatencyMode"), "Specifies the GC latency mode - batch, interactive or low latency (note that the same thing can be specified via API which is the supported way)")
-RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCLatencyLevel, W("GCLatencyLevel"), 1, "Specifies the GC latency level that you want to optimize for")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCConfigLogEnabled, W("GCConfigLogEnabled"), 0, "Specifies if you want to turn on config logging in GC")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCLogEnabled, W("GCLogEnabled"), 0, "Specifies if you want to turn on logging in GC")
-RETAIL_CONFIG_STRING_INFO(UNSUPPORTED_GCLogFile, W("GCLogFile"), "Specifies the name of the GC log file")
-RETAIL_CONFIG_STRING_INFO(UNSUPPORTED_GCConfigLogFile, W("GCConfigLogFile"), "Specifies the name of the GC config log file")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCLogFileSize, W("GCLogFileSize"), 0, "Specifies the GC log file size")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCCompactRatio, W("GCCompactRatio"), 0, "Specifies the ratio compacting GCs vs sweeping ")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_GCPollType, W("GCPollType"), "")
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCRetainVM, W("GCRetainVM"), 0, "When set we put the segments that should be deleted on a standby list (instead of releasing them back to the OS) which will be considered to satisfy new segment requests (note that the same thing can be specified via API which is the supported way)")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_GCSegmentSize, W("GCSegmentSize"), "Specifies the managed heap segment size")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCLOHThreshold, W("GCLOHThreshold"), 0, "Specifies the size that will make objects go on LOH")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_GCLOHCompact, W("GCLOHCompact"), "Specifies the LOH compaction mode")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_gcAllowVeryLargeObjects, W("gcAllowVeryLargeObjects"), 1, "Allow allocation of 2GB+ objects on GC heap")
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_GCStress, W("GCStress"), 0, "Trigger GCs at regular intervals", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_GcStressOnDirectCalls, W("GcStressOnDirectCalls"), 0, "Whether to trigger a GC on direct calls", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_gcTrimCommitOnLowMemory, W("gcTrimCommitOnLowMemory"), "When set we trim the committed space more aggressively for the ephemeral seg. This is used for running many instances of server processes where they want to keep as little memory committed as possible")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_BGCSpinCount, W("BGCSpinCount"), 140, "Specifies the bgc spin count")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_BGCSpin, W("BGCSpin"), 2, "Specifies the bgc spin time")
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_GCStress, W("GCStress"), 0, "Trigger GCs at regular intervals", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_GcStressOnDirectCalls, W("GcStressOnDirectCalls"), 0, "Whether to trigger a GC on direct calls", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_HeapVerify, W("HeapVerify"), "When set verifies the integrity of the managed heap on entry and exit of each GC")
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_SetupGcCoverage, W("SetupGcCoverage"), "This doesn't appear to be a config flag", CLRConfig::REGUTIL_default)
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCNumaAware, W("GCNumaAware"), 1, "Specifies if to enable GC NUMA aware")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCCpuGroup, W("GCCpuGroup"), 0, "Specifies if to enable GC to support CPU groups")
-RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCHeapCount, W("GCHeapCount"), 0, "")
-RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCNoAffinitize, W("GCNoAffinitize"), 0, "")
-// this config is only in effect if the process is not running in multiple CPU groups.
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_GCHeapAffinitizeMask, W("GCHeapAffinitizeMask"), "Specifies processor mask for Server GC threads")
-RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_GCProvModeStress, W("GCProvModeStress"), 0, "Stress the provisional modes")
-RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCHighMemPercent, W("GCHighMemPercent"), 0, "Specifies the percent for GC to consider as high memory")
RETAIL_CONFIG_STRING_INFO(EXTERNAL_GCName, W("GCName"), "")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_GCHeapHardLimit, W("GCHeapHardLimit"), "Specifies the maximum commit size for the GC heap")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_GCHeapHardLimitPercent, W("GCHeapHardLimitPercent"), "Specifies the GC heap usage as a percentage of the total memory")
-RETAIL_CONFIG_STRING_INFO(EXTERNAL_GCHeapAffinitizeRanges, W("GCHeapAffinitizeRanges"), "Specifies list of processors for Server GC threads. The format is a comma separated list of processor numbers or ranges of processor numbers. Example: 1,3,5,7-9,12")
-RETAIL_CONFIG_DWORD_INFO(EXTERNAL_GCLargePages, W("GCLargePages"), 0, "Specifies whether large pages should be used when a heap hard limit is set")
///
/// IBC
///
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_ConvertIbcData, W("ConvertIbcData"), 1, "Converts between v1 and v2 IBC data", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_ConvertIbcData, W("ConvertIbcData"), 1, "Converts between v1 and v2 IBC data", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_DisableHotCold, W("DisableHotCold"), "Master hot/cold splitting switch in Jit64")
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DisableIBC, W("DisableIBC"), 0, "Disables the use of IBC data", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_UseIBCFile, W("UseIBCFile"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_DisableIBC, W("DisableIBC"), 0, "Disables the use of IBC data", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_UseIBCFile, W("UseIBCFile"), 0, "", CLRConfig::EEConfig_default)
///
/// JIT
///
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_JitAlignLoops, W("JitAlignLoops"), "Aligns loop targets to 8 byte boundaries")
-CONFIG_DWORD_INFO_EX(INTERNAL_JitBreakEmit, W("JitBreakEmit"), (DWORD)-1, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_JitBreakEmit, W("JitBreakEmit"), (DWORD)-1, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_JitDebuggable, W("JitDebuggable"), "")
#if !defined(DEBUG) && !defined(_DEBUG)
#define INTERNAL_JitEnableNoWayAssert_Default 0
#else
#define INTERNAL_JitEnableNoWayAssert_Default 1
#endif
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_JitEnableNoWayAssert, W("JitEnableNoWayAssert"), INTERNAL_JitEnableNoWayAssert_Default, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_JitEnableNoWayAssert, W("JitEnableNoWayAssert"), INTERNAL_JitEnableNoWayAssert_Default, "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_JitFramed, W("JitFramed"), "Forces EBP frames")
-CONFIG_DWORD_INFO_EX(INTERNAL_JitGCStress, W("JitGCStress"), 0, "GC stress mode for jit", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_JitGCStress, W("JitGCStress"), 0, "GC stress mode for jit", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_JitHeartbeat, W("JitHeartbeat"), 0, "")
CONFIG_DWORD_INFO(INTERNAL_JitHelperLogging, W("JitHelperLogging"), 0, "")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_JITMinOpts, W("JITMinOpts"), "Forces MinOpts")
RETAIL_CONFIG_STRING_INFO(EXTERNAL_JitName, W("JitName"), "Primary Jit to use")
#if defined(ALLOW_SXS_JIT)
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_AltJitName, W("AltJitName"), "Alternative Jit to use, will fall back to primary jit.", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_AltJit, W("AltJit"), "Enables AltJit and selectively limits it to the specified methods.", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_AltJitExcludeAssemblies, W("AltJitExcludeAssemblies"), "Do not use AltJit on this semicolon-delimited list of assemblies.", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_AltJitName, W("AltJitName"), "Alternative Jit to use, will fall back to primary jit.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_AltJit, W("AltJit"), "Enables AltJit and selectively limits it to the specified methods.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_AltJitExcludeAssemblies, W("AltJitExcludeAssemblies"), "Do not use AltJit on this semicolon-delimited list of assemblies.", CLRConfig::EEConfig_default)
#endif // defined(ALLOW_SXS_JIT)
#if defined(FEATURE_STACK_SAMPLING)
@@ -352,21 +323,21 @@ RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_StackSamplingNumMethods, W("StackSamplingNu
#endif // defined(FEATURE_JIT_SAMPLING)
#if defined(ALLOW_SXS_JIT_NGEN)
-RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_AltJitNgen, W("AltJitNgen"), "Enables AltJit for NGEN and selectively limits it to the specified methods.", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_AltJitNgen, W("AltJitNgen"), "Enables AltJit for NGEN and selectively limits it to the specified methods.", CLRConfig::EEConfig_default)
#endif // defined(ALLOW_SXS_JIT_NGEN)
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_JitHostMaxSlabCache, W("JitHostMaxSlabCache"), 0x1000000, "Sets jit host max slab cache size, 16MB default")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_JitOptimizeType, W("JitOptimizeType"), "")
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_JitPrintInlinedMethods, W("JitPrintInlinedMethods"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_JitPrintInlinedMethods, W("JitPrintInlinedMethods"), 0, "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_JitTelemetry, W("JitTelemetry"), 1, "If non-zero, gather JIT telemetry data")
RETAIL_CONFIG_STRING_INFO(INTERNAL_JitTimeLogFile, W("JitTimeLogFile"), "If set, gather JIT throughput data and write to this file.")
RETAIL_CONFIG_STRING_INFO(INTERNAL_JitTimeLogCsv, W("JitTimeLogCsv"), "If set, gather JIT throughput data and write to a CSV file. This mode must be used in internal retail builds.")
RETAIL_CONFIG_STRING_INFO(INTERNAL_JitFuncInfoLogFile, W("JitFuncInfoLogFile"), "If set, gather JIT function info and write to this file.")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_JitVerificationDisable, W("JitVerificationDisable"), "")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_JitLockWrite, W("JitLockWrite"), 0, "Force all volatile writes to be 'locked'")
-CONFIG_STRING_INFO_EX(INTERNAL_TailCallMax, W("TailCallMax"), "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_TailCallOpt, W("TailCallOpt"), "", CLRConfig::REGUTIL_default)
+CONFIG_STRING_INFO_EX(INTERNAL_TailCallMax, W("TailCallMax"), "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_TailCallOpt, W("TailCallOpt"), "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_TailCallLoopOpt, W("TailCallLoopOpt"), 1, "Convert recursive tail calls to loops")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_Jit_NetFx40PInvokeStackResilience, W("NetFx40_PInvokeStackResilience"), (DWORD)-1, "Makes P/Invoke resilient against mismatched signature and calling convention (significant perf penalty).")
@@ -376,10 +347,10 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_AltJitAssertOnNYI, W("AltJitAssertOnNYI"), 0,
#else
RETAIL_CONFIG_DWORD_INFO(INTERNAL_AltJitAssertOnNYI, W("AltJitAssertOnNYI"), 1, "Controls the AltJit behavior of NYI stuff")
#endif
-CONFIG_DWORD_INFO_EX(INTERNAL_JitLargeBranches, W("JitLargeBranches"), 0, "Force using the largest conditional branch format", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_JitRegisterFP, W("JitRegisterFP"), 3, "Control FP enregistration", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_JitLargeBranches, W("JitLargeBranches"), 0, "Force using the largest conditional branch format", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_JitRegisterFP, W("JitRegisterFP"), 3, "Control FP enregistration", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_JitELTHookEnabled, W("JitELTHookEnabled"), 0, "On ARM, setting this will emit Enter/Leave/TailCall callbacks")
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_JitMemStats, W("JitMemStats"), 0, "Display JIT memory usage statistics", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_JitMemStats, W("JitMemStats"), 0, "Display JIT memory usage statistics", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_JitVNMapSelBudget, W("JitVNMapSelBudget"), 100, "Max # of MapSelect's considered for a particular top-level invocation.")
#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM64)
#define EXTERNAL_FeatureSIMD_Default 1
@@ -391,10 +362,10 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_JitVNMapSelBudget, W("JitVNMapSelBudget"), 100
#else // !(defined(TARGET_AMD64) || defined(TARGET_X86)
#define EXTERNAL_JitEnableAVX_Default 0
#endif // !(defined(TARGET_AMD64) || defined(TARGET_X86)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_FeatureSIMD, W("FeatureSIMD"), EXTERNAL_FeatureSIMD_Default, "Enable SIMD intrinsics recognition in System.Numerics.dll and/or System.Numerics.Vectors.dll", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_FeatureSIMD, W("FeatureSIMD"), EXTERNAL_FeatureSIMD_Default, "Enable SIMD intrinsics recognition in System.Numerics.dll and/or System.Numerics.Vectors.dll", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_SIMD16ByteOnly, W("SIMD16ByteOnly"), 0, "Limit maximum SIMD vector length to 16 bytes (used by x64_arm64_altjit)")
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_EnableAVX, W("EnableAVX"), EXTERNAL_JitEnableAVX_Default, "Enable AVX instruction set for wide operations as default", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_TrackDynamicMethodDebugInfo, W("TrackDynamicMethodDebugInfo"), 0, "Specifies whether debug info should be generated and tracked for dynamic methods", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_EnableAVX, W("EnableAVX"), EXTERNAL_JitEnableAVX_Default, "Enable AVX instruction set for wide operations as default", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_TrackDynamicMethodDebugInfo, W("TrackDynamicMethodDebugInfo"), 0, "Specifies whether debug info should be generated and tracked for dynamic methods", CLRConfig::EEConfig_default)
#ifdef FEATURE_MULTICOREJIT
@@ -407,18 +378,18 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_MultiCoreJitProfileWriteDelay, W("MultiCoreJit
///
/// Interpreter
///
-RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_Interpret, W("Interpret"), "Selectively uses the interpreter to execute the specified methods", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_InterpretExclude, W("InterpretExclude"), "Excludes the specified methods from the set selected by 'Interpret'", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_Interpret, W("Interpret"), "Selectively uses the interpreter to execute the specified methods", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_InterpretExclude, W("InterpretExclude"), "Excludes the specified methods from the set selected by 'Interpret'", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterMethHashMin, W("InterpreterMethHashMin"), 0, "Only interpret methods selected by 'Interpret' whose hash is at least this value. or after nth")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterMethHashMax, W("InterpreterMethHashMax"), UINT32_MAX, "If non-zero, only interpret methods selected by 'Interpret' whose hash is at most this value")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterStubMin, W("InterpreterStubMin"), 0, "Only interpret methods selected by 'Interpret' whose stub num is at least this value.")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterStubMax, W("InterpreterStubMax"), UINT32_MAX, "If non-zero, only interpret methods selected by 'Interpret' whose stub number is at most this value.")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterJITThreshold, W("InterpreterJITThreshold"), 10, "The number of times a method should be interpreted before being JITted")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterDoLoopMethods, W("InterpreterDoLoopMethods"), 0, "If set, don't check for loops, start by interpreting *all* methods")
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_InterpreterUseCaching, W("InterpreterUseCaching"), 1, "If non-zero, use the caching mechanism.", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_InterpreterLooseRules, W("InterpreterLooseRules"), 1, "If non-zero, allow ECMA spec violations required by managed C++.", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_InterpreterUseCaching, W("InterpreterUseCaching"), 1, "If non-zero, use the caching mechanism.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_InterpreterLooseRules, W("InterpreterLooseRules"), 1, "If non-zero, allow ECMA spec violations required by managed C++.", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_InterpreterPrintPostMortem, W("InterpreterPrintPostMortem"), 0, "Prints summary information about the execution to the console")
-RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_InterpreterLogFile, W("InterpreterLogFile"), "If non-null, append interpreter logging to this file, else use stdout", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_InterpreterLogFile, W("InterpreterLogFile"), "If non-null, append interpreter logging to this file, else use stdout", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_DumpInterpreterStubs, W("DumpInterpreterStubs"), 0, "Prints all interpreter stubs that are created to the console")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_TraceInterpreterEntries, W("TraceInterpreterEntries"), 0, "Logs entries to interpreted methods to the console")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_TraceInterpreterIL, W("TraceInterpreterIL"), 0, "Logs individual instructions of interpreted methods to the console")
@@ -437,7 +408,7 @@ RETAIL_CONFIG_STRING_INFO(INTERNAL_WinMDPath, W("WinMDPath"), "Path for Windows
///
/// Loader heap
///
-CONFIG_DWORD_INFO_EX(INTERNAL_LoaderHeapCallTracing, W("LoaderHeapCallTracing"), 0, "Loader heap troubleshooting", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_LoaderHeapCallTracing, W("LoaderHeapCallTracing"), 0, "Loader heap troubleshooting", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(INTERNAL_CodeHeapReserveForJumpStubs, W("CodeHeapReserveForJumpStubs"), 1, "Percentage of code heap to reserve for jump stubs")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_NGenReserveForJumpStubs, W("NGenReserveForJumpStubs"), 0, "Percentage of ngen image size to reserve for jump stubs")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_BreakOnOutOfMemoryWithinRange, W("BreakOnOutOfMemoryWithinRange"), 0, "Break before out of memory within range exception is thrown")
@@ -449,7 +420,7 @@ RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_LogEnable, W("LogEnable"), "Turn
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_LogFacility, W("LogFacility"), "Specifies a facility mask for CLR log. (See 'loglf.h'; VM interprets string value as hex number.) Also used by stresslog.")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_LogFacility2, W("LogFacility2"), "Specifies a facility mask for CLR log. (See 'loglf.h'; VM interprets string value as hex number.) Also used by stresslog.")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_logFatalError, W("logFatalError"), 1, "Specifies whether EventReporter logs fatal errors in the Windows event log.")
-CONFIG_STRING_INFO_EX(INTERNAL_LogFile, W("LogFile"), "Specifies a file name for the CLR log.", CLRConfig::REGUTIL_default)
+CONFIG_STRING_INFO_EX(INTERNAL_LogFile, W("LogFile"), "Specifies a file name for the CLR log.", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_LogFileAppend, W("LogFileAppend"), "Specifies whether to append to or replace the CLR log file.")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_LogFlushFile, W("LogFlushFile"), "Specifies whether to flush the CLR log file on each write.")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_LogLevel, W("LogLevel"), "4=10 msgs, 9=1000000, 10=everything")
@@ -461,22 +432,22 @@ CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_LogWithPid, W("LogWithPid"), "Appends p
///
/// MetaData
///
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_ApplyDeltaBreak, W("MD_ApplyDeltaBreak"), 0, "ASSERT when applying EnC", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_ApplyDeltaBreak, W("MD_ApplyDeltaBreak"), 0, "ASSERT when applying EnC", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_AssertOnBadImageFormat, W("AssertOnBadImageFormat"), "ASSERT when invalid MD read")
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_MD_DeltaCheck, W("MD_DeltaCheck"), 1, "Some checks of GUID when applying EnC (?)", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_EncDelta, W("MD_EncDelta"), 0, "Forces EnC Delta format in MD (?)", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_MD_ForceNoColDesSharing, W("MD_ForceNoColDesSharing"), 0, "Don't know - the only usage I could find is #if 0 (?)", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_KeepKnownCA, W("MD_KeepKnownCA"), 0, "Something with known CAs (?)", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_MiniMDBreak, W("MD_MiniMDBreak"), 0, "ASSERT when creating CMiniMdRw class", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_PreSaveBreak, W("MD_PreSaveBreak"), 0, "ASSERT when calling CMiniMdRw::PreSave", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_RegMetaBreak, W("MD_RegMetaBreak"), 0, "ASSERT when creating RegMeta class", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_RegMetaDump, W("MD_RegMetaDump"), 0, "Dump MD in 4 functions (?)", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_MD_DeltaCheck, W("MD_DeltaCheck"), 1, "Some checks of GUID when applying EnC (?)", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_EncDelta, W("MD_EncDelta"), 0, "Forces EnC Delta format in MD (?)", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_MD_ForceNoColDesSharing, W("MD_ForceNoColDesSharing"), 0, "Don't know - the only usage I could find is #if 0 (?)", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_KeepKnownCA, W("MD_KeepKnownCA"), 0, "Something with known CAs (?)", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_MiniMDBreak, W("MD_MiniMDBreak"), 0, "ASSERT when creating CMiniMdRw class", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_PreSaveBreak, W("MD_PreSaveBreak"), 0, "ASSERT when calling CMiniMdRw::PreSave", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_RegMetaBreak, W("MD_RegMetaBreak"), 0, "ASSERT when creating RegMeta class", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_RegMetaDump, W("MD_RegMetaDump"), 0, "Dump MD in 4 functions (?)", CLRConfig::EEConfig_default)
// MetaData - Desktop-only
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_WinMD_Disable, W("MD_WinMD_Disable"), 0, "Never activate the WinMD import adapter", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_MD_WinMD_AssertOnIllegalUsage, W("MD_WinMD_AssertOnIllegalUsage"), 0, "ASSERT if a WinMD import adapter detects a tool incompatibility", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_WinMD_Disable, W("MD_WinMD_Disable"), 0, "Never activate the WinMD import adapter", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_MD_WinMD_AssertOnIllegalUsage, W("MD_WinMD_AssertOnIllegalUsage"), 0, "ASSERT if a WinMD import adapter detects a tool incompatibility", CLRConfig::EEConfig_default)
// Metadata - mscordbi only - this flag is only intended to mitigate potential issues in bug fix 458597.
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_MD_PreserveDebuggerMetadataMemory, W("MD_PreserveDebuggerMetadataMemory"), 0, "Save all versions of metadata memory in the debugger when debuggee metadata is updated", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_MD_PreserveDebuggerMetadataMemory, W("MD_PreserveDebuggerMetadataMemory"), 0, "Save all versions of metadata memory in the debugger when debuggee metadata is updated", CLRConfig::EEConfig_default)
///
/// Spinning heuristics
@@ -498,20 +469,20 @@ CONFIG_DWORD_INFO(INTERNAL_NgenBind_ZapForbid, W("NgenBind_ZapForbid
CONFIG_STRING_INFO(INTERNAL_NgenBind_ZapForbidExcludeList, W("NgenBind_ZapForbidExcludeList"), "")
CONFIG_STRING_INFO(INTERNAL_NgenBind_ZapForbidList, W("NgenBind_ZapForbidList"), "")
-CONFIG_DWORD_INFO_EX(INTERNAL_SymDiffDump, W("SymDiffDump"), 0, "Used to create the map file while binding the assembly. Used by SemanticDiffer", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_SymDiffDump, W("SymDiffDump"), 0, "Used to create the map file while binding the assembly. Used by SemanticDiffer", CLRConfig::EEConfig_default)
///
/// NGEN
///
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_NGen_JitName, W("NGen_JitName"), "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_NGenFramed, W("NGenFramed"), (DWORD)-1, "Same as JitFramed, but for ngen", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NGenOnlyOneMethod, W("NGenOnlyOneMethod"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NgenOrder, W("NgenOrder"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_partialNGenStress, W("partialNGenStress"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_ZapDoNothing, W("ZapDoNothing"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NgenForceFailureMask, W("NgenForceFailureMask"), (DWORD)-1, "Bitmask used to control which locations will check and raise the failure (defaults to bits: -1)", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NgenForceFailureCount, W("NgenForceFailureCount"), 0, "If set to >0 and we have IBC data we will force a failure after we reference an IBC data item times", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NgenForceFailureKind, W("NgenForceFailureKind"), 1, "If set to 1, We will throw a TypeLoad exception; If set to 2, We will cause an A/V", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_NGen_JitName, W("NGen_JitName"), "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_NGenFramed, W("NGenFramed"), (DWORD)-1, "Same as JitFramed, but for ngen", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NGenOnlyOneMethod, W("NGenOnlyOneMethod"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NgenOrder, W("NgenOrder"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_partialNGenStress, W("partialNGenStress"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_ZapDoNothing, W("ZapDoNothing"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NgenForceFailureMask, W("NgenForceFailureMask"), (DWORD)-1, "Bitmask used to control which locations will check and raise the failure (defaults to bits: -1)", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NgenForceFailureCount, W("NgenForceFailureCount"), 0, "If set to >0 and we have IBC data we will force a failure after we reference an IBC data item times", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NgenForceFailureKind, W("NgenForceFailureKind"), 1, "If set to 1, We will throw a TypeLoad exception; If set to 2, We will cause an A/V", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_NGenEnableCreatePdb, W("NGenEnableCreatePdb"), 0, "If set to >0 ngen.exe displays help on, recognizes createpdb in the command line")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_NGenSimulateDiskFull, W("NGenSimulateDiskFull"), 0, "If set to 1, ngen will throw a Disk full exception in ZapWriter.cpp:Save()")
RETAIL_CONFIG_DWORD_INFO(INTERNAL_PartialNGen, W("PartialNGen"), (DWORD)-1, "Generate partial NGen images")
@@ -525,17 +496,17 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_CrossGenAssumeInputSigned, W("CrossGenAssumeIn
///
/// Profiling API / ETW
///
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_COR_ENABLE_PROFILING, W("COR_ENABLE_PROFILING"), 0, "Flag to indicate whether profiling should be enabled for the currently running process.", CLRConfig::DontPrependCOMPlus_ | CLRConfig::IgnoreConfigFiles)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_COR_ENABLE_PROFILING, W("COR_ENABLE_PROFILING"), 0, "Flag to indicate whether profiling should be enabled for the currently running process.", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_COR_PROFILER, W("COR_PROFILER"), "Specifies GUID of profiler to load into currently running process", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_COR_PROFILER_PATH, W("COR_PROFILER_PATH"), "Specifies the path to the DLL of profiler to load into currently running process", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_COR_PROFILER_PATH_32, W("COR_PROFILER_PATH_32"), "Specifies the path to the DLL of profiler to load into currently running 32 bits process", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_COR_PROFILER_PATH_64, W("COR_PROFILER_PATH_64"), "Specifies the path to the DLL of profiler to load into currently running 64 bits process", CLRConfig::DontPrependCOMPlus_)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_CORECLR_ENABLE_PROFILING, W("CORECLR_ENABLE_PROFILING"), 0, "CoreCLR only: Flag to indicate whether profiling should be enabled for the currently running process.", CLRConfig::DontPrependCOMPlus_ | CLRConfig::IgnoreConfigFiles)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_CORECLR_ENABLE_PROFILING, W("CORECLR_ENABLE_PROFILING"), 0, "CoreCLR only: Flag to indicate whether profiling should be enabled for the currently running process.", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_CORECLR_PROFILER, W("CORECLR_PROFILER"), "CoreCLR only: Specifies GUID of profiler to load into currently running process", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_CORECLR_PROFILER_PATH, W("CORECLR_PROFILER_PATH"), "CoreCLR only: Specifies the path to the DLL of profiler to load into currently running process", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_CORECLR_PROFILER_PATH_32, W("CORECLR_PROFILER_PATH_32"), "CoreCLR only: Specifies the path to the DLL of profiler to load into currently running 32 process", CLRConfig::DontPrependCOMPlus_)
RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_CORECLR_PROFILER_PATH_64, W("CORECLR_PROFILER_PATH_64"), "CoreCLR only: Specifies the path to the DLL of profiler to load into currently running 64 process", CLRConfig::DontPrependCOMPlus_)
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_ProfAPI_ProfilerCompatibilitySetting, W("ProfAPI_ProfilerCompatibilitySetting"), "Specifies the profiler loading policy (the default is not to load a V2 profiler in V4)", CLRConfig::REGUTIL_default | CLRConfig::TrimWhiteSpaceFromStringValue)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_ProfAPI_ProfilerCompatibilitySetting, W("ProfAPI_ProfilerCompatibilitySetting"), "Specifies the profiler loading policy (the default is not to load a V2 profiler in V4)", CLRConfig::EEConfig_default | CLRConfig::TrimWhiteSpaceFromStringValue)
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_ProfAPI_DetachMinSleepMs, W("ProfAPI_DetachMinSleepMs"), 0, "The minimum time, in milliseconds, the CLR will wait before checking whether a profiler that is in the process of detaching is ready to be unloaded.")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_ProfAPI_DetachMaxSleepMs, W("ProfAPI_DetachMaxSleepMs"), 0, "The maximum time, in milliseconds, the CLR will wait before checking whether a profiler that is in the process of detaching is ready to be unloaded.")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_ProfAPI_RejitOnAttach, W("ProfApi_RejitOnAttach"), 1, "Enables the ability for profilers to rejit methods on attach.")
@@ -547,13 +518,13 @@ CONFIG_DWORD_INFO(INTERNAL_TestOnlyEnableICorProfilerInfo, W("ProfAPI_TestOnlyEn
CONFIG_DWORD_INFO(INTERNAL_TestOnlyEnableObjectAllocatedHook, W("TestOnlyEnableObjectAllocatedHook"), 0, "Test-only flag that forces CLR to initialize on startup as if ObjectAllocated callback were requested, to enable post-attach ObjectAllocated functionality.")
CONFIG_DWORD_INFO(INTERNAL_TestOnlyEnableSlowELTHooks, W("TestOnlyEnableSlowELTHooks"), 0, "Test-only flag that forces CLR to initialize on startup as if slow-ELT were requested, to enable post-attach ELT functionality.")
-RETAIL_CONFIG_STRING_INFO_EX(UNSUPPORTED_ETW_ObjectAllocationEventsPerTypePerSec, W("ETW_ObjectAllocationEventsPerTypePerSec"), "Desired number of GCSampledObjectAllocation ETW events to be logged per type per second. If 0, then the default built in to the implementation for the enabled event (e.g., High, Low), will be used.", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(UNSUPPORTED_ETW_ObjectAllocationEventsPerTypePerSec, W("ETW_ObjectAllocationEventsPerTypePerSec"), "Desired number of GCSampledObjectAllocation ETW events to be logged per type per second. If 0, then the default built in to the implementation for the enabled event (e.g., High, Low), will be used.", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_ProfAPI_ValidateNGENInstrumentation, W("ProfAPI_ValidateNGENInstrumentation"), 0, "This flag enables additional validations when using the IMetaDataEmit APIs for NGEN'ed images to ensure only supported edits are made.")
#ifdef FEATURE_PERFMAP
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_PerfMapEnabled, W("PerfMapEnabled"), 0, "This flag is used on Linux to enable writing /tmp/perf-$pid.map. It is disabled by default", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_PerfMapJitDumpPath, W("PerfMapJitDumpPath"), "Specifies a path to write the perf jitdump file. Defaults to GetTempPathA()", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_PerfMapIgnoreSignal, W("PerfMapIgnoreSignal"), 0, "When perf map is enabled, this option will configure the specified signal to be accepted and ignored as a marker in the perf logs. It is disabled by default", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_PerfMapEnabled, W("PerfMapEnabled"), 0, "This flag is used on Linux to enable writing /tmp/perf-$pid.map. It is disabled by default", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_PerfMapJitDumpPath, W("PerfMapJitDumpPath"), "Specifies a path to write the perf jitdump file. Defaults to GetTempPathA()", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_PerfMapIgnoreSignal, W("PerfMapIgnoreSignal"), 0, "When perf map is enabled, this option will configure the specified signal to be accepted and ignored as a marker in the perf logs. It is disabled by default", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_PerfMapShowOptimizationTiers, W("PerfMapShowOptimizationTiers"), 1, "Shows optimization tiers in the perf map for methods, as part of the symbol name. Useful for seeing separate stack frames for different optimization tiers of each method.")
RETAIL_CONFIG_STRING_INFO(EXTERNAL_NativeImagePerfMapFormat, W("NativeImagePerfMapFormat"), "Specifies the format of native image perfmap files generated by crossgen. Valid options are RVA or OFFSET.")
#endif
@@ -563,11 +534,11 @@ RETAIL_CONFIG_STRING_INFO(EXTERNAL_StartupDelayMS, W("StartupDelayMS"), "")
///
/// Stress
///
-CONFIG_DWORD_INFO_EX(INTERNAL_StressCOMCall, W("StressCOMCall"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_StressCOMCall, W("StressCOMCall"), 0, "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_StressLog, W("StressLog"), "Turns on the stress log.")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_ForceEnc, W("ForceEnc"), "Forces Edit and Continue to be on for all eligible modules.")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_StressLogSize, W("StressLogSize"), "Stress log size in bytes per thread.")
-CONFIG_DWORD_INFO_EX(INTERNAL_stressSynchronized, W("stressSynchronized"), 0, "Unknown if or where this is used; unless a test is specifically depending on this, it can be removed.", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_stressSynchronized, W("stressSynchronized"), 0, "Unknown if or where this is used; unless a test is specifically depending on this, it can be removed.", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_StressThreadCount, W("StressThreadCount"), "")
///
@@ -648,6 +619,16 @@ CONFIG_DWORD_INFO(INTERNAL_OSR_LowId, W("OSR_LowId"), (DWORD)-1, "Low end of ena
CONFIG_DWORD_INFO(INTERNAL_OSR_HighId, W("OSR_HighId"), 10000000, "High end of enabled patchpoint range (inclusive)");
#endif
+///
+/// Profile Guided Opts
+///
+#ifdef FEATURE_PGO
+RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_PGODataPath, W("PGODataPath"), "Read/Write PGO data from/to the indicated file.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO(INTERNAL_ReadPGOData, W("ReadPGOData"), 0, "Read PGO data")
+RETAIL_CONFIG_DWORD_INFO(INTERNAL_WritePGOData, W("WritePGOData"), 0, "Write PGO data")
+RETAIL_CONFIG_DWORD_INFO(INTERNAL_TieredPGO, W("TieredPGO"), 0, "Instrument Tier0 code and make counts available to Tier1")
+#endif
+
///
/// Entry point slot backpatch
///
@@ -663,32 +644,40 @@ CONFIG_DWORD_INFO(INTERNAL_TypeLoader_InjectInterfaceDuplicates, W("INTERNAL_Typ
///
/// Virtual call stubs
///
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubCollideMonoPct, W("VirtualCallStubCollideMonoPct"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubCollideWritePct, W("VirtualCallStubCollideWritePct"), 100, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubDumpLogCounter, W("VirtualCallStubDumpLogCounter"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubDumpLogIncr, W("VirtualCallStubDumpLogIncr"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_VirtualCallStubLogging, W("VirtualCallStubLogging"), 0, "Worth keeping, but should be moved into \"#ifdef STUB_LOGGING\" blocks. This goes for most (or all) of the stub logging infrastructure.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubMissCount, W("VirtualCallStubMissCount"), 100, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubResetCacheCounter, W("VirtualCallStubResetCacheCounter"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubResetCacheIncr, W("VirtualCallStubResetCacheIncr"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubCollideMonoPct, W("VirtualCallStubCollideMonoPct"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubCollideWritePct, W("VirtualCallStubCollideWritePct"), 100, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubDumpLogCounter, W("VirtualCallStubDumpLogCounter"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubDumpLogIncr, W("VirtualCallStubDumpLogIncr"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_VirtualCallStubLogging, W("VirtualCallStubLogging"), 0, "Worth keeping, but should be moved into \"#ifdef STUB_LOGGING\" blocks. This goes for most (or all) of the stub logging infrastructure.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubMissCount, W("VirtualCallStubMissCount"), 100, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubResetCacheCounter, W("VirtualCallStubResetCacheCounter"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_VirtualCallStubResetCacheIncr, W("VirtualCallStubResetCacheIncr"), 0, "Used only when STUB_LOGGING is defined, which by default is not.", CLRConfig::EEConfig_default)
///
/// Watson
///
RETAIL_CONFIG_DWORD_INFO(INTERNAL_DisableWatsonForManagedExceptions, W("DisableWatsonForManagedExceptions"), 0, "Disable Watson and debugger launching for managed exceptions")
+///
+/// Dump generation
+///
+RETAIL_CONFIG_DWORD_INFO(INTERNAL_DbgEnableMiniDump, W("DbgEnableMiniDump"), 0, "Enable unhandled exception crash dump generation")
+RETAIL_CONFIG_STRING_INFO(INTERNAL_DbgMiniDumpName, W("DbgMiniDumpName"), "Crash dump name")
+RETAIL_CONFIG_DWORD_INFO(INTERNAL_DbgMiniDumpType, W("DbgMiniDumpType"), 0, "Crash dump type: 1 normal, 2 withheap, 3 triage, 4 full")
+RETAIL_CONFIG_DWORD_INFO(INTERNAL_CreateDumpDiagnostics, W("CreateDumpDiagnostics"), 0, "Enable crash dump generation diagnostic logging")
+
///
/// Zap
///
-RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_ZapBBInstr, W("ZapBBInstr"), "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(INTERNAL_ZapBBInstr, W("ZapBBInstr"), "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_STRING_INFO(EXTERNAL_ZapBBInstrDir, W("ZapBBInstrDir"), "")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_ZapDisable, W("ZapDisable"), 0, "")
-CONFIG_STRING_INFO_EX(INTERNAL_ZapExclude, W("ZapExclude"), "", CLRConfig::REGUTIL_default)
-CONFIG_STRING_INFO_EX(INTERNAL_ZapOnly, W("ZapOnly"), "", CLRConfig::REGUTIL_default)
+CONFIG_STRING_INFO_EX(INTERNAL_ZapExclude, W("ZapExclude"), "", CLRConfig::EEConfig_default)
+CONFIG_STRING_INFO_EX(INTERNAL_ZapOnly, W("ZapOnly"), "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_ZapRequire, W("ZapRequire"), "")
RETAIL_CONFIG_STRING_INFO(EXTERNAL_ZapRequireExcludeList, W("ZapRequireExcludeList"), "")
RETAIL_CONFIG_STRING_INFO(EXTERNAL_ZapRequireList, W("ZapRequireList"), "")
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_ZapSet, W("ZapSet"), "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_ZapSet, W("ZapSet"), "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_ReadyToRun, W("ReadyToRun"), 1, "Enable/disable use of ReadyToRun native code") // On by default for CoreCLR
RETAIL_CONFIG_STRING_INFO(EXTERNAL_ReadyToRunExcludeList, W("ReadyToRunExcludeList"), "List of assemblies that cannot use Ready to Run images")
@@ -704,7 +693,7 @@ RETAIL_CONFIG_STRING_INFO(INTERNAL_EventNameFilter, W("EventNameFilter"), "")
/// Interop
///
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_ExposeExceptionsInCOM, W("ExposeExceptionsInCOM"), "")
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_PInvokeInline, W("PInvokeInline"), "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_PInvokeInline, W("PInvokeInline"), "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_InteropValidatePinnedObjects, W("InteropValidatePinnedObjects"), 0, "After returning from a managed-to-unmanaged interop call, validate GC heap around objects pinned by IL stubs.")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_InteropLogArguments, W("InteropLogArguments"), 0, "Log all pinned arguments passed to an interop call")
RETAIL_CONFIG_STRING_INFO(UNSUPPORTED_LogCCWRefCountChange, W("LogCCWRefCountChange"), "Outputs debug information and calls LogCCWRefCountChange_BREAKPOINT when AddRef or Release is called on a CCW.")
@@ -726,7 +715,7 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_EventPipeProcNumbers, W("EventPipeProcNumbers"
//
// Diagnostics Server
//
-RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_DOTNET_DiagnosticsServerAddress, W("DOTNET_DiagnosticsServerAddress"), "The full path including filename for the OS transport (NamedPipe on Windows; Unix Domain Socket on Linux) to be used by the Diagnostics Server", CLRConfig::DontPrependCOMPlus_);
+RETAIL_CONFIG_STRING_INFO_EX(EXTERNAL_DOTNET_DiagnosticsMonitorAddress, W("DOTNET_DiagnosticsMonitorAddress"), "NamedPipe path without '\\\\.\\pipe\\' on Windows; Full path of Unix Domain Socket on Linux/Unix. Used for Diagnostics Monitoring Agents.", CLRConfig::DontPrependCOMPlus_);
//
// LTTng
@@ -757,38 +746,36 @@ RETAIL_CONFIG_DWORD_INFO(INTERNAL_GDBJitEmitDebugFrame, W("GDBJitEmitDebugFrame"
//
// DO NOT ADD ANY MORE CONFIG SWITCHES TO THIS SECTION!
// **
-CONFIG_DWORD_INFO_EX(INTERNAL_ActivatePatchSkip, W("ActivatePatchSkip"), 0, "Allows an assert when ActivatePatchSkip is called", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_ActivatePatchSkip, W("ActivatePatchSkip"), 0, "Allows an assert when ActivatePatchSkip is called", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_AlwaysUseMetadataInterfaceMapLayout, W("AlwaysUseMetadataInterfaceMapLayout"), "Used for debugging generic interface map layout.")
CONFIG_DWORD_INFO(INTERNAL_AssertOnUnneededThis, W("AssertOnUnneededThis"), 0, "While the ConfigDWORD is unnecessary, the contained ASSERT should be kept. This may result in some work tracking down violating MethodDescCallSites.")
-CONFIG_DWORD_INFO_EX(INTERNAL_AssertStacktrace, W("AssertStacktrace"), 1, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_clearNativeImageStress, W("clearNativeImageStress"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_AssertStacktrace, W("AssertStacktrace"), 1, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_clearNativeImageStress, W("clearNativeImageStress"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_CPUFamily, W("CPUFamily"), "")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_CPUFeatures, W("CPUFeatures"), "")
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_DisableConfigCache, W("DisableConfigCache"), 0, "Used to disable the \"probabilistic\" config cache, which walks through the appropriate config registry keys on init and probabilistically keeps track of which exist.", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_DisableConfigCache, W("DisableConfigCache"), 0, "Used to disable the \"probabilistic\" config cache, which walks through the appropriate config registry keys on init and probabilistically keeps track of which exist.", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_DisableStackwalkCache, W("DisableStackwalkCache"), "")
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_DoubleArrayToLargeObjectHeap, W("DoubleArrayToLargeObjectHeap"), "Controls double[] placement")
CONFIG_STRING_INFO(INTERNAL_DumpOnClassLoad, W("DumpOnClassLoad"), "Dumps information about loaded class to log.")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_ExpandAllOnLoad, W("ExpandAllOnLoad"), "")
CONFIG_STRING_INFO_DIRECT_ACCESS(INTERNAL_ForcedRuntime, W("ForcedRuntime"), "Verify version of CLR loaded")
-CONFIG_DWORD_INFO_EX(INTERNAL_ForceRelocs, W("ForceRelocs"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_ForceRelocs, W("ForceRelocs"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_GenerateLongJumpDispatchStubRatio, W("GenerateLongJumpDispatchStubRatio"), "Useful for testing VSD on AMD64")
-CONFIG_DWORD_INFO_EX(INTERNAL_HashStack, W("HashStack"), 0, "", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_HashStack, W("HashStack"), 0, "", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO(INTERNAL_HostManagerConfig, W("HostManagerConfig"), (DWORD)-1, "")
CONFIG_DWORD_INFO(INTERNAL_HostTestThreadAbort, W("HostTestThreadAbort"), 0, "")
RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_IgnoreDllMainReturn, W("IgnoreDllMainReturn"), 0, "Don't check the return value of DllMain if this is set", CLRConfig::ConfigFile_ApplicationFirst)
CONFIG_STRING_INFO(INTERNAL_InvokeHalt, W("InvokeHalt"), "Throws an assert when the given method is invoked through reflection.")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_legacyNullReferenceExceptionPolicy, W("legacyNullReferenceExceptionPolicy"), "")
-RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_legacyUnhandledExceptionPolicy, W("legacyUnhandledExceptionPolicy"), "")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_MaxStackDepth, W("MaxStackDepth"), "")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_MaxStubUnwindInfoSegmentSize, W("MaxStubUnwindInfoSegmentSize"), "")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_MaxThreadRecord, W("MaxThreadRecord"), "")
CONFIG_DWORD_INFO(INTERNAL_MessageDebugOut, W("MessageDebugOut"), 0, "")
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_NativeImageRequire, W("NativeImageRequire"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NestedEhOom, W("NestedEhOom"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_NativeImageRequire, W("NativeImageRequire"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NestedEhOom, W("NestedEhOom"), 0, "", CLRConfig::EEConfig_default)
#define INTERNAL_NoGuiOnAssert_Default 1
-RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_NoGuiOnAssert, W("NoGuiOnAssert"), INTERNAL_NoGuiOnAssert_Default, "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_NoProcedureSplitting, W("NoProcedureSplitting"), 0, "", CLRConfig::REGUTIL_default)
-CONFIG_DWORD_INFO_EX(INTERNAL_NoStringInterning, W("NoStringInterning"), 1, "Disallows string interning. I see no value in it anymore.", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(INTERNAL_NoGuiOnAssert, W("NoGuiOnAssert"), INTERNAL_NoGuiOnAssert_Default, "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_NoProcedureSplitting, W("NoProcedureSplitting"), 0, "", CLRConfig::EEConfig_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_NoStringInterning, W("NoStringInterning"), 1, "Disallows string interning. I see no value in it anymore.", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_NotifyBadAppCfg, W("NotifyBadAppCfg"), "Whether to show a message box for bad application config file.")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_PauseOnLoad, W("PauseOnLoad"), "Stops in SystemDomain::init. I think it can be removed.")
CONFIG_DWORD_INFO(INTERNAL_PerfAllocsSizeThreshold, W("PerfAllocsSizeThreshold"), 0x3FFFFFFF, "Log facility LF_GCALLOC logs object allocations. This flag controls which ones also log stacktraces. Predates ClrProfiler.")
@@ -798,8 +785,8 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_Prepopulate1, W("Prepopulate1"), 1, "")
CONFIG_STRING_INFO(INTERNAL_PrestubGC, W("PrestubGC"), "")
CONFIG_STRING_INFO(INTERNAL_PrestubHalt, W("PrestubHalt"), "")
RETAIL_CONFIG_STRING_INFO(EXTERNAL_RestrictedGCStressExe, W("RestrictedGCStressExe"), "")
-CONFIG_DWORD_INFO_EX(INTERNAL_ReturnSourceTypeForTesting, W("ReturnSourceTypeForTesting"), 0, "Allows returning the (internal only) source type of an IL to Native mapping for debugging purposes", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_RSStressLog, W("RSStressLog"), 0, "Allows turning on logging for RS startup", CLRConfig::REGUTIL_default)
+CONFIG_DWORD_INFO_EX(INTERNAL_ReturnSourceTypeForTesting, W("ReturnSourceTypeForTesting"), 0, "Allows returning the (internal only) source type of an IL to Native mapping for debugging purposes", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_RSStressLog, W("RSStressLog"), 0, "Allows turning on logging for RS startup", CLRConfig::EEConfig_default)
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_SaveThreadInfo, W("SaveThreadInfo"), "")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_SaveThreadInfoMask, W("SaveThreadInfoMask"), "")
CONFIG_DWORD_INFO(INTERNAL_SBDumpOnNewIndex, W("SBDumpOnNewIndex"), 0, "Used for Syncblock debugging. It's been a while since any of those have been used.")
@@ -808,11 +795,11 @@ CONFIG_DWORD_INFO(INTERNAL_SBDumpStyle, W("SBDumpStyle"), 0, "Used for Syncblock
RETAIL_CONFIG_STRING_INFO_DIRECT_ACCESS(UNSUPPORTED_ShimDatabaseVersion, W("ShimDatabaseVersion"), "Force using shim database version in registry")
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_SleepOnExit, W("SleepOnExit"), 0, "Used for lrak detection. I'd say deprecated by umdh.")
CONFIG_DWORD_INFO_DIRECT_ACCESS(INTERNAL_StubLinkerUnwindInfoVerificationOn, W("StubLinkerUnwindInfoVerificationOn"), "")
-RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_SuccessExit, W("SuccessExit"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(UNSUPPORTED_SuccessExit, W("SuccessExit"), 0, "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(EXTERNAL_SymbolReadingPolicy, W("SymbolReadingPolicy"), "Specifies when PDBs may be read")
RETAIL_CONFIG_DWORD_INFO(UNSUPPORTED_TestDataConsistency, W("TestDataConsistency"), FALSE, "Allows ensuring the left side is not holding locks (and may thus be in an inconsistent state) when inspection occurs")
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_ThreadGuardPages, W("ThreadGuardPages"), 0, "", CLRConfig::REGUTIL_default)
-RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_Timeline, W("Timeline"), 0, "", CLRConfig::REGUTIL_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_ThreadGuardPages, W("ThreadGuardPages"), 0, "", CLRConfig::EEConfig_default)
+RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_Timeline, W("Timeline"), 0, "", CLRConfig::EEConfig_default)
RETAIL_CONFIG_DWORD_INFO_DIRECT_ACCESS(UNSUPPORTED_TotalStressLogSize, W("TotalStressLogSize"), "Total stress log size in bytes.")
#ifdef _DEBUG
diff --git a/src/coreclr/src/inc/clrversion.h b/src/coreclr/src/inc/clrversion.h
new file mode 100644
index 00000000000000..def05683a1a6c5
--- /dev/null
+++ b/src/coreclr/src/inc/clrversion.h
@@ -0,0 +1,30 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
+#include "runtime_version.h"
+
+#ifndef QUOTE_MACRO
+#define QUOTE_MACRO_HELPER(x) #x
+#define QUOTE_MACRO(x) QUOTE_MACRO_HELPER(x)
+#endif
+
+#ifndef QUOTE_MACRO_L
+#define QUOTE_MACRO_L_HELPER(x) L###x
+#define QUOTE_MACRO_L(x) QUOTE_MACRO_L_HELPER(x)
+#endif
+
+#define CLR_METADATA_VERSION "v4.0.30319"
+#define CLR_METADATA_VERSION_L W("v4.0.30319")
+
+#define CLR_PRODUCT_VERSION QUOTE_MACRO(RuntimeProductVersion)
+#define CLR_PRODUCT_VERSION_L QUOTE_MACRO_L(RuntimeProductVersion)
+
+#define VER_ASSEMBLYVERSION_STR QUOTE_MACRO(RuntimeAssemblyMajorVersion.RuntimeAssemblyMinorVersion.0.0)
+#define VER_ASSEMBLYVERSION_STR_L QUOTE_MACRO_L(RuntimeAssemblyMajorVersion.RuntimeAssemblyMinorVersion.0.0)
+
+#define VER_FILEVERSION_STR QUOTE_MACRO(RuntimeFileMajorVersion.RuntimeFileMinorVersion.RuntimeFileBuildVersion.RuntimeFileRevisionVersion)
+#define VER_FILEVERSION_STR_L QUOTE_MACRO_L(RuntimeFileMajorVersion.RuntimeFileMinorVersion.RuntimeFileBuildVersion.RuntimeFileRevisionVersion)
+
+#define VER_LEGALCOPYRIGHT_LOGO_STR "Copyright (c) Microsoft Corporation. All rights reserved."
+#define VER_LEGALCOPYRIGHT_LOGO_STR_L L"Copyright (c) Microsoft Corporation. All rights reserved."
diff --git a/src/coreclr/src/inc/configuration.h b/src/coreclr/src/inc/configuration.h
index 2980f34d8bd3a6..94f016888f5f89 100644
--- a/src/coreclr/src/inc/configuration.h
+++ b/src/coreclr/src/inc/configuration.h
@@ -35,7 +35,7 @@ class Configuration
// in the traditional way separately if you need to.
//
// Returns value for name if found in config.
- static ULONGLONG GetKnobULONGLONGValue(LPCWSTR name);
+ static ULONGLONG GetKnobULONGLONGValue(LPCWSTR name, ULONGLONG defaultValue);
// Returns (in priority order):
// - The value of the ConfigStringInfo if it's set
diff --git a/src/coreclr/src/inc/corcompile.h b/src/coreclr/src/inc/corcompile.h
index a14a979bd0a265..2973b7a2fa42b6 100644
--- a/src/coreclr/src/inc/corcompile.h
+++ b/src/coreclr/src/inc/corcompile.h
@@ -1728,8 +1728,8 @@ class ICorCompileInfo
// to 1 on the clone. The buffer has to be large enough to hold the stub object and the code
virtual HRESULT GetStubClone(void *pStub, BYTE *pBuffer, DWORD dwBufferSize) = 0;
- // true if the method has [NativeCallableAttribute]
- virtual BOOL IsNativeCallableMethod(CORINFO_METHOD_HANDLE handle) = 0;
+ // true if the method has [UnmanagedCallersOnlyAttribute]
+ virtual BOOL IsUnmanagedCallersOnlyMethod(CORINFO_METHOD_HANDLE handle) = 0;
virtual BOOL GetIsGeneratingNgenPDB() = 0;
virtual void SetIsGeneratingNgenPDB(BOOL fGeneratingNgenPDB) = 0;
diff --git a/src/coreclr/src/inc/cordebug.idl b/src/coreclr/src/inc/cordebug.idl
index 87e1458cfc91da..be745368f2bb33 100644
--- a/src/coreclr/src/inc/cordebug.idl
+++ b/src/coreclr/src/inc/cordebug.idl
@@ -2567,7 +2567,8 @@ typedef enum CorGCReferenceType
CorHandleStrongDependent = 1<<6,
CorHandleStrongAsyncPinned = 1<<7,
CorHandleStrongSizedByref = 1<<8,
- CorHandleWeakWinRT = 1<<9,
+ CorHandleWeakNativeCom = 1<<9,
+ CorHandleWeakWinRT = CorHandleWeakNativeCom,
CorReferenceStack = 0x80000001,
CorReferenceFinalizer = 80000002,
diff --git a/src/coreclr/src/inc/corhlprpriv.h b/src/coreclr/src/inc/corhlprpriv.h
index 8fcafd08d93c34..7b9e5f1f885677 100644
--- a/src/coreclr/src/inc/corhlprpriv.h
+++ b/src/coreclr/src/inc/corhlprpriv.h
@@ -507,6 +507,7 @@ class CQuickArrayList : protected CQuickArray
using CQuickArray::AllocNoThrow;
using CQuickArray::ReSizeNoThrow;
using CQuickArray::MaxSize;
+ using CQuickArray::Ptr;
CQuickArrayList()
: m_curSize(0)
diff --git a/src/coreclr/src/inc/corinfo.h b/src/coreclr/src/inc/corinfo.h
index 635da5887ade4b..2c8c1260b73925 100644
--- a/src/coreclr/src/inc/corinfo.h
+++ b/src/coreclr/src/inc/corinfo.h
@@ -217,11 +217,11 @@ TODO: Talk about initializing strutures before use
#endif
#endif
-SELECTANY const GUID JITEEVersionIdentifier = { /* 6ae798bf-44bd-4e8a-b8fc-dbe1d1f4029e */
- 0x6ae798bf,
- 0x44bd,
- 0x4e8a,
- {0xb8, 0xfc, 0xdb, 0xe1, 0xd1, 0xf4, 0x02, 0x9e}
+SELECTANY const GUID JITEEVersionIdentifier = { /* 8b2226a2-ac30-4f5c-ae5c-926c792ecdb9 */
+ 0x8b2226a2,
+ 0xac30,
+ 0x4f5c,
+ { 0xae, 0x5c, 0x92, 0x6c, 0x79, 0x2e, 0xcd, 0xb9 }
};
//////////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -937,6 +937,7 @@ enum CorInfoIntrinsics
CORINFO_INTRINSIC_StubHelpers_GetStubContext,
CORINFO_INTRINSIC_StubHelpers_GetStubContextAddr,
CORINFO_INTRINSIC_StubHelpers_GetNDirectTarget,
+ CORINFO_INTRINSIC_StubHelpers_NextCallReturnAddress,
CORINFO_INTRINSIC_InterlockedAdd32,
CORINFO_INTRINSIC_InterlockedAdd64,
CORINFO_INTRINSIC_InterlockedXAdd32,
@@ -946,6 +947,7 @@ enum CorInfoIntrinsics
CORINFO_INTRINSIC_InterlockedCmpXchg32,
CORINFO_INTRINSIC_InterlockedCmpXchg64,
CORINFO_INTRINSIC_MemoryBarrier,
+ CORINFO_INTRINSIC_MemoryBarrierLoad,
CORINFO_INTRINSIC_GetCurrentManagedThread,
CORINFO_INTRINSIC_GetManagedThreadId,
CORINFO_INTRINSIC_ByReference_Ctor,
@@ -1074,15 +1076,6 @@ enum CorInfoIndirectCallReason
CORINFO_INDIRECT_CALL_COUNT
};
-// When using CORINFO_HELPER_TAILCALL, the JIT needs to pass certain special
-// calling convention/argument passing/handling details to the helper
-enum CorInfoHelperTailCallSpecialHandling
-{
- CORINFO_TAILCALL_NORMAL = 0x00000000,
- CORINFO_TAILCALL_STUB_DISPATCH_ARG = 0x00000001,
-};
-
-
inline bool dontInline(CorInfoInline val) {
return(val < 0);
}
@@ -1612,7 +1605,7 @@ struct CORINFO_CALL_INFO
unsigned classFlags; //flags for CORINFO_RESOLVED_TOKEN::hClass
- CORINFO_SIG_INFO sig;
+ CORINFO_SIG_INFO sig;
//Verification information
unsigned verMethodFlags; // flags for CORINFO_RESOLVED_TOKEN::hMethod
@@ -1796,6 +1789,30 @@ struct CORINFO_EE_INFO
CORINFO_OS osType;
};
+// Flags passed from JIT to runtime.
+enum CORINFO_GET_TAILCALL_HELPERS_FLAGS
+{
+ // The callsite is a callvirt instruction.
+ CORINFO_TAILCALL_IS_CALLVIRT = 0x00000001,
+ CORINFO_TAILCALL_THIS_ARG_IS_BYREF = 0x00000002,
+};
+
+// Flags passed from runtime to JIT.
+enum CORINFO_TAILCALL_HELPERS_FLAGS
+{
+ // The StoreArgs stub needs to be passed the target function pointer as the
+ // first argument.
+ CORINFO_TAILCALL_STORE_TARGET = 0x00000001,
+};
+
+struct CORINFO_TAILCALL_HELPERS
+{
+ CORINFO_TAILCALL_HELPERS_FLAGS flags;
+ CORINFO_METHOD_HANDLE hStoreArgs;
+ CORINFO_METHOD_HANDLE hCallTarget;
+ CORINFO_METHOD_HANDLE hDispatcher;
+};
+
// This is used to indicate that a finally has been called
// "locally" by the try block
enum { LCL_FINALLY_MARK = 0xFC }; // FC = "Finally Call"
@@ -3115,11 +3132,20 @@ class ICorDynamicInfo : public ICorStaticInfo
CORINFO_METHOD_HANDLE methHnd
) = 0;
- // return a thunk that will copy the arguments for the given signature.
- virtual void* getTailCallCopyArgsThunk (
- CORINFO_SIG_INFO *pSig,
- CorInfoHelperTailCallSpecialHandling flags
- ) = 0;
+ // Obtain tailcall help for the specified call site.
+ virtual bool getTailCallHelpers(
+
+ // The resolved token for the call. Can be null for calli.
+ CORINFO_RESOLVED_TOKEN* callToken,
+
+ // The signature at the callsite.
+ CORINFO_SIG_INFO* sig,
+
+ // Flags for the tailcall site.
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+
+ // The resulting help.
+ CORINFO_TAILCALL_HELPERS* pResult) = 0;
// Optionally, convert calli to regular method call. This is for PInvoke argument marshalling.
virtual bool convertPInvokeCalliToCall(
diff --git a/src/coreclr/src/inc/corinfoinstructionset.h b/src/coreclr/src/inc/corinfoinstructionset.h
index e689f03d8557d6..8e667bc29b07b1 100644
--- a/src/coreclr/src/inc/corinfoinstructionset.h
+++ b/src/coreclr/src/inc/corinfoinstructionset.h
@@ -32,58 +32,62 @@ enum CORINFO_InstructionSet
InstructionSet_Vector128=12,
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
- InstructionSet_SSE=1,
- InstructionSet_SSE2=2,
- InstructionSet_SSE3=3,
- InstructionSet_SSSE3=4,
- InstructionSet_SSE41=5,
- InstructionSet_SSE42=6,
- InstructionSet_AVX=7,
- InstructionSet_AVX2=8,
- InstructionSet_AES=9,
- InstructionSet_BMI1=10,
- InstructionSet_BMI2=11,
- InstructionSet_FMA=12,
- InstructionSet_LZCNT=13,
- InstructionSet_PCLMULQDQ=14,
- InstructionSet_POPCNT=15,
- InstructionSet_Vector128=16,
- InstructionSet_Vector256=17,
- InstructionSet_BMI1_X64=18,
- InstructionSet_BMI2_X64=19,
- InstructionSet_LZCNT_X64=20,
- InstructionSet_POPCNT_X64=21,
- InstructionSet_SSE_X64=22,
- InstructionSet_SSE2_X64=23,
- InstructionSet_SSE41_X64=24,
- InstructionSet_SSE42_X64=25,
+ InstructionSet_X86Base=1,
+ InstructionSet_SSE=2,
+ InstructionSet_SSE2=3,
+ InstructionSet_SSE3=4,
+ InstructionSet_SSSE3=5,
+ InstructionSet_SSE41=6,
+ InstructionSet_SSE42=7,
+ InstructionSet_AVX=8,
+ InstructionSet_AVX2=9,
+ InstructionSet_AES=10,
+ InstructionSet_BMI1=11,
+ InstructionSet_BMI2=12,
+ InstructionSet_FMA=13,
+ InstructionSet_LZCNT=14,
+ InstructionSet_PCLMULQDQ=15,
+ InstructionSet_POPCNT=16,
+ InstructionSet_Vector128=17,
+ InstructionSet_Vector256=18,
+ InstructionSet_X86Base_X64=19,
+ InstructionSet_BMI1_X64=20,
+ InstructionSet_BMI2_X64=21,
+ InstructionSet_LZCNT_X64=22,
+ InstructionSet_POPCNT_X64=23,
+ InstructionSet_SSE_X64=24,
+ InstructionSet_SSE2_X64=25,
+ InstructionSet_SSE41_X64=26,
+ InstructionSet_SSE42_X64=27,
#endif // TARGET_AMD64
#ifdef TARGET_X86
- InstructionSet_SSE=1,
- InstructionSet_SSE2=2,
- InstructionSet_SSE3=3,
- InstructionSet_SSSE3=4,
- InstructionSet_SSE41=5,
- InstructionSet_SSE42=6,
- InstructionSet_AVX=7,
- InstructionSet_AVX2=8,
- InstructionSet_AES=9,
- InstructionSet_BMI1=10,
- InstructionSet_BMI2=11,
- InstructionSet_FMA=12,
- InstructionSet_LZCNT=13,
- InstructionSet_PCLMULQDQ=14,
- InstructionSet_POPCNT=15,
- InstructionSet_Vector128=16,
- InstructionSet_Vector256=17,
- InstructionSet_BMI1_X64=18,
- InstructionSet_BMI2_X64=19,
- InstructionSet_LZCNT_X64=20,
- InstructionSet_POPCNT_X64=21,
- InstructionSet_SSE_X64=22,
- InstructionSet_SSE2_X64=23,
- InstructionSet_SSE41_X64=24,
- InstructionSet_SSE42_X64=25,
+ InstructionSet_X86Base=1,
+ InstructionSet_SSE=2,
+ InstructionSet_SSE2=3,
+ InstructionSet_SSE3=4,
+ InstructionSet_SSSE3=5,
+ InstructionSet_SSE41=6,
+ InstructionSet_SSE42=7,
+ InstructionSet_AVX=8,
+ InstructionSet_AVX2=9,
+ InstructionSet_AES=10,
+ InstructionSet_BMI1=11,
+ InstructionSet_BMI2=12,
+ InstructionSet_FMA=13,
+ InstructionSet_LZCNT=14,
+ InstructionSet_PCLMULQDQ=15,
+ InstructionSet_POPCNT=16,
+ InstructionSet_Vector128=17,
+ InstructionSet_Vector256=18,
+ InstructionSet_X86Base_X64=19,
+ InstructionSet_BMI1_X64=20,
+ InstructionSet_BMI2_X64=21,
+ InstructionSet_LZCNT_X64=22,
+ InstructionSet_POPCNT_X64=23,
+ InstructionSet_SSE_X64=24,
+ InstructionSet_SSE2_X64=25,
+ InstructionSet_SSE41_X64=26,
+ InstructionSet_SSE42_X64=27,
#endif // TARGET_X86
};
@@ -139,6 +143,8 @@ struct CORINFO_InstructionSetFlags
AddInstructionSet(InstructionSet_Crc32_Arm64);
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
+ if (HasInstructionSet(InstructionSet_X86Base))
+ AddInstructionSet(InstructionSet_X86Base_X64);
if (HasInstructionSet(InstructionSet_SSE))
AddInstructionSet(InstructionSet_SSE_X64);
if (HasInstructionSet(InstructionSet_SSE2))
@@ -204,6 +210,10 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_Sha256);
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
+ if (resultflags.HasInstructionSet(InstructionSet_X86Base) && !resultflags.HasInstructionSet(InstructionSet_X86Base_X64))
+ resultflags.RemoveInstructionSet(InstructionSet_X86Base);
+ if (resultflags.HasInstructionSet(InstructionSet_X86Base_X64) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
+ resultflags.RemoveInstructionSet(InstructionSet_X86Base_X64);
if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_SSE_X64))
resultflags.RemoveInstructionSet(InstructionSet_SSE);
if (resultflags.HasInstructionSet(InstructionSet_SSE_X64) && !resultflags.HasInstructionSet(InstructionSet_SSE))
@@ -236,6 +246,8 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
if (resultflags.HasInstructionSet(InstructionSet_POPCNT_X64) && !resultflags.HasInstructionSet(InstructionSet_POPCNT))
resultflags.RemoveInstructionSet(InstructionSet_POPCNT_X64);
+ if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
+ resultflags.RemoveInstructionSet(InstructionSet_SSE);
if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE))
resultflags.RemoveInstructionSet(InstructionSet_SSE2);
if (resultflags.HasInstructionSet(InstructionSet_SSE3) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
@@ -262,8 +274,12 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
+ if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
+ resultflags.RemoveInstructionSet(InstructionSet_Vector256);
#endif // TARGET_AMD64
#ifdef TARGET_X86
+ if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
+ resultflags.RemoveInstructionSet(InstructionSet_SSE);
if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE))
resultflags.RemoveInstructionSet(InstructionSet_SSE2);
if (resultflags.HasInstructionSet(InstructionSet_SSE3) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
@@ -290,6 +306,8 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
+ if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
+ resultflags.RemoveInstructionSet(InstructionSet_Vector256);
#endif // TARGET_X86
} while (!oldflags.Equals(resultflags));
@@ -332,6 +350,10 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "Vector128";
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
+ case InstructionSet_X86Base :
+ return "X86Base";
+ case InstructionSet_X86Base_X64 :
+ return "X86Base_X64";
case InstructionSet_SSE :
return "SSE";
case InstructionSet_SSE_X64 :
@@ -384,6 +406,8 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "Vector256";
#endif // TARGET_AMD64
#ifdef TARGET_X86
+ case InstructionSet_X86Base :
+ return "X86Base";
case InstructionSet_SSE :
return "SSE";
case InstructionSet_SSE2 :
@@ -447,6 +471,7 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
case READYTORUN_INSTRUCTION_Atomics: return InstructionSet_Atomics;
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
+ case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base;
case READYTORUN_INSTRUCTION_Sse: return InstructionSet_SSE;
case READYTORUN_INSTRUCTION_Sse2: return InstructionSet_SSE2;
case READYTORUN_INSTRUCTION_Sse3: return InstructionSet_SSE3;
@@ -464,6 +489,7 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
case READYTORUN_INSTRUCTION_Popcnt: return InstructionSet_POPCNT;
#endif // TARGET_AMD64
#ifdef TARGET_X86
+ case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base;
case READYTORUN_INSTRUCTION_Sse: return InstructionSet_SSE;
case READYTORUN_INSTRUCTION_Sse2: return InstructionSet_SSE2;
case READYTORUN_INSTRUCTION_Sse3: return InstructionSet_SSE3;
diff --git a/src/coreclr/src/inc/corpriv.h b/src/coreclr/src/inc/corpriv.h
index 766fb2916b7639..6b92458ec40f18 100644
--- a/src/coreclr/src/inc/corpriv.h
+++ b/src/coreclr/src/inc/corpriv.h
@@ -25,9 +25,6 @@
interface IAssemblyName;
-// PE images loaded through the runtime.
-typedef struct _dummyCOR { BYTE b; } *HCORMODULE;
-
class UTSemReadWrite;
// Helper function to get a pointer to the Dispenser interface.
@@ -70,11 +67,6 @@ STDAPI GetAssemblyMDInternalImport( // Return code.
REFIID riid, // [IN] The interface desired.
IUnknown **ppIUnk); // [OUT] Return interface on success.
-HRESULT GetAssemblyMDInternalImportFromImage(
- HCORMODULE hImage, //[IN] pointer to module handle to get the metadata from.
- REFIID riid, //[IN] The interface desired.
- IUnknown **ppIUnk); //[OUT] Return Interface on success.
-
STDAPI GetAssemblyMDInternalImportByStream( // Return code.
IStream *pIStream, // [IN] The IStream for the file
UINT64 AssemblyId, // [IN] Unique Id for the assembly
@@ -303,60 +295,6 @@ typedef enum CorOpenFlagsInternal
#define COR_MODULE_CLASS ""
#define COR_WMODULE_CLASS W("")
-STDAPI RuntimeOpenImage(LPCWSTR pszFileName, HCORMODULE* hHandle);
-STDAPI RuntimeOpenImageInternal(LPCWSTR pszFileName, HCORMODULE* hHandle,
- DWORD *pdwLength, MDInternalImportFlags flags, HANDLE hFile = INVALID_HANDLE_VALUE);
-STDAPI RuntimeOpenImageByStream(IStream* pIStream, UINT64 AssemblyId, DWORD dwModuleId,
- HCORMODULE* hHandle, DWORD *pdwLength, MDInternalImportFlags flags);
-
-void RuntimeAddRefHandle(HCORMODULE hHandle);
-STDAPI RuntimeReleaseHandle(HCORMODULE hHandle);
-STDAPI RuntimeGetImageBase(HCORMODULE hHandle, LPVOID* base, BOOL bMapped, COUNT_T* dwSize);
-STDAPI RuntimeGetImageKind(HCORMODULE hHandle, DWORD* pdwKind, DWORD* pdwMachine);
-STDAPI RuntimeOSHandle(HCORMODULE hHandle, HMODULE* hModule);
-STDAPI RuntimeGetAssemblyStrongNameHashForModule(HCORMODULE hModule,
- IMetaDataImport *pMDimport,
- BYTE *pbSNHash,
- DWORD *pcbSNHash);
-STDAPI RuntimeGetMDInternalImport(HCORMODULE hHandle,
- MDInternalImportFlags flags,
- IMDInternalImport** ppMDImport);
-
-FORCEINLINE
-void ReleaseHCorModule(HCORMODULE hModule)
-{
- HRESULT hr = RuntimeReleaseHandle(hModule);
- _ASSERTE(SUCCEEDED(hr));
-}
-
-typedef Wrapper, ReleaseHCorModule, (UINT_PTR) NULL> HCORMODULEHolder;
-
-
-// ===========================================================================
-// ISNAssemblySignature (similar to IAssemblySignature in V1)
-//
-// This is a private interface that allows querying of the strong name
-// signature.
-// This can be used for (strong-named) assemblies added to the GAC as
-// a unique identifier.
-//
-
-// {848845BC-0C4A-42e3-8915-DC850112443D}
-EXTERN_GUID(IID_ISNAssemblySignature, 0x848845BC, 0x0C4A, 0x42e3, 0x89, 0x15, 0xDC, 0x85, 0x01, 0x12, 0x44, 0x3D);
-
-#undef INTERFACE
-#define INTERFACE ISNAssemblySignature
-DECLARE_INTERFACE_(ISNAssemblySignature, IUnknown)
-{
- // Returns the strong-name signature if the assembly is strong-name-signed
- // Returns the MVID if the assembly is delay-signed.
- // Fails if the assembly is not signed at all.
- STDMETHOD(GetSNAssemblySignature) (
- BYTE *pbSig, // [IN, OUT] Buffer to write signature
- DWORD *pcbSig // [IN, OUT] Size of buffer, bytes written
- ) PURE;
-};
-
//-------------------------------------
//--- ICeeGenInternal
//-------------------------------------
@@ -460,11 +398,6 @@ STDAPI GetCORSystemDirectoryInternal(
__out_opt DWORD* pdwLength
);
-STDAPI GetCORVersionInternal(
- __out_ecount_z_opt(cchBuffer) LPWSTR pBuffer,
- DWORD cchBuffer,
- __out DWORD *pdwLength);
-
#endif // _CORPRIV_H_
// EOF =======================================================================
diff --git a/src/coreclr/src/inc/crosscomp.h b/src/coreclr/src/inc/crosscomp.h
index 81a85641b8e303..93a164c249240d 100644
--- a/src/coreclr/src/inc/crosscomp.h
+++ b/src/coreclr/src/inc/crosscomp.h
@@ -392,9 +392,11 @@ typedef struct _T_KNONVOLATILE_CONTEXT_POINTERS {
#define DAC_CS_NATIVE_DATA_SIZE 56
#elif defined(TARGET_NETBSD) && defined(TARGET_X86)
#define DAC_CS_NATIVE_DATA_SIZE 56
+#elif defined(__sun) && defined(TARGET_AMD64)
+#define DAC_CS_NATIVE_DATA_SIZE 48
#else
#warning
-#error DAC_CS_NATIVE_DATA_SIZE is not defined for this architecture
+#error DAC_CS_NATIVE_DATA_SIZE is not defined for this architecture. This should be same value as PAL_CS_NATIVE_DATA_SIZE (aka sizeof(PAL_CS_NATIVE_DATA)).
#endif
struct T_CRITICAL_SECTION {
diff --git a/src/coreclr/src/inc/crsttypes.h b/src/coreclr/src/inc/crsttypes.h
index 98d24c2efafcae..dc8e5a94296d27 100644
--- a/src/coreclr/src/inc/crsttypes.h
+++ b/src/coreclr/src/inc/crsttypes.h
@@ -69,109 +69,108 @@ enum CrstType
CrstFuncPtrStubs = 50,
CrstFusionAppCtx = 51,
CrstGCCover = 52,
- CrstGCMemoryPressure = 53,
- CrstGlobalStrLiteralMap = 54,
- CrstHandleTable = 55,
- CrstHostAssemblyMap = 56,
- CrstHostAssemblyMapAdd = 57,
- CrstIbcProfile = 58,
- CrstIJWFixupData = 59,
- CrstIJWHash = 60,
- CrstILStubGen = 61,
- CrstInlineTrackingMap = 62,
- CrstInstMethodHashTable = 63,
- CrstInterfaceVTableMap = 64,
- CrstInterop = 65,
- CrstInteropData = 66,
- CrstIOThreadpoolWorker = 67,
- CrstIsJMCMethod = 68,
- CrstISymUnmanagedReader = 69,
- CrstJit = 70,
- CrstJitGenericHandleCache = 71,
- CrstJitInlineTrackingMap = 72,
- CrstJitPatchpoint = 73,
- CrstJitPerf = 74,
- CrstJumpStubCache = 75,
- CrstLeafLock = 76,
- CrstListLock = 77,
- CrstLoaderAllocator = 78,
- CrstLoaderAllocatorReferences = 79,
- CrstLoaderHeap = 80,
- CrstMda = 81,
- CrstMetadataTracker = 82,
- CrstMethodDescBackpatchInfoTracker = 83,
- CrstModIntPairList = 84,
- CrstModule = 85,
- CrstModuleFixup = 86,
- CrstModuleLookupTable = 87,
- CrstMulticoreJitHash = 88,
- CrstMulticoreJitManager = 89,
- CrstMUThunkHash = 90,
- CrstNativeBinderInit = 91,
- CrstNativeImageCache = 92,
- CrstNativeImageEagerFixups = 93,
- CrstNls = 94,
- CrstNotifyGdb = 95,
- CrstObjectList = 96,
- CrstOnEventManager = 97,
- CrstPatchEntryPoint = 98,
- CrstPEImage = 99,
- CrstPEImagePDBStream = 100,
- CrstPendingTypeLoadEntry = 101,
- CrstPinHandle = 102,
- CrstPinnedByrefValidation = 103,
- CrstProfilerGCRefDataFreeList = 104,
- CrstProfilingAPIStatus = 105,
- CrstPublisherCertificate = 106,
- CrstRCWCache = 107,
- CrstRCWCleanupList = 108,
- CrstRCWRefCache = 109,
- CrstReadyToRunEntryPointToMethodDescMap = 110,
- CrstReDacl = 111,
- CrstReflection = 112,
- CrstReJITGlobalRequest = 113,
- CrstRemoting = 114,
- CrstRetThunkCache = 115,
- CrstRWLock = 116,
- CrstSavedExceptionInfo = 117,
- CrstSaveModuleProfileData = 118,
- CrstSecurityStackwalkCache = 119,
- CrstSharedAssemblyCreate = 120,
- CrstSigConvert = 121,
- CrstSingleUseLock = 122,
- CrstSpecialStatics = 123,
- CrstSqmManager = 124,
- CrstStackSampler = 125,
- CrstStressLog = 126,
- CrstStrongName = 127,
- CrstStubCache = 128,
- CrstStubDispatchCache = 129,
- CrstStubUnwindInfoHeapSegments = 130,
- CrstSyncBlockCache = 131,
- CrstSyncHashLock = 132,
- CrstSystemBaseDomain = 133,
- CrstSystemDomain = 134,
- CrstSystemDomainDelayedUnloadList = 135,
- CrstThreadIdDispenser = 136,
- CrstThreadpoolEventCache = 137,
- CrstThreadpoolTimerQueue = 138,
- CrstThreadpoolWaitThreads = 139,
- CrstThreadpoolWorker = 140,
- CrstThreadStaticDataHashTable = 141,
- CrstThreadStore = 142,
- CrstTieredCompilation = 143,
- CrstTPMethodTable = 144,
- CrstTypeEquivalenceMap = 145,
- CrstTypeIDMap = 146,
- CrstUMEntryThunkCache = 147,
- CrstUMThunkHash = 148,
- CrstUniqueStack = 149,
- CrstUnresolvedClassLock = 150,
- CrstUnwindInfoTableLock = 151,
- CrstVSDIndirectionCellLock = 152,
- CrstWinRTFactoryCache = 153,
- CrstWrapperTemplate = 154,
- kNumberOfCrstTypes = 155
+ CrstGlobalStrLiteralMap = 53,
+ CrstHandleTable = 54,
+ CrstHostAssemblyMap = 55,
+ CrstHostAssemblyMapAdd = 56,
+ CrstIbcProfile = 57,
+ CrstIJWFixupData = 58,
+ CrstIJWHash = 59,
+ CrstILStubGen = 60,
+ CrstInlineTrackingMap = 61,
+ CrstInstMethodHashTable = 62,
+ CrstInterfaceVTableMap = 63,
+ CrstInterop = 64,
+ CrstInteropData = 65,
+ CrstIOThreadpoolWorker = 66,
+ CrstIsJMCMethod = 67,
+ CrstISymUnmanagedReader = 68,
+ CrstJit = 69,
+ CrstJitGenericHandleCache = 70,
+ CrstJitInlineTrackingMap = 71,
+ CrstJitPatchpoint = 72,
+ CrstJitPerf = 73,
+ CrstJumpStubCache = 74,
+ CrstLeafLock = 75,
+ CrstListLock = 76,
+ CrstLoaderAllocator = 77,
+ CrstLoaderAllocatorReferences = 78,
+ CrstLoaderHeap = 79,
+ CrstMda = 80,
+ CrstMetadataTracker = 81,
+ CrstMethodDescBackpatchInfoTracker = 82,
+ CrstModIntPairList = 83,
+ CrstModule = 84,
+ CrstModuleFixup = 85,
+ CrstModuleLookupTable = 86,
+ CrstMulticoreJitHash = 87,
+ CrstMulticoreJitManager = 88,
+ CrstMUThunkHash = 89,
+ CrstNativeBinderInit = 90,
+ CrstNativeImageCache = 91,
+ CrstNativeImageEagerFixups = 92,
+ CrstNls = 93,
+ CrstNotifyGdb = 94,
+ CrstObjectList = 95,
+ CrstOnEventManager = 96,
+ CrstPatchEntryPoint = 97,
+ CrstPEImage = 98,
+ CrstPEImagePDBStream = 99,
+ CrstPendingTypeLoadEntry = 100,
+ CrstPinHandle = 101,
+ CrstPinnedByrefValidation = 102,
+ CrstProfilerGCRefDataFreeList = 103,
+ CrstProfilingAPIStatus = 104,
+ CrstPublisherCertificate = 105,
+ CrstRCWCache = 106,
+ CrstRCWCleanupList = 107,
+ CrstRCWRefCache = 108,
+ CrstReadyToRunEntryPointToMethodDescMap = 109,
+ CrstReDacl = 110,
+ CrstReflection = 111,
+ CrstReJITGlobalRequest = 112,
+ CrstRemoting = 113,
+ CrstRetThunkCache = 114,
+ CrstRWLock = 115,
+ CrstSavedExceptionInfo = 116,
+ CrstSaveModuleProfileData = 117,
+ CrstSecurityStackwalkCache = 118,
+ CrstSharedAssemblyCreate = 119,
+ CrstSigConvert = 120,
+ CrstSingleUseLock = 121,
+ CrstSpecialStatics = 122,
+ CrstSqmManager = 123,
+ CrstStackSampler = 124,
+ CrstStressLog = 125,
+ CrstStrongName = 126,
+ CrstStubCache = 127,
+ CrstStubDispatchCache = 128,
+ CrstStubUnwindInfoHeapSegments = 129,
+ CrstSyncBlockCache = 130,
+ CrstSyncHashLock = 131,
+ CrstSystemBaseDomain = 132,
+ CrstSystemDomain = 133,
+ CrstSystemDomainDelayedUnloadList = 134,
+ CrstThreadIdDispenser = 135,
+ CrstThreadpoolEventCache = 136,
+ CrstThreadpoolTimerQueue = 137,
+ CrstThreadpoolWaitThreads = 138,
+ CrstThreadpoolWorker = 139,
+ CrstThreadStaticDataHashTable = 140,
+ CrstThreadStore = 141,
+ CrstTieredCompilation = 142,
+ CrstTPMethodTable = 143,
+ CrstTypeEquivalenceMap = 144,
+ CrstTypeIDMap = 145,
+ CrstUMEntryThunkCache = 146,
+ CrstUMThunkHash = 147,
+ CrstUniqueStack = 148,
+ CrstUnresolvedClassLock = 149,
+ CrstUnwindInfoTableLock = 150,
+ CrstVSDIndirectionCellLock = 151,
+ CrstWinRTFactoryCache = 152,
+ CrstWrapperTemplate = 153,
+ kNumberOfCrstTypes = 154
};
#endif // __CRST_TYPES_INCLUDED
@@ -235,7 +234,6 @@ int g_rgCrstLevelMap[] =
7, // CrstFuncPtrStubs
5, // CrstFusionAppCtx
11, // CrstGCCover
- 0, // CrstGCMemoryPressure
13, // CrstGlobalStrLiteralMap
1, // CrstHandleTable
0, // CrstHostAssemblyMap
@@ -395,7 +393,6 @@ LPCSTR g_rgCrstNameMap[] =
"CrstFuncPtrStubs",
"CrstFusionAppCtx",
"CrstGCCover",
- "CrstGCMemoryPressure",
"CrstGlobalStrLiteralMap",
"CrstHandleTable",
"CrstHostAssemblyMap",
diff --git a/src/coreclr/src/inc/daccess.h b/src/coreclr/src/inc/daccess.h
index 2c68abff92c180..f2b37c32db7494 100644
--- a/src/coreclr/src/inc/daccess.h
+++ b/src/coreclr/src/inc/daccess.h
@@ -629,6 +629,9 @@ typedef struct _DacGlobals
ULONG fn__Unknown_AddRefSpecial;
ULONG fn__Unknown_AddRefInner;
#endif
+#ifdef FEATURE_COMWRAPPERS
+ ULONG fn__ManagedObjectWrapper_QueryInterface;
+#endif
// Vtable pointer values for all classes that must
// be instanted using vtable pointers as the identity.
diff --git a/src/coreclr/src/inc/eventtracebase.h b/src/coreclr/src/inc/eventtracebase.h
index a02d8f5fbda696..340c7b0a8fc7be 100644
--- a/src/coreclr/src/inc/eventtracebase.h
+++ b/src/coreclr/src/inc/eventtracebase.h
@@ -109,7 +109,7 @@ enum EtwThreadFlags
#if defined(FEATURE_PERFTRACING)
#define ETW_INLINE
#define ETWOnStartup(StartEventName, EndEventName)
-#define ETWFireEvent(EventName)
+#define ETWFireEvent(EventName) FireEtw##EventName(GetClrInstanceId())
#define ETW_TRACING_INITIALIZED(RegHandle) (TRUE)
#define ETW_EVENT_ENABLED(Context, EventDescriptor) (EventPipeHelper::IsEnabled(Context, EventDescriptor.Level, EventDescriptor.Keyword) || \
diff --git a/src/coreclr/src/inc/ex.h b/src/coreclr/src/inc/ex.h
index 21ce9d3d4b0ec7..6d008c6febecf2 100644
--- a/src/coreclr/src/inc/ex.h
+++ b/src/coreclr/src/inc/ex.h
@@ -278,17 +278,13 @@ class Exception
};
#if 1
-template
-inline void Exception__Delete(T* pvMemory);
-template <>
-inline void Exception__Delete(Exception* pvMemory)
+inline void Exception__Delete(Exception* pvMemory)
{
Exception::Delete(pvMemory);
}
-NEW_WRAPPER_TEMPLATE1(ExceptionHolderTemplate, Exception__Delete<_TYPE>);
-typedef ExceptionHolderTemplate ExceptionHolder;
+using ExceptionHolder = SpecializedWrapper;
#else
//------------------------------------------------------------------------------
@@ -710,93 +706,17 @@ class CAutoTryCleanup
EX_RETHROW; \
} \
-// Don't use this - use RethrowCorruptingExceptions (see below) instead.
#define SwallowAllExceptions ;
-//////////////////////////////////////////////////////////////////////
-//
-// Corrupted State Exception Support
-//
-/////////////////////////////////////////////////////////////////////
-
-#ifdef FEATURE_CORRUPTING_EXCEPTIONS
-
-#define CORRUPTING_EXCEPTIONS_ONLY(expr) expr
-#define COMMA_CORRUPTING_EXCEPTIONS_ONLY(expr) ,expr
-
-// EX_END_CATCH has been modified to not swallow Corrupting Exceptions (CE) when one of the
-// following arguments are passed to it:
-//
-// 1) RethrowTerminalExceptions - rethrows both terminal and corrupting exceptions
-// 2) RethrowCorruptingExceptions - swallows all exceptions exception corrupting exceptions. This SHOULD BE USED instead of SwallowAllExceptions.
-// 3) RethrowTerminalExceptionsEx - same as (1) but rethrow of CE can be controlled via a condition.
-// 4) RethrowCorruptingExceptionsEx - same as (2) but rethrow of CE can be controlled via a condition.
-//
-// By default, if a CE is encountered when one of the above policies are applied, the runtime will
-// ensure that the CE propagates up the stack and not get swallowed unless the developer chooses to override the behaviour.
-// This can be done by using the "Ex" versions above that take a conditional which evaluates to a BOOL. In such a case,
-// the CE will *only* be rethrown if the conditional evalutes to TRUE. For examples, refer to COMToCLRWorker or
-// DispatchInfo::InvokeMember implementations.
-//
-// SET_CE_RETHROW_FLAG_FOR_EX_CATCH macros helps evaluate if the CE is to be rethrown or not. This has been redefined in
-// Clrex.h to add the condition of evaluating the throwable as well (which is not available outside the VM folder).
-//
-// Passing FALSE as the second argument to IsProcessCorruptedStateException implies that SET_CE_RETHROW_FLAG_FOR_EX_CATCH
-// will ensure that we dont rethrow SO and allow EX_ENDTRY to SO specific processing. If none is done, then EX_ENDTRY will
-// rethrow SO. By that time stack has been reclaimed and thus, throwing SO will be safe.
-//
-// We also check the global override flag incase it has been set to force pre-V4 beahviour. "0" implies it has not
-// been overriden.
-#define SET_CE_RETHROW_FLAG_FOR_EX_CATCH(expr) ((((expr) == TRUE) && \
- (CLRConfig::GetConfigValue(CLRConfig::UNSUPPORTED_legacyCorruptedStateExceptionsPolicy) == 0) && \
- IsProcessCorruptedStateException(GetCurrentExceptionCode(), FALSE)))
-
-// This rethrow policy can be used in EX_END_CATCH to swallow all exceptions except the corrupting ones.
-// This macro can be used to rethrow the CE based upon a BOOL condition.
-#define RethrowCorruptingExceptionsEx(expr) \
- if (SET_CE_RETHROW_FLAG_FOR_EX_CATCH(expr)) \
- { \
- STATIC_CONTRACT_THROWS_TERMINAL; \
- EX_RETHROW; \
- }
-
-#define RethrowCorruptingExceptionsExAndHookRethrow(shouldRethrowExpr, aboutToRethrowExpr) \
- if (SET_CE_RETHROW_FLAG_FOR_EX_CATCH(shouldRethrowExpr)) \
- { \
- STATIC_CONTRACT_THROWS_TERMINAL; \
- aboutToRethrowExpr; \
- EX_RETHROW; \
- }
-
-#else // !FEATURE_CORRUPTING_EXCEPTIONS
-
-#define CORRUPTING_EXCEPTIONS_ONLY(expr)
-#define COMMA_CORRUPTING_EXCEPTIONS_ONLY(expr)
-
-// When we dont have support for CE, just map it to SwallowAllExceptions
-#define RethrowCorruptingExceptionsEx(expr) SwallowAllExceptions
-#define RethrowCorruptingExceptionsExAndHookRethrow(shouldRethrowExpr, aboutToRethrowExpr) SwallowAllExceptions
-#define SET_CE_RETHROW_FLAG_FOR_EX_CATCH(expr) !TRUE
-#endif // FEATURE_CORRUPTING_EXCEPTIONS
-
-// Map to RethrowCorruptingExceptionsEx so that it does the "right" thing
-#define RethrowCorruptingExceptions RethrowCorruptingExceptionsEx(TRUE)
-
-// This macro can be used to rethrow the CE based upon a BOOL condition. It will continue to rethrow terminal
-// exceptions unconditionally.
-#define RethrowTerminalExceptionsEx(expr) \
- if (GET_EXCEPTION()->IsTerminal() || \
- SET_CE_RETHROW_FLAG_FOR_EX_CATCH(expr)) \
+// When applied to EX_END_CATCH, this policy will always rethrow Terminal exceptions if they are
+// encountered.
+#define RethrowTerminalExceptions \
+ if (GET_EXCEPTION()->IsTerminal()) \
{ \
STATIC_CONTRACT_THROWS_TERMINAL; \
EX_RETHROW; \
} \
-
-// When applied to EX_END_CATCH, this policy will always rethrow Terminal and Corrupting exceptions if they are
-// encountered.
-#define RethrowTerminalExceptions RethrowTerminalExceptionsEx(TRUE)
-
// Special define to be used in EEStartup that will also check for VM initialization before
// commencing on a path that may use the managed thread object.
#define RethrowTerminalExceptionsWithInitCheck \
diff --git a/src/coreclr/src/inc/gcrefmap.h b/src/coreclr/src/inc/gcrefmap.h
index 5961162582faa9..d2ba660f259ca2 100644
--- a/src/coreclr/src/inc/gcrefmap.h
+++ b/src/coreclr/src/inc/gcrefmap.h
@@ -100,6 +100,8 @@ class GCRefMapBuilder
int posDelta = pos - m_Pos;
m_Pos = pos + 1;
+ _ASSERTE(posDelta >= 0);
+
if (posDelta != 0)
{
if (posDelta < 4)
diff --git a/src/coreclr/src/inc/holder.h b/src/coreclr/src/inc/holder.h
index c1f86b1ee0ff84..a5781d5570ddea 100644
--- a/src/coreclr/src/inc/holder.h
+++ b/src/coreclr/src/inc/holder.h
@@ -824,84 +824,68 @@ class Wrapper : public BaseWrapper,
#define INDEBUG_AND_WINDOWS_FOR_HOLDERS(x)
#endif
-//---------------------------------------------------------------------------------------
-//
-// New template wrapper type macros. These save some effort when specializing
-// existing holder templates. (We would rather use a construct like:
-//
-// template
-// typedef Holder<...> NewHolder;
-//
-// But this construct doesn't exist in C++. These macros ease some of the cruft necessary
-// to get similar functionality out of class templates.
-//-----------------------------------------------------------------------------
+template
+class SpecializedWrapper : public Wrapper<_TYPE*, DoNothing<_TYPE*>, _RELEASEF, NULL>
+{
+ using BaseT = Wrapper<_TYPE*, DoNothing<_TYPE*>, _RELEASEF, NULL>;
+public:
+ FORCEINLINE SpecializedWrapper() : BaseT(NULL, FALSE)
+ {
+ STATIC_CONTRACT_WRAPPER;
+ INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;)
+ }
+ FORCEINLINE SpecializedWrapper(_TYPE* value) : BaseT(value)
+ {
+ STATIC_CONTRACT_WRAPPER;
+ INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;)
+ }
+ FORCEINLINE SpecializedWrapper(_TYPE* value, BOOL takeOwnership) : BaseT(value, takeOwnership)
+ {
+ STATIC_CONTRACT_WRAPPER;
+ INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;)
+ }
+ FORCEINLINE ~SpecializedWrapper()
+ {
+ }
-// Dev10 VC++ has some of the new C++0x language extensions. Of particular interest here:
-// rvalue references, which enables differentiation between named (lvalue) and
-// temporary (rvalue) object references, enabling move semantics and perfect forwarding.
-// See http://msdn.microsoft.com/en-us/library/dd293668.aspx for more information.
-
-// Enable copy construction and assignment from temporary objects. This permits Wrapper objects
-// to be returned from methods, and for move assignment.
-#define NEW_WRAPPER_TEMPLATE_RVALREF_METHODS(_NAME) \
- public: \
- FORCEINLINE _NAME(_NAME && other) \
- : BaseT(NULL, FALSE) \
- { \
- STATIC_CONTRACT_WRAPPER; \
- INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;) \
- *this = std::move(other); \
- } \
- FORCEINLINE _NAME& operator=(_NAME && other) \
- { \
- std::swap(BaseT::m_value, other.BaseT::m_value); \
- std::swap(BaseT::m_acquired, other.BaseT::m_acquired); \
- return *this; \
- }
+ SpecializedWrapper(SpecializedWrapper const &) = delete;
+ SpecializedWrapper & operator=(SpecializedWrapper const &) = delete;
-#define NEW_WRAPPER_TEMPLATE1(_NAME, _RELEASEF) \
- template \
- class _NAME : public Wrapper<_TYPE*, DoNothing<_TYPE*>, _RELEASEF, NULL> \
- { \
- typedef Wrapper<_TYPE*, DoNothing<_TYPE*>, _RELEASEF, NULL> BaseT; \
- public: \
- FORCEINLINE _NAME() : BaseT(NULL, FALSE) \
- { \
- STATIC_CONTRACT_WRAPPER; \
- INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;) \
- } \
- FORCEINLINE _NAME(_TYPE* value) : BaseT(value) \
- { \
- STATIC_CONTRACT_WRAPPER; \
- INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;) \
- } \
- FORCEINLINE _NAME(_TYPE* value, BOOL takeOwnership) : BaseT(value, takeOwnership) \
- { \
- STATIC_CONTRACT_WRAPPER; \
- INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;) \
- } \
- FORCEINLINE ~_NAME() \
- { \
- } \
- FORCEINLINE _NAME& operator=(_TYPE * value) \
- { \
- STATIC_CONTRACT_WRAPPER; \
- BaseT::operator=(value); \
- return *this; \
- } \
- /* Since operator& is overloaded we need a way to get a type safe this pointer. */ \
- FORCEINLINE _NAME* GetAddr() \
- { \
- STATIC_CONTRACT_LEAF; \
- return this; \
- } \
- NEW_WRAPPER_TEMPLATE_RVALREF_METHODS(_NAME) \
- HIDE_GENERATED_METHODS(_NAME) \
- private: \
- /* m_ppValue: Do not use from source code: Only for convenient use from debugger */ \
- /* watch windows - saves five mouseclicks when inspecting holders. */ \
- INDEBUG_AND_WINDOWS_FOR_HOLDERS(_TYPE ** m_pvalue;) \
- };
+ FORCEINLINE SpecializedWrapper& operator=(_TYPE * value)
+ {
+ STATIC_CONTRACT_WRAPPER;
+ BaseT::operator=(value);
+ return *this;
+ }
+
+ FORCEINLINE SpecializedWrapper(SpecializedWrapper && other)
+ : BaseT(NULL, FALSE)
+ {
+ STATIC_CONTRACT_WRAPPER;
+ INDEBUG_AND_WINDOWS_FOR_HOLDERS(m_pvalue = &this->m_value;)
+ *this = std::move(other);
+ }
+
+ FORCEINLINE SpecializedWrapper& operator=(SpecializedWrapper && other)
+ {
+ BaseT::m_value = std::move(other.BaseT::m_value);
+ BaseT::m_acquired = std::move(other.BaseT::m_acquired);
+ other.BaseT::m_value = nullptr;
+ other.BaseT::m_acquired = FALSE;
+ return *this;
+ }
+
+ /* Since operator& is overloaded we need a way to get a type safe this pointer. */
+ FORCEINLINE SpecializedWrapper* GetAddr()
+ {
+ STATIC_CONTRACT_LEAF;
+ return this;
+ }
+ private:
+ /* m_ppValue: Do not use from source code: Only for convenient use from debugger */
+ /* watch windows - saves five mouseclicks when inspecting holders. */
+ INDEBUG_AND_WINDOWS_FOR_HOLDERS(_TYPE ** m_pvalue;)
+};
//-----------------------------------------------------------------------------
// NOTE: THIS IS UNSAFE TO USE IN THE VM for interop COM objects!!
@@ -930,11 +914,14 @@ FORCEINLINE void DoTheRelease(TYPE *value)
}
}
-NEW_WRAPPER_TEMPLATE1(DoNothingHolder, DoNothing<_TYPE*>);
+template
+using DoNothingHolder = SpecializedWrapper<_TYPE, DoNothing<_TYPE*>>;
-NEW_WRAPPER_TEMPLATE1(ReleaseHolder, DoTheRelease<_TYPE>);
+template
+using ReleaseHolder = SpecializedWrapper<_TYPE, DoTheRelease<_TYPE>>;
-NEW_WRAPPER_TEMPLATE1(NonVMComHolder, DoTheRelease<_TYPE>);
+template
+using NonVMComHolder = SpecializedWrapper<_TYPE, DoTheRelease<_TYPE>>;
//-----------------------------------------------------------------------------
@@ -957,7 +944,8 @@ FORCEINLINE void StubRelease(TYPE* value)
value->DecRef();
}
-NEW_WRAPPER_TEMPLATE1(StubHolder, StubRelease<_TYPE>);
+template
+using StubHolder = SpecializedWrapper<_TYPE, StubRelease<_TYPE>>;
//-----------------------------------------------------------------------------
// CoTaskMemHolder : CoTaskMemAlloc allocated memory holder
@@ -974,7 +962,8 @@ FORCEINLINE void DeleteCoTaskMem(TYPE *value)
CoTaskMemFree(value);
}
-NEW_WRAPPER_TEMPLATE1(CoTaskMemHolder, DeleteCoTaskMem<_TYPE>);
+template
+using CoTaskMemHolder = SpecializedWrapper<_TYPE, DeleteCoTaskMem<_TYPE>>;
//-----------------------------------------------------------------------------
// NewHolder : New'ed memory holder
@@ -997,7 +986,8 @@ FORCEINLINE void Delete(TYPE *value)
delete value;
}
-NEW_WRAPPER_TEMPLATE1(NewHolder, Delete<_TYPE>);
+template
+using NewHolder = SpecializedWrapper<_TYPE, Delete<_TYPE>>;
//-----------------------------------------------------------------------------
// NewExecutableHolder : New'ed memory holder for executable memory.
@@ -1009,7 +999,8 @@ NEW_WRAPPER_TEMPLATE1(NewHolder, Delete<_TYPE>);
// IJW
template void DeleteExecutable(T *p);
-NEW_WRAPPER_TEMPLATE1(NewExecutableHolder, DeleteExecutable<_TYPE>);
+template
+using NewExecutableHolder = SpecializedWrapper<_TYPE, DeleteExecutable<_TYPE>>;
//-----------------------------------------------------------------------------
// NewArrayHolder : New []'ed pointer holder
@@ -1026,7 +1017,8 @@ FORCEINLINE void DeleteArray(TYPE *value)
value = NULL;
}
-NEW_WRAPPER_TEMPLATE1(NewArrayHolder, DeleteArray<_TYPE>);
+template
+using NewArrayHolder = SpecializedWrapper<_TYPE, DeleteArray<_TYPE>>;
typedef NewArrayHolder AStringHolder;
typedef NewArrayHolder WStringHolder;
@@ -1113,8 +1105,10 @@ namespace detail
}
#undef VISIBLE
-NEW_WRAPPER_TEMPLATE1(ResetPointerHolder, detail::ZeroMem<_TYPE>::Invoke);
-NEW_WRAPPER_TEMPLATE1(FieldNuller, detail::ZeroMem<_TYPE>::Invoke);
+template
+using ResetPointerHolder = SpecializedWrapper<_TYPE, detail::ZeroMem<_TYPE>::Invoke>;
+template
+using FieldNuller = SpecializedWrapper<_TYPE, detail::ZeroMem<_TYPE>::Invoke>;
//-----------------------------------------------------------------------------
// Wrap win32 functions using HANDLE
@@ -1157,7 +1151,8 @@ typedef Wrapper, HolderFreeLibrary, NULL> HModuleHol
template FORCEINLINE
void DoLocalFree(T* pMem) { (LocalFree)((HLOCAL)pMem); }
-NEW_WRAPPER_TEMPLATE1(LocalAllocHolder, DoLocalFree<_TYPE>);
+template
+using LocalAllocHolder = SpecializedWrapper<_TYPE, DoLocalFree<_TYPE>>;
inline void BoolSet( _Out_ bool * val ) { *val = true; }
inline void BoolUnset( _Out_ bool * val ) { *val = false; }
diff --git a/src/coreclr/src/inc/jithelpers.h b/src/coreclr/src/inc/jithelpers.h
index 9add356aa90514..608398ac17ef2c 100644
--- a/src/coreclr/src/inc/jithelpers.h
+++ b/src/coreclr/src/inc/jithelpers.h
@@ -220,11 +220,15 @@
JITHELPER(CORINFO_HELP_PINVOKE_CALLI, GenericPInvokeCalliHelper, CORINFO_HELP_SIG_NO_ALIGN_STUB)
+#if defined(TARGET_X86) && !defined(UNIX_X86_ABI)
JITHELPER(CORINFO_HELP_TAILCALL, JIT_TailCall, CORINFO_HELP_SIG_CANNOT_USE_ALIGN_STUB)
+#else
+ JITHELPER(CORINFO_HELP_TAILCALL, NULL, CORINFO_HELP_SIG_CANNOT_USE_ALIGN_STUB)
+#endif
JITHELPER(CORINFO_HELP_GETCURRENTMANAGEDTHREADID, JIT_GetCurrentManagedThreadId, CORINFO_HELP_SIG_REG_ONLY)
-#ifdef HOST_64BIT
+#ifdef TARGET_64BIT
JITHELPER(CORINFO_HELP_INIT_PINVOKE_FRAME, JIT_InitPInvokeFrame, CORINFO_HELP_SIG_REG_ONLY)
#else
DYNAMICJITHELPER(CORINFO_HELP_INIT_PINVOKE_FRAME, NULL, CORINFO_HELP_SIG_REG_ONLY)
diff --git a/src/coreclr/src/md/inc/mdfileformat.h b/src/coreclr/src/inc/mdfileformat.h
similarity index 99%
rename from src/coreclr/src/md/inc/mdfileformat.h
rename to src/coreclr/src/inc/mdfileformat.h
index 8d217819aba462..b414b0cc1d3322 100644
--- a/src/coreclr/src/md/inc/mdfileformat.h
+++ b/src/coreclr/src/inc/mdfileformat.h
@@ -14,6 +14,9 @@
#ifndef __MDFileFormat_h__
#define __MDFileFormat_h__
+#include
+#include "utilcode.h"
+
//*****************************************************************************
// The signature ULONG is the first 4 bytes of the file format. The second
// signature string starts the header containing the stream list. It is used
diff --git a/src/coreclr/src/inc/metadata.h b/src/coreclr/src/inc/metadata.h
index b78988102fb619..662a77ea4d9d5f 100644
--- a/src/coreclr/src/inc/metadata.h
+++ b/src/coreclr/src/inc/metadata.h
@@ -14,9 +14,11 @@
#ifndef _METADATA_H_
#define _METADATA_H_
-#include "../md/inc/metamodelro.h"
-#include "../md/inc/liteweightstgdb.h"
+#include "ex.h"
+class CorProfileData;
+class IMetaModelCommon;
+class MDInternalRW;
class UTSemReadWrite;
inline int IsGlobalMethodParentTk(mdTypeDef td)
@@ -1123,8 +1125,12 @@ DECLARE_INTERFACE_(IMDInternalEmit, IUnknown)
#ifdef FEATURE_METADATA_CUSTOM_DATA_SOURCE
struct IMDCustomDataSource;
-
-#include "../md/inc/metamodel.h"
+class CMiniMdSchema;
+struct CMiniTableDef;
+namespace MetaData
+{
+ class DataBlob;
+}
// {CC0C8F7A-A00B-493D-80B6-CE0C92491670}
EXTERN_GUID(IID_IMDCustomDataSource, 0xcc0c8f7a, 0xa00b, 0x493d, 0x80, 0xb6, 0xce, 0xc, 0x92, 0x49, 0x16, 0x70);
@@ -1168,6 +1174,37 @@ struct ICorDebugDataTarget;
HRESULT CreateRemoteMDInternalRWSource(TADDR mdInternalRWRemoteAddress, ICorDebugDataTarget* pDataTarget, DWORD defines, DWORD dataStructureVersion, IMDCustomDataSource** ppDataSource);
#endif
+enum MetaDataReorderingOptions {
+ NoReordering=0x0,
+ ReArrangeStringPool=0x1
+};
+
+#ifdef FEATURE_PREJIT
+
+// {0702E333-8D64-4ca7-B564-4AA56B1FCEA3}
+EXTERN_GUID(IID_IMetaDataCorProfileData, 0x702e333, 0x8d64, 0x4ca7, 0xb5, 0x64, 0x4a, 0xa5, 0x6b, 0x1f, 0xce, 0xa3 );
+
+#undef INTERFACE
+#define INTERFACE IMetaDataCorProfileData
+DECLARE_INTERFACE_(IMetaDataCorProfileData, IUnknown)
+{
+ STDMETHOD(SetCorProfileData)(
+ CorProfileData *pProfileData) PURE; // [IN] Pointer to profile data
+};
+
+// {2B464817-C0F6-454e-99E7-C352D8384D7B}
+EXTERN_GUID(IID_IMDInternalMetadataReorderingOptions, 0x2B464817, 0xC0F6, 0x454e, 0x99, 0xE7, 0xC3, 0x52, 0xD8, 0x38, 0x4D, 0x7B );
+
+#undef INTERFACE
+#define INTERFACE IMDInternalMetadataReorderingOptions
+DECLARE_INTERFACE_(IMDInternalMetadataReorderingOptions, IUnknown)
+{
+ STDMETHOD(SetMetaDataReorderingOptions)(
+ MetaDataReorderingOptions options) PURE; // [IN] metadata reordering options
+};
+
+#endif //FEATURE_PREJIT
+
#ifdef __HOLDER_H_
void DECLSPEC_NORETURN ThrowHR(HRESULT hr);
diff --git a/src/coreclr/src/inc/metamodelpub.h b/src/coreclr/src/inc/metamodelpub.h
index 0762598a286307..83cc9c6a32f7a9 100644
--- a/src/coreclr/src/inc/metamodelpub.h
+++ b/src/coreclr/src/inc/metamodelpub.h
@@ -16,7 +16,8 @@
#endif
#include
-#include
+#include "contract.h"
+
#ifndef lengthof
# define lengthof(x) (sizeof(x)/sizeof((x)[0]))
diff --git a/src/coreclr/src/inc/pedecoder.h b/src/coreclr/src/inc/pedecoder.h
index ad0e77e532c157..c4f4e92b6b613a 100644
--- a/src/coreclr/src/inc/pedecoder.h
+++ b/src/coreclr/src/inc/pedecoder.h
@@ -95,6 +95,8 @@ inline CHECK CheckOverflow(RVA value1, COUNT_T value2)
#define IMAGE_FILE_MACHINE_NATIVE_OS_OVERRIDE 0x7B79
#elif defined(__NetBSD__)
#define IMAGE_FILE_MACHINE_NATIVE_OS_OVERRIDE 0x1993
+#elif defined(__sun)
+#define IMAGE_FILE_MACHINE_NATIVE_OS_OVERRIDE 0x1992
#else
#define IMAGE_FILE_MACHINE_NATIVE_OS_OVERRIDE 0
#endif
diff --git a/src/coreclr/src/inc/readytoruninstructionset.h b/src/coreclr/src/inc/readytoruninstructionset.h
index 6e6f2549f90440..77f1cd267672ed 100644
--- a/src/coreclr/src/inc/readytoruninstructionset.h
+++ b/src/coreclr/src/inc/readytoruninstructionset.h
@@ -32,6 +32,7 @@ enum ReadyToRunInstructionSet
READYTORUN_INSTRUCTION_Sha1=19,
READYTORUN_INSTRUCTION_Sha256=20,
READYTORUN_INSTRUCTION_Atomics=21,
+ READYTORUN_INSTRUCTION_X86Base=22,
};
diff --git a/src/coreclr/src/inc/sstring.h b/src/coreclr/src/inc/sstring.h
index a0459174587317..8de0cd3d4277a9 100644
--- a/src/coreclr/src/inc/sstring.h
+++ b/src/coreclr/src/inc/sstring.h
@@ -45,6 +45,7 @@
#include "utilcode.h"
#include "sbuffer.h"
+#include "debugmacros.h"
// ==========================================================================================
// Documentational typedefs: use these to indicate specific representations of 8 bit strings:
@@ -808,6 +809,7 @@ template
class EMPTY_BASES_DECL InlineSString : public SString
{
private:
+ DAC_ALIGNAS(SString)
BYTE m_inline[SBUFFER_PADDED_SIZE(MEMSIZE)];
public:
@@ -990,6 +992,7 @@ template
class EMPTY_BASES_DECL ScratchBuffer : public SString::AbstractScratchBuffer
{
private:
+ DAC_ALIGNAS(::SString::AbstractScratchBuffer)
BYTE m_inline[MEMSIZE];
public:
diff --git a/src/coreclr/src/inc/stgpool.h b/src/coreclr/src/inc/stgpool.h
index f86354b1050005..d9a84c360b2a2b 100644
--- a/src/coreclr/src/inc/stgpool.h
+++ b/src/coreclr/src/inc/stgpool.h
@@ -30,8 +30,6 @@
#include "memoryrange.h"
#include "../md/hotdata/hotheap.h"
-#include "../md/debug_metadata.h"
-
//*****************************************************************************
// NOTE:
// One limitation with the pools, we have no way to removing strings from
diff --git a/src/coreclr/src/inc/strongnameholders.h b/src/coreclr/src/inc/strongnameholders.h
index ecec99432af1bb..d684e9d3a032ae 100644
--- a/src/coreclr/src/inc/strongnameholders.h
+++ b/src/coreclr/src/inc/strongnameholders.h
@@ -18,6 +18,7 @@ void VoidStrongNameFreeBuffer(__in T *pBuffer)
{
StrongNameFreeBuffer(reinterpret_cast(pBuffer));
}
-NEW_WRAPPER_TEMPLATE1(StrongNameBufferHolder, VoidStrongNameFreeBuffer<_TYPE>);
+template
+using StrongNameBufferHolder = SpecializedWrapper<_TYPE, VoidStrongNameFreeBuffer<_TYPE>>;
#endif // !__STRONGNAME_HOLDERS_H__
diff --git a/src/coreclr/src/inc/utilcode.h b/src/coreclr/src/inc/utilcode.h
index 1721db03dc01f4..15902ef99e9761 100644
--- a/src/coreclr/src/inc/utilcode.h
+++ b/src/coreclr/src/inc/utilcode.h
@@ -2573,6 +2573,7 @@ template
class CHashTableAndData : public CHashTable
{
public:
+ DAC_ALIGNAS(CHashTable)
ULONG m_iFree; // Index into m_pcEntries[] of next available slot
ULONG m_iEntries; // size of m_pcEntries[]
@@ -4715,13 +4716,6 @@ BOOL IsIPInModule(HMODULE_TGT hModule, PCODE ip);
extern HINSTANCE g_hmodCoreCLR;
-#ifdef FEATURE_CORRUPTING_EXCEPTIONS
-
-// Corrupting Exception limited support for outside the VM folder
-BOOL IsProcessCorruptedStateException(DWORD dwExceptionCode, BOOL fCheckForSO = TRUE);
-
-#endif // FEATURE_CORRUPTING_EXCEPTIONS
-
namespace UtilCode
{
// These are type-safe versions of Interlocked[Compare]Exchange
diff --git a/src/coreclr/src/inc/volatile.h b/src/coreclr/src/inc/volatile.h
index 960e33cc982aa6..6c73dc4c65667b 100644
--- a/src/coreclr/src/inc/volatile.h
+++ b/src/coreclr/src/inc/volatile.h
@@ -286,6 +286,27 @@ void VolatileStoreWithoutBarrier(T* pt, T val)
#endif
}
+//
+// Memory ordering barrier that waits for loads in progress to complete.
+// Any effects of loads or stores that appear after, in program order, will "happen after" relative to this.
+// Other operations such as computation or instruction prefetch are not affected.
+//
+// Architectural mapping:
+// arm64 : dmb ishld
+// arm : dmb ish
+// x86/64 : compiler fence
+inline
+void VolatileLoadBarrier()
+{
+#if defined(HOST_ARM64) && defined(__GNUC__)
+ asm volatile ("dmb ishld" : : : "memory");
+#elif defined(HOST_ARM64) && defined(_MSC_VER)
+ __dmb(_ARM64_BARRIER_ISHLD);
+#else
+ VOLATILE_MEMORY_BARRIER();
+#endif
+}
+
//
// Volatile implements accesses with our volatile semantics over a variable of type T.
// Wherever you would have used a "volatile Foo" or, equivalently, "Foo volatile", use Volatile
diff --git a/src/coreclr/src/inc/vptr_list.h b/src/coreclr/src/inc/vptr_list.h
index 93e978224947d1..f53bbac1edf1e4 100644
--- a/src/coreclr/src/inc/vptr_list.h
+++ b/src/coreclr/src/inc/vptr_list.h
@@ -39,7 +39,9 @@ VPTR_CLASS(RangeSectionStubManager)
VPTR_CLASS(ILStubManager)
VPTR_CLASS(InteropDispatchStubManager)
VPTR_CLASS(DelegateInvokeStubManager)
+#if defined(TARGET_X86) && !defined(UNIX_X86_ABI)
VPTR_CLASS(TailCallStubManager)
+#endif
VPTR_CLASS(CallCountingStubManager)
VPTR_CLASS(PEFile)
VPTR_CLASS(PEAssembly)
@@ -93,7 +95,9 @@ VPTR_CLASS(DynamicHelperFrame)
#if defined(TARGET_X86)
VPTR_CLASS(UMThkCallFrame)
#endif
+#if defined(TARGET_X86) && !defined(UNIX_X86_ABI)
VPTR_CLASS(TailCallFrame)
+#endif
VPTR_CLASS(ExceptionFilterFrame)
#ifdef _DEBUG
diff --git a/src/coreclr/src/interop/comwrappers.cpp b/src/coreclr/src/interop/comwrappers.cpp
index 60d80910a5078b..3fb1b7941ed758 100644
--- a/src/coreclr/src/interop/comwrappers.cpp
+++ b/src/coreclr/src/interop/comwrappers.cpp
@@ -3,6 +3,7 @@
// See the LICENSE file in the project root for more information.
#include "comwrappers.hpp"
+#include
#include
#include // placement new
@@ -47,8 +48,8 @@ namespace ABI
};
ABI_ASSERT(sizeof(ComInterfaceDispatch) == sizeof(void*));
- const size_t DispatchAlignmentThisPtr = 16; // Should be a power of 2.
- const intptr_t DispatchThisPtrMask = ~(DispatchAlignmentThisPtr - 1);
+ using InteropLib::ABI::DispatchAlignmentThisPtr;
+ using InteropLib::ABI::DispatchThisPtrMask;
ABI_ASSERT(sizeof(void*) < DispatchAlignmentThisPtr);
const intptr_t AlignmentThisPtrMaxPadding = DispatchAlignmentThisPtr - sizeof(void*);
@@ -179,17 +180,20 @@ namespace ABI
}
}
-namespace
+// ManagedObjectWrapper_QueryInterface needs to be visible outside of this compilation unit
+// to support the DAC. See code:ClrDataAccess::DACTryGetComWrappersObjectFromCCW for the
+// usage in the DAC (look for the GetEEFuncEntryPoint call).
+HRESULT STDMETHODCALLTYPE ManagedObjectWrapper_QueryInterface(
+ _In_ ABI::ComInterfaceDispatch* disp,
+ /* [in] */ REFIID riid,
+ /* [iid_is][out] */ _COM_Outptr_ void __RPC_FAR* __RPC_FAR* ppvObject)
{
- HRESULT STDMETHODCALLTYPE ManagedObjectWrapper_QueryInterface(
- _In_ ABI::ComInterfaceDispatch* disp,
- /* [in] */ REFIID riid,
- /* [iid_is][out] */ _COM_Outptr_ void __RPC_FAR* __RPC_FAR* ppvObject)
- {
- ManagedObjectWrapper* wrapper = ABI::ToManagedObjectWrapper(disp);
- return wrapper->QueryInterface(riid, ppvObject);
- }
+ ManagedObjectWrapper* wrapper = ABI::ToManagedObjectWrapper(disp);
+ return wrapper->QueryInterface(riid, ppvObject);
+}
+namespace
+{
ULONG STDMETHODCALLTYPE ManagedObjectWrapper_AddRef(_In_ ABI::ComInterfaceDispatch* disp)
{
ManagedObjectWrapper* wrapper = ABI::ToManagedObjectWrapper(disp);
@@ -310,6 +314,7 @@ void ManagedObjectWrapper::GetIUnknownImpl(
*fpRelease = ManagedObjectWrapper_IUnknownImpl.Release;
}
+// The logic here should match code:ClrDataAccess::DACTryGetComWrappersObjectFromCCW in daccess/request.cpp
ManagedObjectWrapper* ManagedObjectWrapper::MapFromIUnknown(_In_ IUnknown* pUnk)
{
_ASSERTE(pUnk != nullptr);
diff --git a/src/coreclr/src/interop/inc/interoplibabi.h b/src/coreclr/src/interop/inc/interoplibabi.h
new file mode 100644
index 00000000000000..19a1e0c01e7556
--- /dev/null
+++ b/src/coreclr/src/interop/inc/interoplibabi.h
@@ -0,0 +1,14 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+// See the LICENSE file in the project root for more information.
+
+#include
+
+namespace InteropLib
+{
+ namespace ABI
+ {
+ const size_t DispatchAlignmentThisPtr = 16; // Should be a power of 2.
+ const intptr_t DispatchThisPtrMask = ~(DispatchAlignmentThisPtr - 1);
+ }
+}
diff --git a/src/coreclr/src/jit/CMakeLists.txt b/src/coreclr/src/jit/CMakeLists.txt
index 034cdbe38dcd48..a3f0b1aeb2e0d0 100644
--- a/src/coreclr/src/jit/CMakeLists.txt
+++ b/src/coreclr/src/jit/CMakeLists.txt
@@ -170,6 +170,7 @@ if (CLR_CMAKE_TARGET_WIN32)
regset.h
sideeffects.h
simd.h
+ simdashwintrinsic.h
simdintrinsiclist.h
sm.h
smallhash.h
@@ -204,14 +205,16 @@ if (CLR_CMAKE_TARGET_WIN32)
instrsarm.h
instrsarm64.h
registerarm.h
- registerarm64.h)
+ registerarm64.h
+ simdashwintrinsiclistarm64.h)
elseif (CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_I386)
list (APPEND JIT_HEADERS
emitfmtsxarch.h
emitxarch.h
hwintrinsiclistxarch.h
hwintrinsic.h
- instrsxarch.h)
+ instrsxarch.h
+ simdashwintrinsiclistxarch.h)
endif ()
endif(CLR_CMAKE_TARGET_WIN32)
@@ -223,6 +226,7 @@ set( JIT_AMD64_SOURCES
lowerxarch.cpp
lsraxarch.cpp
simd.cpp
+ simdashwintrinsic.cpp
simdcodegenxarch.cpp
targetamd64.cpp
unwindamd64.cpp
@@ -249,6 +253,7 @@ set( JIT_I386_SOURCES
lowerxarch.cpp
lsraxarch.cpp
simd.cpp
+ simdashwintrinsic.cpp
simdcodegenxarch.cpp
targetx86.cpp
unwindx86.cpp
@@ -264,6 +269,7 @@ set( JIT_ARM64_SOURCES
lsraarmarch.cpp
lsraarm64.cpp
simd.cpp
+ simdashwintrinsic.cpp
targetarm64.cpp
unwindarm.cpp
unwindarm64.cpp
@@ -312,11 +318,15 @@ else()
set(JIT_EXPORTS_FILE ${CMAKE_CURRENT_BINARY_DIR}/clrjit.exports)
generate_exports_file(${CLRJIT_EXPORTS} ${JIT_EXPORTS_FILE})
- if(CLR_CMAKE_TARGET_LINUX OR CLR_CMAKE_TARGET_FREEBSD OR CLR_CMAKE_TARGET_NETBSD)
+ if(CLR_CMAKE_TARGET_LINUX OR CLR_CMAKE_TARGET_FREEBSD OR CLR_CMAKE_TARGET_NETBSD OR CLR_CMAKE_TARGET_SUNOS)
# This is required to force using our own PAL, not one that we are loaded with.
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Xlinker -Bsymbolic")
- set(JIT_EXPORTS_LINKER_OPTION -Wl,--version-script=${JIT_EXPORTS_FILE})
+ if(CLR_CMAKE_TARGET_SUNOS)
+ set(JIT_EXPORTS_LINKER_OPTION -Wl,-M,${JIT_EXPORTS_FILE})
+ else(CLR_CMAKE_TARGET_SUNOS)
+ set(JIT_EXPORTS_LINKER_OPTION -Wl,--version-script=${JIT_EXPORTS_FILE})
+ endif(CLR_CMAKE_TARGET_SUNOS)
elseif(CLR_CMAKE_TARGET_OSX)
set(JIT_EXPORTS_LINKER_OPTION -Wl,-exported_symbols_list,${JIT_EXPORTS_FILE})
endif()
diff --git a/src/coreclr/src/jit/ICorJitInfo_API_names.h b/src/coreclr/src/jit/ICorJitInfo_API_names.h
index a65c6c79c904db..b2f623ac96fb19 100644
--- a/src/coreclr/src/jit/ICorJitInfo_API_names.h
+++ b/src/coreclr/src/jit/ICorJitInfo_API_names.h
@@ -151,7 +151,7 @@ DEF_CLR_API(setOverride)
DEF_CLR_API(addActiveDependency)
DEF_CLR_API(GetDelegateCtor)
DEF_CLR_API(MethodCompileComplete)
-DEF_CLR_API(getTailCallCopyArgsThunk)
+DEF_CLR_API(getTailCallHelpers)
DEF_CLR_API(convertPInvokeCalliToCall)
DEF_CLR_API(notifyInstructionSetUsage)
DEF_CLR_API(getMemoryManager)
diff --git a/src/coreclr/src/jit/ICorJitInfo_API_wrapper.hpp b/src/coreclr/src/jit/ICorJitInfo_API_wrapper.hpp
index 6e4d016d90c5d7..44e4a3ea1055f1 100644
--- a/src/coreclr/src/jit/ICorJitInfo_API_wrapper.hpp
+++ b/src/coreclr/src/jit/ICorJitInfo_API_wrapper.hpp
@@ -1476,13 +1476,15 @@ void WrapICorJitInfo::MethodCompileComplete(
API_LEAVE(MethodCompileComplete);
}
-void* WrapICorJitInfo::getTailCallCopyArgsThunk(
- CORINFO_SIG_INFO *pSig,
- CorInfoHelperTailCallSpecialHandling flags)
-{
- API_ENTER(getTailCallCopyArgsThunk);
- void *result = wrapHnd->getTailCallCopyArgsThunk(pSig, flags);
- API_LEAVE(getTailCallCopyArgsThunk);
+void* WrapICorJitInfo::getTailCallHelpers(
+ CORINFO_RESOLVED_TOKEN* callToken,
+ CORINFO_SIG_INFO* sig,
+ CORINFO_GET_TAILCALL_HELPERS_FLAGS flags,
+ CORINFO_TAILCALL_HELPERS* pResult)
+{
+ API_ENTER(getTailCallHelpers);
+ void *result = wrapHnd->getTailCallHelpers(callToken, sig, flags, pResult);
+ API_LEAVE(getTailCallHelpers);
return result;
}
diff --git a/src/coreclr/src/jit/assertionprop.cpp b/src/coreclr/src/jit/assertionprop.cpp
index 916921f36cd3f2..031d4867d87cf5 100644
--- a/src/coreclr/src/jit/assertionprop.cpp
+++ b/src/coreclr/src/jit/assertionprop.cpp
@@ -2108,7 +2108,6 @@ void Compiler::optAssertionGen(GenTree* tree)
{
// Retrieve the 'this' arg
GenTree* thisArg = gtGetThisArg(tree->AsCall());
-#if defined(TARGET_X86) || defined(TARGET_AMD64) || defined(TARGET_ARM)
if (thisArg == nullptr)
{
// For tail calls we lose the this pointer in the argument list but that's OK because a null check
@@ -2116,8 +2115,6 @@ void Compiler::optAssertionGen(GenTree* tree)
noway_assert(tree->AsCall()->IsTailCall());
break;
}
-#endif // TARGET_X86 || TARGET_AMD64 || TARGET_ARM
- noway_assert(thisArg != nullptr);
assertionInfo = optCreateAssertion(thisArg, nullptr, OAK_NOT_EQUAL);
}
break;
@@ -2682,6 +2679,11 @@ GenTree* Compiler::optConstantAssertionProp(AssertionDsc* curAssertion,
newTree->ChangeOperConst(GT_CNS_INT);
newTree->AsIntCon()->gtIconVal = curAssertion->op2.u1.iconVal;
newTree->ClearIconHandleMask();
+ if (newTree->TypeIs(TYP_STRUCT))
+ {
+ // LCL_VAR can be init with a GT_CNS_INT, keep its type INT, not STRUCT.
+ newTree->ChangeType(TYP_INT);
+ }
}
// If we're doing an array index address, assume any constant propagated contributes to the index.
if (isArrIndex)
diff --git a/src/coreclr/src/jit/block.h b/src/coreclr/src/jit/block.h
index 5e49bb5c3f366d..6a2c6e86435a7f 100644
--- a/src/coreclr/src/jit/block.h
+++ b/src/coreclr/src/jit/block.h
@@ -725,7 +725,10 @@ struct BasicBlock : private LIR::Range
m_firstNode = tree;
}
- EntryState* bbEntryState; // verifier tracked state of all entries in stack.
+ union {
+ EntryState* bbEntryState; // verifier tracked state of all entries in stack.
+ flowList* bbLastPred; // last pred list entry
+ };
#define NO_BASE_TMP UINT_MAX // base# to use when we have none
unsigned bbStkTempsIn; // base# for input stack temps
diff --git a/src/coreclr/src/jit/codegen.h b/src/coreclr/src/jit/codegen.h
index 94201def12d978..d6b53ef475d7a8 100644
--- a/src/coreclr/src/jit/codegen.h
+++ b/src/coreclr/src/jit/codegen.h
@@ -342,12 +342,12 @@ class CodeGen final : public CodeGenInterface
void genSaveCalleeSavedRegistersHelp(regMaskTP regsToSaveMask, int lowestCalleeSavedOffset, int spDelta);
void genRestoreCalleeSavedRegistersHelp(regMaskTP regsToRestoreMask, int lowestCalleeSavedOffset, int spDelta);
- void genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegZeroed);
+ void genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegModified);
#else
void genPushCalleeSavedRegisters();
#endif
- void genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegZeroed, regMaskTP maskArgRegsLiveIn);
+ void genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegModified, regMaskTP maskArgRegsLiveIn);
#if defined(TARGET_ARM)
@@ -435,18 +435,18 @@ class CodeGen final : public CodeGenInterface
void genZeroInitFltRegs(const regMaskTP& initFltRegs, const regMaskTP& initDblRegs, const regNumber& initReg);
- regNumber genGetZeroReg(regNumber initReg, bool* pInitRegZeroed);
+ regNumber genGetZeroReg(regNumber initReg, bool* pInitRegModified);
- void genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegZeroed);
+ void genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegModified);
- void genReportGenericContextArg(regNumber initReg, bool* pInitRegZeroed);
+ void genReportGenericContextArg(regNumber initReg, bool* pInitRegModified);
- void genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed);
+ void genSetGSSecurityCookie(regNumber initReg, bool* pInitRegModified);
void genFinalizeFrame();
#ifdef PROFILING_SUPPORTED
- void genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed);
+ void genProfilingEnterCallback(regNumber initReg, bool* pInitRegModified);
void genProfilingLeaveCallback(unsigned helper);
#endif // PROFILING_SUPPORTED
@@ -512,7 +512,7 @@ class CodeGen final : public CodeGenInterface
void genFuncletEpilog();
void genCaptureFuncletPrologEpilogInfo();
- void genSetPSPSym(regNumber initReg, bool* pInitRegZeroed);
+ void genSetPSPSym(regNumber initReg, bool* pInitRegModified);
void genUpdateCurrentFunclet(BasicBlock* block);
#if defined(TARGET_ARM)
@@ -978,7 +978,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
void genSIMDIntrinsicInit(GenTreeSIMD* simdNode);
void genSIMDIntrinsicInitN(GenTreeSIMD* simdNode);
void genSIMDIntrinsicUnOp(GenTreeSIMD* simdNode);
- void genSIMDIntrinsicUnOpWithImm(GenTreeSIMD* simdNode);
void genSIMDIntrinsicBinOp(GenTreeSIMD* simdNode);
void genSIMDIntrinsicRelOp(GenTreeSIMD* simdNode);
void genSIMDIntrinsicDotProduct(GenTreeSIMD* simdNode);
@@ -1028,6 +1027,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
void genHWIntrinsic_R_R_R_RM(
instruction ins, emitAttr attr, regNumber targetReg, regNumber op1Reg, regNumber op2Reg, GenTree* op3);
void genBaseIntrinsic(GenTreeHWIntrinsic* node);
+ void genX86BaseIntrinsic(GenTreeHWIntrinsic* node);
void genSSEIntrinsic(GenTreeHWIntrinsic* node);
void genSSE2Intrinsic(GenTreeHWIntrinsic* node);
void genSSE41Intrinsic(GenTreeHWIntrinsic* node);
@@ -1047,6 +1047,59 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
regNumber offsReg,
HWIntrinsicSwitchCaseBody emitSwCase);
#endif // defined(TARGET_XARCH)
+
+#ifdef TARGET_ARM64
+ class HWIntrinsicImmOpHelper final
+ {
+ public:
+ HWIntrinsicImmOpHelper(CodeGen* codeGen, GenTree* immOp, GenTreeHWIntrinsic* intrin);
+
+ void EmitBegin();
+ void EmitCaseEnd();
+
+ // Returns true after the last call to EmitCaseEnd() (i.e. this signals that code generation is done).
+ bool Done() const
+ {
+ return (immValue > immUpperBound);
+ }
+
+ // Returns a value of the immediate operand that should be used for a case.
+ int ImmValue() const
+ {
+ return immValue;
+ }
+
+ private:
+ // Returns true if immOp is non contained immediate (i.e. the value of the immediate operand is enregistered in
+ // nonConstImmReg).
+ bool NonConstImmOp() const
+ {
+ return nonConstImmReg != REG_NA;
+ }
+
+ // Returns true if a non constant immediate operand can be either 0 or 1.
+ bool TestImmOpZeroOrOne() const
+ {
+ assert(NonConstImmOp());
+ return (immLowerBound == 0) && (immUpperBound == 1);
+ }
+
+ emitter* GetEmitter() const
+ {
+ return codeGen->GetEmitter();
+ }
+
+ CodeGen* const codeGen;
+ BasicBlock* endLabel;
+ BasicBlock* nonZeroLabel;
+ int immValue;
+ int immLowerBound;
+ int immUpperBound;
+ regNumber nonConstImmReg;
+ regNumber branchTargetReg;
+ };
+#endif // TARGET_ARM64
+
#endif // FEATURE_HW_INTRINSICS
#if !defined(TARGET_64BIT)
@@ -1060,6 +1113,9 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
// Do liveness update for register produced by the current node in codegen after
// code has been emitted for it.
void genProduceReg(GenTree* tree);
+ void genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclNode, regNumber regNum);
+ void genUnspillLocal(
+ unsigned varNum, var_types type, GenTreeLclVar* lclNode, regNumber regNum, bool reSpill, bool isLastUse);
void genUnspillRegIfNeeded(GenTree* tree);
regNumber genConsumeReg(GenTree* tree);
void genCopyRegIfNeeded(GenTree* tree, regNumber needReg);
@@ -1222,10 +1278,13 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
void genEHFinallyOrFilterRet(BasicBlock* block);
#endif // !FEATURE_EH_FUNCLETS
- void genMultiRegCallStoreToLocal(GenTree* treeNode);
+ void genMultiRegStoreToLocal(GenTree* treeNode);
- // Deals with codegen for muti-register struct returns.
+ // Codegen for multi-register struct returns.
bool isStructReturn(GenTree* treeNode);
+#ifdef FEATURE_SIMD
+ void genSIMDSplitReturn(GenTree* src, ReturnTypeDesc* retTypeDesc);
+#endif
void genStructReturn(GenTree* treeNode);
#if defined(TARGET_X86) || defined(TARGET_ARM)
@@ -1412,11 +1471,13 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
void instGen_Return(unsigned stkArgSize);
-#ifdef TARGET_ARM64
- void instGen_MemoryBarrier(insBarrier barrierType = INS_BARRIER_ISH);
-#else
- void instGen_MemoryBarrier();
-#endif
+ enum BarrierKind
+ {
+ BARRIER_FULL, // full barrier
+ BARRIER_LOAD_ONLY, // load barier
+ };
+
+ void instGen_MemoryBarrier(BarrierKind barrierKind = BARRIER_FULL);
void instGen_Set_Reg_To_Zero(emitAttr size, regNumber reg, insFlags flags = INS_FLAGS_DONT_CARE);
diff --git a/src/coreclr/src/jit/codegenarm.cpp b/src/coreclr/src/jit/codegenarm.cpp
index f4d7f925816ad0..015ac03a68b015 100644
--- a/src/coreclr/src/jit/codegenarm.cpp
+++ b/src/coreclr/src/jit/codegenarm.cpp
@@ -961,7 +961,7 @@ void CodeGen::genCodeForLclVar(GenTreeLclVar* tree)
// If this is a register candidate that has been spilled, genConsumeReg() will
// reload it at the point of use. Otherwise, if it's not in a register, we load it here.
- if (!isRegCandidate && !(tree->gtFlags & GTF_SPILLED))
+ if (!isRegCandidate && !tree->IsMultiReg() && !(tree->gtFlags & GTF_SPILLED))
{
const LclVarDsc* varDsc = compiler->lvaGetDesc(tree);
var_types type = varDsc->GetRegisterType(tree);
@@ -998,13 +998,38 @@ void CodeGen::genCodeForStoreLclFld(GenTreeLclFld* tree)
// Ensure that lclVar nodes are typed correctly.
assert(!varDsc->lvNormalizeOnStore() || targetType == genActualType(varDsc->TypeGet()));
- GenTree* data = tree->gtOp1;
- instruction ins = ins_Store(targetType);
- emitAttr attr = emitTypeSize(targetType);
+ GenTree* data = tree->gtOp1;
assert(!data->isContained());
genConsumeReg(data);
- emit->emitIns_S_R(ins, attr, data->GetRegNum(), varNum, offset);
+ regNumber dataReg = data->GetRegNum();
+ if (tree->IsOffsetMisaligned())
+ {
+ // Arm supports unaligned access only for integer types,
+ // convert the storing floating data into 1 or 2 integer registers and write them as int.
+ regNumber addr = tree->ExtractTempReg();
+ emit->emitIns_R_S(INS_lea, EA_PTRSIZE, addr, varNum, offset);
+ if (targetType == TYP_FLOAT)
+ {
+ regNumber floatAsInt = tree->GetSingleTempReg();
+ emit->emitIns_R_R(INS_vmov_f2i, EA_4BYTE, floatAsInt, dataReg);
+ emit->emitIns_R_R(INS_str, EA_4BYTE, floatAsInt, addr);
+ }
+ else
+ {
+ regNumber halfdoubleAsInt1 = tree->ExtractTempReg();
+ regNumber halfdoubleAsInt2 = tree->GetSingleTempReg();
+ emit->emitIns_R_R_R(INS_vmov_d2i, EA_8BYTE, halfdoubleAsInt1, halfdoubleAsInt2, dataReg);
+ emit->emitIns_R_R_I(INS_str, EA_4BYTE, halfdoubleAsInt1, addr, 0);
+ emit->emitIns_R_R_I(INS_str, EA_4BYTE, halfdoubleAsInt1, addr, 4);
+ }
+ }
+ else
+ {
+ emitAttr attr = emitTypeSize(targetType);
+ instruction ins = ins_Store(targetType);
+ emit->emitIns_S_R(ins, attr, dataReg, varNum, offset);
+ }
// Updating variable liveness after instruction was emitted
genUpdateLife(tree);
@@ -1025,7 +1050,7 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
// case is handled separately.
if (data->gtSkipReloadOrCopy()->IsMultiRegCall())
{
- genMultiRegCallStoreToLocal(tree);
+ genMultiRegStoreToLocal(tree);
}
else
{
@@ -1623,14 +1648,14 @@ void CodeGen::genCodeForMulLong(GenTreeMultiRegOp* node)
// genProfilingEnterCallback: Generate the profiling function enter callback.
//
// Arguments:
-// initReg - register to use as scratch register
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed set to 'false' if 'initReg' is
-// not zero after this call.
+// initReg - register to use as scratch register
+// pInitRegModified - OUT parameter. *pInitRegModified set to 'true' if and only if
+// this call sets 'initReg' to a non-zero value.
//
// Return Value:
// None
//
-void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -1663,7 +1688,7 @@ void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
if (initReg == argReg)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
}
@@ -1793,14 +1818,17 @@ void CodeGen::genProfilingLeaveCallback(unsigned helper)
// Arguments:
// frameSize - the size of the stack frame being allocated.
// initReg - register to use as a scratch register.
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed is set to 'false' if and only if
+// pInitRegModified - OUT parameter. *pInitRegModified is set to 'true' if and only if
// this call sets 'initReg' to a non-zero value.
// maskArgRegsLiveIn - incoming argument registers that are currently live.
//
// Return value:
// None
//
-void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegZeroed, regMaskTP maskArgRegsLiveIn)
+void CodeGen::genAllocLclFrame(unsigned frameSize,
+ regNumber initReg,
+ bool* pInitRegModified,
+ regMaskTP maskArgRegsLiveIn)
{
assert(compiler->compGeneratingProlog);
@@ -1830,7 +1858,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
}
regSet.verifyRegUsed(initReg);
- *pInitRegZeroed = false; // The initReg does not contain zero
+ *pInitRegModified = true;
instGen_Set_Reg_To_Imm(EA_PTRSIZE, initReg, frameSize);
compiler->unwindPadding();
@@ -1850,7 +1878,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
if ((genRegMask(initReg) & (RBM_STACK_PROBE_HELPER_ARG | RBM_STACK_PROBE_HELPER_CALL_TARGET |
RBM_STACK_PROBE_HELPER_TRASH)) != RBM_NONE)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
}
diff --git a/src/coreclr/src/jit/codegenarm64.cpp b/src/coreclr/src/jit/codegenarm64.cpp
index 88799aec62d720..91b5885f174630 100644
--- a/src/coreclr/src/jit/codegenarm64.cpp
+++ b/src/coreclr/src/jit/codegenarm64.cpp
@@ -1839,7 +1839,7 @@ void CodeGen::genCodeForLclVar(GenTreeLclVar* tree)
// If this is a register candidate that has been spilled, genConsumeReg() will
// reload it at the point of use. Otherwise, if it's not in a register, we load it here.
- if (!isRegCandidate && !(tree->gtFlags & GTF_SPILLED))
+ if (!isRegCandidate && !tree->IsMultiReg() && !(tree->gtFlags & GTF_SPILLED))
{
// targetType must be a normal scalar type and not a TYP_STRUCT
assert(targetType != TYP_STRUCT);
@@ -1929,7 +1929,7 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
// case is handled separately.
if (data->gtSkipReloadOrCopy()->IsMultiRegCall())
{
- genMultiRegCallStoreToLocal(tree);
+ genMultiRegStoreToLocal(tree);
}
else
{
@@ -1953,17 +1953,31 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
genConsumeRegs(data);
regNumber dataReg = REG_NA;
- if (data->isContainedIntOrIImmed())
+ if (data->isContained())
{
// This is only possible for a zero-init.
- assert(data->IsIntegralConst(0));
+ assert(data->IsIntegralConst(0) || data->IsSIMDZero());
if (varTypeIsSIMD(targetType))
{
- assert(targetType == TYP_SIMD16);
- assert(targetReg != REG_NA);
- emit->emitIns_R_I(INS_movi, EA_16BYTE, targetReg, 0x00, INS_OPTS_16B);
- genProduceReg(tree);
+ if (targetReg != REG_NA)
+ {
+ emit->emitIns_R_I(INS_movi, emitActualTypeSize(targetType), targetReg, 0x00, INS_OPTS_16B);
+ genProduceReg(tree);
+ }
+ else
+ {
+ if (targetType == TYP_SIMD16)
+ {
+ GetEmitter()->emitIns_S_S_R_R(INS_stp, EA_8BYTE, EA_8BYTE, REG_ZR, REG_ZR, varNum, 0);
+ }
+ else
+ {
+ assert(targetType == TYP_SIMD8);
+ GetEmitter()->emitIns_S_R(INS_str, EA_8BYTE, REG_ZR, varNum, 0);
+ }
+ genUpdateLife(tree);
+ }
return;
}
@@ -2371,6 +2385,35 @@ void CodeGen::genCodeForNegNot(GenTree* tree)
genProduceReg(tree);
}
+//------------------------------------------------------------------------
+// genCodeForBswap: Produce code for a GT_BSWAP / GT_BSWAP16 node.
+//
+// Arguments:
+// tree - the node
+//
+void CodeGen::genCodeForBswap(GenTree* tree)
+{
+ assert(tree->OperIs(GT_BSWAP, GT_BSWAP16));
+
+ regNumber targetReg = tree->GetRegNum();
+ var_types targetType = tree->TypeGet();
+
+ GenTree* operand = tree->gtGetOp1();
+ assert(operand->isUsedFromReg());
+ regNumber operandReg = genConsumeReg(operand);
+
+ if (tree->OperIs(GT_BSWAP16))
+ {
+ inst_RV_RV(INS_rev16, targetReg, operandReg, targetType);
+ }
+ else
+ {
+ inst_RV_RV(INS_rev, targetReg, operandReg, targetType);
+ }
+
+ genProduceReg(tree);
+}
+
//------------------------------------------------------------------------
// genCodeForDivMod: Produce code for a GT_DIV/GT_UDIV node. We don't see MOD:
// (1) integer MOD is morphed into a sequence of sub, mul, div in fgMorph;
@@ -2636,8 +2679,8 @@ void CodeGen::genCodeForCpObj(GenTreeObj* cpObjNode)
if (cpObjNode->gtFlags & GTF_BLK_VOLATILE)
{
- // issue a INS_BARRIER_ISHLD after a volatile CpObj operation
- instGen_MemoryBarrier(INS_BARRIER_ISHLD);
+ // issue a load barrier after a volatile CpObj operation
+ instGen_MemoryBarrier(BARRIER_LOAD_ONLY);
}
// Clear the gcInfo for REG_WRITE_BARRIER_SRC_BYREF and REG_WRITE_BARRIER_DST_BYREF.
@@ -2746,7 +2789,7 @@ void CodeGen::genLockedInstructions(GenTreeOp* treeNode)
assert(!"Unexpected treeNode->gtOper");
}
- instGen_MemoryBarrier(INS_BARRIER_ISH);
+ instGen_MemoryBarrier();
}
else
{
@@ -2826,7 +2869,7 @@ void CodeGen::genLockedInstructions(GenTreeOp* treeNode)
GetEmitter()->emitIns_J_R(INS_cbnz, EA_4BYTE, labelRetry, exResultReg);
- instGen_MemoryBarrier(INS_BARRIER_ISH);
+ instGen_MemoryBarrier();
gcInfo.gcMarkRegSetNpt(addr->gtGetRegMask());
}
@@ -2875,7 +2918,7 @@ void CodeGen::genCodeForCmpXchg(GenTreeCmpXchg* treeNode)
}
GetEmitter()->emitIns_R_R_R(INS_casal, dataSize, targetReg, dataReg, addrReg);
- instGen_MemoryBarrier(INS_BARRIER_ISH);
+ instGen_MemoryBarrier();
}
else
{
@@ -2955,7 +2998,7 @@ void CodeGen::genCodeForCmpXchg(GenTreeCmpXchg* treeNode)
genDefineTempLabel(labelCompareFail);
- instGen_MemoryBarrier(INS_BARRIER_ISH);
+ instGen_MemoryBarrier();
gcInfo.gcMarkRegSetNpt(addr->gtGetRegMask());
}
@@ -3778,15 +3821,11 @@ void CodeGen::genSIMDIntrinsic(GenTreeSIMD* simdNode)
genSIMDIntrinsicInitN(simdNode);
break;
- case SIMDIntrinsicSqrt:
- case SIMDIntrinsicAbs:
case SIMDIntrinsicCast:
case SIMDIntrinsicConvertToSingle:
case SIMDIntrinsicConvertToInt32:
case SIMDIntrinsicConvertToDouble:
case SIMDIntrinsicConvertToInt64:
- case SIMDIntrinsicCeil:
- case SIMDIntrinsicFloor:
genSIMDIntrinsicUnOp(simdNode);
break;
@@ -3804,24 +3843,11 @@ void CodeGen::genSIMDIntrinsic(GenTreeSIMD* simdNode)
case SIMDIntrinsicMul:
case SIMDIntrinsicDiv:
case SIMDIntrinsicBitwiseAnd:
- case SIMDIntrinsicBitwiseAndNot:
case SIMDIntrinsicBitwiseOr:
- case SIMDIntrinsicBitwiseXor:
- case SIMDIntrinsicMin:
- case SIMDIntrinsicMax:
case SIMDIntrinsicEqual:
- case SIMDIntrinsicLessThan:
- case SIMDIntrinsicGreaterThan:
- case SIMDIntrinsicLessThanOrEqual:
- case SIMDIntrinsicGreaterThanOrEqual:
genSIMDIntrinsicBinOp(simdNode);
break;
- case SIMDIntrinsicOpEquality:
- case SIMDIntrinsicOpInEquality:
- genSIMDIntrinsicRelOp(simdNode);
- break;
-
case SIMDIntrinsicDotProduct:
genSIMDIntrinsicDotProduct(simdNode);
break;
@@ -3845,10 +3871,6 @@ void CodeGen::genSIMDIntrinsic(GenTreeSIMD* simdNode)
genSIMDIntrinsicUpperRestore(simdNode);
break;
- case SIMDIntrinsicSelect:
- NYI("SIMDIntrinsicSelect lowered during import to (a & sel) | (b & ~sel)");
- break;
-
default:
noway_assert(!"Unimplemented SIMD intrinsic.");
unreached();
@@ -3906,24 +3928,15 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
{
switch (intrinsicId)
{
- case SIMDIntrinsicAbs:
- result = INS_fabs;
- break;
case SIMDIntrinsicAdd:
result = INS_fadd;
break;
case SIMDIntrinsicBitwiseAnd:
result = INS_and;
break;
- case SIMDIntrinsicBitwiseAndNot:
- result = INS_bic;
- break;
case SIMDIntrinsicBitwiseOr:
result = INS_orr;
break;
- case SIMDIntrinsicBitwiseXor:
- result = INS_eor;
- break;
case SIMDIntrinsicCast:
result = INS_mov;
break;
@@ -3937,24 +3950,6 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
case SIMDIntrinsicEqual:
result = INS_fcmeq;
break;
- case SIMDIntrinsicGreaterThan:
- result = INS_fcmgt;
- break;
- case SIMDIntrinsicGreaterThanOrEqual:
- result = INS_fcmge;
- break;
- case SIMDIntrinsicLessThan:
- result = INS_fcmlt;
- break;
- case SIMDIntrinsicLessThanOrEqual:
- result = INS_fcmle;
- break;
- case SIMDIntrinsicMax:
- result = INS_fmax;
- break;
- case SIMDIntrinsicMin:
- result = INS_fmin;
- break;
case SIMDIntrinsicMul:
result = INS_fmul;
break;
@@ -3963,12 +3958,6 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
// Return lower bytes instruction here
result = INS_fcvtn;
break;
- case SIMDIntrinsicSelect:
- result = INS_bsl;
- break;
- case SIMDIntrinsicSqrt:
- result = INS_fsqrt;
- break;
case SIMDIntrinsicSub:
result = INS_fsub;
break;
@@ -3978,12 +3967,6 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
case SIMDIntrinsicWidenHi:
result = INS_fcvtl2;
break;
- case SIMDIntrinsicCeil:
- result = INS_frintp;
- break;
- case SIMDIntrinsicFloor:
- result = INS_frintm;
- break;
default:
assert(!"Unsupported SIMD intrinsic");
unreached();
@@ -3995,25 +3978,15 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
switch (intrinsicId)
{
- case SIMDIntrinsicAbs:
- assert(!isUnsigned);
- result = INS_abs;
- break;
case SIMDIntrinsicAdd:
result = INS_add;
break;
case SIMDIntrinsicBitwiseAnd:
result = INS_and;
break;
- case SIMDIntrinsicBitwiseAndNot:
- result = INS_bic;
- break;
case SIMDIntrinsicBitwiseOr:
result = INS_orr;
break;
- case SIMDIntrinsicBitwiseXor:
- result = INS_eor;
- break;
case SIMDIntrinsicCast:
result = INS_mov;
break;
@@ -4024,26 +3997,6 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
case SIMDIntrinsicEqual:
result = INS_cmeq;
break;
- case SIMDIntrinsicGreaterThan:
- result = isUnsigned ? INS_cmhi : INS_cmgt;
- break;
- case SIMDIntrinsicGreaterThanOrEqual:
- result = isUnsigned ? INS_cmhs : INS_cmge;
- break;
- case SIMDIntrinsicLessThan:
- assert(!isUnsigned);
- result = INS_cmlt;
- break;
- case SIMDIntrinsicLessThanOrEqual:
- assert(!isUnsigned);
- result = INS_cmle;
- break;
- case SIMDIntrinsicMax:
- result = isUnsigned ? INS_umax : INS_smax;
- break;
- case SIMDIntrinsicMin:
- result = isUnsigned ? INS_umin : INS_smin;
- break;
case SIMDIntrinsicMul:
result = INS_mul;
break;
@@ -4052,9 +4005,6 @@ instruction CodeGen::getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_type
// Return lower bytes instruction here
result = INS_xtn;
break;
- case SIMDIntrinsicSelect:
- result = INS_bsl;
- break;
case SIMDIntrinsicSub:
result = INS_sub;
break;
@@ -4213,13 +4163,11 @@ void CodeGen::genSIMDIntrinsicInitN(GenTreeSIMD* simdNode)
//
void CodeGen::genSIMDIntrinsicUnOp(GenTreeSIMD* simdNode)
{
- assert(simdNode->gtSIMDIntrinsicID == SIMDIntrinsicSqrt || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicCast ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicAbs ||
+ assert(simdNode->gtSIMDIntrinsicID == SIMDIntrinsicCast ||
simdNode->gtSIMDIntrinsicID == SIMDIntrinsicConvertToSingle ||
simdNode->gtSIMDIntrinsicID == SIMDIntrinsicConvertToInt32 ||
simdNode->gtSIMDIntrinsicID == SIMDIntrinsicConvertToDouble ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicConvertToInt64 ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicCeil || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicFloor);
+ simdNode->gtSIMDIntrinsicID == SIMDIntrinsicConvertToInt64);
GenTree* op1 = simdNode->gtGetOp1();
var_types baseType = simdNode->gtSIMDBaseType;
@@ -4269,17 +4217,10 @@ void CodeGen::genSIMDIntrinsicWiden(GenTreeSIMD* simdNode)
instruction ins = getOpForSIMDIntrinsic(simdNode->gtSIMDIntrinsicID, baseType);
- if (varTypeIsFloating(baseType))
- {
- GetEmitter()->emitIns_R_R(ins, EA_8BYTE, targetReg, op1Reg);
- }
- else
- {
- emitAttr attr = (simdNode->gtSIMDIntrinsicID == SIMDIntrinsicWidenHi) ? EA_16BYTE : EA_8BYTE;
- insOpts opt = genGetSimdInsOpt(attr, baseType);
+ emitAttr attr = (simdNode->gtSIMDIntrinsicID == SIMDIntrinsicWidenHi) ? EA_16BYTE : EA_8BYTE;
+ insOpts opt = genGetSimdInsOpt(attr, baseType);
- GetEmitter()->emitIns_R_R(ins, attr, targetReg, op1Reg, opt);
- }
+ GetEmitter()->emitIns_R_R(ins, attr, targetReg, op1Reg, opt);
genProduceReg(simdNode);
}
@@ -4319,43 +4260,39 @@ void CodeGen::genSIMDIntrinsicNarrow(GenTreeSIMD* simdNode)
instruction ins = getOpForSIMDIntrinsic(simdNode->gtSIMDIntrinsicID, baseType);
assert((ins == INS_fcvtn) || (ins == INS_xtn));
- if (ins == INS_fcvtn)
+ instruction ins2 = (ins == INS_fcvtn) ? INS_fcvtn2 : INS_xtn2;
+
+ insOpts opt = INS_OPTS_NONE;
+ insOpts opt2 = INS_OPTS_NONE;
+
+ // This is not the same as genGetSimdInsOpt()
+ // Basetype is the soure operand type
+ // However encoding is based on the destination operand type which is 1/2 the basetype.
+ switch (baseType)
{
- GetEmitter()->emitIns_R_R(INS_fcvtn, EA_8BYTE, targetReg, op1Reg);
- GetEmitter()->emitIns_R_R(INS_fcvtn2, EA_8BYTE, targetReg, op2Reg);
+ case TYP_ULONG:
+ case TYP_LONG:
+ case TYP_DOUBLE:
+ opt = INS_OPTS_2S;
+ opt2 = INS_OPTS_4S;
+ break;
+ case TYP_UINT:
+ case TYP_INT:
+ opt = INS_OPTS_4H;
+ opt2 = INS_OPTS_8H;
+ break;
+ case TYP_USHORT:
+ case TYP_SHORT:
+ opt = INS_OPTS_8B;
+ opt2 = INS_OPTS_16B;
+ break;
+ default:
+ assert(!"Unsupported narrowing element type");
+ unreached();
}
- else
- {
- insOpts opt = INS_OPTS_NONE;
- insOpts opt2 = INS_OPTS_NONE;
- // This is not the same as genGetSimdInsOpt()
- // Basetype is the soure operand type
- // However encoding is based on the destination operand type which is 1/2 the basetype.
- switch (baseType)
- {
- case TYP_ULONG:
- case TYP_LONG:
- opt = INS_OPTS_2S;
- opt2 = INS_OPTS_4S;
- break;
- case TYP_UINT:
- case TYP_INT:
- opt = INS_OPTS_4H;
- opt2 = INS_OPTS_8H;
- break;
- case TYP_USHORT:
- case TYP_SHORT:
- opt = INS_OPTS_8B;
- opt2 = INS_OPTS_16B;
- break;
- default:
- assert(!"Unsupported narrowing element type");
- unreached();
- }
- GetEmitter()->emitIns_R_R(INS_xtn, EA_8BYTE, targetReg, op1Reg, opt);
- GetEmitter()->emitIns_R_R(INS_xtn2, EA_16BYTE, targetReg, op2Reg, opt2);
- }
+ GetEmitter()->emitIns_R_R(ins, EA_8BYTE, targetReg, op1Reg, opt);
+ GetEmitter()->emitIns_R_R(ins2, EA_16BYTE, targetReg, op2Reg, opt2);
genProduceReg(simdNode);
}
@@ -4375,14 +4312,7 @@ void CodeGen::genSIMDIntrinsicBinOp(GenTreeSIMD* simdNode)
assert(simdNode->gtSIMDIntrinsicID == SIMDIntrinsicAdd || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicSub ||
simdNode->gtSIMDIntrinsicID == SIMDIntrinsicMul || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicDiv ||
simdNode->gtSIMDIntrinsicID == SIMDIntrinsicBitwiseAnd ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicBitwiseAndNot ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicBitwiseOr ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicBitwiseXor || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicMin ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicMax || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicEqual ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicLessThan ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicGreaterThan ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicLessThanOrEqual ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicGreaterThanOrEqual);
+ simdNode->gtSIMDIntrinsicID == SIMDIntrinsicBitwiseOr || simdNode->gtSIMDIntrinsicID == SIMDIntrinsicEqual);
GenTree* op1 = simdNode->gtGetOp1();
GenTree* op2 = simdNode->gtGetOp2();
@@ -4410,65 +4340,6 @@ void CodeGen::genSIMDIntrinsicBinOp(GenTreeSIMD* simdNode)
genProduceReg(simdNode);
}
-//--------------------------------------------------------------------------------
-// genSIMDIntrinsicRelOp: Generate code for a SIMD Intrinsic relational operater
-// == and !=
-//
-// Arguments:
-// simdNode - The GT_SIMD node
-//
-// Return Value:
-// None.
-//
-void CodeGen::genSIMDIntrinsicRelOp(GenTreeSIMD* simdNode)
-{
- assert(simdNode->gtSIMDIntrinsicID == SIMDIntrinsicOpEquality ||
- simdNode->gtSIMDIntrinsicID == SIMDIntrinsicOpInEquality);
-
- GenTree* op1 = simdNode->gtGetOp1();
- GenTree* op2 = simdNode->gtGetOp2();
- var_types baseType = simdNode->gtSIMDBaseType;
- regNumber targetReg = simdNode->GetRegNum();
- var_types targetType = simdNode->TypeGet();
-
- genConsumeOperands(simdNode);
- regNumber op1Reg = op1->GetRegNum();
- regNumber op2Reg = op2->GetRegNum();
- regNumber otherReg = op2Reg;
-
- instruction ins = getOpForSIMDIntrinsic(SIMDIntrinsicEqual, baseType);
- emitAttr attr = (simdNode->gtSIMDSize > 8) ? EA_16BYTE : EA_8BYTE;
- insOpts opt = genGetSimdInsOpt(attr, baseType);
-
- // TODO-ARM64-CQ Contain integer constants where possible
-
- regNumber tmpFloatReg = simdNode->GetSingleTempReg(RBM_ALLFLOAT);
-
- GetEmitter()->emitIns_R_R_R(ins, attr, tmpFloatReg, op1Reg, op2Reg, opt);
-
- if ((simdNode->gtFlags & GTF_SIMD12_OP) != 0)
- {
- // For 12Byte vectors we must set upper bits to get correct comparison
- // We do not assume upper bits are zero.
- instGen_Set_Reg_To_Imm(EA_4BYTE, targetReg, -1);
- GetEmitter()->emitIns_R_R_I(INS_ins, EA_4BYTE, tmpFloatReg, targetReg, 3);
- }
-
- GetEmitter()->emitIns_R_R(INS_uminv, attr, tmpFloatReg, tmpFloatReg,
- (simdNode->gtSIMDSize > 8) ? INS_OPTS_16B : INS_OPTS_8B);
-
- GetEmitter()->emitIns_R_R_I(INS_mov, EA_1BYTE, targetReg, tmpFloatReg, 0);
-
- if (simdNode->gtSIMDIntrinsicID == SIMDIntrinsicOpInEquality)
- {
- GetEmitter()->emitIns_R_R_I(INS_eor, EA_4BYTE, targetReg, targetReg, 0x1);
- }
-
- GetEmitter()->emitIns_R_R_I(INS_and, EA_4BYTE, targetReg, targetReg, 0x1);
-
- genProduceReg(simdNode);
-}
-
//--------------------------------------------------------------------------------
// genSIMDIntrinsicDotProduct: Generate code for SIMD Intrinsic Dot Product.
//
@@ -4990,7 +4861,20 @@ void CodeGen::genStoreLclTypeSIMD12(GenTree* treeNode)
}
GenTree* op1 = treeNode->AsOp()->gtOp1;
- assert(!op1->isContained());
+
+ if (op1->isContained())
+ {
+ // This is only possible for a zero-init.
+ assert(op1->IsIntegralConst(0) || op1->IsSIMDZero());
+
+ // store lower 8 bytes
+ GetEmitter()->emitIns_S_R(ins_Store(TYP_DOUBLE), EA_8BYTE, REG_ZR, varNum, offs);
+
+ // Store upper 4 bytes
+ GetEmitter()->emitIns_S_R(ins_Store(TYP_FLOAT), EA_4BYTE, REG_ZR, varNum, offs + 8);
+
+ return;
+ }
regNumber operandReg = genConsumeReg(op1);
// Need an addtional integer register to extract upper 4 bytes from data.
@@ -5014,14 +4898,14 @@ void CodeGen::genStoreLclTypeSIMD12(GenTree* treeNode)
// genProfilingEnterCallback: Generate the profiling function enter callback.
//
// Arguments:
-// initReg - register to use as scratch register
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed set to 'false' if 'initReg' is
-// not zero after this call.
+// initReg - register to use as scratch register
+// pInitRegModified - OUT parameter. *pInitRegModified set to 'true' if 'initReg' is
+// not zero after this call.
//
// Return Value:
// None
//
-void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -5049,7 +4933,7 @@ void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
if ((genRegMask(initReg) & RBM_PROFILER_ENTER_TRASH) != RBM_NONE)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
}
@@ -5116,16 +5000,12 @@ void CodeGen::genArm64EmitterUnitTests()
return;
}
- if (!compiler->opts.altJit)
- {
- // No point doing this in a "real" JIT.
- return;
- }
-
+#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
// Mark the "fake" instructions in the output.
printf("*************** In genArm64EmitterUnitTests()\n");
emitter* theEmitter = GetEmitter();
+#endif // ALL_ARM64_EMITTER_UNIT_TESTS
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
// We use this:
@@ -5409,6 +5289,38 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R(INS_ld4r, EA_8BYTE, REG_V30, REG_R2, INS_OPTS_1D);
theEmitter->emitIns_R_R(INS_ld4r, EA_16BYTE, REG_V3, REG_R7, INS_OPTS_2D);
+ // tbl Vd, {Vt}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbl, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbl, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbx Vd, {Vt}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbx, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbx, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbl Vd, {Vt, Vt2}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbl_2regs, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbl_2regs, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbx Vd, {Vt, Vt2}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbx_2regs, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbx_2regs, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbl Vd, {Vt, Vt2, Vt3}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbl_3regs, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbl_3regs, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbx Vd, {Vt, Vt2, Vt3}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbx_3regs, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbx_3regs, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbl Vd, {Vt, Vt2, Vt3, Vt4}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbl_4regs, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbl_4regs, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
+ // tbx Vd, {Vt, Vt2, Vt3, Vt4}, Vm
+ theEmitter->emitIns_R_R_R(INS_tbx_4regs, EA_8BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_tbx_4regs, EA_16BYTE, REG_V0, REG_V1, REG_V6, INS_OPTS_16B);
+
#endif // ALL_ARM64_EMITTER_UNIT_TESTS
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
@@ -6927,7 +6839,6 @@ void CodeGen::genArm64EmitterUnitTests()
genDefineTempLabel(genCreateTempLabel());
theEmitter->emitIns_R(INS_br, EA_PTRSIZE, REG_R8);
- theEmitter->emitIns_R(INS_blr, EA_PTRSIZE, REG_R9);
theEmitter->emitIns_R(INS_ret, EA_PTRSIZE, REG_R8);
theEmitter->emitIns_R(INS_ret, EA_PTRSIZE, REG_LR);
@@ -7217,6 +7128,12 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R_I(INS_smov, EA_2BYTE, REG_R6, REG_V18, 4);
theEmitter->emitIns_R_R_I(INS_smov, EA_1BYTE, REG_R7, REG_V19, 8);
+ // ext extract vector from pair of vectors
+ theEmitter->emitIns_R_R_R_I(INS_ext, EA_8BYTE, REG_V0, REG_V1, REG_V2, 3, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R_I(INS_ext, EA_8BYTE, REG_V4, REG_V5, REG_V6, 7, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R_I(INS_ext, EA_16BYTE, REG_V8, REG_V9, REG_V10, 11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R_I(INS_ext, EA_16BYTE, REG_V12, REG_V13, REG_V14, 15, INS_OPTS_16B);
+
#endif // ALL_ARM64_EMITTER_UNIT_TESTS
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
@@ -7267,6 +7184,10 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_I(INS_movi, EA_8BYTE, REG_V30, 0xFF000000FF000000);
theEmitter->emitIns_R_I(INS_movi, EA_16BYTE, REG_V31, 0x0, INS_OPTS_2D);
+ // We were not encoding immediate of movi that was int.MaxValue or int.MaxValue / 2.
+ theEmitter->emitIns_R_I(INS_movi, EA_8BYTE, REG_V16, 0x7fffffff, INS_OPTS_2S);
+ theEmitter->emitIns_R_I(INS_movi, EA_8BYTE, REG_V16, 0x3fffffff, INS_OPTS_2S);
+
theEmitter->emitIns_R_I(INS_mvni, EA_8BYTE, REG_V0, 0x0022, INS_OPTS_4H);
theEmitter->emitIns_R_I(INS_mvni, EA_8BYTE, REG_V1, 0x2200, INS_OPTS_4H); // LSL 8
theEmitter->emitIns_R_I(INS_mvni, EA_16BYTE, REG_V2, 0x0033, INS_OPTS_8H);
@@ -7845,19 +7766,54 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R(INS_ursqrte, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_2S);
theEmitter->emitIns_R_R(INS_ursqrte, EA_16BYTE, REG_V2, REG_V3, INS_OPTS_4S);
- // INS_fcvtl
- theEmitter->emitIns_R_R(INS_fcvtl, EA_4BYTE, REG_V0, REG_V1);
-
- // INS_fcvtl2
- theEmitter->emitIns_R_R(INS_fcvtl2, EA_4BYTE, REG_V0, REG_V1);
+ // fcvtl{2} vector
+ theEmitter->emitIns_R_R(INS_fcvtl, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_4H);
+ theEmitter->emitIns_R_R(INS_fcvtl2, EA_16BYTE, REG_V2, REG_V3, INS_OPTS_8H);
+ theEmitter->emitIns_R_R(INS_fcvtl, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_2S);
+ theEmitter->emitIns_R_R(INS_fcvtl2, EA_16BYTE, REG_V5, REG_V6, INS_OPTS_4S);
- // INS_fcvtn
- theEmitter->emitIns_R_R(INS_fcvtn, EA_8BYTE, REG_V0, REG_V1);
+ // fcvtn{2} vector
+ theEmitter->emitIns_R_R(INS_fcvtn, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_4H);
+ theEmitter->emitIns_R_R(INS_fcvtn2, EA_16BYTE, REG_V2, REG_V3, INS_OPTS_8H);
+ theEmitter->emitIns_R_R(INS_fcvtn, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_2S);
+ theEmitter->emitIns_R_R(INS_fcvtn2, EA_16BYTE, REG_V5, REG_V6, INS_OPTS_4S);
- // INS_fcvtn2
- theEmitter->emitIns_R_R(INS_fcvtn2, EA_8BYTE, REG_V0, REG_V1);
#endif
+#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
+ // sadalp vector
+ theEmitter->emitIns_R_R(INS_sadalp, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R(INS_sadalp, EA_8BYTE, REG_V2, REG_V3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R(INS_sadalp, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_2S);
+ theEmitter->emitIns_R_R(INS_sadalp, EA_16BYTE, REG_V6, REG_V7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R(INS_sadalp, EA_16BYTE, REG_V8, REG_V9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R(INS_sadalp, EA_16BYTE, REG_V10, REG_V11, INS_OPTS_4S);
+
+ // saddlp vector
+ theEmitter->emitIns_R_R(INS_saddlp, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R(INS_saddlp, EA_8BYTE, REG_V2, REG_V3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R(INS_saddlp, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_2S);
+ theEmitter->emitIns_R_R(INS_saddlp, EA_16BYTE, REG_V6, REG_V7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R(INS_saddlp, EA_16BYTE, REG_V8, REG_V9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R(INS_saddlp, EA_16BYTE, REG_V10, REG_V11, INS_OPTS_4S);
+
+ // uadalp vector
+ theEmitter->emitIns_R_R(INS_uadalp, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R(INS_uadalp, EA_8BYTE, REG_V2, REG_V3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R(INS_uadalp, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_2S);
+ theEmitter->emitIns_R_R(INS_uadalp, EA_16BYTE, REG_V6, REG_V7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R(INS_uadalp, EA_16BYTE, REG_V8, REG_V9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R(INS_uadalp, EA_16BYTE, REG_V10, REG_V11, INS_OPTS_4S);
+
+ // uaddlp vector
+ theEmitter->emitIns_R_R(INS_uaddlp, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R(INS_uaddlp, EA_8BYTE, REG_V2, REG_V3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R(INS_uaddlp, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_2S);
+ theEmitter->emitIns_R_R(INS_uaddlp, EA_16BYTE, REG_V6, REG_V7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R(INS_uaddlp, EA_16BYTE, REG_V8, REG_V9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R(INS_uaddlp, EA_16BYTE, REG_V10, REG_V11, INS_OPTS_4S);
+#endif // ALL_ARM64_EMITTER_UNIT_TESTS
+
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
//
// R_R floating point round to int, one dest, one source
@@ -8061,196 +8017,200 @@ void CodeGen::genArm64EmitterUnitTests()
// R_R_I vector operations, one dest, one source reg, one immed
//
+ // Some of the tests cases below might appear redundant since they emit same combinations of instruction x size x
+ // vector arrangements. However, these are added to verify that the split constant encoding works with both - small
+ // and large constants.
+
genDefineTempLabel(genCreateTempLabel());
- // 'sshr' scalar
+ // sshr scalar
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'sshr' vector
+ // sshr vector
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_sshr, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_sshr, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'ssra' scalar
+ // ssra scalar
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'ssra' vector
+ // ssra vector
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_ssra, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_ssra, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'srshr' scalar
+ // srshr scalar
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'srshr' vector
+ // srshr vector
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_srshr, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_srshr, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'srsra' scalar
+ // srsra scalar
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'srsra' vector
+ // srsra vector
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_srsra, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_srsra, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'shl' scalar
- theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V0, REG_V1, 1);
+ // shl scalar
+ theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V0, REG_V1, 0);
theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V6, REG_V7, 40);
theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V8, REG_V9, 63);
- // 'shl' vector
- theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ // shl vector
+ theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V0, REG_V1, 0, INS_OPTS_8B);
theEmitter->emitIns_R_R_I(INS_shl, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
- theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V4, REG_V5, 8, INS_OPTS_4H);
theEmitter->emitIns_R_R_I(INS_shl, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
- theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_shl, EA_8BYTE, REG_V8, REG_V9, 16, INS_OPTS_2S);
theEmitter->emitIns_R_R_I(INS_shl, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
- theEmitter->emitIns_R_R_I(INS_shl, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_shl, EA_16BYTE, REG_V12, REG_V13, 32, INS_OPTS_2D);
theEmitter->emitIns_R_R_I(INS_shl, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
- // 'ushr' scalar
+ // ushr scalar
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'ushr' vector
+ // ushr vector
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_ushr, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_ushr, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'usra' scalar
+ // usra scalar
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'usra' vector
+ // usra vector
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_usra, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_usra, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'urshr' scalar
+ // urshr scalar
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'urshr' vector
+ // urshr vector
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_urshr, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_urshr, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'ursra' scalar
+ // ursra scalar
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'srsra' vector
+ // ursra vector
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_ursra, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_ursra, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'sri' scalar
+ // sri scalar
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V0, REG_V1, 1);
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V6, REG_V7, 40);
- theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V8, REG_V9, 63);
+ theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V8, REG_V9, 64);
- // 'sri' vector
+ // sri vector
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_sri, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
- theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_sri, EA_16BYTE, REG_V14, REG_V15, 64, INS_OPTS_2D);
- // 'sli' scalar
- theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V0, REG_V1, 1);
+ // sli scalar
+ theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V0, REG_V1, 0);
theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V2, REG_V3, 14);
theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V4, REG_V5, 27);
theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V6, REG_V7, 40);
theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V8, REG_V9, 63);
- // 'sli' vector
- theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ // sli vector
+ theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V0, REG_V1, 0, INS_OPTS_8B);
theEmitter->emitIns_R_R_I(INS_sli, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
- theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V4, REG_V5, 8, INS_OPTS_4H);
theEmitter->emitIns_R_R_I(INS_sli, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
- theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sli, EA_8BYTE, REG_V8, REG_V9, 16, INS_OPTS_2S);
theEmitter->emitIns_R_R_I(INS_sli, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
- theEmitter->emitIns_R_R_I(INS_sli, EA_16BYTE, REG_V12, REG_V13, 33, INS_OPTS_2D);
+ theEmitter->emitIns_R_R_I(INS_sli, EA_16BYTE, REG_V12, REG_V13, 32, INS_OPTS_2D);
theEmitter->emitIns_R_R_I(INS_sli, EA_16BYTE, REG_V14, REG_V15, 63, INS_OPTS_2D);
- // 'sshll' vector
+ // sshll{2} vector
theEmitter->emitIns_R_R_I(INS_sshll, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
theEmitter->emitIns_R_R_I(INS_sshll2, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_sshll, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
@@ -8258,7 +8218,7 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R_I(INS_sshll, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
theEmitter->emitIns_R_R_I(INS_sshll2, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
- // 'ushll' vector
+ // ushll{2} vector
theEmitter->emitIns_R_R_I(INS_ushll, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
theEmitter->emitIns_R_R_I(INS_ushll2, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_ushll, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
@@ -8266,23 +8226,23 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R_I(INS_ushll, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
theEmitter->emitIns_R_R_I(INS_ushll2, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
- // 'shrn' vector
+ // shrn{2} vector
theEmitter->emitIns_R_R_I(INS_shrn, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_shrn2, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_shrn2, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_shrn, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_shrn2, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_shrn2, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_shrn, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_shrn2, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_shrn2, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
- // 'rshrn' vector
+ // rshrn{2} vector
theEmitter->emitIns_R_R_I(INS_rshrn, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
- theEmitter->emitIns_R_R_I(INS_rshrn2, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_rshrn2, EA_16BYTE, REG_V2, REG_V3, 8, INS_OPTS_16B);
theEmitter->emitIns_R_R_I(INS_rshrn, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
- theEmitter->emitIns_R_R_I(INS_rshrn2, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_rshrn2, EA_16BYTE, REG_V6, REG_V7, 16, INS_OPTS_8H);
theEmitter->emitIns_R_R_I(INS_rshrn, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
- theEmitter->emitIns_R_R_I(INS_rshrn2, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_rshrn2, EA_16BYTE, REG_V10, REG_V11, 32, INS_OPTS_4S);
- // 'sxtl' vector
+ // sxtl{2} vector
theEmitter->emitIns_R_R(INS_sxtl, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_8B);
theEmitter->emitIns_R_R(INS_sxtl2, EA_16BYTE, REG_V2, REG_V3, INS_OPTS_16B);
theEmitter->emitIns_R_R(INS_sxtl, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_4H);
@@ -8290,7 +8250,7 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R(INS_sxtl, EA_8BYTE, REG_V8, REG_V9, INS_OPTS_2S);
theEmitter->emitIns_R_R(INS_sxtl2, EA_16BYTE, REG_V10, REG_V11, INS_OPTS_4S);
- // 'uxtl' vector
+ // uxtl{2} vector
theEmitter->emitIns_R_R(INS_uxtl, EA_8BYTE, REG_V0, REG_V1, INS_OPTS_8B);
theEmitter->emitIns_R_R(INS_uxtl2, EA_16BYTE, REG_V2, REG_V3, INS_OPTS_16B);
theEmitter->emitIns_R_R(INS_uxtl, EA_8BYTE, REG_V4, REG_V5, INS_OPTS_4H);
@@ -8298,6 +8258,195 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R(INS_uxtl, EA_8BYTE, REG_V8, REG_V9, INS_OPTS_2S);
theEmitter->emitIns_R_R(INS_uxtl2, EA_16BYTE, REG_V10, REG_V11, INS_OPTS_4S);
+ // sqrshrn scalar
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_1BYTE, REG_V0, REG_V1, 1, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_1BYTE, REG_V2, REG_V3, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_2BYTE, REG_V4, REG_V5, 9, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_2BYTE, REG_V6, REG_V7, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_4BYTE, REG_V8, REG_V9, 17, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_4BYTE, REG_V10, REG_V11, 32, INS_OPTS_NONE);
+
+ // sqrshrn{2} vector
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_8BYTE, REG_V2, REG_V3, 8, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn2, EA_16BYTE, REG_V4, REG_V5, 1, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn2, EA_16BYTE, REG_V6, REG_V7, 8, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_8BYTE, REG_V8, REG_V9, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_8BYTE, REG_V10, REG_V11, 16, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn2, EA_16BYTE, REG_V12, REG_V13, 9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn2, EA_16BYTE, REG_V14, REG_V15, 16, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_8BYTE, REG_V16, REG_V17, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn, EA_8BYTE, REG_V18, REG_V18, 32, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn2, EA_16BYTE, REG_V20, REG_V21, 17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sqrshrn2, EA_16BYTE, REG_V22, REG_V23, 32, INS_OPTS_4S);
+
+ // sqrshrun scalar
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_1BYTE, REG_V0, REG_V1, 1, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_1BYTE, REG_V0, REG_V1, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_2BYTE, REG_V2, REG_V3, 9, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_2BYTE, REG_V2, REG_V3, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_4BYTE, REG_V4, REG_V5, 17, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_4BYTE, REG_V4, REG_V5, 32, INS_OPTS_NONE);
+
+ // sqrshrun{2} vector
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_8BYTE, REG_V2, REG_V3, 8, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun2, EA_16BYTE, REG_V4, REG_V5, 1, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun2, EA_16BYTE, REG_V6, REG_V7, 8, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_8BYTE, REG_V8, REG_V9, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_8BYTE, REG_V10, REG_V11, 16, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun2, EA_16BYTE, REG_V12, REG_V13, 9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun2, EA_16BYTE, REG_V14, REG_V15, 16, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_8BYTE, REG_V16, REG_V17, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun, EA_8BYTE, REG_V18, REG_V18, 32, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun2, EA_16BYTE, REG_V20, REG_V21, 17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sqrshrun2, EA_16BYTE, REG_V22, REG_V23, 32, INS_OPTS_4S);
+
+ // sqshl scalar
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_1BYTE, REG_V0, REG_V1, 0, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_1BYTE, REG_V2, REG_V3, 7, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_2BYTE, REG_V4, REG_V5, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_2BYTE, REG_V6, REG_V7, 15, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_4BYTE, REG_V8, REG_V9, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_4BYTE, REG_V10, REG_V11, 31, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_8BYTE, REG_V12, REG_V13, 32, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_8BYTE, REG_V14, REG_V15, 63, INS_OPTS_NONE);
+
+ // sqshl vector
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sqshl, EA_16BYTE, REG_V12, REG_V13, 63, INS_OPTS_2D);
+
+ // sqshlu scalar
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_1BYTE, REG_V0, REG_V1, 0, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_1BYTE, REG_V2, REG_V3, 7, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_2BYTE, REG_V4, REG_V5, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_2BYTE, REG_V6, REG_V7, 15, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_4BYTE, REG_V8, REG_V9, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_4BYTE, REG_V10, REG_V11, 31, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_8BYTE, REG_V12, REG_V13, 32, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_8BYTE, REG_V14, REG_V15, 63, INS_OPTS_NONE);
+
+ // sqshlu vector
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sqshlu, EA_16BYTE, REG_V12, REG_V13, 63, INS_OPTS_2D);
+
+ // sqshrn scalar
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_1BYTE, REG_V0, REG_V1, 1, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_1BYTE, REG_V2, REG_V3, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_2BYTE, REG_V4, REG_V5, 9, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_2BYTE, REG_V6, REG_V7, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_4BYTE, REG_V8, REG_V9, 17, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_4BYTE, REG_V10, REG_V11, 32, INS_OPTS_NONE);
+
+ // sqshrn{2} vector
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_8BYTE, REG_V2, REG_V3, 8, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqshrn2, EA_16BYTE, REG_V4, REG_V5, 1, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqshrn2, EA_16BYTE, REG_V6, REG_V7, 8, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_8BYTE, REG_V8, REG_V9, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_8BYTE, REG_V10, REG_V11, 16, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqshrn2, EA_16BYTE, REG_V12, REG_V13, 9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqshrn2, EA_16BYTE, REG_V14, REG_V15, 16, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_8BYTE, REG_V16, REG_V17, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqshrn, EA_8BYTE, REG_V18, REG_V18, 32, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqshrn2, EA_16BYTE, REG_V20, REG_V21, 17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sqshrn2, EA_16BYTE, REG_V22, REG_V23, 32, INS_OPTS_4S);
+
+ // sqshrun scalar
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_1BYTE, REG_V0, REG_V1, 1, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_1BYTE, REG_V2, REG_V3, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_2BYTE, REG_V4, REG_V5, 9, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_2BYTE, REG_V6, REG_V7, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_4BYTE, REG_V8, REG_V9, 17, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_4BYTE, REG_V10, REG_V11, 32, INS_OPTS_NONE);
+
+ // sqshrun{2} vector
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_8BYTE, REG_V2, REG_V3, 8, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_sqshrun2, EA_16BYTE, REG_V4, REG_V5, 1, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqshrun2, EA_16BYTE, REG_V6, REG_V7, 8, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_8BYTE, REG_V8, REG_V9, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_8BYTE, REG_V10, REG_V11, 16, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_sqshrun2, EA_16BYTE, REG_V12, REG_V13, 9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqshrun2, EA_16BYTE, REG_V14, REG_V15, 16, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_8BYTE, REG_V16, REG_V17, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqshrun, EA_8BYTE, REG_V18, REG_V18, 32, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_sqshrun2, EA_16BYTE, REG_V20, REG_V21, 17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_sqshrun2, EA_16BYTE, REG_V22, REG_V23, 32, INS_OPTS_4S);
+
+ // uqrshrn scalar
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_1BYTE, REG_V0, REG_V1, 1, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_1BYTE, REG_V2, REG_V3, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_2BYTE, REG_V4, REG_V5, 9, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_2BYTE, REG_V6, REG_V7, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_4BYTE, REG_V8, REG_V9, 17, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_4BYTE, REG_V10, REG_V11, 32, INS_OPTS_NONE);
+
+ // uqrshrn{2} vector
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_8BYTE, REG_V2, REG_V3, 8, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn2, EA_16BYTE, REG_V4, REG_V5, 1, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn2, EA_16BYTE, REG_V6, REG_V7, 8, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_8BYTE, REG_V8, REG_V9, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_8BYTE, REG_V10, REG_V11, 16, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn2, EA_16BYTE, REG_V12, REG_V13, 9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn2, EA_16BYTE, REG_V14, REG_V15, 16, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_8BYTE, REG_V16, REG_V17, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn, EA_8BYTE, REG_V18, REG_V18, 32, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn2, EA_16BYTE, REG_V20, REG_V21, 17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_uqrshrn2, EA_16BYTE, REG_V22, REG_V23, 32, INS_OPTS_4S);
+
+ // uqshl scalar
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_1BYTE, REG_V0, REG_V1, 0, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_1BYTE, REG_V2, REG_V3, 7, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_2BYTE, REG_V4, REG_V5, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_2BYTE, REG_V6, REG_V7, 15, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_4BYTE, REG_V8, REG_V9, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_4BYTE, REG_V10, REG_V11, 31, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_8BYTE, REG_V12, REG_V13, 32, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_8BYTE, REG_V14, REG_V15, 63, INS_OPTS_NONE);
+
+ // uqshl vector
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_16BYTE, REG_V2, REG_V3, 7, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_8BYTE, REG_V4, REG_V5, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_16BYTE, REG_V6, REG_V7, 15, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_8BYTE, REG_V8, REG_V9, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_16BYTE, REG_V10, REG_V11, 31, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_uqshl, EA_16BYTE, REG_V12, REG_V13, 63, INS_OPTS_2D);
+
+ // uqshrn scalar
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_1BYTE, REG_V0, REG_V1, 1, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_1BYTE, REG_V2, REG_V3, 8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_2BYTE, REG_V4, REG_V5, 9, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_2BYTE, REG_V6, REG_V7, 16, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_4BYTE, REG_V8, REG_V9, 17, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_4BYTE, REG_V10, REG_V11, 32, INS_OPTS_NONE);
+
+ // uqshrn{2} vector
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_8BYTE, REG_V0, REG_V1, 1, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_8BYTE, REG_V2, REG_V3, 8, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_I(INS_uqshrn2, EA_16BYTE, REG_V4, REG_V5, 1, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_uqshrn2, EA_16BYTE, REG_V6, REG_V7, 8, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_8BYTE, REG_V8, REG_V9, 9, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_8BYTE, REG_V10, REG_V11, 16, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_I(INS_uqshrn2, EA_16BYTE, REG_V12, REG_V13, 9, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_uqshrn2, EA_16BYTE, REG_V14, REG_V15, 16, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_8BYTE, REG_V16, REG_V17, 17, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_uqshrn, EA_8BYTE, REG_V18, REG_V18, 32, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_I(INS_uqshrn2, EA_16BYTE, REG_V20, REG_V21, 17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_I(INS_uqshrn2, EA_16BYTE, REG_V22, REG_V23, 32, INS_OPTS_4S);
+
#endif // ALL_ARM64_EMITTER_UNIT_TESTS
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
@@ -8610,6 +8759,380 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R_R(INS_zip2, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
#endif // ALL_ARM64_EMITTER_UNIT_TESTS
+#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
+ // srshl scalar
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+
+ // srshl vector
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_16BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_8BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_srshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // sshl scalar
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+
+ // sshl vector
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_16BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_8BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_sshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // urshl scalar
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+
+ // urshl vector
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_16BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_8BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_urshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // ushl scalar
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+
+ // ushl vector
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_16BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_8BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_ushl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // addhn vector
+ theEmitter->emitIns_R_R_R(INS_addhn, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_addhn, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_addhn, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // addhn2 vector
+ theEmitter->emitIns_R_R_R(INS_addhn2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_addhn2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_addhn2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // raddhn vector
+ theEmitter->emitIns_R_R_R(INS_raddhn, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_raddhn, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_raddhn, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // raddhn2 vector
+ theEmitter->emitIns_R_R_R(INS_raddhn2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_raddhn2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_raddhn2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // rsubhn vector
+ theEmitter->emitIns_R_R_R(INS_rsubhn, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_rsubhn, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_rsubhn, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // rsubhn2 vector
+ theEmitter->emitIns_R_R_R(INS_rsubhn2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_rsubhn2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_rsubhn2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // sabal vector
+ theEmitter->emitIns_R_R_R(INS_sabal, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sabal, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sabal, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // sabal2 vector
+ theEmitter->emitIns_R_R_R(INS_sabal2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sabal2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sabal2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // sabdl vector
+ theEmitter->emitIns_R_R_R(INS_sabdl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sabdl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sabdl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // sabdl2 vector
+ theEmitter->emitIns_R_R_R(INS_sabdl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sabdl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sabdl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // saddl vector
+ theEmitter->emitIns_R_R_R(INS_saddl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_saddl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_saddl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // saddl2 vector
+ theEmitter->emitIns_R_R_R(INS_saddl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_saddl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_saddl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // saddw vector
+ theEmitter->emitIns_R_R_R(INS_saddw, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_saddw, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_saddw, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // saddw2 vector
+ theEmitter->emitIns_R_R_R(INS_saddw2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_saddw2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_saddw2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // shadd vector
+ theEmitter->emitIns_R_R_R(INS_shadd, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_shadd, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_shadd, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_shadd, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_shadd, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_shadd, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // shsub vector
+ theEmitter->emitIns_R_R_R(INS_shsub, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_shsub, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_shsub, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_shsub, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_shsub, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_shsub, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // sqadd scalar
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // sqadd vector
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sqadd, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // sqrshl scalar
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // sqrshl vector
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_sqrshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // sqshl scalar
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // sqshl vector
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_sqshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // sqsub scalar
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // sqsub vector
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_sqsub, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // srhadd vector
+ theEmitter->emitIns_R_R_R(INS_srhadd, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_srhadd, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_srhadd, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_srhadd, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_srhadd, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_srhadd, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // ssubl vector
+ theEmitter->emitIns_R_R_R(INS_ssubl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_ssubl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_ssubl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // ssubl2 vector
+ theEmitter->emitIns_R_R_R(INS_ssubl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_ssubl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_ssubl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // ssubw vector
+ theEmitter->emitIns_R_R_R(INS_ssubw, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_ssubw, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_ssubw, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // ssubw2 vector
+ theEmitter->emitIns_R_R_R(INS_ssubw2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_ssubw2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_ssubw2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // subhn vector
+ theEmitter->emitIns_R_R_R(INS_subhn, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_subhn, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_subhn, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // subhn2 vector
+ theEmitter->emitIns_R_R_R(INS_subhn2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_subhn2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_subhn2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uabal vector
+ theEmitter->emitIns_R_R_R(INS_uabal, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uabal, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uabal, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // uabal2 vector
+ theEmitter->emitIns_R_R_R(INS_uabal2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uabal2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uabal2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uabdl vector
+ theEmitter->emitIns_R_R_R(INS_uabdl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uabdl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uabdl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // uabdl2 vector
+ theEmitter->emitIns_R_R_R(INS_uabdl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uabdl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uabdl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uaddl vector
+ theEmitter->emitIns_R_R_R(INS_uaddl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uaddl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uaddl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // uaddl2 vector
+ theEmitter->emitIns_R_R_R(INS_uaddl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uaddl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uaddl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uaddw vector
+ theEmitter->emitIns_R_R_R(INS_uaddw, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uaddw, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uaddw, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // uaddw2 vector
+ theEmitter->emitIns_R_R_R(INS_uaddw2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uaddw2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uaddw2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uhadd vector
+ theEmitter->emitIns_R_R_R(INS_uhadd, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uhadd, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uhadd, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_uhadd, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uhadd, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uhadd, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uhsub vector
+ theEmitter->emitIns_R_R_R(INS_uhsub, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uhsub, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uhsub, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_uhsub, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uhsub, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uhsub, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uqadd scalar
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // uqadd vector
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uqadd, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // uqrshl scalar
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // uqrshl vector
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_uqrshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // uqshl scalar
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // uqshl vector
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+ theEmitter->emitIns_R_R_R(INS_uqshl, EA_16BYTE, REG_V18, REG_V19, REG_V20, INS_OPTS_2D);
+
+ // uqsub scalar
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_1BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_2BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_4BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_NONE);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_8BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_NONE);
+
+ // uqsub vector
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_uqsub, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // urhadd vector
+ theEmitter->emitIns_R_R_R(INS_urhadd, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_urhadd, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_urhadd, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+ theEmitter->emitIns_R_R_R(INS_urhadd, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_urhadd, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_urhadd, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // usubl vector
+ theEmitter->emitIns_R_R_R(INS_usubl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_usubl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_usubl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // usubl2 vector
+ theEmitter->emitIns_R_R_R(INS_usubl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_usubl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_usubl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // usubw vector
+ theEmitter->emitIns_R_R_R(INS_usubw, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_usubw, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_usubw, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // usubw2 vector
+ theEmitter->emitIns_R_R_R(INS_usubw2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_usubw2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_usubw2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+#endif // ALL_ARM64_EMITTER_UNIT_TESTS
+
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
//
// R_R_R vector multiply
@@ -8668,7 +9191,112 @@ void CodeGen::genArm64EmitterUnitTests()
theEmitter->emitIns_R_R_R_I(INS_mls, EA_16BYTE, REG_V18, REG_V19, REG_V3, 0, INS_OPTS_8H);
theEmitter->emitIns_R_R_R_I(INS_mls, EA_16BYTE, REG_V20, REG_V21, REG_V4, 3, INS_OPTS_8H);
theEmitter->emitIns_R_R_R_I(INS_mls, EA_16BYTE, REG_V22, REG_V23, REG_V5, 7, INS_OPTS_8H);
+#endif // ALL_ARM64_EMITTER_UNIT_TESTS
+#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
+ // pmull vector
+ theEmitter->emitIns_R_R_R(INS_pmull, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_pmull, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_1D);
+
+ // pmull2 vector
+ theEmitter->emitIns_R_R_R(INS_pmull2, EA_16BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_pmull2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_2D);
+
+ // smlal vector
+ theEmitter->emitIns_R_R_R(INS_smlal, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_smlal, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_smlal, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // smlal2 vector
+ theEmitter->emitIns_R_R_R(INS_smlal2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_smlal2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_smlal2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // smlsl vector
+ theEmitter->emitIns_R_R_R(INS_smlsl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_smlsl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_smlsl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // smlsl2 vector
+ theEmitter->emitIns_R_R_R(INS_smlsl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_smlsl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_smlsl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // smull vector
+ theEmitter->emitIns_R_R_R(INS_smull, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_smull, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_smull, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // smull2 vector
+ theEmitter->emitIns_R_R_R(INS_smull2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_smull2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_smull2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // umlal vector
+ theEmitter->emitIns_R_R_R(INS_umlal, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_umlal, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_umlal, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // umlal2 vector
+ theEmitter->emitIns_R_R_R(INS_umlal2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_umlal2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_umlal2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // umlsl vector
+ theEmitter->emitIns_R_R_R(INS_umlsl, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_umlsl, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_umlsl, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // umlsl2 vector
+ theEmitter->emitIns_R_R_R(INS_umlsl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_umlsl2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_umlsl2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // umull vector
+ theEmitter->emitIns_R_R_R(INS_umull, EA_8BYTE, REG_V0, REG_V1, REG_V2, INS_OPTS_8B);
+ theEmitter->emitIns_R_R_R(INS_umull, EA_8BYTE, REG_V3, REG_V4, REG_V5, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R(INS_umull, EA_8BYTE, REG_V6, REG_V7, REG_V8, INS_OPTS_2S);
+
+ // umull2 vector
+ theEmitter->emitIns_R_R_R(INS_umull2, EA_16BYTE, REG_V9, REG_V10, REG_V11, INS_OPTS_16B);
+ theEmitter->emitIns_R_R_R(INS_umull2, EA_16BYTE, REG_V12, REG_V13, REG_V14, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R(INS_umull2, EA_16BYTE, REG_V15, REG_V16, REG_V17, INS_OPTS_4S);
+
+ // smlal vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_smlal, EA_8BYTE, REG_V0, REG_V1, REG_V2, 3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R_I(INS_smlal, EA_8BYTE, REG_V3, REG_V4, REG_V5, 1, INS_OPTS_2S);
+
+ // smlal2 vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_smlal2, EA_16BYTE, REG_V6, REG_V7, REG_V8, 7, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R_I(INS_smlal2, EA_16BYTE, REG_V9, REG_V10, REG_V11, 3, INS_OPTS_4S);
+
+ // smlsl vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_smlsl, EA_8BYTE, REG_V0, REG_V1, REG_V2, 3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R_I(INS_smlsl, EA_8BYTE, REG_V3, REG_V4, REG_V5, 1, INS_OPTS_2S);
+
+ // smlsl2 vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_smlsl2, EA_16BYTE, REG_V6, REG_V7, REG_V8, 7, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R_I(INS_smlsl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, 3, INS_OPTS_4S);
+
+ // smull vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_smull, EA_8BYTE, REG_V0, REG_V1, REG_V2, 3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R_I(INS_smull, EA_8BYTE, REG_V3, REG_V4, REG_V5, 1, INS_OPTS_2S);
+
+ // smull2 vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_smull2, EA_16BYTE, REG_V6, REG_V7, REG_V8, 7, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R_I(INS_smull2, EA_16BYTE, REG_V9, REG_V10, REG_V11, 3, INS_OPTS_4S);
+
+ // umlsl2 vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_umlsl2, EA_16BYTE, REG_V6, REG_V7, REG_V8, 7, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R_I(INS_umlsl2, EA_16BYTE, REG_V9, REG_V10, REG_V11, 3, INS_OPTS_4S);
+
+ // umull vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_umull, EA_8BYTE, REG_V0, REG_V1, REG_V2, 3, INS_OPTS_4H);
+ theEmitter->emitIns_R_R_R_I(INS_umull, EA_8BYTE, REG_V3, REG_V4, REG_V5, 1, INS_OPTS_2S);
+
+ // umull2 vector, by element
+ theEmitter->emitIns_R_R_R_I(INS_umull2, EA_16BYTE, REG_V6, REG_V7, REG_V8, 7, INS_OPTS_8H);
+ theEmitter->emitIns_R_R_R_I(INS_umull2, EA_16BYTE, REG_V9, REG_V10, REG_V11, 3, INS_OPTS_4S);
#endif // ALL_ARM64_EMITTER_UNIT_TESTS
#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
@@ -8729,7 +9357,9 @@ void CodeGen::genArm64EmitterUnitTests()
#endif // ALL_ARM64_EMITTER_UNIT_TESTS
+#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
printf("*************** End of genArm64EmitterUnitTests()\n");
+#endif // ALL_ARM64_EMITTER_UNIT_TESTS
}
#endif // defined(DEBUG)
@@ -8747,16 +9377,19 @@ void CodeGen::genArm64EmitterUnitTests()
// on Windows as well just to be consistent, even though it should not be necessary.
//
// Arguments:
-// frameSize - the size of the stack frame being allocated.
-// initReg - register to use as a scratch register.
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed is set to 'false' if and only if
-// this call sets 'initReg' to a non-zero value.
-// maskArgRegsLiveIn - incoming argument registers that are currently live.
+// frameSize - the size of the stack frame being allocated.
+// initReg - register to use as a scratch register.
+// pInitRegModified - OUT parameter. *pInitRegModified is set to 'true' if and only if
+// this call sets 'initReg' to a non-zero value.
+// maskArgRegsLiveIn - incoming argument registers that are currently live.
//
// Return value:
// None
//
-void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegZeroed, regMaskTP maskArgRegsLiveIn)
+void CodeGen::genAllocLclFrame(unsigned frameSize,
+ regNumber initReg,
+ bool* pInitRegModified,
+ regMaskTP maskArgRegsLiveIn)
{
assert(compiler->compGeneratingProlog);
@@ -8793,7 +9426,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
instGen_Set_Reg_To_Imm(EA_PTRSIZE, initReg, -(ssize_t)probeOffset);
GetEmitter()->emitIns_R_R_R(INS_ldr, EA_4BYTE, REG_ZR, REG_SPBASE, initReg);
regSet.verifyRegUsed(initReg);
- *pInitRegZeroed = false; // The initReg does not contain zero
+ *pInitRegModified = true;
lastTouchDelta -= pageSize;
}
@@ -8853,7 +9486,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
GetEmitter()->emitIns_R_R(INS_cmp, EA_PTRSIZE, rLimit, rOffset); // If equal, we need to probe again
GetEmitter()->emitIns_J(INS_bls, NULL, -4);
- *pInitRegZeroed = false; // The initReg does not contain zero
+ *pInitRegModified = true;
compiler->unwindPadding();
@@ -8868,7 +9501,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
compiler->unwindPadding();
regSet.verifyRegUsed(initReg);
- *pInitRegZeroed = false; // The initReg does not contain zero
+ *pInitRegModified = true;
}
}
diff --git a/src/coreclr/src/jit/codegenarmarch.cpp b/src/coreclr/src/jit/codegenarmarch.cpp
index 96deb2f791b2f3..9ca28936f24bf9 100644
--- a/src/coreclr/src/jit/codegenarmarch.cpp
+++ b/src/coreclr/src/jit/codegenarmarch.cpp
@@ -189,6 +189,13 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
genCodeForNegNot(treeNode);
break;
+#if defined(TARGET_ARM64)
+ case GT_BSWAP:
+ case GT_BSWAP16:
+ genCodeForBswap(treeNode);
+ break;
+#endif // defined(TARGET_ARM64)
+
case GT_MOD:
case GT_UMOD:
case GT_DIV:
@@ -391,8 +398,13 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
break;
case GT_MEMORYBARRIER:
- instGen_MemoryBarrier();
+ {
+ CodeGen::BarrierKind barrierKind =
+ treeNode->gtFlags & GTF_MEMORYBARRIER_LOAD ? BARRIER_LOAD_ONLY : BARRIER_FULL;
+
+ instGen_MemoryBarrier(barrierKind);
break;
+ }
#ifdef TARGET_ARM64
case GT_XCHG:
@@ -468,7 +480,11 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
case GT_LABEL:
genPendingCallLabel = genCreateTempLabel();
+#if defined(TARGET_ARM)
+ genMov32RelocatableDisplacement(genPendingCallLabel, targetReg);
+#else
emit->emitIns_R_L(INS_adr, EA_PTRSIZE, genPendingCallLabel, targetReg);
+#endif
break;
case GT_STORE_OBJ:
@@ -546,14 +562,14 @@ void CodeGen::genSetRegToIcon(regNumber reg, ssize_t val, var_types type, insFla
// genSetGSSecurityCookie: Set the "GS" security cookie in the prolog.
//
// Arguments:
-// initReg - register to use as a scratch register
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed is set to 'false' if and only if
-// this call sets 'initReg' to a non-zero value.
+// initReg - register to use as a scratch register
+// pInitRegModified - OUT parameter. *pInitRegModified is set to 'true' if and only if
+// this call sets 'initReg' to a non-zero value.
//
// Return Value:
// None
//
-void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -577,7 +593,7 @@ void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed)
GetEmitter()->emitIns_S_R(INS_str, EA_PTRSIZE, initReg, compiler->lvaGSSecurityCookie, 0);
}
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
//---------------------------------------------------------------------
@@ -1339,7 +1355,7 @@ void CodeGen::genPutArgSplit(GenTreePutArgSplit* treeNode)
#endif // FEATURE_ARG_SPLIT
//----------------------------------------------------------------------------------
-// genMultiRegCallStoreToLocal: store multi-reg return value of a call node to a local
+// genMultiRegStoreToLocal: store multi-reg return value of a call node to a local
//
// Arguments:
// treeNode - Gentree of GT_STORE_LCL_VAR
@@ -1348,42 +1364,35 @@ void CodeGen::genPutArgSplit(GenTreePutArgSplit* treeNode)
// None
//
// Assumption:
-// The child of store is a multi-reg call node.
-// genProduceReg() on treeNode is made by caller of this routine.
+// The child of store is a multi-reg node.
//
-void CodeGen::genMultiRegCallStoreToLocal(GenTree* treeNode)
+void CodeGen::genMultiRegStoreToLocal(GenTree* treeNode)
{
assert(treeNode->OperGet() == GT_STORE_LCL_VAR);
-
-#if defined(TARGET_ARM)
- // Longs are returned in two return registers on Arm32.
- // Structs are returned in four registers on ARM32 and HFAs.
- assert(varTypeIsLong(treeNode) || varTypeIsStruct(treeNode));
-#elif defined(TARGET_ARM64)
- // Structs of size >=9 and <=16 are returned in two return registers on ARM64 and HFAs.
- assert(varTypeIsStruct(treeNode));
-#endif // TARGET*
+ assert(varTypeIsStruct(treeNode) || varTypeIsMultiReg(treeNode));
+ GenTree* op1 = treeNode->gtGetOp1();
+ GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
+ assert(op1->IsMultiRegNode());
+ unsigned regCount = actualOp1->GetMultiRegCount();
// Assumption: current implementation requires that a multi-reg
// var in 'var = call' is flagged as lvIsMultiRegRet to prevent it from
// being promoted.
unsigned lclNum = treeNode->AsLclVarCommon()->GetLclNum();
- LclVarDsc* varDsc = &(compiler->lvaTable[lclNum]);
- noway_assert(varDsc->lvIsMultiRegRet);
-
- GenTree* op1 = treeNode->gtGetOp1();
- GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
- GenTreeCall* call = actualOp1->AsCall();
- assert(call->HasMultiRegRetVal());
+ LclVarDsc* varDsc = compiler->lvaGetDesc(lclNum);
+ if (op1->OperIs(GT_CALL))
+ {
+ assert(regCount <= MAX_RET_REG_COUNT);
+ noway_assert(varDsc->lvIsMultiRegRet);
+ }
genConsumeRegs(op1);
- ReturnTypeDesc* pRetTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = pRetTypeDesc->GetReturnRegCount();
+ int offset = 0;
- if (treeNode->GetRegNum() != REG_NA)
+ // Check for the case of an enregistered SIMD type that's returned in multiple registers.
+ if (varDsc->lvIsRegCandidate() && treeNode->GetRegNum() != REG_NA)
{
- // Right now the only enregistrable multi-reg return types supported are SIMD types.
assert(varTypeIsSIMD(treeNode));
assert(regCount != 0);
@@ -1393,8 +1402,8 @@ void CodeGen::genMultiRegCallStoreToLocal(GenTree* treeNode)
// Insert pieces in reverse order
for (int i = regCount - 1; i >= 0; --i)
{
- var_types type = pRetTypeDesc->GetReturnRegType(i);
- regNumber reg = call->GetRegNumByIdx(i);
+ var_types type = op1->gtSkipReloadOrCopy()->GetRegTypeByIndex(i);
+ regNumber reg = op1->GetRegByIndex(i);
if (op1->IsCopyOrReload())
{
// GT_COPY/GT_RELOAD will have valid reg for those positions
@@ -1433,21 +1442,16 @@ void CodeGen::genMultiRegCallStoreToLocal(GenTree* treeNode)
}
else
{
- // Stack store
- int offset = 0;
for (unsigned i = 0; i < regCount; ++i)
{
- var_types type = pRetTypeDesc->GetReturnRegType(i);
- regNumber reg = call->GetRegNumByIdx(i);
- if (op1->IsCopyOrReload())
+ var_types type = actualOp1->GetRegTypeByIndex(i);
+ regNumber reg = op1->GetRegByIndex(i);
+ if (reg == REG_NA)
{
- // GT_COPY/GT_RELOAD will have valid reg for those positions
+ // GT_COPY/GT_RELOAD will have valid reg only for those positions
// that need to be copied or reloaded.
- regNumber reloadReg = op1->AsCopyOrReload()->GetRegNumByIdx(i);
- if (reloadReg != REG_NA)
- {
- reg = reloadReg;
- }
+ assert(op1->IsCopyOrReload());
+ reg = actualOp1->GetRegByIndex(i);
}
assert(reg != REG_NA);
@@ -1455,7 +1459,7 @@ void CodeGen::genMultiRegCallStoreToLocal(GenTree* treeNode)
offset += genTypeSize(type);
}
- // Updating variable liveness after instruction was emitted
+ // Update variable liveness.
genUpdateLife(treeNode);
varDsc->SetRegNum(REG_STK);
}
@@ -1775,12 +1779,40 @@ void CodeGen::genCodeForLclFld(GenTreeLclFld* tree)
NYI_IF(targetType == TYP_STRUCT, "GT_LCL_FLD: struct load local field not supported");
assert(targetReg != REG_NA);
- emitAttr size = emitTypeSize(targetType);
unsigned offs = tree->GetLclOffs();
unsigned varNum = tree->GetLclNum();
assert(varNum < compiler->lvaCount);
- emit->emitIns_R_S(ins_Load(targetType), emitActualTypeSize(targetType), targetReg, varNum, offs);
+#ifdef TARGET_ARM
+ if (tree->IsOffsetMisaligned())
+ {
+ // Arm supports unaligned access only for integer types,
+ // load the floating data as 1 or 2 integer registers and convert them to float.
+ regNumber addr = tree->ExtractTempReg();
+ emit->emitIns_R_S(INS_lea, EA_PTRSIZE, addr, varNum, offs);
+
+ if (targetType == TYP_FLOAT)
+ {
+ regNumber floatAsInt = tree->GetSingleTempReg();
+ emit->emitIns_R_R(INS_ldr, EA_4BYTE, floatAsInt, addr);
+ emit->emitIns_R_R(INS_vmov_i2f, EA_4BYTE, targetReg, floatAsInt);
+ }
+ else
+ {
+ regNumber halfdoubleAsInt1 = tree->ExtractTempReg();
+ regNumber halfdoubleAsInt2 = tree->GetSingleTempReg();
+ emit->emitIns_R_R_I(INS_ldr, EA_4BYTE, halfdoubleAsInt1, addr, 0);
+ emit->emitIns_R_R_I(INS_ldr, EA_4BYTE, halfdoubleAsInt2, addr, 4);
+ emit->emitIns_R_R_R(INS_vmov_i2d, EA_8BYTE, targetReg, halfdoubleAsInt1, halfdoubleAsInt2);
+ }
+ }
+ else
+#endif // TARGET_ARM
+ {
+ emitAttr attr = emitActualTypeSize(targetType);
+ instruction ins = ins_Load(targetType);
+ emit->emitIns_R_S(ins, attr, targetReg, varNum, offs);
+ }
genProduceReg(tree);
}
@@ -1905,11 +1937,9 @@ void CodeGen::genCodeForIndir(GenTreeIndir* tree)
if (emitBarrier)
{
-#ifdef TARGET_ARM64
- instGen_MemoryBarrier(INS_BARRIER_ISHLD);
-#else
- instGen_MemoryBarrier();
-#endif
+ // when INS_ldar* could not be used for a volatile load,
+ // we use an ordinary load followed by a load barrier.
+ instGen_MemoryBarrier(BARRIER_LOAD_ONLY);
}
genProduceReg(tree);
@@ -1941,13 +1971,8 @@ void CodeGen::genCodeForCpBlkHelper(GenTreeBlk* cpBlkNode)
if (cpBlkNode->gtFlags & GTF_BLK_VOLATILE)
{
-#ifdef TARGET_ARM64
- // issue a INS_BARRIER_ISHLD after a volatile CpBlk operation
- instGen_MemoryBarrier(INS_BARRIER_ISHLD);
-#else
- // issue a full memory barrier after a volatile CpBlk operation
- instGen_MemoryBarrier();
-#endif // TARGET_ARM64
+ // issue a load barrier after a volatile CpBlk operation
+ instGen_MemoryBarrier(BARRIER_LOAD_ONLY);
}
}
@@ -2168,6 +2193,7 @@ void CodeGen::genCodeForCpBlkUnroll(GenTreeBlk* node)
if (node->IsVolatile())
{
+ // issue a full memory barrier before a volatile CpBlk operation
instGen_MemoryBarrier();
}
@@ -2265,11 +2291,8 @@ void CodeGen::genCodeForCpBlkUnroll(GenTreeBlk* node)
if (node->IsVolatile())
{
-#ifdef TARGET_ARM64
- instGen_MemoryBarrier(INS_BARRIER_ISHLD);
-#else
- instGen_MemoryBarrier();
-#endif
+ // issue a load barrier after a volatile CpBlk operation
+ instGen_MemoryBarrier(BARRIER_LOAD_ONLY);
}
}
@@ -2298,132 +2321,6 @@ void CodeGen::genCodeForInitBlkHelper(GenTreeBlk* initBlkNode)
genEmitHelperCall(CORINFO_HELP_MEMSET, 0, EA_UNKNOWN);
}
-//------------------------------------------------------------------------
-// genRegCopy: Produce code for a GT_COPY node.
-//
-// Arguments:
-// tree - the GT_COPY node
-//
-// Notes:
-// This will copy the register(s) produced by this node's source, to
-// the register(s) allocated to this GT_COPY node.
-// It has some special handling for these cases:
-// - when the source and target registers are in different register files
-// (note that this is *not* a conversion).
-// - when the source is a lclVar whose home location is being moved to a new
-// register (rather than just being copied for temporary use).
-//
-void CodeGen::genRegCopy(GenTree* treeNode)
-{
- assert(treeNode->OperGet() == GT_COPY);
- GenTree* op1 = treeNode->AsOp()->gtOp1;
-
- regNumber sourceReg = genConsumeReg(op1);
-
- if (op1->IsMultiRegNode())
- {
- noway_assert(!op1->IsCopyOrReload());
- unsigned regCount = op1->GetMultiRegCount();
- for (unsigned i = 0; i < regCount; i++)
- {
- regNumber srcReg = op1->GetRegByIndex(i);
- regNumber tgtReg = treeNode->AsCopyOrReload()->GetRegNumByIdx(i);
- var_types regType = op1->GetRegTypeByIndex(i);
- inst_RV_RV(ins_Copy(regType), tgtReg, srcReg, regType);
- }
- }
- else
- {
- var_types targetType = treeNode->TypeGet();
- regNumber targetReg = treeNode->GetRegNum();
- assert(targetReg != REG_NA);
- assert(targetType != TYP_STRUCT);
-
- // Check whether this node and the node from which we're copying the value have the same
- // register type.
- // This can happen if (currently iff) we have a SIMD vector type that fits in an integer
- // register, in which case it is passed as an argument, or returned from a call,
- // in an integer register and must be copied if it's in a floating point register.
-
- bool srcFltReg = (varTypeIsFloating(op1) || varTypeIsSIMD(op1));
- bool tgtFltReg = (varTypeIsFloating(treeNode) || varTypeIsSIMD(treeNode));
- if (srcFltReg != tgtFltReg)
- {
-#ifdef TARGET_ARM64
- inst_RV_RV(INS_fmov, targetReg, sourceReg, targetType);
-#else // !TARGET_ARM64
- if (varTypeIsFloating(treeNode))
- {
- // GT_COPY from 'int' to 'float' currently can't happen. Maybe if ARM SIMD is implemented
- // it will happen, according to the comment above?
- NYI_ARM("genRegCopy from 'int' to 'float'");
- }
- else
- {
- assert(varTypeIsFloating(op1));
-
- if (op1->TypeGet() == TYP_FLOAT)
- {
- inst_RV_RV(INS_vmov_f2i, targetReg, genConsumeReg(op1), targetType);
- }
- else
- {
- regNumber otherReg = (regNumber)treeNode->AsCopyOrReload()->gtOtherRegs[0];
- assert(otherReg != REG_NA);
- inst_RV_RV_RV(INS_vmov_d2i, targetReg, otherReg, genConsumeReg(op1), EA_8BYTE);
- }
- }
-#endif // !TARGET_ARM64
- }
- else
- {
- inst_RV_RV(ins_Copy(targetType), targetReg, sourceReg, targetType);
- }
- }
-
- if (op1->IsLocal())
- {
- // The lclVar will never be a def.
- // If it is a last use, the lclVar will be killed by genConsumeReg(), as usual, and genProduceReg will
- // appropriately set the gcInfo for the copied value.
- // If not, there are two cases we need to handle:
- // - If this is a TEMPORARY copy (indicated by the GTF_VAR_DEATH flag) the variable
- // will remain live in its original register.
- // genProduceReg() will appropriately set the gcInfo for the copied value,
- // and genConsumeReg will reset it.
- // - Otherwise, we need to update register info for the lclVar.
-
- GenTreeLclVarCommon* lcl = op1->AsLclVarCommon();
- assert((lcl->gtFlags & GTF_VAR_DEF) == 0);
-
- if ((lcl->gtFlags & GTF_VAR_DEATH) == 0 && (treeNode->gtFlags & GTF_VAR_DEATH) == 0)
- {
- LclVarDsc* varDsc = &compiler->lvaTable[lcl->GetLclNum()];
-
- // If we didn't just spill it (in genConsumeReg, above), then update the register info
- if (varDsc->GetRegNum() != REG_STK)
- {
- // The old location is dying
- genUpdateRegLife(varDsc, /*isBorn*/ false, /*isDying*/ true DEBUGARG(op1));
-
- gcInfo.gcMarkRegSetNpt(genRegMask(op1->GetRegNum()));
-
- genUpdateVarReg(varDsc, treeNode);
-
-#ifdef USING_VARIABLE_LIVE_RANGE
- // Report the home change for this variable
- varLiveKeeper->siUpdateVariableLiveRange(varDsc, lcl->GetLclNum())
-#endif // USING_VARIABLE_LIVE_RANGE
-
- // The new location is going live
- genUpdateRegLife(varDsc, /*isBorn*/ true, /*isDying*/ false DEBUGARG(treeNode));
- }
- }
- }
-
- genProduceReg(treeNode);
-}
-
//------------------------------------------------------------------------
// genCallInstruction: Produce code for a GT_CALL node
//
@@ -2575,9 +2472,9 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
}
// Determine return value size(s).
- ReturnTypeDesc* pRetTypeDesc = call->GetReturnTypeDesc();
- emitAttr retSize = EA_PTRSIZE;
- emitAttr secondRetSize = EA_UNKNOWN;
+ const ReturnTypeDesc* pRetTypeDesc = call->GetReturnTypeDesc();
+ emitAttr retSize = EA_PTRSIZE;
+ emitAttr secondRetSize = EA_UNKNOWN;
if (call->HasMultiRegRetVal())
{
@@ -2623,6 +2520,27 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
INDEBUG_LDISASM_COMMA(sigInfo) nullptr, // addr
retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize), ilOffset, target->GetRegNum());
}
+ else if (call->IsR2ROrVirtualStubRelativeIndir())
+ {
+ // Generate a direct call to a non-virtual user defined or helper method
+ assert(callType == CT_HELPER || callType == CT_USER_FUNC);
+ assert(((call->IsR2RRelativeIndir()) && (call->gtEntryPoint.accessType == IAT_PVALUE)) ||
+ ((call->IsVirtualStubRelativeIndir()) && (call->gtEntryPoint.accessType == IAT_VALUE)));
+ assert(call->gtControlExpr == nullptr);
+ assert(!call->IsTailCall());
+
+ regNumber tmpReg = call->GetSingleTempReg();
+ GetEmitter()->emitIns_R_R(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), tmpReg, REG_R2R_INDIRECT_PARAM);
+
+ // We have now generated code for gtControlExpr evaluating it into `tmpReg`.
+ // We just need to emit "call tmpReg" in this case.
+ //
+ assert(genIsValidIntReg(tmpReg));
+
+ genEmitCall(emitter::EC_INDIR_R, methHnd,
+ INDEBUG_LDISASM_COMMA(sigInfo) nullptr, // addr
+ retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(secondRetSize), ilOffset, tmpReg);
+ }
else
{
// Generate a direct call to a non-virtual user defined or helper method
@@ -2692,7 +2610,6 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
// if it was a pinvoke we may have needed to get the address of a label
if (genPendingCallLabel)
{
- assert(call->IsUnmanaged());
genDefineInlineTempLabel(genPendingCallLabel);
genPendingCallLabel = nullptr;
}
@@ -3725,264 +3642,49 @@ void CodeGen::genLeaInstruction(GenTreeAddrMode* lea)
genProduceReg(lea);
}
+#ifdef FEATURE_SIMD
//------------------------------------------------------------------------
-// isStructReturn: Returns whether the 'treeNode' is returning a struct.
-//
-// Arguments:
-// treeNode - The tree node to evaluate whether is a struct return.
-//
-// Return Value:
-// Returns true if the 'treeNode" is a GT_RETURN node of type struct.
-// Otherwise returns false.
-//
-bool CodeGen::isStructReturn(GenTree* treeNode)
-{
- // This method could be called for 'treeNode' of GT_RET_FILT or GT_RETURN.
- // For the GT_RET_FILT, the return is always
- // a bool or a void, for the end of a finally block.
- noway_assert(treeNode->OperGet() == GT_RETURN || treeNode->OperGet() == GT_RETFILT);
- var_types returnType = treeNode->TypeGet();
-
-#ifdef TARGET_ARM64
- return varTypeIsStruct(returnType) && (compiler->info.compRetNativeType == TYP_STRUCT);
-#else
- return varTypeIsStruct(returnType);
-#endif
-}
-
-//------------------------------------------------------------------------
-// genStructReturn: Generates code for returning a struct.
+// genSIMDSplitReturn: Generates code for returning a fixed-size SIMD type that lives
+// in a single register, but is returned in multiple registers.
//
// Arguments:
-// treeNode - The GT_RETURN tree node.
-//
-// Return Value:
-// None
+// src - The source of the return
+// retTypeDesc - The return type descriptor.
//
-// Assumption:
-// op1 of GT_RETURN node is either GT_LCL_VAR or multi-reg GT_CALL
-void CodeGen::genStructReturn(GenTree* treeNode)
+void CodeGen::genSIMDSplitReturn(GenTree* src, ReturnTypeDesc* retTypeDesc)
{
- assert(treeNode->OperGet() == GT_RETURN);
- assert(isStructReturn(treeNode));
- GenTree* op1 = treeNode->gtGetOp1();
-
- if (op1->OperGet() == GT_LCL_VAR)
- {
- GenTreeLclVarCommon* lclVar = op1->AsLclVarCommon();
- LclVarDsc* varDsc = &(compiler->lvaTable[lclVar->GetLclNum()]);
- var_types lclType = genActualType(varDsc->TypeGet());
-
- assert(varTypeIsStruct(lclType));
- assert(varDsc->lvIsMultiRegRet);
-
- ReturnTypeDesc retTypeDesc;
- unsigned regCount;
-
- retTypeDesc.InitializeStructReturnType(compiler, varDsc->lvVerTypeInfo.GetClassHandle());
- regCount = retTypeDesc.GetReturnRegCount();
-
- assert(regCount >= 2);
-
- assert(varTypeIsSIMD(lclType) || op1->isContained());
-
- if (op1->isContained())
- {
- // Copy var on stack into ABI return registers
- // TODO: It could be optimized by reducing two float loading to one double
- int offset = 0;
- for (unsigned i = 0; i < regCount; ++i)
- {
- var_types type = retTypeDesc.GetReturnRegType(i);
- regNumber reg = retTypeDesc.GetABIReturnReg(i);
- GetEmitter()->emitIns_R_S(ins_Load(type), emitTypeSize(type), reg, lclVar->GetLclNum(), offset);
- offset += genTypeSize(type);
- }
+ assert(varTypeIsSIMD(src));
+ assert(src->isUsedFromReg());
+ regNumber srcReg = src->GetRegNum();
+
+ // Treat src register as a homogenous vector with element size equal to the reg size
+ // Insert pieces in order
+ unsigned regCount = retTypeDesc->GetReturnRegCount();
+ for (unsigned i = 0; i < regCount; ++i)
+ {
+ var_types type = retTypeDesc->GetReturnRegType(i);
+ regNumber reg = retTypeDesc->GetABIReturnReg(i);
+ if (varTypeIsFloating(type))
+ {
+ // If the register piece is to be passed in a floating point register
+ // Use a vector mov element instruction
+ // reg is not a vector, so it is in the first element reg[0]
+ // mov reg[0], src[i]
+ // This effectively moves from `src[i]` to `reg[0]`, upper bits of reg remain unchanged
+ // For the case where src == reg, since we are only writing reg[0], as long as we iterate
+ // so that src[0] is consumed before writing reg[0], we do not need a temporary.
+ GetEmitter()->emitIns_R_R_I_I(INS_mov, emitTypeSize(type), reg, srcReg, 0, i);
}
else
{
- // Handle SIMD genStructReturn case
- NYI_ARM("SIMD genStructReturn");
-
-#ifdef TARGET_ARM64
- genConsumeRegs(op1);
- regNumber src = op1->GetRegNum();
-
- // Treat src register as a homogenous vector with element size equal to the reg size
- // Insert pieces in order
- for (unsigned i = 0; i < regCount; ++i)
- {
- var_types type = retTypeDesc.GetReturnRegType(i);
- regNumber reg = retTypeDesc.GetABIReturnReg(i);
- if (varTypeIsFloating(type))
- {
- // If the register piece is to be passed in a floating point register
- // Use a vector mov element instruction
- // reg is not a vector, so it is in the first element reg[0]
- // mov reg[0], src[i]
- // This effectively moves from `src[i]` to `reg[0]`, upper bits of reg remain unchanged
- // For the case where src == reg, since we are only writing reg[0], as long as we iterate
- // so that src[0] is consumed before writing reg[0], we do not need a temporary.
- GetEmitter()->emitIns_R_R_I_I(INS_mov, emitTypeSize(type), reg, src, 0, i);
- }
- else
- {
- // If the register piece is to be passed in an integer register
- // Use a vector mov to general purpose register instruction
- // mov reg, src[i]
- // This effectively moves from `src[i]` to `reg`
- GetEmitter()->emitIns_R_R_I(INS_mov, emitTypeSize(type), reg, src, i);
- }
- }
-#endif // TARGET_ARM64
+ // If the register piece is to be passed in an integer register
+ // Use a vector mov to general purpose register instruction
+ // mov reg, src[i]
+ // This effectively moves from `src[i]` to `reg`
+ GetEmitter()->emitIns_R_R_I(INS_mov, emitTypeSize(type), reg, srcReg, i);
}
}
- else // op1 must be multi-reg GT_CALL
- {
- assert(op1->IsMultiRegCall() || op1->IsCopyOrReloadOfMultiRegCall());
-
- genConsumeRegs(op1);
-
- GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
- GenTreeCall* call = actualOp1->AsCall();
-
- ReturnTypeDesc* pRetTypeDesc;
- unsigned regCount;
- unsigned matchingCount = 0;
-
- pRetTypeDesc = call->GetReturnTypeDesc();
- regCount = pRetTypeDesc->GetReturnRegCount();
-
- var_types regType[MAX_RET_REG_COUNT];
- regNumber returnReg[MAX_RET_REG_COUNT];
- regNumber allocatedReg[MAX_RET_REG_COUNT];
- regMaskTP srcRegsMask = 0;
- regMaskTP dstRegsMask = 0;
- bool needToShuffleRegs = false; // Set to true if we have to move any registers
-
- for (unsigned i = 0; i < regCount; ++i)
- {
- regType[i] = pRetTypeDesc->GetReturnRegType(i);
- returnReg[i] = pRetTypeDesc->GetABIReturnReg(i);
-
- regNumber reloadReg = REG_NA;
- if (op1->IsCopyOrReload())
- {
- // GT_COPY/GT_RELOAD will have valid reg for those positions
- // that need to be copied or reloaded.
- reloadReg = op1->AsCopyOrReload()->GetRegNumByIdx(i);
- }
-
- if (reloadReg != REG_NA)
- {
- allocatedReg[i] = reloadReg;
- }
- else
- {
- allocatedReg[i] = call->GetRegNumByIdx(i);
- }
-
- if (returnReg[i] == allocatedReg[i])
- {
- matchingCount++;
- }
- else // We need to move this value
- {
- // We want to move the value from allocatedReg[i] into returnReg[i]
- // so record these two registers in the src and dst masks
- //
- srcRegsMask |= genRegMask(allocatedReg[i]);
- dstRegsMask |= genRegMask(returnReg[i]);
-
- needToShuffleRegs = true;
- }
- }
-
- if (needToShuffleRegs)
- {
- assert(matchingCount < regCount);
-
- unsigned remainingRegCount = regCount - matchingCount;
- regMaskTP extraRegMask = treeNode->gtRsvdRegs;
-
- while (remainingRegCount > 0)
- {
- // set 'available' to the 'dst' registers that are not currently holding 'src' registers
- //
- regMaskTP availableMask = dstRegsMask & ~srcRegsMask;
-
- regMaskTP dstMask;
- regNumber srcReg;
- regNumber dstReg;
- var_types curType = TYP_UNKNOWN;
- regNumber freeUpReg = REG_NA;
-
- if (availableMask == 0)
- {
- // Circular register dependencies
- // So just free up the lowest register in dstRegsMask by moving it to the 'extra' register
-
- assert(dstRegsMask == srcRegsMask); // this has to be true for us to reach here
- assert(extraRegMask != 0); // we require an 'extra' register
- assert((extraRegMask & ~dstRegsMask) != 0); // it can't be part of dstRegsMask
-
- availableMask = extraRegMask & ~dstRegsMask;
-
- regMaskTP srcMask = genFindLowestBit(srcRegsMask);
- freeUpReg = genRegNumFromMask(srcMask);
- }
-
- dstMask = genFindLowestBit(availableMask);
- dstReg = genRegNumFromMask(dstMask);
- srcReg = REG_NA;
-
- if (freeUpReg != REG_NA)
- {
- // We will free up the srcReg by moving it to dstReg which is an extra register
- //
- srcReg = freeUpReg;
-
- // Find the 'srcReg' and set 'curType', change allocatedReg[] to dstReg
- // and add the new register mask bit to srcRegsMask
- //
- for (unsigned i = 0; i < regCount; ++i)
- {
- if (allocatedReg[i] == srcReg)
- {
- curType = regType[i];
- allocatedReg[i] = dstReg;
- srcRegsMask |= genRegMask(dstReg);
- }
- }
- }
- else // The normal case
- {
- // Find the 'srcReg' and set 'curType'
- //
- for (unsigned i = 0; i < regCount; ++i)
- {
- if (returnReg[i] == dstReg)
- {
- srcReg = allocatedReg[i];
- curType = regType[i];
- }
- }
- // After we perform this move we will have one less registers to setup
- remainingRegCount--;
- }
- assert(curType != TYP_UNKNOWN);
-
- inst_RV_RV(ins_Copy(curType), dstReg, srcReg, curType);
-
- // Clear the appropriate bits in srcRegsMask and dstRegsMask
- srcRegsMask &= ~genRegMask(srcReg);
- dstRegsMask &= ~genRegMask(dstReg);
-
- } // while (remainingRegCount > 0)
-
- } // (needToShuffleRegs)
-
- } // op1 must be multi-reg GT_CALL
}
+#endif // FEATURE_SIMD
#endif // TARGET_ARMARCH
diff --git a/src/coreclr/src/jit/codegencommon.cpp b/src/coreclr/src/jit/codegencommon.cpp
index c087fbf43bbc20..7f011b56861be9 100644
--- a/src/coreclr/src/jit/codegencommon.cpp
+++ b/src/coreclr/src/jit/codegencommon.cpp
@@ -3851,7 +3851,7 @@ void CodeGen::genFnPrologCalleeRegArgs(regNumber xtraReg, bool* pXtraRegClobbere
#endif // !TARGET_64BIT
{
// If this arg is never on the stack, go to the next one.
- if (!regArgTab[argNum].stackArg)
+ if (!regArgTab[argNum].stackArg && !regArgTab[argNum].writeThru)
{
continue;
}
@@ -4596,8 +4596,9 @@ void CodeGen::genCheckUseBlockInit()
// double-counting the initialization impact of any locals.
bool counted = false;
- if (varDsc->lvIsParam)
+ if (!varDsc->lvIsInReg() && !varDsc->lvOnFrame)
{
+ noway_assert(varDsc->lvRefCnt() == 0);
continue;
}
@@ -4608,43 +4609,10 @@ void CodeGen::genCheckUseBlockInit()
continue;
}
- // Likewise, initialization of the GS cookie is handled specially for OSR.
- // Could do this for non-OSR too.. (likewise for the dummy)
- if (compiler->opts.IsOSR() && varNum == compiler->lvaGSSecurityCookie)
- {
- continue;
- }
-
- if (!varDsc->lvIsInReg() && !varDsc->lvOnFrame)
- {
- noway_assert(varDsc->lvRefCnt() == 0);
- continue;
- }
-
- if (varNum == compiler->lvaInlinedPInvokeFrameVar || varNum == compiler->lvaStubArgumentVar)
- {
- continue;
- }
-
-#if FEATURE_FIXED_OUT_ARGS
- if (varNum == compiler->lvaPInvokeFrameRegSaveVar)
- {
- continue;
- }
- if (varNum == compiler->lvaOutgoingArgSpaceVar)
- {
- continue;
- }
-#endif
-
-#if defined(FEATURE_EH_FUNCLETS)
- // There's no need to force 0-initialization of the PSPSym, it will be
- // initialized with a real value in the prolog
- if (varNum == compiler->lvaPSPSym)
+ if (compiler->fgVarIsNeverZeroInitializedInProlog(varNum))
{
continue;
}
-#endif
if (compiler->lvaIsFieldOfDependentlyPromotedStruct(varDsc))
{
@@ -4654,6 +4622,12 @@ void CodeGen::genCheckUseBlockInit()
continue;
}
+ if (varDsc->lvHasExplicitInit)
+ {
+ varDsc->lvMustInit = 0;
+ continue;
+ }
+
if (compiler->info.compInitMem || varDsc->HasGCPtr() || varDsc->lvMustInit)
{
if (varDsc->lvTracked)
@@ -4847,7 +4821,7 @@ void CodeGen::genCheckUseBlockInit()
*/
#if defined(TARGET_ARM64)
-void CodeGen::genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegModified)
#else
void CodeGen::genPushCalleeSavedRegisters()
#endif
@@ -5336,7 +5310,8 @@ void CodeGen::genPushCalleeSavedRegisters()
JITDUMP(" spAdjustment2=%d\n", spAdjustment2);
- genPrologSaveRegPair(REG_FP, REG_LR, alignmentAdjustment2, -spAdjustment2, false, initReg, pInitRegZeroed);
+ genPrologSaveRegPair(REG_FP, REG_LR, alignmentAdjustment2, -spAdjustment2, false, initReg,
+ pInitRegModified);
offset += spAdjustment2;
// Now subtract off the #outsz (or the rest of the #outsz if it was unaligned, and the above "sub"
@@ -5356,13 +5331,13 @@ void CodeGen::genPushCalleeSavedRegisters()
// We've already established the frame pointer, so no need to report the stack pointer change to unwind
// info.
- genStackPointerAdjustment(-spAdjustment3, initReg, pInitRegZeroed, /* reportUnwindData */ false);
+ genStackPointerAdjustment(-spAdjustment3, initReg, pInitRegModified, /* reportUnwindData */ false);
offset += spAdjustment3;
}
else
{
genPrologSaveRegPair(REG_FP, REG_LR, compiler->lvaOutgoingArgSpaceSize, -remainingFrameSz, false, initReg,
- pInitRegZeroed);
+ pInitRegModified);
offset += remainingFrameSz;
offsetSpToSavedFp = compiler->lvaOutgoingArgSpaceSize;
@@ -5394,7 +5369,7 @@ void CodeGen::genPushCalleeSavedRegisters()
JITDUMP(" remainingFrameSz=%d\n", remainingFrameSz);
// We've already established the frame pointer, so no need to report the stack pointer change to unwind info.
- genStackPointerAdjustment(-remainingFrameSz, initReg, pInitRegZeroed, /* reportUnwindData */ false);
+ genStackPointerAdjustment(-remainingFrameSz, initReg, pInitRegModified, /* reportUnwindData */ false);
offset += remainingFrameSz;
}
else
@@ -6123,17 +6098,17 @@ void CodeGen::genPopCalleeSavedRegisters(bool jmpEpilog)
#endif // TARGET*
-// We need a register with value zero. Zero the initReg, if necessary, and set *pInitRegZeroed if so.
+// We need a register with value zero. Zero the initReg, if necessary, and set *pInitRegModified if so.
// Return the register to use. On ARM64, we never touch the initReg, and always just return REG_ZR.
-regNumber CodeGen::genGetZeroReg(regNumber initReg, bool* pInitRegZeroed)
+regNumber CodeGen::genGetZeroReg(regNumber initReg, bool* pInitRegModified)
{
#ifdef TARGET_ARM64
return REG_ZR;
#else // !TARGET_ARM64
- if (*pInitRegZeroed == false)
+ if (*pInitRegModified)
{
instGen_Set_Reg_To_Zero(EA_PTRSIZE, initReg);
- *pInitRegZeroed = true;
+ *pInitRegModified = false;
}
return initReg;
#endif // !TARGET_ARM64
@@ -6143,14 +6118,14 @@ regNumber CodeGen::genGetZeroReg(regNumber initReg, bool* pInitRegZeroed)
// genZeroInitFrame: Zero any untracked pointer locals and/or initialize memory for locspace
//
// Arguments:
-// untrLclHi - (Untracked locals High-Offset) The upper bound offset at which the zero init
-// code will end initializing memory (not inclusive).
-// untrLclLo - (Untracked locals Low-Offset) The lower bound at which the zero init code will
-// start zero initializing memory.
-// initReg - A scratch register (that gets set to zero on some platforms).
-// pInitRegZeroed - Sets a flag that tells the callee whether or not the initReg register got zeroed.
+// untrLclHi - (Untracked locals High-Offset) The upper bound offset at which the zero init
+// code will end initializing memory (not inclusive).
+// untrLclLo - (Untracked locals Low-Offset) The lower bound at which the zero init code will
+// start zero initializing memory.
+// initReg - A scratch register (that gets set to zero on some platforms).
+// pInitRegModified - Sets a flag that tells the callee whether or not the initReg register got zeroed.
//
-void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -6225,8 +6200,8 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
#else // !define(TARGET_ARM)
- rAddr = initReg;
- *pInitRegZeroed = false;
+ rAddr = initReg;
+ *pInitRegModified = true;
#endif // !defined(TARGET_ARM)
@@ -6267,7 +6242,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
// Load immediate into the InitReg register
instGen_Set_Reg_To_Imm(EA_PTRSIZE, initReg, (ssize_t)untrLclLo);
GetEmitter()->emitIns_R_R_R(INS_add, EA_PTRSIZE, rAddr, genFramePointerReg(), initReg);
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
if (useLoop)
@@ -6279,7 +6254,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
}
#if defined(TARGET_ARM)
- rZero1 = genGetZeroReg(initReg, pInitRegZeroed);
+ rZero1 = genGetZeroReg(initReg, pInitRegModified);
instGen_Set_Reg_To_Zero(EA_PTRSIZE, rZero2);
target_ssize_t stmImm = (target_ssize_t)(genRegMask(rZero1) | genRegMask(rZero2));
#endif // TARGET_ARM
@@ -6368,7 +6343,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
#endif
if (blkSize < minSimdSize)
{
- zeroReg = genGetZeroReg(initReg, pInitRegZeroed);
+ zeroReg = genGetZeroReg(initReg, pInitRegModified);
int i = 0;
for (; i + REGSIZE_BYTES <= blkSize; i += REGSIZE_BYTES)
@@ -6430,7 +6405,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
assert(alignmentLoBlkSize < XMM_REGSIZE_BYTES);
assert((alignedLclLo - alignmentLoBlkSize) == untrLclLo);
- zeroReg = genGetZeroReg(initReg, pInitRegZeroed);
+ zeroReg = genGetZeroReg(initReg, pInitRegModified);
int i = 0;
for (; i + REGSIZE_BYTES <= alignmentLoBlkSize; i += REGSIZE_BYTES)
@@ -6538,7 +6513,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
emit->emitIns_J(INS_jne, nullptr, -5);
// initReg will be zero at end of the loop
- *pInitRegZeroed = true;
+ *pInitRegModified = false;
}
if (untrLclHi != alignedLclHi)
@@ -6547,7 +6522,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
assert(alignmentHiBlkSize < XMM_REGSIZE_BYTES);
assert((alignedLclHi + alignmentHiBlkSize) == untrLclHi);
- zeroReg = genGetZeroReg(initReg, pInitRegZeroed);
+ zeroReg = genGetZeroReg(initReg, pInitRegModified);
int i = 0;
for (; i + REGSIZE_BYTES <= alignmentHiBlkSize; i += REGSIZE_BYTES)
@@ -6614,13 +6589,13 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
if (layout->IsGCPtr(i))
{
GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE,
- genGetZeroReg(initReg, pInitRegZeroed), varNum, i * REGSIZE_BYTES);
+ genGetZeroReg(initReg, pInitRegModified), varNum, i * REGSIZE_BYTES);
}
}
}
else
{
- regNumber zeroReg = genGetZeroReg(initReg, pInitRegZeroed);
+ regNumber zeroReg = genGetZeroReg(initReg, pInitRegModified);
// zero out the whole thing rounded up to a single stack slot size
unsigned lclSize = roundUp(compiler->lvaLclSize(varNum), (unsigned)sizeof(int));
@@ -6652,7 +6627,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
// printf("initialize untracked spillTmp [EBP-%04X]\n", stkOffs);
- inst_ST_RV(ins_Store(TYP_I_IMPL), tempThis, 0, genGetZeroReg(initReg, pInitRegZeroed), TYP_I_IMPL);
+ inst_ST_RV(ins_Store(TYP_I_IMPL), tempThis, 0, genGetZeroReg(initReg, pInitRegModified), TYP_I_IMPL);
}
}
@@ -6787,7 +6762,7 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
* ICodeManager::GetParamTypeArg().
*/
-void CodeGen::genReportGenericContextArg(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genReportGenericContextArg(regNumber initReg, bool* pInitRegModified)
{
// For OSR the original method has set this up for us.
if (compiler->opts.IsOSR())
@@ -6852,8 +6827,8 @@ void CodeGen::genReportGenericContextArg(regNumber initReg, bool* pInitRegZeroed
// We will just use the initReg since it is an available register
// and we are probably done using it anyway...
- reg = initReg;
- *pInitRegZeroed = false;
+ reg = initReg;
+ *pInitRegModified = true;
// mov reg, [compiler->info.compTypeCtxtArg]
GetEmitter()->emitIns_R_AR(ins_Load(TYP_I_IMPL), EA_PTRSIZE, reg, genFramePointerReg(), varDsc->lvStkOffs);
@@ -7568,6 +7543,25 @@ void CodeGen::genFnProlog()
bool isInReg = varDsc->lvIsInReg();
bool isInMemory = !isInReg || varDsc->lvLiveInOutOfHndlr;
+
+ // Note that 'lvIsInReg()' will only be accurate for variables that are actually live-in to
+ // the first block. This will include all possibly-uninitialized locals, whose liveness
+ // will naturally propagate up to the entry block. However, we also set 'lvMustInit' for
+ // locals that are live-in to a finally block, and those may not be live-in to the first
+ // block. For those, we don't want to initialize the register, as it will not actually be
+ // occupying it on entry.
+ if (isInReg)
+ {
+ if (compiler->lvaEnregEHVars && varDsc->lvLiveInOutOfHndlr)
+ {
+ isInReg = VarSetOps::IsMember(compiler, compiler->fgFirstBB->bbLiveIn, varDsc->lvVarIndex);
+ }
+ else
+ {
+ assert(VarSetOps::IsMember(compiler, compiler->fgFirstBB->bbLiveIn, varDsc->lvVarIndex));
+ }
+ }
+
if (isInReg)
{
regMaskTP regMask = genRegMask(varDsc->GetRegNum());
@@ -7678,9 +7672,9 @@ void CodeGen::genFnProlog()
/* Choose the register to use for zero initialization */
- regNumber initReg = REG_SCRATCH; // Unless we find a better register below
- bool initRegZeroed = false;
- regMaskTP excludeMask = intRegState.rsCalleeRegArgMaskLiveIn;
+ regNumber initReg = REG_SCRATCH; // Unless we find a better register below
+ bool initRegModified = true;
+ regMaskTP excludeMask = intRegState.rsCalleeRegArgMaskLiveIn;
regMaskTP tempMask;
// We should not use the special PINVOKE registers as the initReg
@@ -7813,11 +7807,11 @@ void CodeGen::genFnProlog()
// been calculated to be one of the callee-saved registers (say, if all the integer argument registers are
// in use, and perhaps with other conditions being satisfied). This is ok in other cases, after the callee-saved
// registers have been saved. So instead of letting genAllocLclFrame use initReg as a temporary register,
- // always use REG_SCRATCH. We don't care if it trashes it, so ignore the initRegZeroed output argument.
- bool ignoreInitRegZeroed = false;
- genAllocLclFrame(compiler->compLclFrameSize, REG_SCRATCH, &ignoreInitRegZeroed,
+ // always use REG_SCRATCH. We don't care if it trashes it, so ignore the initRegModified output argument.
+ bool ignoreInitRegModified = true;
+ genAllocLclFrame(compiler->compLclFrameSize, REG_SCRATCH, &ignoreInitRegModified,
intRegState.rsCalleeRegArgMaskLiveIn);
- genPushCalleeSavedRegisters(initReg, &initRegZeroed);
+ genPushCalleeSavedRegisters(initReg, &initRegModified);
#else // !TARGET_ARM64
genPushCalleeSavedRegisters();
#endif // !TARGET_ARM64
@@ -7861,7 +7855,7 @@ void CodeGen::genFnProlog()
if (maskStackAlloc == RBM_NONE)
{
- genAllocLclFrame(compiler->compLclFrameSize, initReg, &initRegZeroed, intRegState.rsCalleeRegArgMaskLiveIn);
+ genAllocLclFrame(compiler->compLclFrameSize, initReg, &initRegModified, intRegState.rsCalleeRegArgMaskLiveIn);
}
#endif // !TARGET_ARM64
@@ -7924,11 +7918,11 @@ void CodeGen::genFnProlog()
// Zero out the frame as needed
//
- genZeroInitFrame(untrLclHi, untrLclLo, initReg, &initRegZeroed);
+ genZeroInitFrame(untrLclHi, untrLclLo, initReg, &initRegModified);
#if defined(FEATURE_EH_FUNCLETS)
- genSetPSPSym(initReg, &initRegZeroed);
+ genSetPSPSym(initReg, &initRegModified);
#else // !FEATURE_EH_FUNCLETS
@@ -7941,10 +7935,10 @@ void CodeGen::genFnProlog()
// Zero out the slot for nesting level 0
unsigned firstSlotOffs = filterEndOffsetSlotOffs - TARGET_POINTER_SIZE;
- if (!initRegZeroed)
+ if (initRegModified)
{
instGen_Set_Reg_To_Zero(EA_PTRSIZE, initReg);
- initRegZeroed = true;
+ initRegModified = false;
}
GetEmitter()->emitIns_S_R(ins_Store(TYP_I_IMPL), EA_PTRSIZE, initReg, compiler->lvaShadowSPslotsVar,
@@ -7953,7 +7947,7 @@ void CodeGen::genFnProlog()
#endif // !FEATURE_EH_FUNCLETS
- genReportGenericContextArg(initReg, &initRegZeroed);
+ genReportGenericContextArg(initReg, &initRegModified);
#ifdef JIT32_GCENCODER
// Initialize the LocalAllocSP slot if there is localloc in the function.
@@ -7965,7 +7959,7 @@ void CodeGen::genFnProlog()
// Set up the GS security cookie
- genSetGSSecurityCookie(initReg, &initRegZeroed);
+ genSetGSSecurityCookie(initReg, &initRegModified);
#ifdef PROFILING_SUPPORTED
@@ -7973,7 +7967,7 @@ void CodeGen::genFnProlog()
// OSR methods aren't called, so don't have enter hooks.
if (!compiler->opts.IsOSR())
{
- genProfilingEnterCallback(initReg, &initRegZeroed);
+ genProfilingEnterCallback(initReg, &initRegModified);
}
#endif // PROFILING_SUPPORTED
@@ -8035,15 +8029,15 @@ void CodeGen::genFnProlog()
}
else
{
- xtraReg = REG_SCRATCH;
- initRegZeroed = false;
+ xtraReg = REG_SCRATCH;
+ initRegModified = true;
}
genFnPrologCalleeRegArgs(xtraReg, &xtraRegClobbered, regState);
if (xtraRegClobbered)
{
- initRegZeroed = false;
+ initRegModified = true;
}
}
}
@@ -8063,7 +8057,7 @@ void CodeGen::genFnProlog()
if (regMask & initRegs)
{
// Check if we have already zeroed this register
- if ((reg == initReg) && initRegZeroed)
+ if ((reg == initReg) && !initRegModified)
{
continue;
}
@@ -8072,7 +8066,7 @@ void CodeGen::genFnProlog()
instGen_Set_Reg_To_Zero(EA_PTRSIZE, reg);
if (reg == initReg)
{
- initRegZeroed = true;
+ initRegModified = false;
}
}
}
@@ -8084,17 +8078,17 @@ void CodeGen::genFnProlog()
// If initReg is not in initRegs then we will use REG_SCRATCH
if ((genRegMask(initReg) & initRegs) == 0)
{
- initReg = REG_SCRATCH;
- initRegZeroed = false;
+ initReg = REG_SCRATCH;
+ initRegModified = true;
}
#ifdef TARGET_ARM
// This is needed only for Arm since it can use a zero initialized int register
// to initialize vfp registers.
- if (!initRegZeroed)
+ if (initRegModified)
{
instGen_Set_Reg_To_Zero(EA_PTRSIZE, initReg);
- initRegZeroed = true;
+ initRegModified = false;
}
#endif // TARGET_ARM
@@ -9101,12 +9095,12 @@ void CodeGen::genFuncletProlog(BasicBlock* block)
maskArgRegsLiveIn = RBM_R0;
}
- regNumber initReg = REG_R3; // R3 is never live on entry to a funclet, so it can be trashed
- bool initRegZeroed = false;
+ regNumber initReg = REG_R3; // R3 is never live on entry to a funclet, so it can be trashed
+ bool initRegModified = true;
if (maskStackAlloc == RBM_NONE)
{
- genAllocLclFrame(genFuncletInfo.fiSpDelta, initReg, &initRegZeroed, maskArgRegsLiveIn);
+ genAllocLclFrame(genFuncletInfo.fiSpDelta, initReg, &initRegModified, maskArgRegsLiveIn);
}
// This is the end of the OS-reported prolog for purposes of unwinding
@@ -9403,10 +9397,10 @@ void CodeGen::genFuncletProlog(BasicBlock* block)
maskArgRegsLiveIn = RBM_ARG_0 | RBM_ARG_2;
}
- regNumber initReg = REG_EBP; // We already saved EBP, so it can be trashed
- bool initRegZeroed = false;
+ regNumber initReg = REG_EBP; // We already saved EBP, so it can be trashed
+ bool initRegModified = true;
- genAllocLclFrame(genFuncletInfo.fiSpDelta, initReg, &initRegZeroed, maskArgRegsLiveIn);
+ genAllocLclFrame(genFuncletInfo.fiSpDelta, initReg, &initRegModified, maskArgRegsLiveIn);
// Callee saved float registers are copied to stack in their assigned stack slots
// after allocating space for them as part of funclet frame.
@@ -9745,7 +9739,7 @@ void CodeGen::genCaptureFuncletPrologEpilogInfo()
* correctly reported, the PSPSym could be omitted in some cases.)
***********************************
*/
-void CodeGen::genSetPSPSym(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genSetPSPSym(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -9791,8 +9785,8 @@ void CodeGen::genSetPSPSym(regNumber initReg, bool* pInitRegZeroed)
// We will just use the initReg since it is an available register
// and we are probably done using it anyway...
- regNumber regTmp = initReg;
- *pInitRegZeroed = false;
+ regNumber regTmp = initReg;
+ *pInitRegModified = true;
GetEmitter()->emitIns_R_R_I(INS_add, EA_PTRSIZE, regTmp, regBase, callerSPOffs);
GetEmitter()->emitIns_S_R(INS_str, EA_PTRSIZE, regTmp, compiler->lvaPSPSym, 0);
@@ -9803,8 +9797,8 @@ void CodeGen::genSetPSPSym(regNumber initReg, bool* pInitRegZeroed)
// We will just use the initReg since it is an available register
// and we are probably done using it anyway...
- regNumber regTmp = initReg;
- *pInitRegZeroed = false;
+ regNumber regTmp = initReg;
+ *pInitRegModified = true;
GetEmitter()->emitIns_R_R_Imm(INS_add, EA_PTRSIZE, regTmp, REG_SPBASE, SPtoCallerSPdelta);
GetEmitter()->emitIns_S_R(INS_str, EA_PTRSIZE, regTmp, compiler->lvaPSPSym, 0);
@@ -11534,7 +11528,7 @@ void CodeGen::genReturn(GenTree* treeNode)
{
if (varTypeIsLong(compiler->info.compRetNativeType))
{
- retTypeDesc.InitializeLongReturnType(compiler);
+ retTypeDesc.InitializeLongReturnType();
}
else // we must have a struct return type
{
@@ -11607,6 +11601,284 @@ void CodeGen::genReturn(GenTree* treeNode)
#endif // defined(DEBUG) && defined(TARGET_XARCH)
}
+//------------------------------------------------------------------------
+// isStructReturn: Returns whether the 'treeNode' is returning a struct.
+//
+// Arguments:
+// treeNode - The tree node to evaluate whether is a struct return.
+//
+// Return Value:
+// Returns true if the 'treeNode" is a GT_RETURN node of type struct.
+// Otherwise returns false.
+//
+bool CodeGen::isStructReturn(GenTree* treeNode)
+{
+ // This method could be called for 'treeNode' of GT_RET_FILT or GT_RETURN.
+ // For the GT_RET_FILT, the return is always a bool or a void, for the end of a finally block.
+ noway_assert(treeNode->OperGet() == GT_RETURN || treeNode->OperGet() == GT_RETFILT);
+ if (treeNode->OperGet() != GT_RETURN)
+ {
+ return false;
+ }
+
+#if defined(TARGET_AMD64) && !defined(UNIX_AMD64_ABI)
+ assert(!varTypeIsStruct(treeNode));
+ return false;
+#elif defined(TARGET_ARM64)
+ return varTypeIsStruct(treeNode) && (compiler->info.compRetNativeType == TYP_STRUCT);
+#else
+ return varTypeIsStruct(treeNode);
+#endif
+}
+
+//------------------------------------------------------------------------
+// genStructReturn: Generates code for returning a struct.
+//
+// Arguments:
+// treeNode - The GT_RETURN tree node.
+//
+// Return Value:
+// None
+//
+// Assumption:
+// op1 of GT_RETURN node is either GT_LCL_VAR or multi-reg GT_CALL
+//
+void CodeGen::genStructReturn(GenTree* treeNode)
+{
+ assert(treeNode->OperGet() == GT_RETURN);
+ GenTree* op1 = treeNode->gtGetOp1();
+ genConsumeRegs(op1);
+ GenTree* actualOp1 = op1;
+ if (op1->IsCopyOrReload())
+ {
+ actualOp1 = op1->gtGetOp1();
+ }
+
+ ReturnTypeDesc retTypeDesc;
+ LclVarDsc* varDsc = nullptr;
+ if (actualOp1->OperIs(GT_LCL_VAR))
+ {
+ varDsc = compiler->lvaGetDesc(actualOp1->AsLclVar()->GetLclNum());
+ retTypeDesc.InitializeStructReturnType(compiler, varDsc->lvVerTypeInfo.GetClassHandle());
+ }
+ else
+ {
+ assert(actualOp1->OperIs(GT_CALL));
+ retTypeDesc = *(actualOp1->AsCall()->GetReturnTypeDesc());
+ }
+ unsigned regCount = retTypeDesc.GetReturnRegCount();
+ assert(regCount <= MAX_RET_REG_COUNT);
+
+#if FEATURE_MULTIREG_RET
+ if (actualOp1->OperIs(GT_LCL_VAR) && (varTypeIsEnregisterable(op1)))
+ {
+ // Right now the only enregisterable structs supported are SIMD vector types.
+ assert(varTypeIsSIMD(op1));
+#ifdef FEATURE_SIMD
+ genSIMDSplitReturn(op1, &retTypeDesc);
+#endif // FEATURE_SIMD
+ }
+ else if (actualOp1->OperIs(GT_LCL_VAR))
+ {
+ GenTreeLclVar* lclNode = actualOp1->AsLclVar();
+ LclVarDsc* varDsc = compiler->lvaGetDesc(lclNode->GetLclNum());
+ assert(varDsc->lvIsMultiRegRet);
+ int offset = 0;
+ for (unsigned i = 0; i < regCount; ++i)
+ {
+ var_types type = retTypeDesc.GetReturnRegType(i);
+ regNumber toReg = retTypeDesc.GetABIReturnReg(i);
+ GetEmitter()->emitIns_R_S(ins_Load(type), emitTypeSize(type), toReg, lclNode->GetLclNum(), offset);
+ offset += genTypeSize(type);
+ }
+ }
+ else
+ {
+ assert(actualOp1->IsMultiRegCall());
+ for (unsigned i = 0; i < regCount; ++i)
+ {
+ var_types type = retTypeDesc.GetReturnRegType(i);
+ regNumber toReg = retTypeDesc.GetABIReturnReg(i);
+ regNumber fromReg = op1->GetRegByIndex(i);
+ if (fromReg == REG_NA)
+ {
+ assert(op1->IsCopyOrReload());
+ fromReg = actualOp1->GetRegByIndex(i);
+ }
+ if (fromReg != toReg)
+ {
+ inst_RV_RV(ins_Copy(type), toReg, fromReg, type);
+ }
+ }
+ }
+#else // !FEATURE_MULTIREG_RET
+ unreached();
+#endif
+}
+
+//------------------------------------------------------------------------
+// genRegCopy: Produce code for a GT_COPY node.
+//
+// Arguments:
+// tree - the GT_COPY node
+//
+// Notes:
+// This will copy the register(s) produced by this nodes source, to
+// the register(s) allocated to this GT_COPY node.
+// It has some special handling for these casess:
+// - when the source and target registers are in different register files
+// (note that this is *not* a conversion).
+// - when the source is a lclVar whose home location is being moved to a new
+// register (rather than just being copied for temporary use).
+//
+void CodeGen::genRegCopy(GenTree* treeNode)
+{
+ assert(treeNode->OperGet() == GT_COPY);
+ GenTree* op1 = treeNode->AsOp()->gtOp1;
+
+ if (op1->IsMultiRegNode())
+ {
+ // Register allocation assumes that any reload and copy are done in operand order.
+ // That is, we can have:
+ // (reg0, reg1) = COPY(V0,V1) where V0 is in reg1 and V1 is in memory
+ // The register allocation model assumes:
+ // First, V0 is moved to reg0 (v1 can't be in reg0 because it is still live, which would be a conflict).
+ // Then, V1 is moved to reg1
+ // However, if we call genConsumeRegs on op1, it will do the reload of V1 before we do the copy of V0.
+ // So we need to handle that case first.
+ //
+ // There should never be any circular dependencies, and we will check that here.
+
+ GenTreeCopyOrReload* copyNode = treeNode->AsCopyOrReload();
+ // GenTreeCopyOrReload only reports the highest index that has a valid register.
+ unsigned regCount = copyNode->GetRegCount();
+ assert(regCount <= MAX_MULTIREG_COUNT);
+
+ // First set the source registers as busy if they haven't been spilled.
+ // (Note that this is just for verification that we don't have circular dependencies.)
+ regMaskTP busyRegs = RBM_NONE;
+ for (unsigned i = 0; i < regCount; ++i)
+ {
+ if ((op1->GetRegSpillFlagByIdx(i) & GTF_SPILLED) == 0)
+ {
+ busyRegs |= genRegMask(op1->GetRegByIndex(i));
+ }
+ }
+ // First do any copies - we'll do the reloads after all the copies are complete.
+ for (unsigned i = 0; i < regCount; ++i)
+ {
+ regNumber sourceReg = op1->GetRegByIndex(i);
+ regNumber targetReg = copyNode->GetRegNumByIdx(i);
+ // GenTreeCopyOrReload only reports the highest index that has a valid register.
+ // However there may be lower indices that have no valid register (i.e. the register
+ // on the source is still valid at the consumer).
+ if (targetReg != REG_NA)
+ {
+ // We shouldn't specify a no-op move.
+ regMaskTP targetRegMask = genRegMask(targetReg);
+ assert(sourceReg != targetReg);
+ assert((busyRegs & targetRegMask) == 0);
+ // Clear sourceReg from the busyRegs, and add targetReg.
+ busyRegs &= ~genRegMask(sourceReg);
+ busyRegs |= genRegMask(targetReg);
+ var_types type;
+ if (op1->IsMultiRegLclVar())
+ {
+ type = op1->AsLclVar()->GetFieldTypeByIndex(compiler, i);
+ }
+ else
+ {
+ type = op1->GetRegTypeByIndex(i);
+ }
+ inst_RV_RV(ins_Copy(type), targetReg, sourceReg, type);
+ }
+ }
+ // Now we can consume op1, which will perform any necessary reloads.
+ genConsumeReg(op1);
+ }
+ else
+ {
+ var_types targetType = treeNode->TypeGet();
+ regNumber targetReg = treeNode->GetRegNum();
+ assert(targetReg != REG_NA);
+ assert(targetType != TYP_STRUCT);
+
+ // Check whether this node and the node from which we're copying the value have
+ // different register types. This can happen if (currently iff) we have a SIMD
+ // vector type that fits in an integer register, in which case it is passed as
+ // an argument, or returned from a call, in an integer register and must be
+ // copied if it's in an xmm register.
+
+ bool srcFltReg = (varTypeIsFloating(op1) || varTypeIsSIMD(op1));
+ bool tgtFltReg = (varTypeIsFloating(treeNode) || varTypeIsSIMD(treeNode));
+ if (srcFltReg != tgtFltReg)
+ {
+ instruction ins;
+ regNumber fpReg;
+ regNumber intReg;
+ if (tgtFltReg)
+ {
+ ins = ins_CopyIntToFloat(op1->TypeGet(), treeNode->TypeGet());
+ fpReg = targetReg;
+ intReg = op1->GetRegNum();
+ }
+ else
+ {
+ ins = ins_CopyFloatToInt(op1->TypeGet(), treeNode->TypeGet());
+ intReg = targetReg;
+ fpReg = op1->GetRegNum();
+ }
+ inst_RV_RV(ins, fpReg, intReg, targetType);
+ }
+ else
+ {
+ inst_RV_RV(ins_Copy(targetType), targetReg, genConsumeReg(op1), targetType);
+ }
+
+ if (op1->IsLocal())
+ {
+ // The lclVar will never be a def.
+ // If it is a last use, the lclVar will be killed by genConsumeReg(), as usual, and genProduceReg will
+ // appropriately set the gcInfo for the copied value.
+ // If not, there are two cases we need to handle:
+ // - If this is a TEMPORARY copy (indicated by the GTF_VAR_DEATH flag) the variable
+ // will remain live in its original register.
+ // genProduceReg() will appropriately set the gcInfo for the copied value,
+ // and genConsumeReg will reset it.
+ // - Otherwise, we need to update register info for the lclVar.
+
+ GenTreeLclVarCommon* lcl = op1->AsLclVarCommon();
+ assert((lcl->gtFlags & GTF_VAR_DEF) == 0);
+
+ if ((lcl->gtFlags & GTF_VAR_DEATH) == 0 && (treeNode->gtFlags & GTF_VAR_DEATH) == 0)
+ {
+ LclVarDsc* varDsc = compiler->lvaGetDesc(lcl);
+
+ // If we didn't just spill it (in genConsumeReg, above), then update the register info
+ if (varDsc->GetRegNum() != REG_STK)
+ {
+ // The old location is dying
+ genUpdateRegLife(varDsc, /*isBorn*/ false, /*isDying*/ true DEBUGARG(op1));
+
+ gcInfo.gcMarkRegSetNpt(genRegMask(op1->GetRegNum()));
+
+ genUpdateVarReg(varDsc, treeNode);
+
+#ifdef USING_VARIABLE_LIVE_RANGE
+ // Report the home change for this variable
+ varLiveKeeper->siUpdateVariableLiveRange(varDsc, lcl->GetLclNum());
+#endif // USING_VARIABLE_LIVE_RANGE
+
+ // The new location is going live
+ genUpdateRegLife(varDsc, /*isBorn*/ true, /*isDying*/ false DEBUGARG(treeNode));
+ }
+ }
+ }
+ }
+
+ genProduceReg(treeNode);
+}
+
#if defined(DEBUG) && defined(TARGET_XARCH)
//------------------------------------------------------------------------
diff --git a/src/coreclr/src/jit/codegenlinear.cpp b/src/coreclr/src/jit/codegenlinear.cpp
index e3973ba565119c..b9ed297495f64a 100644
--- a/src/coreclr/src/jit/codegenlinear.cpp
+++ b/src/coreclr/src/jit/codegenlinear.cpp
@@ -938,6 +938,86 @@ GenTree* sameRegAsDst(GenTree* tree, GenTree*& other /*out*/)
}
}
+//------------------------------------------------------------------------
+// genUnspillLocal: Reload a register candidate local into a register.
+//
+// Arguments:
+// varNum - The variable number of the local to be reloaded (unspilled).
+// It may be a local field.
+// type - The type of the local.
+// lclNode - The node being unspilled. Note that for a multi-reg local,
+// the gtLclNum will be that of the parent struct.
+// regNum - The register that 'varNum' should be loaded to.
+// reSpill - True if it will be immediately spilled after use.
+// isLastUse - True if this is a last use of 'varNum'.
+//
+// Notes:
+// The caller must have determined that this local needs to be unspilled.
+void CodeGen::genUnspillLocal(
+ unsigned varNum, var_types type, GenTreeLclVar* lclNode, regNumber regNum, bool reSpill, bool isLastUse)
+{
+ LclVarDsc* varDsc = compiler->lvaGetDesc(varNum);
+ inst_set_SV_var(lclNode);
+ instruction ins = ins_Load(type, compiler->isSIMDTypeLocalAligned(varNum));
+ GetEmitter()->emitIns_R_S(ins, emitTypeSize(type), regNum, varNum, 0);
+
+ // TODO-Review: We would like to call:
+ // genUpdateRegLife(varDsc, /*isBorn*/ true, /*isDying*/ false DEBUGARG(tree));
+ // instead of the following code, but this ends up hitting this assert:
+ // assert((regSet.GetMaskVars() & regMask) == 0);
+ // due to issues with LSRA resolution moves.
+ // So, just force it for now. This probably indicates a condition that creates a GC hole!
+ //
+ // Extra note: I think we really want to call something like gcInfo.gcUpdateForRegVarMove,
+ // because the variable is not really going live or dead, but that method is somewhat poorly
+ // factored because it, in turn, updates rsMaskVars which is part of RegSet not GCInfo.
+ // TODO-Cleanup: This code exists in other CodeGen*.cpp files, and should be moved to CodeGenCommon.cpp.
+
+ // Don't update the variable's location if we are just re-spilling it again.
+
+ if (!reSpill)
+ {
+ varDsc->SetRegNum(regNum);
+
+#ifdef USING_VARIABLE_LIVE_RANGE
+ // We want "VariableLiveRange" inclusive on the beginning and exclusive on the ending.
+ // For that we shouldn't report an update of the variable location if is becoming dead
+ // on the same native offset.
+ if (!isLastUse)
+ {
+ // Report the home change for this variable
+ varLiveKeeper->siUpdateVariableLiveRange(varDsc, varNum);
+ }
+#endif // USING_VARIABLE_LIVE_RANGE
+
+ if (!varDsc->lvLiveInOutOfHndlr)
+ {
+#ifdef DEBUG
+ if (VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex))
+ {
+ JITDUMP("\t\t\t\t\t\t\tRemoving V%02u from gcVarPtrSetCur\n", varNum);
+ }
+#endif // DEBUG
+ VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
+ }
+
+#ifdef DEBUG
+ if (compiler->verbose)
+ {
+ printf("\t\t\t\t\t\t\tV%02u in reg ", varNum);
+ varDsc->PrintVarReg();
+ printf(" is becoming live ");
+ compiler->printTreeID(lclNode);
+ printf("\n");
+ }
+#endif // DEBUG
+
+ regSet.AddMaskVars(genGetRegMask(varDsc));
+ }
+
+ gcInfo.gcMarkRegPtrVal(regNum, type);
+}
+
//------------------------------------------------------------------------
// genUnspillRegIfNeeded: Reload the value into a register, if needed
//
@@ -968,8 +1048,9 @@ void CodeGen::genUnspillRegIfNeeded(GenTree* tree)
// Reset spilled flag, since we are going to load a local variable from its home location.
unspillTree->gtFlags &= ~GTF_SPILLED;
- GenTreeLclVarCommon* lcl = unspillTree->AsLclVarCommon();
- LclVarDsc* varDsc = &compiler->lvaTable[lcl->GetLclNum()];
+ GenTreeLclVar* lcl = unspillTree->AsLclVar();
+ LclVarDsc* varDsc = compiler->lvaGetDesc(lcl->GetLclNum());
+ var_types spillType = unspillTree->TypeGet();
// TODO-Cleanup: The following code could probably be further merged and cleaned up.
#ifdef TARGET_XARCH
@@ -985,106 +1066,33 @@ void CodeGen::genUnspillRegIfNeeded(GenTree* tree)
// In the normalizeOnLoad case ins_Load will return an appropriate sign- or zero-
// extending load.
- var_types treeType = unspillTree->TypeGet();
- if (treeType != genActualType(varDsc->lvType) && !varTypeIsGC(treeType) && !varDsc->lvNormalizeOnLoad())
+ if (spillType != genActualType(varDsc->lvType) && !varTypeIsGC(spillType) && !varDsc->lvNormalizeOnLoad())
{
assert(!varTypeIsGC(varDsc));
- var_types spillType = genActualType(varDsc->lvType);
- unspillTree->gtType = spillType;
- inst_RV_TT(ins_Load(spillType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum())), dstReg,
- unspillTree);
- unspillTree->gtType = treeType;
- }
- else
- {
- inst_RV_TT(ins_Load(treeType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum())), dstReg, unspillTree);
+ spillType = genActualType(varDsc->lvType);
}
#elif defined(TARGET_ARM64)
var_types targetType = unspillTree->gtType;
- if (targetType != genActualType(varDsc->lvType) && !varTypeIsGC(targetType) && !varDsc->lvNormalizeOnLoad())
+ if (spillType != genActualType(varDsc->lvType) && !varTypeIsGC(spillType) && !varDsc->lvNormalizeOnLoad())
{
assert(!varTypeIsGC(varDsc));
- targetType = genActualType(varDsc->lvType);
+ spillType = genActualType(varDsc->lvType);
}
- instruction ins = ins_Load(targetType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum()));
- emitAttr attr = emitActualTypeSize(targetType);
- emitter* emit = GetEmitter();
-
- // Load local variable from its home location.
- inst_RV_TT(ins, dstReg, unspillTree, 0, attr);
#elif defined(TARGET_ARM)
- var_types targetType = unspillTree->gtType;
- instruction ins = ins_Load(targetType, compiler->isSIMDTypeLocalAligned(lcl->GetLclNum()));
- emitAttr attr = emitTypeSize(targetType);
-
- // Load local variable from its home location.
- inst_RV_TT(ins, dstReg, unspillTree, 0, attr);
+// No normalizing for ARM
#else
NYI("Unspilling not implemented for this target architecture.");
#endif
-
- // TODO-Review: We would like to call:
- // genUpdateRegLife(varDsc, /*isBorn*/ true, /*isDying*/ false DEBUGARG(tree));
- // instead of the following code, but this ends up hitting this assert:
- // assert((regSet.GetMaskVars() & regMask) == 0);
- // due to issues with LSRA resolution moves.
- // So, just force it for now. This probably indicates a condition that creates a GC hole!
- //
- // Extra note: I think we really want to call something like gcInfo.gcUpdateForRegVarMove,
- // because the variable is not really going live or dead, but that method is somewhat poorly
- // factored because it, in turn, updates rsMaskVars which is part of RegSet not GCInfo.
- // TODO-Cleanup: This code exists in other CodeGen*.cpp files, and should be moved to CodeGenCommon.cpp.
-
- // Don't update the variable's location if we are just re-spilling it again.
-
- if ((unspillTree->gtFlags & GTF_SPILL) == 0)
- {
- genUpdateVarReg(varDsc, tree);
-
-#ifdef USING_VARIABLE_LIVE_RANGE
- // We want "VariableLiveRange" inclusive on the beginbing and exclusive on the ending.
- // For that we shouldn't report an update of the variable location if is becoming dead
- // on the same native offset.
- if ((unspillTree->gtFlags & GTF_VAR_DEATH) == 0)
- {
- // Report the home change for this variable
- varLiveKeeper->siUpdateVariableLiveRange(varDsc, lcl->GetLclNum());
- }
-#endif // USING_VARIABLE_LIVE_RANGE
-
- if (!varDsc->lvLiveInOutOfHndlr)
- {
-#ifdef DEBUG
- if (VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex))
- {
- JITDUMP("\t\t\t\t\t\t\tRemoving V%02u from gcVarPtrSetCur\n", lcl->GetLclNum());
- }
-#endif // DEBUG
- VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
- }
-
-#ifdef DEBUG
- if (compiler->verbose)
- {
- printf("\t\t\t\t\t\t\tV%02u in reg ", lcl->GetLclNum());
- varDsc->PrintVarReg();
- printf(" is becoming live ");
- compiler->printTreeID(unspillTree);
- printf("\n");
- }
-#endif // DEBUG
-
- regSet.AddMaskVars(genGetRegMask(varDsc));
- }
-
- gcInfo.gcMarkRegPtrVal(dstReg, unspillTree->TypeGet());
+ bool reSpill = ((unspillTree->gtFlags & GTF_SPILL) != 0);
+ bool isLastUse = lcl->IsLastUse(0);
+ genUnspillLocal(lcl->GetLclNum(), spillType, lcl, dstReg, reSpill, isLastUse);
}
else if (unspillTree->IsMultiRegCall())
{
- GenTreeCall* call = unspillTree->AsCall();
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = retTypeDesc->GetReturnRegCount();
- GenTreeCopyOrReload* reloadTree = nullptr;
+ GenTreeCall* call = unspillTree->AsCall();
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ const unsigned regCount = retTypeDesc->GetReturnRegCount();
+ GenTreeCopyOrReload* reloadTree = nullptr;
if (tree->OperGet() == GT_RELOAD)
{
reloadTree = tree->AsCopyOrReload();
@@ -1447,7 +1455,7 @@ void CodeGen::genConsumeRegs(GenTree* tree)
#ifdef FEATURE_SIMD
// (In)Equality operation that produces bool result, when compared
// against Vector zero, marks its Vector Zero operand as contained.
- assert(tree->OperIsLeaf() || tree->IsIntegralConstVector(0));
+ assert(tree->OperIsLeaf() || tree->IsSIMDZero());
#else
assert(tree->OperIsLeaf());
#endif
@@ -1849,6 +1857,41 @@ void CodeGen::genConsumeBlockOp(GenTreeBlk* blkNode, regNumber dstReg, regNumber
genSetBlockSize(blkNode, sizeReg);
}
+//-------------------------------------------------------------------------
+// genSpillLocal: Generate the actual spill of a local var.
+//
+// Arguments:
+// varNum - The variable number of the local to be spilled.
+// It may be a local field.
+// type - The type of the local.
+// lclNode - The node being spilled. Note that for a multi-reg local,
+// the gtLclNum will be that of the parent struct.
+// regNum - The register that 'varNum' is currently in.
+//
+// Return Value:
+// None.
+//
+void CodeGen::genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclNode, regNumber regNum)
+{
+ LclVarDsc* varDsc = compiler->lvaGetDesc(varNum);
+ assert(!varDsc->lvNormalizeOnStore() || (type == genActualType(varDsc->TypeGet())));
+
+ // We have a register candidate local that is marked with GTF_SPILL.
+ // This flag generally means that we need to spill this local.
+ // The exception is the case of a use of an EH var use that is being "spilled"
+ // to the stack, indicated by GTF_SPILL (note that all EH lclVar defs are always
+ // spilled, i.e. write-thru).
+ // An EH var use is always valid on the stack (so we don't need to actually spill it),
+ // but the GTF_SPILL flag records the fact that the register value is going dead.
+ if (((lclNode->gtFlags & GTF_VAR_DEF) != 0) || !varDsc->lvLiveInOutOfHndlr)
+ {
+ // Store local variable to its home location.
+ // Ensure that lclVar stores are typed correctly.
+ GetEmitter()->emitIns_S_R(ins_Store(type, compiler->isSIMDTypeLocalAligned(varNum)), emitTypeSize(type), regNum,
+ varNum, 0);
+ }
+}
+
//-------------------------------------------------------------------------
// genProduceReg: do liveness update for register produced by the current
// node in codegen after code has been emitted for it.
@@ -1877,24 +1920,8 @@ void CodeGen::genProduceReg(GenTree* tree)
if (genIsRegCandidateLocal(tree))
{
- unsigned varNum = tree->AsLclVarCommon()->GetLclNum();
- LclVarDsc* varDsc = compiler->lvaGetDesc(varNum);
- assert(!varDsc->lvNormalizeOnStore() || (tree->TypeGet() == genActualType(varDsc->TypeGet())));
-
- // If we reach here, we have a register candidate local that is marked with GTF_SPILL.
- // This flag generally means that we need to spill this local.
- // The exception is the case of a use of an EH var use that is being "spilled"
- // to the stack, indicated by GTF_SPILL (note that all EH lclVar defs are always
- // spilled, i.e. write-thru).
- // An EH var use is always valid on the stack (so we don't need to actually spill it),
- // but the GTF_SPILL flag records the fact that the register value is going dead.
- if (((tree->gtFlags & GTF_VAR_DEF) != 0) || !varDsc->lvLiveInOutOfHndlr)
- {
- // Store local variable to its home location.
- // Ensure that lclVar stores are typed correctly.
- inst_TT_RV(ins_Store(tree->gtType, compiler->isSIMDTypeLocalAligned(varNum)),
- emitTypeSize(tree->TypeGet()), tree, tree->GetRegNum());
- }
+ unsigned varNum = tree->AsLclVarCommon()->GetLclNum();
+ genSpillLocal(varNum, tree->TypeGet(), tree->AsLclVar(), tree->GetRegNum());
}
else
{
@@ -1904,9 +1931,9 @@ void CodeGen::genProduceReg(GenTree* tree)
// know which of its result regs needs to be spilled.
if (tree->IsMultiRegCall())
{
- GenTreeCall* call = tree->AsCall();
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = retTypeDesc->GetReturnRegCount();
+ GenTreeCall* call = tree->AsCall();
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ const unsigned regCount = retTypeDesc->GetReturnRegCount();
for (unsigned i = 0; i < regCount; ++i)
{
@@ -1983,13 +2010,13 @@ void CodeGen::genProduceReg(GenTree* tree)
// the register as live, with a GC pointer, if the variable is dead.
if (!genIsRegCandidateLocal(tree) || ((tree->gtFlags & GTF_VAR_DEATH) == 0))
{
- // Multi-reg call node will produce more than one register result.
- // Mark all the regs produced by call node.
+ // Multi-reg nodes will produce more than one register result.
+ // Mark all the regs produced by the node.
if (tree->IsMultiRegCall())
{
- GenTreeCall* call = tree->AsCall();
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = retTypeDesc->GetReturnRegCount();
+ const GenTreeCall* call = tree->AsCall();
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ const unsigned regCount = retTypeDesc->GetReturnRegCount();
for (unsigned i = 0; i < regCount; ++i)
{
@@ -2006,10 +2033,10 @@ void CodeGen::genProduceReg(GenTree* tree)
// A multi-reg GT_COPY node produces those regs to which
// copy has taken place.
- GenTreeCopyOrReload* copy = tree->AsCopyOrReload();
- GenTreeCall* call = copy->gtGetOp1()->AsCall();
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = retTypeDesc->GetReturnRegCount();
+ const GenTreeCopyOrReload* copy = tree->AsCopyOrReload();
+ const GenTreeCall* call = copy->gtGetOp1()->AsCall();
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ const unsigned regCount = retTypeDesc->GetReturnRegCount();
for (unsigned i = 0; i < regCount; ++i)
{
diff --git a/src/coreclr/src/jit/codegenxarch.cpp b/src/coreclr/src/jit/codegenxarch.cpp
index 0e041c3061d439..4d8d2fbf9e2172 100644
--- a/src/coreclr/src/jit/codegenxarch.cpp
+++ b/src/coreclr/src/jit/codegenxarch.cpp
@@ -54,14 +54,14 @@ void CodeGen::genSetRegToIcon(regNumber reg, ssize_t val, var_types type, insFla
// genSetGSSecurityCookie: Set the "GS" security cookie in the prolog.
//
// Arguments:
-// initReg - register to use as a scratch register
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed is set to 'false' if and only if
-// this call sets 'initReg' to a non-zero value.
+// initReg - register to use as a scratch register
+// pInitRegModified - OUT parameter. *pInitRegModified is set to 'true' if and only if
+// this call sets 'initReg' to a non-zero value.
//
// Return Value:
// None
//
-void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -85,7 +85,7 @@ void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed)
// initReg = #GlobalSecurityCookieVal64; [frame.GSSecurityCookie] = initReg
genSetRegToIcon(initReg, compiler->gsGlobalSecurityCookieVal, TYP_I_IMPL);
GetEmitter()->emitIns_S_R(INS_mov, EA_PTRSIZE, initReg, compiler->lvaGSSecurityCookie, 0);
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
else
#endif
@@ -106,7 +106,7 @@ void CodeGen::genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed)
GetEmitter()->emitIns_S_R(INS_mov, EA_PTRSIZE, REG_EAX, compiler->lvaGSSecurityCookie, 0);
if (initReg == REG_EAX)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
}
}
@@ -137,14 +137,14 @@ void CodeGen::genEmitGSCookieCheck(bool pushReg)
ReturnTypeDesc retTypeDesc;
if (varTypeIsLong(compiler->info.compRetNativeType))
{
- retTypeDesc.InitializeLongReturnType(compiler);
+ retTypeDesc.InitializeLongReturnType();
}
else // we must have a struct return type
{
retTypeDesc.InitializeStructReturnType(compiler, compiler->info.compMethodInfo->args.retTypeClass);
}
- unsigned regCount = retTypeDesc.GetReturnRegCount();
+ const unsigned regCount = retTypeDesc.GetReturnRegCount();
// Only x86 and x64 Unix ABI allows multi-reg return and
// number of result regs should be equal to MAX_RET_REG_COUNT.
@@ -212,32 +212,6 @@ void CodeGen::genEmitGSCookieCheck(bool pushReg)
regGSCheck = REG_EAX;
regMaskGSCheck = RBM_EAX;
#else // !TARGET_X86
- // Tail calls from methods that need GS check: We need to preserve registers while
- // emitting GS cookie check for a tail prefixed call or a jmp. To emit GS cookie
- // check, we might need a register. This won't be an issue for jmp calls for the
- // reason mentioned below (see comment starting with "Jmp Calls:").
- //
- // The following are the possible solutions in case of tail prefixed calls:
- // 1) Use R11 - ignore tail prefix on calls that need to pass a param in R11 when
- // present in methods that require GS cookie check. Rest of the tail calls that
- // do not require R11 will be honored.
- // 2) Internal register - GT_CALL node reserves an internal register and emits GS
- // cookie check as part of tail call codegen. GenExitCode() needs to special case
- // fast tail calls implemented as epilog+jmp or such tail calls should always get
- // dispatched via helper.
- // 3) Materialize GS cookie check as a separate node hanging off GT_CALL node in
- // right execution order during rationalization.
- //
- // There are two calls that use R11: VSD and calli pinvokes with cookie param. Tail
- // prefix on pinvokes is ignored. That is, options 2 and 3 will allow tail prefixed
- // VSD calls from methods that need GS check.
- //
- // Tail prefixed calls: Right now for Jit64 compat, method requiring GS cookie check
- // ignores tail prefix. In future, if we intend to support tail calls from such a method,
- // consider one of the options mentioned above. For now adding an assert that we don't
- // expect to see a tail call in a method that requires GS check.
- noway_assert(!compiler->compTailCallUsed);
-
// Jmp calls: specify method handle using which JIT queries VM for its entry point
// address and hence it can neither be a VSD call nor PInvoke calli with cookie
// parameter. Therefore, in case of jmp calls it is safe to use R11.
@@ -1150,214 +1124,55 @@ void CodeGen::genCodeForMul(GenTreeOp* treeNode)
genProduceReg(treeNode);
}
+#ifdef FEATURE_SIMD
//------------------------------------------------------------------------
-// isStructReturn: Returns whether the 'treeNode' is returning a struct.
+// genSIMDSplitReturn: Generates code for returning a fixed-size SIMD type that lives
+// in a single register, but is returned in multiple registers.
//
// Arguments:
-// treeNode - The tree node to evaluate whether is a struct return.
-//
-// Return Value:
-// For AMD64 *nix: returns true if the 'treeNode" is a GT_RETURN node, of type struct.
-// Otherwise returns false.
-// For other platforms always returns false.
+// src - The source of the return
+// retTypeDesc - The return type descriptor.
//
-bool CodeGen::isStructReturn(GenTree* treeNode)
+void CodeGen::genSIMDSplitReturn(GenTree* src, ReturnTypeDesc* retTypeDesc)
{
- // This method could be called for 'treeNode' of GT_RET_FILT or GT_RETURN.
- // For the GT_RET_FILT, the return is always
- // a bool or a void, for the end of a finally block.
- noway_assert(treeNode->OperGet() == GT_RETURN || treeNode->OperGet() == GT_RETFILT);
- if (treeNode->OperGet() != GT_RETURN)
- {
- return false;
- }
+ assert(varTypeIsSIMD(src));
+ assert(src->isUsedFromReg());
-#ifdef UNIX_AMD64_ABI
- return varTypeIsStruct(treeNode);
-#else // !UNIX_AMD64_ABI
- assert(!varTypeIsStruct(treeNode));
- return false;
-#endif // UNIX_AMD64_ABI
-}
+ // This is a case of operand is in a single reg and needs to be
+ // returned in multiple ABI return registers.
+ regNumber opReg = src->GetRegNum();
+ regNumber reg0 = retTypeDesc->GetABIReturnReg(0);
+ regNumber reg1 = retTypeDesc->GetABIReturnReg(1);
-//------------------------------------------------------------------------
-// genStructReturn: Generates code for returning a struct.
-//
-// Arguments:
-// treeNode - The GT_RETURN tree node.
-//
-// Return Value:
-// None
-//
-// Assumption:
-// op1 of GT_RETURN node is either GT_LCL_VAR or multi-reg GT_CALL
-void CodeGen::genStructReturn(GenTree* treeNode)
-{
- assert(treeNode->OperGet() == GT_RETURN);
- GenTree* op1 = treeNode->gtGetOp1();
-
-#ifdef UNIX_AMD64_ABI
- if (op1->OperGet() == GT_LCL_VAR)
+ if (opReg != reg0 && opReg != reg1)
{
- GenTreeLclVarCommon* lclVar = op1->AsLclVarCommon();
- LclVarDsc* varDsc = &(compiler->lvaTable[lclVar->GetLclNum()]);
- assert(varDsc->lvIsMultiRegRet);
-
- ReturnTypeDesc retTypeDesc;
- retTypeDesc.InitializeStructReturnType(compiler, varDsc->lvVerTypeInfo.GetClassHandle());
- unsigned regCount = retTypeDesc.GetReturnRegCount();
- assert(regCount == MAX_RET_REG_COUNT);
-
- if (varTypeIsEnregisterable(op1))
- {
- // Right now the only enregisterable structs supported are SIMD vector types.
- assert(varTypeIsSIMD(op1));
- assert(op1->isUsedFromReg());
-
- // This is a case of operand is in a single reg and needs to be
- // returned in multiple ABI return registers.
- regNumber opReg = genConsumeReg(op1);
- regNumber reg0 = retTypeDesc.GetABIReturnReg(0);
- regNumber reg1 = retTypeDesc.GetABIReturnReg(1);
-
- if (opReg != reg0 && opReg != reg1)
- {
- // Operand reg is different from return regs.
- // Copy opReg to reg0 and let it to be handled by one of the
- // two cases below.
- inst_RV_RV(ins_Copy(TYP_DOUBLE), reg0, opReg, TYP_DOUBLE);
- opReg = reg0;
- }
-
- if (opReg == reg0)
- {
- assert(opReg != reg1);
-
- // reg0 - already has required 8-byte in bit position [63:0].
- // reg1 = opReg.
- // swap upper and lower 8-bytes of reg1 so that desired 8-byte is in bit position [63:0].
- inst_RV_RV(ins_Copy(TYP_DOUBLE), reg1, opReg, TYP_DOUBLE);
- }
- else
- {
- assert(opReg == reg1);
+ // Operand reg is different from return regs.
+ // Copy opReg to reg0 and let it to be handled by one of the
+ // two cases below.
+ inst_RV_RV(ins_Copy(TYP_DOUBLE), reg0, opReg, TYP_DOUBLE);
+ opReg = reg0;
+ }
- // reg0 = opReg.
- // swap upper and lower 8-bytes of reg1 so that desired 8-byte is in bit position [63:0].
- inst_RV_RV(ins_Copy(TYP_DOUBLE), reg0, opReg, TYP_DOUBLE);
- }
- inst_RV_RV_IV(INS_shufpd, EA_16BYTE, reg1, reg1, 0x01);
- }
- else
- {
- assert(op1->isUsedFromMemory());
+ if (opReg == reg0)
+ {
+ assert(opReg != reg1);
- // Copy var on stack into ABI return registers
- int offset = 0;
- for (unsigned i = 0; i < regCount; ++i)
- {
- var_types type = retTypeDesc.GetReturnRegType(i);
- regNumber reg = retTypeDesc.GetABIReturnReg(i);
- GetEmitter()->emitIns_R_S(ins_Load(type), emitTypeSize(type), reg, lclVar->GetLclNum(), offset);
- offset += genTypeSize(type);
- }
- }
+ // reg0 - already has required 8-byte in bit position [63:0].
+ // reg1 = opReg.
+ // swap upper and lower 8-bytes of reg1 so that desired 8-byte is in bit position [63:0].
+ inst_RV_RV(ins_Copy(TYP_DOUBLE), reg1, opReg, TYP_DOUBLE);
}
else
{
- assert(op1->IsMultiRegCall() || op1->IsCopyOrReloadOfMultiRegCall());
-
- genConsumeRegs(op1);
-
- GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
- GenTreeCall* call = actualOp1->AsCall();
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = retTypeDesc->GetReturnRegCount();
- assert(regCount == MAX_RET_REG_COUNT);
+ assert(opReg == reg1);
- // Handle circular dependency between call allocated regs and ABI return regs.
- //
- // It is possible under LSRA stress that originally allocated regs of call node,
- // say rax and rdx, are spilled and reloaded to rdx and rax respectively. But
- // GT_RETURN needs to move values as follows: rdx->rax, rax->rdx. Similar kind
- // kind of circular dependency could arise between xmm0 and xmm1 return regs.
- // Codegen is expected to handle such circular dependency.
- //
- var_types regType0 = retTypeDesc->GetReturnRegType(0);
- regNumber returnReg0 = retTypeDesc->GetABIReturnReg(0);
- regNumber allocatedReg0 = call->GetRegNumByIdx(0);
-
- var_types regType1 = retTypeDesc->GetReturnRegType(1);
- regNumber returnReg1 = retTypeDesc->GetABIReturnReg(1);
- regNumber allocatedReg1 = call->GetRegNumByIdx(1);
-
- if (op1->IsCopyOrReload())
- {
- // GT_COPY/GT_RELOAD will have valid reg for those positions
- // that need to be copied or reloaded.
- regNumber reloadReg = op1->AsCopyOrReload()->GetRegNumByIdx(0);
- if (reloadReg != REG_NA)
- {
- allocatedReg0 = reloadReg;
- }
-
- reloadReg = op1->AsCopyOrReload()->GetRegNumByIdx(1);
- if (reloadReg != REG_NA)
- {
- allocatedReg1 = reloadReg;
- }
- }
-
- if (allocatedReg0 == returnReg1 && allocatedReg1 == returnReg0)
- {
- // Circular dependency - swap allocatedReg0 and allocatedReg1
- if (varTypeIsFloating(regType0))
- {
- assert(varTypeIsFloating(regType1));
-
- // The fastest way to swap two XMM regs is using PXOR
- inst_RV_RV(INS_pxor, allocatedReg0, allocatedReg1, TYP_DOUBLE);
- inst_RV_RV(INS_pxor, allocatedReg1, allocatedReg0, TYP_DOUBLE);
- inst_RV_RV(INS_pxor, allocatedReg0, allocatedReg1, TYP_DOUBLE);
- }
- else
- {
- assert(varTypeIsIntegral(regType0));
- assert(varTypeIsIntegral(regType1));
- inst_RV_RV(INS_xchg, allocatedReg1, allocatedReg0, TYP_I_IMPL);
- }
- }
- else if (allocatedReg1 == returnReg0)
- {
- // Change the order of moves to correctly handle dependency.
- if (allocatedReg1 != returnReg1)
- {
- inst_RV_RV(ins_Copy(regType1), returnReg1, allocatedReg1, regType1);
- }
-
- if (allocatedReg0 != returnReg0)
- {
- inst_RV_RV(ins_Copy(regType0), returnReg0, allocatedReg0, regType0);
- }
- }
- else
- {
- // No circular dependency case.
- if (allocatedReg0 != returnReg0)
- {
- inst_RV_RV(ins_Copy(regType0), returnReg0, allocatedReg0, regType0);
- }
-
- if (allocatedReg1 != returnReg1)
- {
- inst_RV_RV(ins_Copy(regType1), returnReg1, allocatedReg1, regType1);
- }
- }
+ // reg0 = opReg.
+ // swap upper and lower 8-bytes of reg1 so that desired 8-byte is in bit position [63:0].
+ inst_RV_RV(ins_Copy(TYP_DOUBLE), reg0, opReg, TYP_DOUBLE);
}
-#else
- unreached();
-#endif
+ inst_RV_RV_IV(INS_shufpd, EA_16BYTE, reg1, reg1, 0x01);
}
+#endif // FEATURE_SIMD
#if defined(TARGET_X86)
@@ -1888,8 +1703,13 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
break;
case GT_MEMORYBARRIER:
- instGen_MemoryBarrier();
+ {
+ CodeGen::BarrierKind barrierKind =
+ treeNode->gtFlags & GTF_MEMORYBARRIER_LOAD ? BARRIER_LOAD_ONLY : BARRIER_FULL;
+
+ instGen_MemoryBarrier(barrierKind);
break;
+ }
case GT_CMPXCHG:
genCodeForCmpXchg(treeNode->AsCmpXchg());
@@ -2030,7 +1850,7 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
}
//----------------------------------------------------------------------------------
-// genMultiRegCallStoreToLocal: store multi-reg return value of a call node to a local
+// genMultiRegStoreToLocal: store multi-reg return value of a call node to a local
//
// Arguments:
// treeNode - Gentree of GT_STORE_LCL_VAR
@@ -2038,45 +1858,52 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
// Return Value:
// None
//
-// Assumption:
-// The child of store is a multi-reg call node.
-// genProduceReg() on treeNode is made by caller of this routine.
+// Assumptions:
+// The child of store is a multi-reg node.
//
-void CodeGen::genMultiRegCallStoreToLocal(GenTree* treeNode)
+void CodeGen::genMultiRegStoreToLocal(GenTree* treeNode)
{
assert(treeNode->OperGet() == GT_STORE_LCL_VAR);
+ assert(varTypeIsStruct(treeNode) || varTypeIsMultiReg(treeNode));
+ GenTree* op1 = treeNode->gtGetOp1();
+ GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
+ assert(op1->IsMultiRegNode());
+ unsigned regCount = actualOp1->GetMultiRegCount();
-#ifdef UNIX_AMD64_ABI
- // Structs of size >=9 and <=16 are returned in two return registers on x64 Unix.
- assert(varTypeIsStruct(treeNode));
-
- // Assumption: current x64 Unix implementation requires that a multi-reg struct
+ // Assumption: The current implementation requires that a multi-reg
// var in 'var = call' is flagged as lvIsMultiRegRet to prevent it from
// being struct promoted.
- unsigned lclNum = treeNode->AsLclVarCommon()->GetLclNum();
- LclVarDsc* varDsc = &(compiler->lvaTable[lclNum]);
- noway_assert(varDsc->lvIsMultiRegRet);
- GenTree* op1 = treeNode->gtGetOp1();
- GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
- GenTreeCall* call = actualOp1->AsCall();
- assert(call->HasMultiRegRetVal());
+ unsigned lclNum = treeNode->AsLclVarCommon()->GetLclNum();
+ LclVarDsc* varDsc = compiler->lvaGetDesc(lclNum);
+ if (op1->OperIs(GT_CALL))
+ {
+ assert(regCount == MAX_RET_REG_COUNT);
+ noway_assert(varDsc->lvIsMultiRegRet);
+ }
genConsumeRegs(op1);
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- assert(retTypeDesc->GetReturnRegCount() == MAX_RET_REG_COUNT);
- unsigned regCount = retTypeDesc->GetReturnRegCount();
+#ifdef UNIX_AMD64_ABI
+ // Structs of size >=9 and <=16 are returned in two return registers on x64 Unix.
- if (treeNode->GetRegNum() != REG_NA)
+ // Handle the case of a SIMD type returned in 2 registers.
+ if (varTypeIsSIMD(treeNode) && (treeNode->GetRegNum() != REG_NA))
{
// Right now the only enregistrable structs supported are SIMD types.
- assert(varTypeIsSIMD(treeNode));
+ // They are only returned in 1 or 2 registers - the 1 register case is
+ // handled as a regular STORE_LCL_VAR.
+ // This case is always a call (AsCall() will assert if it is not).
+ GenTreeCall* call = actualOp1->AsCall();
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ assert(retTypeDesc->GetReturnRegCount() == MAX_RET_REG_COUNT);
+
+ assert(regCount == 2);
assert(varTypeIsFloating(retTypeDesc->GetReturnRegType(0)));
assert(varTypeIsFloating(retTypeDesc->GetReturnRegType(1)));
- // This is a case of two 8-bytes that comprise the operand is in
- // two different xmm registers and needs to assembled into a single
+ // This is a case where the two 8-bytes that comprise the operand are in
+ // two different xmm registers and need to be assembled into a single
// xmm register.
regNumber targetReg = treeNode->GetRegNum();
regNumber reg0 = call->GetRegNumByIdx(0);
@@ -2132,95 +1959,52 @@ void CodeGen::genMultiRegCallStoreToLocal(GenTree* treeNode)
}
}
else
+#endif // UNIX_AMD64_ABI
{
- // Stack store
+ // This may be:
+ // - a call returning multiple registers
+ // - a HW intrinsic producing two registers to be stored into a TYP_STRUCT
+ //
int offset = 0;
for (unsigned i = 0; i < regCount; ++i)
{
- var_types type = retTypeDesc->GetReturnRegType(i);
- regNumber reg = call->GetRegNumByIdx(i);
- if (op1->IsCopyOrReload())
+ var_types type = actualOp1->GetRegTypeByIndex(i);
+ regNumber reg = op1->GetRegByIndex(i);
+ if (reg == REG_NA)
{
- // GT_COPY/GT_RELOAD will have valid reg for those positions
+ // GT_COPY/GT_RELOAD will have valid reg only for those positions
// that need to be copied or reloaded.
- regNumber reloadReg = op1->AsCopyOrReload()->GetRegNumByIdx(i);
- if (reloadReg != REG_NA)
- {
- reg = reloadReg;
- }
+ assert(op1->IsCopyOrReload());
+ reg = actualOp1->GetRegByIndex(i);
}
assert(reg != REG_NA);
GetEmitter()->emitIns_S_R(ins_Store(type), emitTypeSize(type), reg, lclNum, offset);
offset += genTypeSize(type);
}
-
+ // Update variable liveness.
+ genUpdateLife(treeNode);
varDsc->SetRegNum(REG_STK);
}
-#elif defined(TARGET_X86)
- // Longs are returned in two return registers on x86.
- assert(varTypeIsLong(treeNode));
-
- // Assumption: current x86 implementation requires that a multi-reg long
- // var in 'var = call' is flagged as lvIsMultiRegRet to prevent it from
- // being promoted.
- unsigned lclNum = treeNode->AsLclVarCommon()->GetLclNum();
- LclVarDsc* varDsc = &(compiler->lvaTable[lclNum]);
- noway_assert(varDsc->lvIsMultiRegRet);
-
- GenTree* op1 = treeNode->gtGetOp1();
- GenTree* actualOp1 = op1->gtSkipReloadOrCopy();
- GenTreeCall* call = actualOp1->AsCall();
- assert(call->HasMultiRegRetVal());
-
- genConsumeRegs(op1);
-
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- unsigned regCount = retTypeDesc->GetReturnRegCount();
- assert(regCount == MAX_RET_REG_COUNT);
-
- // Stack store
- int offset = 0;
- for (unsigned i = 0; i < regCount; ++i)
- {
- var_types type = retTypeDesc->GetReturnRegType(i);
- regNumber reg = call->GetRegNumByIdx(i);
- if (op1->IsCopyOrReload())
- {
- // GT_COPY/GT_RELOAD will have valid reg for those positions
- // that need to be copied or reloaded.
- regNumber reloadReg = op1->AsCopyOrReload()->GetRegNumByIdx(i);
- if (reloadReg != REG_NA)
- {
- reg = reloadReg;
- }
- }
-
- assert(reg != REG_NA);
- GetEmitter()->emitIns_S_R(ins_Store(type), emitTypeSize(type), reg, lclNum, offset);
- offset += genTypeSize(type);
- }
-
- varDsc->SetRegNum(REG_STK);
-#else // !UNIX_AMD64_ABI && !TARGET_X86
- assert(!"Unreached");
-#endif // !UNIX_AMD64_ABI && !TARGET_X86
}
//------------------------------------------------------------------------
// genAllocLclFrame: Probe the stack and allocate the local stack frame - subtract from SP.
//
// Arguments:
-// frameSize - the size of the stack frame being allocated.
-// initReg - register to use as a scratch register.
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed is set to 'false' if and only if
-// this call sets 'initReg' to a non-zero value.
-// maskArgRegsLiveIn - incoming argument registers that are currently live.
+// frameSize - the size of the stack frame being allocated.
+// initReg - register to use as a scratch register.
+// pInitRegModified - OUT parameter. *pInitRegModified is set to 'true' if and only if
+// this call sets 'initReg' to a non-zero value.
+// maskArgRegsLiveIn - incoming argument registers that are currently live.
//
// Return value:
// None
//
-void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegZeroed, regMaskTP maskArgRegsLiveIn)
+void CodeGen::genAllocLclFrame(unsigned frameSize,
+ regNumber initReg,
+ bool* pInitRegModified,
+ regMaskTP maskArgRegsLiveIn)
{
assert(compiler->compGeneratingProlog);
@@ -2304,7 +2088,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
if (initReg == REG_DEFAULT_HELPER_CALL_TARGET)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
static_assert_no_msg((RBM_STACK_PROBE_HELPER_TRASH & RBM_STACK_PROBE_HELPER_ARG) == RBM_NONE);
@@ -2314,7 +2098,7 @@ void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pIni
if (initReg == REG_STACK_PROBE_HELPER_ARG)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
}
@@ -4344,16 +4128,32 @@ void CodeGen::genCodeForShift(GenTree* tree)
if (shiftBy->isContainedIntOrIImmed())
{
- // First, move the operand to the destination register and
- // later on perform the shift in-place.
- // (LSRA will try to avoid this situation through preferencing.)
- if (tree->GetRegNum() != operandReg)
+ // Optimize "X<<1" to "lea [reg+reg]" or "add reg, reg"
+ if (tree->OperIs(GT_LSH) && !tree->gtOverflowEx() && !tree->gtSetFlags() && shiftBy->IsIntegralConst(1))
{
- inst_RV_RV(INS_mov, tree->GetRegNum(), operandReg, targetType);
+ emitAttr size = emitTypeSize(tree);
+ if (tree->GetRegNum() == operandReg)
+ {
+ GetEmitter()->emitIns_R_R(INS_add, size, tree->GetRegNum(), operandReg);
+ }
+ else
+ {
+ GetEmitter()->emitIns_R_ARX(INS_lea, size, tree->GetRegNum(), operandReg, operandReg, 1, 0);
+ }
}
+ else
+ {
+ // First, move the operand to the destination register and
+ // later on perform the shift in-place.
+ // (LSRA will try to avoid this situation through preferencing.)
+ if (tree->GetRegNum() != operandReg)
+ {
+ inst_RV_RV(INS_mov, tree->GetRegNum(), operandReg, targetType);
+ }
- int shiftByValue = (int)shiftBy->AsIntConCommon()->IconValue();
- inst_RV_SH(ins, emitTypeSize(tree), tree->GetRegNum(), shiftByValue);
+ int shiftByValue = (int)shiftBy->AsIntConCommon()->IconValue();
+ inst_RV_SH(ins, emitTypeSize(tree), tree->GetRegNum(), shiftByValue);
+ }
}
else
{
@@ -4641,9 +4441,9 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
// var = call, where call returns a multi-reg return value
// case is handled separately.
- if (op1->gtSkipReloadOrCopy()->IsMultiRegCall())
+ if (op1->gtSkipReloadOrCopy()->IsMultiRegNode())
{
- genMultiRegCallStoreToLocal(tree);
+ genMultiRegStoreToLocal(tree);
}
else
{
@@ -4681,17 +4481,6 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
genStoreLclTypeSIMD12(tree);
return;
}
-
- // TODO-CQ: It would be better to simply contain the zero, rather than
- // generating zero into a register.
- if (varTypeIsSIMD(targetType) && (targetReg != REG_NA) && op1->IsCnsIntOrI())
- {
- // This is only possible for a zero-init.
- noway_assert(op1->IsIntegralConst(0));
- genSIMDZero(targetType, varDsc->lvBaseType, targetReg);
- genProduceReg(tree);
- return;
- }
#endif // FEATURE_SIMD
genConsumeRegs(op1);
@@ -4890,130 +4679,6 @@ void CodeGen::genCodeForIndir(GenTreeIndir* tree)
genProduceReg(tree);
}
-//------------------------------------------------------------------------
-// genRegCopy: Produce code for a GT_COPY node.
-//
-// Arguments:
-// tree - the GT_COPY node
-//
-// Notes:
-// This will copy the register(s) produced by this nodes source, to
-// the register(s) allocated to this GT_COPY node.
-// It has some special handling for these casess:
-// - when the source and target registers are in different register files
-// (note that this is *not* a conversion).
-// - when the source is a lclVar whose home location is being moved to a new
-// register (rather than just being copied for temporary use).
-//
-void CodeGen::genRegCopy(GenTree* treeNode)
-{
- assert(treeNode->OperGet() == GT_COPY);
- GenTree* op1 = treeNode->AsOp()->gtOp1;
-
- if (op1->IsMultiRegNode())
- {
- genConsumeReg(op1);
-
- GenTreeCopyOrReload* copyTree = treeNode->AsCopyOrReload();
- unsigned regCount = treeNode->GetMultiRegCount();
-
- for (unsigned i = 0; i < regCount; ++i)
- {
- var_types type = op1->GetRegTypeByIndex(i);
- regNumber fromReg = op1->GetRegByIndex(i);
- regNumber toReg = copyTree->GetRegNumByIdx(i);
-
- // A Multi-reg GT_COPY node will have a valid reg only for those positions for which a corresponding
- // result reg of the multi-reg node needs to be copied.
- if (toReg != REG_NA)
- {
- assert(toReg != fromReg);
- inst_RV_RV(ins_Copy(type), toReg, fromReg, type);
- }
- }
- }
- else
- {
- var_types targetType = treeNode->TypeGet();
- regNumber targetReg = treeNode->GetRegNum();
- assert(targetReg != REG_NA);
-
- // Check whether this node and the node from which we're copying the value have
- // different register types. This can happen if (currently iff) we have a SIMD
- // vector type that fits in an integer register, in which case it is passed as
- // an argument, or returned from a call, in an integer register and must be
- // copied if it's in an xmm register.
-
- bool srcFltReg = (varTypeIsFloating(op1) || varTypeIsSIMD(op1));
- bool tgtFltReg = (varTypeIsFloating(treeNode) || varTypeIsSIMD(treeNode));
- if (srcFltReg != tgtFltReg)
- {
- instruction ins;
- regNumber fpReg;
- regNumber intReg;
- if (tgtFltReg)
- {
- ins = ins_CopyIntToFloat(op1->TypeGet(), treeNode->TypeGet());
- fpReg = targetReg;
- intReg = op1->GetRegNum();
- }
- else
- {
- ins = ins_CopyFloatToInt(op1->TypeGet(), treeNode->TypeGet());
- intReg = targetReg;
- fpReg = op1->GetRegNum();
- }
- inst_RV_RV(ins, fpReg, intReg, targetType);
- }
- else
- {
- inst_RV_RV(ins_Copy(targetType), targetReg, genConsumeReg(op1), targetType);
- }
-
- if (op1->IsLocal())
- {
- // The lclVar will never be a def.
- // If it is a last use, the lclVar will be killed by genConsumeReg(), as usual, and genProduceReg will
- // appropriately set the gcInfo for the copied value.
- // If not, there are two cases we need to handle:
- // - If this is a TEMPORARY copy (indicated by the GTF_VAR_DEATH flag) the variable
- // will remain live in its original register.
- // genProduceReg() will appropriately set the gcInfo for the copied value,
- // and genConsumeReg will reset it.
- // - Otherwise, we need to update register info for the lclVar.
-
- GenTreeLclVarCommon* lcl = op1->AsLclVarCommon();
- assert((lcl->gtFlags & GTF_VAR_DEF) == 0);
-
- if ((lcl->gtFlags & GTF_VAR_DEATH) == 0 && (treeNode->gtFlags & GTF_VAR_DEATH) == 0)
- {
- LclVarDsc* varDsc = &compiler->lvaTable[lcl->GetLclNum()];
-
- // If we didn't just spill it (in genConsumeReg, above), then update the register info
- if (varDsc->GetRegNum() != REG_STK)
- {
- // The old location is dying
- genUpdateRegLife(varDsc, /*isBorn*/ false, /*isDying*/ true DEBUGARG(op1));
-
- gcInfo.gcMarkRegSetNpt(genRegMask(op1->GetRegNum()));
-
- genUpdateVarReg(varDsc, treeNode);
-
-#ifdef USING_VARIABLE_LIVE_RANGE
- // Report the home change for this variable
- varLiveKeeper->siUpdateVariableLiveRange(varDsc, lcl->GetLclNum());
-#endif // USING_VARIABLE_LIVE_RANGE
-
- // The new location is going live
- genUpdateRegLife(varDsc, /*isBorn*/ true, /*isDying*/ false DEBUGARG(treeNode));
- }
- }
- }
- }
-
- genProduceReg(treeNode);
-}
-
//------------------------------------------------------------------------
// genCodeForStoreInd: Produce code for a GT_STOREIND node.
//
@@ -5334,7 +4999,7 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
assert(!call->IsVirtual() || call->gtControlExpr || call->gtCallAddr);
// Insert a GS check if necessary
- if (call->IsTailCallViaHelper())
+ if (call->IsTailCallViaJitHelper())
{
if (compiler->getNeedsGSSecurityCookie())
{
@@ -5506,9 +5171,9 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
}
// Determine return value size(s).
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- emitAttr retSize = EA_PTRSIZE;
- emitAttr secondRetSize = EA_UNKNOWN;
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ emitAttr retSize = EA_PTRSIZE;
+ emitAttr secondRetSize = EA_UNKNOWN;
if (call->HasMultiRegRetVal())
{
@@ -5555,20 +5220,6 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
#if defined(TARGET_X86)
bool fCallerPop = call->CallerPop();
-#ifdef UNIX_X86_ABI
- if (!call->IsUnmanaged())
- {
- CorInfoCallConv callConv = CORINFO_CALLCONV_DEFAULT;
-
- if ((callType != CT_HELPER) && call->callSig)
- {
- callConv = call->callSig->callConv;
- }
-
- fCallerPop |= IsCallerPop(callConv);
- }
-#endif // UNIX_X86_ABI
-
// If the callee pops the arguments, we pass a positive value as the argSize, and the emitter will
// adjust its stack level accordingly.
// If the caller needs to explicitly pop its arguments, we must pass a negative value, and then do the
@@ -5747,10 +5398,9 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
// clang-format on
}
- // if it was a pinvoke we may have needed to get the address of a label
+ // if it was a pinvoke or intrinsic we may have needed to get the address of a label
if (genPendingCallLabel)
{
- assert(call->IsUnmanaged());
genDefineInlineTempLabel(genPendingCallLabel);
genPendingCallLabel = nullptr;
}
@@ -5786,7 +5436,7 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
if (call->HasMultiRegRetVal())
{
assert(retTypeDesc != nullptr);
- unsigned regCount = retTypeDesc->GetReturnRegCount();
+ const unsigned regCount = retTypeDesc->GetReturnRegCount();
// If regs allocated to call node are different from ABI return
// regs in which the call has returned its result, move the result
@@ -7211,7 +6861,11 @@ void CodeGen::genSSE2BitwiseOp(GenTree* treeNode)
if (*bitMask == nullptr)
{
assert(cnsAddr != nullptr);
- *bitMask = GetEmitter()->emitAnyConst(cnsAddr, genTypeSize(targetType), emitDataAlignment::Preferred);
+
+ UNATIVE_OFFSET cnsSize = genTypeSize(targetType);
+ UNATIVE_OFFSET cnsAlign = (compiler->compCodeOpt() != Compiler::SMALL_CODE) ? cnsSize : 1;
+
+ *bitMask = GetEmitter()->emitAnyConst(cnsAddr, cnsSize, cnsAlign);
}
// We need an additional register for bitmask.
@@ -8845,9 +8499,9 @@ void CodeGen::genAmd64EmitterUnitTests()
// genProfilingEnterCallback: Generate the profiling function enter callback.
//
// Arguments:
-// initReg - register to use as scratch register
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed set to 'false' if 'initReg' is
-// not zero after this call.
+// initReg - register to use as scratch register
+// pInitRegModified - OUT parameter. *pInitRegModified set to 'true' if 'initReg' is
+// not zero after this call.
//
// Return Value:
// None
@@ -8866,7 +8520,7 @@ void CodeGen::genAmd64EmitterUnitTests()
// 4. All registers are preserved.
// 5. The helper pops the FunctionIDOrClientID argument from the stack.
//
-void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -9011,14 +8665,14 @@ void CodeGen::genProfilingLeaveCallback(unsigned helper)
// genProfilingEnterCallback: Generate the profiling function enter callback.
//
// Arguments:
-// initReg - register to use as scratch register
-// pInitRegZeroed - OUT parameter. *pInitRegZeroed set to 'false' if 'initReg' is
-// not zero after this call.
+// initReg - register to use as scratch register
+// pInitRegModified - OUT parameter. *pInitRegModified set to 'true' if 'initReg' is
+// not zero after this call.
//
// Return Value:
// None
//
-void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
+void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegModified)
{
assert(compiler->compGeneratingProlog);
@@ -9155,7 +8809,7 @@ void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
// If initReg is one of RBM_CALLEE_TRASH, then it needs to be zero'ed before using.
if ((RBM_CALLEE_TRASH & genRegMask(initReg)) != 0)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
#else // !defined(UNIX_AMD64_ABI)
@@ -9204,7 +8858,7 @@ void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
// If initReg is one of RBM_CALLEE_TRASH, then it needs to be zero'ed before using.
if ((RBM_CALLEE_TRASH & genRegMask(initReg)) != 0)
{
- *pInitRegZeroed = false;
+ *pInitRegModified = true;
}
#endif // !defined(UNIX_AMD64_ABI)
diff --git a/src/coreclr/src/jit/compiler.cpp b/src/coreclr/src/jit/compiler.cpp
index a757488847208e..0a9003f51268c8 100644
--- a/src/coreclr/src/jit/compiler.cpp
+++ b/src/coreclr/src/jit/compiler.cpp
@@ -1825,6 +1825,8 @@ void Compiler::compInit(ArenaAllocator* pAlloc, InlineInfo* inlineInfo)
compFloatingPointUsed = false;
compUnsafeCastUsed = false;
+ compSuppressedZeroInit = false;
+
compNeedsGSSecurityCookie = false;
compGSReorderStackLayout = false;
@@ -2159,7 +2161,7 @@ const char* Compiler::compLocalVarName(unsigned varNum, unsigned offs)
void Compiler::compSetProcessor()
{
//
- // NOTE: This function needs to be kept in sync with EEJitManager::SetCpuInfo() in vm\codemap.cpp
+ // NOTE: This function needs to be kept in sync with EEJitManager::SetCpuInfo() in vm\codeman.cpp
//
const JitFlags& jitFlags = *opts.jitFlags;
@@ -2193,13 +2195,14 @@ void Compiler::compSetProcessor()
#endif // TARGET_X86
+ // The VM will set the ISA flags depending on actual hardware support.
+ // We then select which ISAs to leave enabled based on the JIT config.
+ // The exception to this is the dummy Vector64/128/256 ISAs, which must be added explicitly.
CORINFO_InstructionSetFlags instructionSetFlags = jitFlags.GetInstructionSetFlags();
opts.compSupportsISA = 0;
opts.compSupportsISAReported = 0;
#ifdef TARGET_XARCH
- bool avxSupported = false;
-
if (JitConfig.EnableHWIntrinsic())
{
// Dummy ISAs for simplifying the JIT code
@@ -2313,8 +2316,6 @@ void Compiler::compSetProcessor()
if (JitConfig.EnableHWIntrinsic())
{
// Dummy ISAs for simplifying the JIT code
- instructionSetFlags.AddInstructionSet(InstructionSet_ArmBase);
- instructionSetFlags.AddInstructionSet(InstructionSet_ArmBase_Arm64);
instructionSetFlags.AddInstructionSet(InstructionSet_Vector64);
instructionSetFlags.AddInstructionSet(InstructionSet_Vector128);
}
@@ -2693,6 +2694,11 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
opts.compTailCallOpt = true;
#endif // FEATURE_TAILCALL_OPT
+#if FEATURE_FASTTAILCALL
+ // By default fast tail calls are enabled.
+ opts.compFastTailCalls = true;
+#endif // FEATURE_FASTTAILCALL
+
if (compIsForInlining())
{
return;
@@ -3033,6 +3039,13 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
}
#endif
+#if FEATURE_FASTTAILCALL
+ if (JitConfig.FastTailCalls() == 0)
+ {
+ opts.compFastTailCalls = false;
+ }
+#endif // FEATURE_FASTTAILCALL
+
opts.compScopeInfo = opts.compDbgInfo;
#ifdef LATE_DISASM
@@ -4461,9 +4474,16 @@ void Compiler::compCompile(void** methodCodePtr, ULONG* methodCodeSize, JitFlags
};
DoPhase(this, PHASE_COMPUTE_PREDS, computePredsPhase);
- // Run an early flow graph simplification pass
+ // Now that we have pred lists, do some flow-related optimizations
+ //
if (opts.OptimizationEnabled())
{
+ // Merge common throw blocks
+ //
+ DoPhase(this, PHASE_MERGE_THROWS, &Compiler::fgTailMergeThrows);
+
+ // Run an early flow graph simplification pass
+ //
auto earlyUpdateFlowGraphPhase = [this]() {
const bool doTailDup = false;
fgUpdateFlowGraph(doTailDup);
@@ -4578,9 +4598,6 @@ void Compiler::compCompile(void** methodCodePtr, ULONG* methodCodeSize, JitFlags
if (opts.OptimizationEnabled())
{
- // Merge common throw blocks
- //
- DoPhase(this, PHASE_MERGE_THROWS, &Compiler::fgTailMergeThrows);
// Optimize block order
//
DoPhase(this, PHASE_OPTIMIZE_LAYOUT, &Compiler::optOptimizeLayout);
@@ -4673,6 +4690,8 @@ void Compiler::compCompile(void** methodCodePtr, ULONG* methodCodeSize, JitFlags
DoPhase(this, PHASE_BUILD_SSA, &Compiler::fgSsaBuild);
}
+ DoPhase(this, PHASE_ZERO_INITS, &Compiler::optRemoveRedundantZeroInits);
+
if (doEarlyProp)
{
// Propagate array length and rewrite getType() method call
@@ -5876,6 +5895,8 @@ int Compiler::compCompileHelper(CORINFO_MODULE_HANDLE classPtr,
info.compPublishStubParam = opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PUBLISH_SECRET_PARAM);
+ info.compHasNextCallRetAddr = false;
+
switch (methodInfo->args.getCallConv())
{
case CORINFO_CALLCONV_VARARG:
@@ -8979,9 +9000,9 @@ void cTreeFlags(Compiler* comp, GenTree* tree)
{
chars += printf("[CALL_M_FRAME_VAR_DEATH]");
}
- if (call->gtCallMoreFlags & GTF_CALL_M_TAILCALL_VIA_HELPER)
+ if (call->gtCallMoreFlags & GTF_CALL_M_TAILCALL_VIA_JIT_HELPER)
{
- chars += printf("[CALL_M_TAILCALL_VIA_HELPER]");
+ chars += printf("[CALL_M_TAILCALL_VIA_JIT_HELPER]");
}
#if FEATURE_TAILCALL_OPT
if (call->gtCallMoreFlags & GTF_CALL_M_IMPLICIT_TAILCALL)
diff --git a/src/coreclr/src/jit/compiler.h b/src/coreclr/src/jit/compiler.h
index 9948bdea3c7b40..c6181d5e194a55 100644
--- a/src/coreclr/src/jit/compiler.h
+++ b/src/coreclr/src/jit/compiler.h
@@ -61,6 +61,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
#include "hwintrinsic.h"
#include "simd.h"
+#include "simdashwintrinsic.h"
// This is only used locally in the JIT to indicate that
// a verification block should be inserted
@@ -515,6 +516,12 @@ class LclVarDsc
unsigned char lvImplicitlyReferenced : 1; // true if there are non-IR references to this local (prolog, epilog, gc,
// eh)
+ unsigned char lvSuppressedZeroInit : 1; // local needs zero init if we transform tail call to loop
+
+ unsigned char lvHasExplicitInit : 1; // The local is explicitly initialized and doesn't need zero initialization in
+ // the prolog. If the local has gc pointers, there are no gc-safe points
+ // between the prolog and the explicit initialization.
+
union {
unsigned lvFieldLclStart; // The index of the local var representing the first field in the promoted struct
// local. For implicit byref parameters, this gets hijacked between
@@ -1735,6 +1742,10 @@ struct fgArgTabEntry
#else
unsigned int regSize = 1;
#endif
+
+ if (numRegs > MAX_ARG_REG_COUNT)
+ NO_WAY("Multireg argument exceeds the maximum length");
+
for (unsigned int regIndex = 1; regIndex < numRegs; regIndex++)
{
argReg = (regNumber)(argReg + regSize);
@@ -2093,6 +2104,8 @@ class Compiler
bool shouldUseVerboseSsa();
bool treesBeforeAfterMorph; // If true, print trees before/after morphing (paired by an intra-compilation id:
int morphNum; // This counts the the trees that have been morphed, allowing us to label each uniquely.
+ bool doExtraSuperPmiQueries;
+ void makeExtraStructQueries(CORINFO_CLASS_HANDLE structHandle, int level); // Make queries recursively 'level' deep.
const char* VarNameToStr(VarName name)
{
@@ -2566,6 +2579,10 @@ class Compiler
GenTreeCall* gtNewHelperCallNode(unsigned helper, var_types type, GenTreeCall::Use* args = nullptr);
+ GenTreeCall* gtNewRuntimeLookupHelperCallNode(CORINFO_RUNTIME_LOOKUP* pRuntimeLookup,
+ GenTree* ctxTree,
+ void* compileTimeHandle);
+
GenTree* gtNewLclvNode(unsigned lnum, var_types type DEBUGARG(IL_OFFSETX ILoffs = BAD_IL_OFFSET));
GenTree* gtNewLclLNode(unsigned lnum, var_types type DEBUGARG(IL_OFFSETX ILoffs = BAD_IL_OFFSET));
@@ -2607,6 +2624,46 @@ class Compiler
NamedIntrinsic hwIntrinsicID,
var_types baseType,
unsigned size);
+
+ GenTreeHWIntrinsic* gtNewSimdAsHWIntrinsicNode(var_types type,
+ NamedIntrinsic hwIntrinsicID,
+ var_types baseType,
+ unsigned size)
+ {
+ GenTreeHWIntrinsic* node = gtNewSimdHWIntrinsicNode(type, hwIntrinsicID, baseType, size);
+ node->gtFlags |= GTF_SIMDASHW_OP;
+ return node;
+ }
+
+ GenTreeHWIntrinsic* gtNewSimdAsHWIntrinsicNode(
+ var_types type, GenTree* op1, NamedIntrinsic hwIntrinsicID, var_types baseType, unsigned size)
+ {
+ GenTreeHWIntrinsic* node = gtNewSimdHWIntrinsicNode(type, op1, hwIntrinsicID, baseType, size);
+ node->gtFlags |= GTF_SIMDASHW_OP;
+ return node;
+ }
+
+ GenTreeHWIntrinsic* gtNewSimdAsHWIntrinsicNode(
+ var_types type, GenTree* op1, GenTree* op2, NamedIntrinsic hwIntrinsicID, var_types baseType, unsigned size)
+ {
+ GenTreeHWIntrinsic* node = gtNewSimdHWIntrinsicNode(type, op1, op2, hwIntrinsicID, baseType, size);
+ node->gtFlags |= GTF_SIMDASHW_OP;
+ return node;
+ }
+
+ GenTreeHWIntrinsic* gtNewSimdAsHWIntrinsicNode(var_types type,
+ GenTree* op1,
+ GenTree* op2,
+ GenTree* op3,
+ NamedIntrinsic hwIntrinsicID,
+ var_types baseType,
+ unsigned size)
+ {
+ GenTreeHWIntrinsic* node = gtNewSimdHWIntrinsicNode(type, op1, op2, op3, hwIntrinsicID, baseType, size);
+ node->gtFlags |= GTF_SIMDASHW_OP;
+ return node;
+ }
+
GenTreeHWIntrinsic* gtNewScalarHWIntrinsicNode(var_types type, GenTree* op1, NamedIntrinsic hwIntrinsicID);
GenTreeHWIntrinsic* gtNewScalarHWIntrinsicNode(var_types type,
GenTree* op1,
@@ -2614,7 +2671,6 @@ class Compiler
NamedIntrinsic hwIntrinsicID);
GenTreeHWIntrinsic* gtNewScalarHWIntrinsicNode(
var_types type, GenTree* op1, GenTree* op2, GenTree* op3, NamedIntrinsic hwIntrinsicID);
- GenTree* gtNewMustThrowException(unsigned helper, var_types type, CORINFO_CLASS_HANDLE clsHnd);
CORINFO_CLASS_HANDLE gtGetStructHandleForHWSIMD(var_types simdType, var_types simdBaseType);
var_types getBaseTypeFromArgIfNeeded(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
@@ -2622,6 +2678,8 @@ class Compiler
var_types baseType);
#endif // FEATURE_HW_INTRINSICS
+ GenTree* gtNewMustThrowException(unsigned helper, var_types type, CORINFO_CLASS_HANDLE clsHnd);
+
GenTreeLclFld* gtNewLclFldNode(unsigned lnum, var_types type, unsigned offset);
GenTree* gtNewInlineCandidateReturnExpr(GenTree* inlineCandidate, var_types type);
@@ -2645,7 +2703,7 @@ class Compiler
fgArgTabEntry* gtArgEntryByLateArgIndex(GenTreeCall* call, unsigned lateArgInx);
static GenTree* gtArgNodeByLateArgInx(GenTreeCall* call, unsigned lateArgInx);
- GenTree* gtNewAssignNode(GenTree* dst, GenTree* src);
+ GenTreeOp* gtNewAssignNode(GenTree* dst, GenTree* src);
GenTree* gtNewTempAssign(unsigned tmp,
GenTree* val,
@@ -2852,9 +2910,7 @@ class Compiler
// Get the element handle for an array of ref type.
CORINFO_CLASS_HANDLE gtGetArrayElementClassHandle(GenTree* array);
// Get a class handle from a helper call argument
- CORINFO_CLASS_HANDLE gtGetHelperArgClassHandle(GenTree* array,
- unsigned* runtimeLookupCount = nullptr,
- GenTree** handleTree = nullptr);
+ CORINFO_CLASS_HANDLE gtGetHelperArgClassHandle(GenTree* array, GenTree** handleTree = nullptr);
// Get the class handle for a field
CORINFO_CLASS_HANDLE gtGetFieldClassHandle(CORINFO_FIELD_HANDLE fieldHnd, bool* pIsExact, bool* pIsNonNull);
// Check if this tree is a gc static base helper call
@@ -3105,6 +3161,10 @@ class Compiler
unsigned lvaOutgoingArgSpaceVar; // dummy TYP_LCLBLK var for fixed outgoing argument space
PhasedVar lvaOutgoingArgSpaceSize; // size of fixed outgoing argument space
#endif // FEATURE_FIXED_OUT_ARGS
+ // Variable representing the return address. The helper-based tailcall
+ // mechanism passes the address of the return address to a runtime helper
+ // where it is used to detect tail-call chains.
+ unsigned lvaRetAddrVar;
#ifdef TARGET_ARM
// On architectures whose ABIs allow structs to be passed in registers, struct promotion will sometimes
@@ -3127,7 +3187,7 @@ class Compiler
#endif // defined(DEBUG) && defined(TARGET_X86)
- unsigned lvaGenericsContextUseCount;
+ bool lvaGenericsContextInUse;
bool lvaKeepAliveAndReportThis(); // Synchronized instance method of a reference type, or
// CORINFO_GENERICS_CTXT_FROM_THIS?
@@ -3455,19 +3515,21 @@ class Compiler
assert(varDsc->lvSize() == 16);
#endif // defined(TARGET_64BIT)
- // We make local variable SIMD12 types 16 bytes instead of just 12. lvSize()
- // already does this calculation. However, we also need to prevent mapping types if the var is a
- // dependently promoted struct field, which must remain its exact size within its parent struct.
- // However, we don't know this until late, so we may have already pretended the field is bigger
- // before that.
- if ((varDsc->lvSize() == 16) && !lvaIsFieldOfDependentlyPromotedStruct(varDsc))
+ // We make local variable SIMD12 types 16 bytes instead of just 12.
+ // lvSize() will return 16 bytes for SIMD12, even for fields.
+ // However, we can't do that mapping if the var is a dependently promoted struct field.
+ // Such a field must remain its exact size within its parent struct unless it is a single
+ // field *and* it is the only field in a struct of 16 bytes.
+ if (varDsc->lvSize() != 16)
{
- return true;
+ return false;
}
- else
+ if (lvaIsFieldOfDependentlyPromotedStruct(varDsc))
{
- return false;
+ LclVarDsc* parentVarDsc = lvaGetDesc(varDsc->lvParentLcl);
+ return (parentVarDsc->lvFieldCnt == 1) && (parentVarDsc->lvSize() == 16);
}
+ return true;
}
#endif // defined(FEATURE_SIMD)
@@ -3668,6 +3730,10 @@ class Compiler
CorInfoIntrinsics intrinsicID,
bool tailCall);
NamedIntrinsic lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method);
+ GenTree* impUnsupportedNamedIntrinsic(unsigned helper,
+ CORINFO_METHOD_HANDLE method,
+ CORINFO_SIG_INFO* sig,
+ bool mustExpand);
#ifdef FEATURE_HW_INTRINSICS
GenTree* impHWIntrinsic(NamedIntrinsic intrinsic,
@@ -3675,33 +3741,63 @@ class Compiler
CORINFO_METHOD_HANDLE method,
CORINFO_SIG_INFO* sig,
bool mustExpand);
- GenTree* impUnsupportedHWIntrinsic(unsigned helper,
- CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig,
- bool mustExpand);
+ GenTree* impSimdAsHWIntrinsic(NamedIntrinsic intrinsic,
+ CORINFO_CLASS_HANDLE clsHnd,
+ CORINFO_METHOD_HANDLE method,
+ CORINFO_SIG_INFO* sig,
+ bool mustExpand);
protected:
bool compSupportsHWIntrinsic(CORINFO_InstructionSet isa);
+ GenTree* impSimdAsHWIntrinsicSpecial(NamedIntrinsic intrinsic,
+ CORINFO_CLASS_HANDLE clsHnd,
+ CORINFO_SIG_INFO* sig,
+ var_types retType,
+ var_types baseType,
+ unsigned simdSize);
+
+ GenTree* impSimdAsHWIntrinsicCndSel(CORINFO_CLASS_HANDLE clsHnd,
+ var_types retType,
+ var_types baseType,
+ unsigned simdSize,
+ GenTree* op1,
+ GenTree* op2,
+ GenTree* op3);
+
GenTree* impSpecialIntrinsic(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig);
+ CORINFO_SIG_INFO* sig,
+ var_types baseType,
+ var_types retType,
+ unsigned simdSize);
- GenTree* getArgForHWIntrinsic(var_types argType, CORINFO_CLASS_HANDLE argClass);
+ GenTree* getArgForHWIntrinsic(var_types argType, CORINFO_CLASS_HANDLE argClass, bool expectAddr = false);
GenTree* impNonConstFallback(NamedIntrinsic intrinsic, var_types simdType, var_types baseType);
- GenTree* addRangeCheckIfNeeded(NamedIntrinsic intrinsic, GenTree* lastOp, bool mustExpand);
+ GenTree* addRangeCheckIfNeeded(
+ NamedIntrinsic intrinsic, GenTree* lastOp, bool mustExpand, int immLowerBound, int immUpperBound);
#ifdef TARGET_XARCH
GenTree* impBaseIntrinsic(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig);
+ CORINFO_SIG_INFO* sig,
+ var_types baseType,
+ var_types retType,
+ unsigned simdSize);
GenTree* impSSEIntrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HANDLE method, CORINFO_SIG_INFO* sig);
GenTree* impSSE2Intrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HANDLE method, CORINFO_SIG_INFO* sig);
GenTree* impAvxOrAvx2Intrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HANDLE method, CORINFO_SIG_INFO* sig);
GenTree* impBMI1OrBMI2Intrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HANDLE method, CORINFO_SIG_INFO* sig);
+ GenTree* impSimdAsHWIntrinsicRelOp(NamedIntrinsic intrinsic,
+ CORINFO_CLASS_HANDLE clsHnd,
+ var_types retType,
+ var_types baseType,
+ unsigned simdSize,
+ GenTree* op1,
+ GenTree* op2);
#endif // TARGET_XARCH
#endif // FEATURE_HW_INTRINSICS
GenTree* impArrayAccessIntrinsic(CORINFO_CLASS_HANDLE clsHnd,
@@ -4561,8 +4657,11 @@ class Compiler
unsigned fgSsaPassesCompleted; // Number of times fgSsaBuild has been run.
+ // Returns "true" if this is a special variable that is never zero initialized in the prolog.
+ inline bool fgVarIsNeverZeroInitializedInProlog(unsigned varNum);
+
// Returns "true" if the variable needs explicit zero initialization.
- inline bool fgVarNeedsExplicitZeroInit(LclVarDsc* varDsc, bool bbInALoop, bool bbIsReturn);
+ inline bool fgVarNeedsExplicitZeroInit(unsigned varNum, bool bbInALoop, bool bbIsReturn);
// The value numbers for this compilation.
ValueNumStore* vnStore;
@@ -5442,8 +5541,29 @@ class Compiler
private:
GenTree* fgMorphField(GenTree* tree, MorphAddrContext* mac);
bool fgCanFastTailCall(GenTreeCall* call, const char** failReason);
- bool fgCheckStmtAfterTailCall();
- void fgMorphTailCallViaHelper(GenTreeCall* call, void* pfnCopyArgs);
+#if FEATURE_FASTTAILCALL
+ bool fgCallHasMustCopyByrefParameter(GenTreeCall* callee);
+#endif
+ bool fgCheckStmtAfterTailCall();
+ GenTree* fgMorphTailCallViaHelpers(GenTreeCall* call, CORINFO_TAILCALL_HELPERS& help);
+ bool fgCanTailCallViaJitHelper();
+ void fgMorphTailCallViaJitHelper(GenTreeCall* call);
+ GenTree* fgCreateCallDispatcherAndGetResult(GenTreeCall* origCall,
+ CORINFO_METHOD_HANDLE callTargetStubHnd,
+ CORINFO_METHOD_HANDLE dispatcherHnd);
+ GenTree* getMethodPointerTree(CORINFO_RESOLVED_TOKEN* pResolvedToken, CORINFO_CALL_INFO* pCallInfo);
+ GenTree* getLookupTree(CORINFO_RESOLVED_TOKEN* pResolvedToken,
+ CORINFO_LOOKUP* pLookup,
+ unsigned handleFlags,
+ void* compileTimeHandle);
+ GenTree* getRuntimeLookupTree(CORINFO_RESOLVED_TOKEN* pResolvedToken,
+ CORINFO_LOOKUP* pLookup,
+ void* compileTimeHandle);
+ GenTree* getVirtMethodPointerTree(GenTree* thisPtr,
+ CORINFO_RESOLVED_TOKEN* pResolvedToken,
+ CORINFO_CALL_INFO* pCallInfo);
+ GenTree* getTokenHandleTree(CORINFO_RESOLVED_TOKEN* pResolvedToken, bool parent);
+
GenTree* fgMorphPotentialTailCall(GenTreeCall* call);
GenTree* fgGetStubAddrArg(GenTreeCall* call);
void fgMorphRecursiveFastTailCallIntoLoop(BasicBlock* block, GenTreeCall* recursiveTailCall);
@@ -5753,8 +5873,13 @@ class Compiler
// static) written to, and SZ-array element type equivalence classes updated.
void optComputeLoopNestSideEffects(unsigned lnum);
+ // Given a loop number 'lnum' mark it and any nested loops as having 'memoryHavoc'
+ void optRecordLoopNestsMemoryHavoc(unsigned lnum, MemoryKindSet memoryHavoc);
+
// Add the side effects of "blk" (which is required to be within a loop) to all loops of which it is a part.
- void optComputeLoopSideEffectsOfBlock(BasicBlock* blk);
+ // Returns false if we encounter a block that is not marked as being inside a loop.
+ //
+ bool optComputeLoopSideEffectsOfBlock(BasicBlock* blk);
// Hoist the expression "expr" out of loop "lnum".
void optPerformHoistExpr(GenTree* expr, unsigned lnum);
@@ -5788,6 +5913,8 @@ class Compiler
void optUnrollLoops(); // Unrolls loops (needs to have cost info)
+ void optRemoveRedundantZeroInits();
+
protected:
// This enumeration describes what is killed by a call.
@@ -6054,6 +6181,7 @@ class Compiler
bool optLoopContains(unsigned l1, unsigned l2);
// Requires "loopInd" to be a valid index into the loop table.
+
// Updates the loop table by changing loop "loopInd", whose head is required
// to be "from", to be "to". Also performs this transformation for any
// loop nested in "loopInd" that shares the same head as "loopInd".
@@ -6076,6 +6204,9 @@ class Compiler
// of "from".) Copies the jump destination from "from" to "to".
void optCopyBlkDest(BasicBlock* from, BasicBlock* to);
+ // Returns true if 'block' is an entry block for any loop in 'optLoopTable'
+ bool optIsLoopEntry(BasicBlock* block);
+
// The depth of the loop described by "lnum" (an index into the loop table.) (0 == top level)
unsigned optLoopDepth(unsigned lnum)
{
@@ -7859,9 +7990,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
static bool isRelOpSIMDIntrinsic(SIMDIntrinsicID intrinsicId)
{
- return (intrinsicId == SIMDIntrinsicEqual || intrinsicId == SIMDIntrinsicLessThan ||
- intrinsicId == SIMDIntrinsicLessThanOrEqual || intrinsicId == SIMDIntrinsicGreaterThan ||
- intrinsicId == SIMDIntrinsicGreaterThanOrEqual);
+ return (intrinsicId == SIMDIntrinsicEqual);
}
// Returns base type of a TYP_SIMD local.
@@ -7965,22 +8094,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
// Create a GT_SIMD tree for a Get property of SIMD vector with a fixed index.
GenTreeSIMD* impSIMDGetFixed(var_types simdType, var_types baseType, unsigned simdSize, int index);
- // Creates a GT_SIMD tree for Select operation
- GenTree* impSIMDSelect(CORINFO_CLASS_HANDLE typeHnd,
- var_types baseType,
- unsigned simdVectorSize,
- GenTree* op1,
- GenTree* op2,
- GenTree* op3);
-
- // Creates a GT_SIMD tree for Min/Max operation
- GenTree* impSIMDMinMax(SIMDIntrinsicID intrinsicId,
- CORINFO_CLASS_HANDLE typeHnd,
- var_types baseType,
- unsigned simdVectorSize,
- GenTree* op1,
- GenTree* op2);
-
// Transforms operands and returns the SIMD intrinsic to be applied on
// transformed operands to obtain given relop result.
SIMDIntrinsicID impSIMDRelOp(SIMDIntrinsicID relOpIntrinsicId,
@@ -7990,9 +8103,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
GenTree** op1,
GenTree** op2);
- // Creates a GT_SIMD tree for Abs intrinsic.
- GenTree* impSIMDAbs(CORINFO_CLASS_HANDLE typeHnd, var_types baseType, unsigned simdVectorSize, GenTree* op1);
-
#if defined(TARGET_XARCH)
// Transforms operands and returns the SIMD intrinsic to be applied on
@@ -8002,26 +8112,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
GenTree** op1,
GenTree** op2);
- // Transforms operands and returns the SIMD intrinsic to be applied on
- // transformed operands to obtain > comparison result.
- SIMDIntrinsicID impSIMDLongRelOpGreaterThan(CORINFO_CLASS_HANDLE typeHnd,
- unsigned simdVectorSize,
- GenTree** op1,
- GenTree** op2);
-
- // Transforms operands and returns the SIMD intrinsic to be applied on
- // transformed operands to obtain >= comparison result.
- SIMDIntrinsicID impSIMDLongRelOpGreaterThanOrEqual(CORINFO_CLASS_HANDLE typeHnd,
- unsigned simdVectorSize,
- GenTree** op1,
- GenTree** op2);
-
- // Transforms operands and returns the SIMD intrinsic to be applied on
- // transformed operands to obtain >= comparison result in case of int32
- // and small int base type vectors.
- SIMDIntrinsicID impSIMDIntegralRelOpGreaterThanOrEqual(
- CORINFO_CLASS_HANDLE typeHnd, unsigned simdVectorSize, var_types baseType, GenTree** op1, GenTree** op2);
-
#endif // defined(TARGET_XARCH)
void setLclRelatedToSIMDIntrinsic(GenTree* tree);
@@ -8047,7 +8137,25 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
// AVX: vector2f, 3f and 4f are all considered sub register SIMD types.
bool isSubRegisterSIMDType(GenTreeSIMD* simdNode)
{
- return (simdNode->gtSIMDSize < getSIMDVectorRegisterByteLength());
+ unsigned vectorRegisterByteLength;
+#if defined(TARGET_XARCH)
+ // Calling the getSIMDVectorRegisterByteLength api causes the size of Vector to be recorded
+ // with the AOT compiler, so that it cannot change from aot compilation time to runtime
+ // This api does not require such fixing as it merely pertains to the size of the simd type
+ // relative to the Vector size as used at compile time. (So detecting a vector length of 16 here
+ // does not preclude the code from being used on a machine with a larger vector length.)
+ if (getSIMDSupportLevel() < SIMD_AVX2_Supported)
+ {
+ vectorRegisterByteLength = 16;
+ }
+ else
+ {
+ vectorRegisterByteLength = 32;
+ }
+#else
+ vectorRegisterByteLength = getSIMDVectorRegisterByteLength();
+#endif
+ return (simdNode->gtSIMDSize < vectorRegisterByteLength);
}
// Get the type for the hardware SIMD vector.
@@ -8145,8 +8253,9 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
return emitTypeSize(TYP_SIMD8);
}
+public:
// Returns the codegen type for a given SIMD size.
- var_types getSIMDTypeForSize(unsigned size)
+ static var_types getSIMDTypeForSize(unsigned size)
{
var_types simdType = TYP_UNDEF;
if (size == 8)
@@ -8172,6 +8281,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
return simdType;
}
+private:
unsigned getSIMDInitTempVarNum()
{
if (lvaSIMDInitTempVarNum == BAD_VAR_NUM)
@@ -8415,6 +8525,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
bool compHasBackwardJump; // Does the method (or some inlinee) have a lexically backwards jump?
bool compSwitchedToOptimized; // Codegen initially was Tier0 but jit switched to FullOpts
bool compSwitchedToMinOpts; // Codegen initially was Tier1/FullOpts but jit switched to MinOpts
+ bool compSuppressedZeroInit; // There are vars with lvSuppressedZeroInit set
// NOTE: These values are only reliable after
// the importing is completely finished.
@@ -8685,6 +8796,11 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
bool compTailCallLoopOpt;
#endif
+#if FEATURE_FASTTAILCALL
+ // Whether fast tail calls are allowed.
+ bool compFastTailCalls;
+#endif // FEATURE_FASTTAILCALL
+
#if defined(TARGET_ARM64)
// Decision about whether to save FP/LR registers with callee-saved registers (see
// COMPlus_JitSaveFpLrWithCalleSavedRegisters).
@@ -8843,7 +8959,11 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
bool compTailCallStress()
{
#ifdef DEBUG
- return (JitConfig.TailcallStress() != 0 || compStressCompile(STRESS_TAILCALL, 5));
+ // Do not stress tailcalls in IL stubs as the runtime creates several IL
+ // stubs to implement the tailcall mechanism, which would then
+ // recursively create more IL stubs.
+ return !opts.jitFlags->IsSet(JitFlags::JIT_FLAG_IL_STUB) &&
+ (JitConfig.TailcallStress() != 0 || compStressCompile(STRESS_TAILCALL, 5));
#else
return false;
#endif
@@ -8918,12 +9038,13 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
// (2) the code is hot/cold split, and we issued less code than we expected
// in the cold section (the hot section will always be padded out to compTotalHotCodeSize).
- bool compIsStatic : 1; // Is the method static (no 'this' pointer)?
- bool compIsVarArgs : 1; // Does the method have varargs parameters?
- bool compInitMem : 1; // Is the CORINFO_OPT_INIT_LOCALS bit set in the method info options?
- bool compProfilerCallback : 1; // JIT inserted a profiler Enter callback
- bool compPublishStubParam : 1; // EAX captured in prolog will be available through an instrinsic
- bool compRetBuffDefStack : 1; // The ret buff argument definitely points into the stack.
+ bool compIsStatic : 1; // Is the method static (no 'this' pointer)?
+ bool compIsVarArgs : 1; // Does the method have varargs parameters?
+ bool compInitMem : 1; // Is the CORINFO_OPT_INIT_LOCALS bit set in the method info options?
+ bool compProfilerCallback : 1; // JIT inserted a profiler Enter callback
+ bool compPublishStubParam : 1; // EAX captured in prolog will be available through an instrinsic
+ bool compRetBuffDefStack : 1; // The ret buff argument definitely points into the stack.
+ bool compHasNextCallRetAddr : 1; // The NextCallReturnAddress intrinsic is used.
var_types compRetType; // Return type of the method as declared in IL
var_types compRetNativeType; // Normalized return type as per target arch ABI
@@ -9019,6 +9140,11 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
#endif // !TARGET_AMD64
}
+ bool compDoOldStructRetyping()
+ {
+ return JitConfig.JitDoOldStructRetyping();
+ }
+
// Returns true if the method returns a value in more than one return register
// TODO-ARM-Bug: Deal with multi-register genReturnLocaled structs?
// TODO-ARM64: Does this apply for ARM64 too?
diff --git a/src/coreclr/src/jit/compiler.hpp b/src/coreclr/src/jit/compiler.hpp
index a3b3838d48ed58..f3e590a7303a45 100644
--- a/src/coreclr/src/jit/compiler.hpp
+++ b/src/coreclr/src/jit/compiler.hpp
@@ -702,6 +702,7 @@ inline bool Compiler::VarTypeIsMultiByteAndCanEnreg(
if (varTypeIsStruct(type))
{
+ assert(typeClass != nullptr);
size = info.compCompHnd->getClassSize(typeClass);
if (forReturn)
{
@@ -969,9 +970,11 @@ inline GenTree* Compiler::gtNewOperNode(genTreeOps oper, var_types type, GenTree
// IND(ADDR(IND(x)) == IND(x)
if (op1->gtOper == GT_ADDR)
{
- if (op1->AsOp()->gtOp1->gtOper == GT_IND && (op1->AsOp()->gtOp1->gtFlags & GTF_IND_ARR_INDEX) == 0)
+ GenTreeUnOp* addr = op1->AsUnOp();
+ GenTree* indir = addr->gtGetOp1();
+ if (indir->OperIs(GT_IND) && ((indir->gtFlags & GTF_IND_ARR_INDEX) == 0))
{
- op1 = op1->AsOp()->gtOp1->AsOp()->gtOp1;
+ op1 = indir->AsIndir()->Addr();
}
}
}
@@ -982,6 +985,11 @@ inline GenTree* Compiler::gtNewOperNode(genTreeOps oper, var_types type, GenTree
{
return op1->AsOp()->gtOp1;
}
+ else
+ {
+ // Addr source can't be CSE-ed.
+ op1->SetDoNotCSE();
+ }
}
}
@@ -1125,6 +1133,28 @@ inline GenTreeCall* Compiler::gtNewHelperCallNode(unsigned helper, var_types typ
return result;
}
+//------------------------------------------------------------------------------
+// gtNewRuntimeLookupHelperCallNode : Helper to create a runtime lookup call helper node.
+//
+//
+// Arguments:
+// helper - Call helper
+// type - Type of the node
+// args - Call args
+//
+// Return Value:
+// New CT_HELPER node
+
+inline GenTreeCall* Compiler::gtNewRuntimeLookupHelperCallNode(CORINFO_RUNTIME_LOOKUP* pRuntimeLookup,
+ GenTree* ctxTree,
+ void* compileTimeHandle)
+{
+ GenTree* argNode = gtNewIconEmbHndNode(pRuntimeLookup->signature, nullptr, GTF_ICON_TOKEN_HDL, compileTimeHandle);
+ GenTreeCall::Use* helperArgs = gtNewCallArgs(ctxTree, argNode);
+
+ return gtNewHelperCallNode(pRuntimeLookup->helper, TYP_I_IMPL, helperArgs);
+}
+
//------------------------------------------------------------------------
// gtNewAllocObjNode: A little helper to create an object allocation node.
//
@@ -1778,8 +1808,11 @@ inline void LclVarDsc::incRefCnts(BasicBlock::weight_t weight, Compiler* comp, R
//
// Increment counts on the local itself.
//
- if (lvType != TYP_STRUCT || promotionType != Compiler::PROMOTION_TYPE_INDEPENDENT)
+ if ((lvType != TYP_STRUCT) || (promotionType != Compiler::PROMOTION_TYPE_INDEPENDENT))
{
+ // We increment ref counts of this local for primitive types, including structs that have been retyped as their
+ // only field, as well as for structs whose fields are not independently promoted.
+
//
// Increment lvRefCnt
//
@@ -1931,9 +1964,9 @@ inline bool Compiler::lvaKeepAliveAndReportThis()
if (opts.compDbgCode)
return true;
- if (lvaGenericsContextUseCount > 0)
+ if (lvaGenericsContextInUse)
{
- JITDUMP("Reporting this as generic context: %u refs\n", lvaGenericsContextUseCount);
+ JITDUMP("Reporting this as generic context\n");
return true;
}
}
@@ -1944,14 +1977,11 @@ inline bool Compiler::lvaKeepAliveAndReportThis()
// because collectible types need the generics context when gc-ing.
if (genericsContextIsThis)
{
- const bool isUsed = lvaGenericsContextUseCount > 0;
const bool mustKeep = (info.compMethodInfo->options & CORINFO_GENERICS_CTXT_KEEP_ALIVE) != 0;
- if (isUsed || mustKeep)
+ if (lvaGenericsContextInUse || mustKeep)
{
- JITDUMP("Reporting this as generic context: %u refs%s\n", lvaGenericsContextUseCount,
- mustKeep ? ", must keep" : "");
-
+ JITDUMP("Reporting this as generic context: %s\n", mustKeep ? "must keep" : "referenced");
return true;
}
}
@@ -1979,7 +2009,7 @@ inline bool Compiler::lvaReportParamTypeArg()
// Otherwise, if an exact type parameter is needed in the body, report the generics context.
// We do this because collectible types needs the generics context when gc-ing.
- if (lvaGenericsContextUseCount > 0)
+ if (lvaGenericsContextInUse)
{
return true;
}
@@ -4115,11 +4145,39 @@ inline void Compiler::CLR_API_Leave(API_ICorJitInfo_Names ename)
#endif // MEASURE_CLRAPI_CALLS
+//------------------------------------------------------------------------------
+// fgVarIsNeverZeroInitializedInProlog : Check whether the variable is never zero initialized in the prolog.
+//
+// Arguments:
+// varNum - local variable number
+//
+// Returns:
+// true if this is a special variable that is never zero initialized in the prolog;
+// false otherwise
+//
+
+bool Compiler::fgVarIsNeverZeroInitializedInProlog(unsigned varNum)
+{
+ LclVarDsc* varDsc = lvaGetDesc(varNum);
+ bool result = varDsc->lvIsParam || lvaIsOSRLocal(varNum) || (opts.IsOSR() && (varNum == lvaGSSecurityCookie)) ||
+ (varNum == lvaInlinedPInvokeFrameVar) || (varNum == lvaStubArgumentVar) || (varNum == lvaRetAddrVar);
+
+#if FEATURE_FIXED_OUT_ARGS
+ result = result || (varNum == lvaPInvokeFrameRegSaveVar) || (varNum == lvaOutgoingArgSpaceVar);
+#endif
+
+#if defined(FEATURE_EH_FUNCLETS)
+ result = result || (varNum == lvaPSPSym);
+#endif
+
+ return result;
+}
+
//------------------------------------------------------------------------------
// fgVarNeedsExplicitZeroInit : Check whether the variable needs an explicit zero initialization.
//
// Arguments:
-// varDsc - local var description
+// varNum - local var number
// bbInALoop - true if the basic block may be in a loop
// bbIsReturn - true if the basic block always returns
//
@@ -4135,13 +4193,20 @@ inline void Compiler::CLR_API_Leave(API_ICorJitInfo_Names ename)
// - compInitMem is set and the variable has a long lifetime or has gc fields.
// In these cases we will insert zero-initialization in the prolog if necessary.
-bool Compiler::fgVarNeedsExplicitZeroInit(LclVarDsc* varDsc, bool bbInALoop, bool bbIsReturn)
+bool Compiler::fgVarNeedsExplicitZeroInit(unsigned varNum, bool bbInALoop, bool bbIsReturn)
{
+ LclVarDsc* varDsc = lvaGetDesc(varNum);
+
if (bbInALoop && !bbIsReturn)
{
return true;
}
+ if (fgVarIsNeverZeroInitializedInProlog(varNum))
+ {
+ return true;
+ }
+
if (varTypeIsGC(varDsc->lvType))
{
return false;
diff --git a/src/coreclr/src/jit/compmemkind.h b/src/coreclr/src/jit/compmemkind.h
index f680b04987d455..586e5f3ac3ca78 100644
--- a/src/coreclr/src/jit/compmemkind.h
+++ b/src/coreclr/src/jit/compmemkind.h
@@ -41,7 +41,7 @@ CompMemKindMacro(ArrayInfoMap)
CompMemKindMacro(MemoryPhiArg)
CompMemKindMacro(CSE)
CompMemKindMacro(GC)
-CompMemKindMacro(CorSig)
+CompMemKindMacro(CorTailCallInfo)
CompMemKindMacro(Inlining)
CompMemKindMacro(ArrayStack)
CompMemKindMacro(DebugInfo)
@@ -58,6 +58,7 @@ CompMemKindMacro(VariableLiveRanges)
CompMemKindMacro(ClassLayout)
CompMemKindMacro(TailMergeThrows)
CompMemKindMacro(EarlyProp)
+CompMemKindMacro(ZeroInit)
//clang-format on
#undef CompMemKindMacro
diff --git a/src/coreclr/src/jit/compphases.h b/src/coreclr/src/jit/compphases.h
index 0cafdc1793e3ca..ccda79c4cfe794 100644
--- a/src/coreclr/src/jit/compphases.h
+++ b/src/coreclr/src/jit/compphases.h
@@ -55,6 +55,7 @@ CompPhaseNameMacro(PHASE_CREATE_FUNCLETS, "Create EH funclets",
CompPhaseNameMacro(PHASE_MERGE_THROWS, "Merge throw blocks", "MRGTHROW", false, -1, false)
CompPhaseNameMacro(PHASE_OPTIMIZE_LAYOUT, "Optimize layout", "LAYOUT", false, -1, false)
CompPhaseNameMacro(PHASE_COMPUTE_REACHABILITY, "Compute blocks reachability", "BL_REACH", false, -1, false)
+CompPhaseNameMacro(PHASE_ZERO_INITS, "Redundant zero Inits", "ZERO-INIT", false, -1, false)
CompPhaseNameMacro(PHASE_OPTIMIZE_LOOPS, "Optimize loops", "LOOP-OPT", false, -1, false)
CompPhaseNameMacro(PHASE_CLONE_LOOPS, "Clone loops", "LP-CLONE", false, -1, false)
CompPhaseNameMacro(PHASE_UNROLL_LOOPS, "Unroll loops", "UNROLL", false, -1, false)
diff --git a/src/coreclr/src/jit/decomposelongs.cpp b/src/coreclr/src/jit/decomposelongs.cpp
index 77112049271eae..855d60813ca02a 100644
--- a/src/coreclr/src/jit/decomposelongs.cpp
+++ b/src/coreclr/src/jit/decomposelongs.cpp
@@ -1362,7 +1362,7 @@ GenTree* DecomposeLongs::DecomposeShift(LIR::Use& use)
GenTreeCall::Use* argList = m_compiler->gtNewCallArgs(loOp1, hiOp1, shiftByOp);
- GenTree* call = m_compiler->gtNewHelperCallNode(helper, TYP_LONG, argList);
+ GenTreeCall* call = m_compiler->gtNewHelperCallNode(helper, TYP_LONG, argList);
call->gtFlags |= shift->gtFlags & GTF_ALL_EFFECT;
if (shift->IsUnusedValue())
@@ -1370,11 +1370,7 @@ GenTree* DecomposeLongs::DecomposeShift(LIR::Use& use)
call->SetUnusedValue();
}
- GenTreeCall* callNode = call->AsCall();
- ReturnTypeDesc* retTypeDesc = callNode->GetReturnTypeDesc();
- retTypeDesc->InitializeLongReturnType(m_compiler);
-
- call = m_compiler->fgMorphArgs(callNode);
+ call = m_compiler->fgMorphArgs(call);
Range().InsertAfter(shift, LIR::SeqTree(m_compiler, call));
Range().Remove(shift);
diff --git a/src/coreclr/src/jit/emit.cpp b/src/coreclr/src/jit/emit.cpp
index 9d64888407adfe..2613cd453e61a5 100644
--- a/src/coreclr/src/jit/emit.cpp
+++ b/src/coreclr/src/jit/emit.cpp
@@ -4622,10 +4622,18 @@ unsigned emitter::emitEndCodeGen(Compiler* comp,
}
#endif
- if (emitConsDsc.align16)
+ // This restricts the emitConsDsc.alignment to: 1, 2, 4, 8, 16, or 32 bytes
+ // Alignments greater than 32 would require VM support in ICorJitInfo::allocMem
+ assert(isPow2(emitConsDsc.alignment) && (emitConsDsc.alignment <= 32));
+
+ if (emitConsDsc.alignment == 16)
{
allocMemFlag = static_cast(allocMemFlag | CORJIT_ALLOCMEM_FLG_RODATA_16BYTE_ALIGN);
}
+ else if (emitConsDsc.alignment == 32)
+ {
+ allocMemFlag = static_cast(allocMemFlag | CORJIT_ALLOCMEM_FLG_RODATA_32BYTE_ALIGN);
+ }
#ifdef TARGET_ARM64
// For arm64, we want to allocate JIT data always adjacent to code similar to what native compiler does.
@@ -4637,7 +4645,7 @@ unsigned emitter::emitEndCodeGen(Compiler* comp,
}
UNATIVE_OFFSET roDataAlignmentDelta = 0;
- if (emitConsDsc.dsdOffs)
+ if (emitConsDsc.dsdOffs && (emitConsDsc.alignment == TARGET_POINTER_SIZE))
{
UNATIVE_OFFSET roDataAlignment = TARGET_POINTER_SIZE; // 8 Byte align by default.
roDataAlignmentDelta = (UNATIVE_OFFSET)ALIGN_UP(emitTotalHotCodeSize, roDataAlignment) - emitTotalHotCodeSize;
@@ -5320,49 +5328,54 @@ UNATIVE_OFFSET emitter::emitFindOffset(insGroup* ig, unsigned insNum)
* block.
*/
-UNATIVE_OFFSET emitter::emitDataGenBeg(UNATIVE_OFFSET size, bool align)
+UNATIVE_OFFSET emitter::emitDataGenBeg(UNATIVE_OFFSET size, UNATIVE_OFFSET alignment)
{
unsigned secOffs;
dataSection* secDesc;
assert(emitDataSecCur == nullptr);
- /* The size better not be some kind of an odd thing */
+ // The size must not be zero and must be a multiple of 4 bytes
+ // Additionally, 4 bytes is the minimum alignment that will
+ // actually be used. That is, if the user requests an alignment
+ // of 1 or 2, they will get something that is at least 4-byte
+ // aligned. We allow the others since 4 is at least 1/2 and its
+ // simpler to allow it than to check and block.
+ assert((size != 0) && ((size % 4) == 0));
- assert(size && size % sizeof(int) == 0);
+ // This restricts the alignment to: 1, 2, 4, 8, 16, or 32 bytes
+ // Alignments greater than 32 would require VM support in ICorJitInfo::allocMem
- /* Get hold of the current offset */
+ const size_t MaxAlignment = 32;
+ assert(isPow2(alignment) && (alignment <= MaxAlignment));
+ /* Get hold of the current offset */
secOffs = emitConsDsc.dsdOffs;
- if (align)
+ if (alignment > 4)
{
- // Data can have any size but since alignment is deduced from the size there's no
- // way to have a larger data size (e.g. 128) and request 4/8/16 byte alignment.
- // 32 bytes (and more) alignment requires VM support (see ICorJitInfo::allocMem).
- assert(size <= 16);
+ // As per the above comment, the minimum alignment is actually 4
+ // bytes so we don't need to make any adjustments if the requested
+ // alignment is 1, 2, or 4.
+ //
+ // The maximum requested alignment is tracked and the memory allocator
+ // will end up ensuring offset 0 is at an address matching that
+ // alignment. So if the requested alignment is greater than 4, we need
+ // to pad the space out so the offset is a multiple of the requested.
- if (size == 16)
- {
- emitConsDsc.align16 = true;
- }
+ uint8_t zero[MaxAlignment] = {};
- while ((secOffs % size) != 0)
- {
- /* Need to skip 4 bytes to honor alignment */
- /* Must allocate a dummy 4 byte integer */
- int zero = 0;
- emitDataGenBeg(4, false);
- emitDataGenData(0, &zero, 4);
- emitDataGenEnd();
+ UNATIVE_OFFSET zeroSize = alignment - (secOffs % alignment);
+ UNATIVE_OFFSET zeroAlign = 4;
- /* Get the new secOffs */
- secOffs = emitConsDsc.dsdOffs;
- }
+ emitAnyConst(&zero, zeroSize, zeroAlign);
+ secOffs = emitConsDsc.dsdOffs;
}
- /* Advance the current offset */
+ assert((secOffs % alignment) == 0);
+ emitConsDsc.alignment = max(emitConsDsc.alignment, alignment);
+ /* Advance the current offset */
emitConsDsc.dsdOffs += size;
/* Allocate a data section descriptor and add it to the list */
@@ -5450,7 +5463,7 @@ UNATIVE_OFFSET emitter::emitBBTableDataGenBeg(unsigned numEntries, bool relative
* Emit the given block of bits into the current data section.
*/
-void emitter::emitDataGenData(unsigned offs, const void* data, size_t size)
+void emitter::emitDataGenData(unsigned offs, const void* data, UNATIVE_OFFSET size)
{
assert(emitDataSecCur && (emitDataSecCur->dsSize >= offs + size));
@@ -5497,19 +5510,13 @@ void emitter::emitDataGenEnd()
* Parameters:
* cnsAddr - memory location containing constant value
* cnsSize - size of constant in bytes
- * dblAlign - whether to double align the data section constant
+ * cnsAlign - alignment of constant in bytes
*
* Returns constant number as offset into data section.
*/
-UNATIVE_OFFSET emitter::emitDataConst(const void* cnsAddr, unsigned cnsSize, bool dblAlign)
+UNATIVE_OFFSET emitter::emitDataConst(const void* cnsAddr, UNATIVE_OFFSET cnsSize, UNATIVE_OFFSET cnsAlign)
{
- // When generating SMALL_CODE, we don't bother with dblAlign
- if (dblAlign && (emitComp->compCodeOpt() == Compiler::SMALL_CODE))
- {
- dblAlign = false;
- }
-
- UNATIVE_OFFSET cnum = emitDataGenBeg(cnsSize, dblAlign);
+ UNATIVE_OFFSET cnum = emitDataGenBeg(cnsSize, cnsAlign);
emitDataGenData(0, cnsAddr, cnsSize);
emitDataGenEnd();
@@ -5521,33 +5528,18 @@ UNATIVE_OFFSET emitter::emitDataConst(const void* cnsAddr, unsigned cnsSize, boo
//
// Arguments:
// cnsAddr - pointer to the data to be placed in the data section
-// cnsSize - size of the data
-// alignment - indicates how to align the constant
+// cnsSize - size of the data in bytes
+// cnsAlign - alignment of the data in bytes
//
// Return Value:
// A field handle representing the data offset to access the constant.
//
-CORINFO_FIELD_HANDLE emitter::emitAnyConst(const void* cnsAddr, unsigned cnsSize, emitDataAlignment alignment)
+CORINFO_FIELD_HANDLE emitter::emitAnyConst(const void* cnsAddr, UNATIVE_OFFSET cnsSize, UNATIVE_OFFSET cnsAlign)
{
- bool align;
-
- switch (alignment)
- {
- case emitDataAlignment::None:
- align = false;
- break;
- case emitDataAlignment::Preferred:
- align = (emitComp->compCodeOpt() != Compiler::SMALL_CODE);
- break;
- case emitDataAlignment::Required:
- default:
- align = true;
- break;
- }
-
- UNATIVE_OFFSET cnum = emitDataGenBeg(cnsSize, align);
+ UNATIVE_OFFSET cnum = emitDataGenBeg(cnsSize, cnsAlign);
emitDataGenData(0, cnsAddr, cnsSize);
emitDataGenEnd();
+
return emitComp->eeFindJitDataOffs(cnum);
}
@@ -5571,26 +5563,35 @@ CORINFO_FIELD_HANDLE emitter::emitFltOrDblConst(double constValue, emitAttr attr
void* cnsAddr;
float f;
- bool dblAlign;
if (attr == EA_4BYTE)
{
- f = forceCastToFloat(constValue);
- cnsAddr = &f;
- dblAlign = false;
+ f = forceCastToFloat(constValue);
+ cnsAddr = &f;
}
else
{
- cnsAddr = &constValue;
- dblAlign = true;
+ cnsAddr = &constValue;
}
// Access to inline data is 'abstracted' by a special type of static member
// (produced by eeFindJitDataOffs) which the emitter recognizes as being a reference
// to constant data, not a real static field.
- UNATIVE_OFFSET cnsSize = (attr == EA_4BYTE) ? 4 : 8;
- UNATIVE_OFFSET cnum = emitDataConst(cnsAddr, cnsSize, dblAlign);
+ UNATIVE_OFFSET cnsSize = (attr == EA_4BYTE) ? 4 : 8;
+ UNATIVE_OFFSET cnsAlign = cnsSize;
+
+#ifdef TARGET_XARCH
+ if (emitComp->compCodeOpt() == Compiler::SMALL_CODE)
+ {
+ // Some platforms don't require doubles to be aligned and so
+ // we can use a smaller alignment to help with smaller code
+
+ cnsAlign = 1;
+ }
+#endif // TARGET_XARCH
+
+ UNATIVE_OFFSET cnum = emitDataConst(cnsAddr, cnsSize, cnsAlign);
return emitComp->eeFindJitDataOffs(cnum);
}
@@ -7517,19 +7518,16 @@ void emitter::emitRecordCallSite(ULONG instrOffset, /* IN */
// lazily obtain it here using the given method handle (we only save the sig
// info when we explicitly need it, i.e. for CALLI calls, vararg calls, and
// tail calls).
+ CORINFO_SIG_INFO sigInfo;
+
if (callSig == nullptr)
{
assert(methodHandle != nullptr);
if (Compiler::eeGetHelperNum(methodHandle) == CORINFO_HELP_UNDEF)
{
- if (emitScratchSigInfo == nullptr)
- {
- emitScratchSigInfo = new (emitComp, CMK_CorSig) CORINFO_SIG_INFO;
- }
-
- emitComp->eeGetMethodSig(methodHandle, emitScratchSigInfo);
- callSig = emitScratchSigInfo;
+ emitComp->eeGetMethodSig(methodHandle, &sigInfo);
+ callSig = &sigInfo;
}
}
diff --git a/src/coreclr/src/jit/emit.h b/src/coreclr/src/jit/emit.h
index dda33e19a36bae..cd1616b37eb8c1 100644
--- a/src/coreclr/src/jit/emit.h
+++ b/src/coreclr/src/jit/emit.h
@@ -200,13 +200,6 @@ class emitLocation
unsigned codePos; // the code position within the IG (see emitCurOffset())
};
-enum class emitDataAlignment
-{
- None,
- Preferred,
- Required
-};
-
/************************************************************************/
/* The following describes an instruction group */
/************************************************************************/
@@ -1222,9 +1215,11 @@ class emitter
#define PERFSCORE_THROUGHPUT_ILLEGAL -1024.0f
-#define PERFSCORE_THROUGHPUT_4X 0.25f // Fastest - Quad issue
-#define PERFSCORE_THROUGHPUT_3X (1.0f / 3.0f) // Faster - Three issue
-#define PERFSCORE_THROUGHPUT_2X 0.5f // Faster - Dual issue
+#define PERFSCORE_THROUGHPUT_6X (1.0f / 6.0f) // Hextuple issue
+#define PERFSCORE_THROUGHPUT_5X 0.20f // Pentuple issue
+#define PERFSCORE_THROUGHPUT_4X 0.25f // Quad issue
+#define PERFSCORE_THROUGHPUT_3X (1.0f / 3.0f) // Three issue
+#define PERFSCORE_THROUGHPUT_2X 0.5f // Dual issue
#define PERFSCORE_THROUGHPUT_1C 1.0f // Single Issue
@@ -1336,7 +1331,7 @@ class emitter
insExecutionCharacteristics getInsExecutionCharacteristics(instrDesc* id);
- void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* result);
+ void perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* result);
#endif // defined(DEBUG) || defined(LATE_DISASM)
@@ -1683,7 +1678,7 @@ class emitter
void emitSetMediumJump(instrDescJmp* id);
public:
- CORINFO_FIELD_HANDLE emitAnyConst(const void* cnsAddr, unsigned cnsSize, emitDataAlignment alignment);
+ CORINFO_FIELD_HANDLE emitAnyConst(const void* cnsAddr, UNATIVE_OFFSET cnsSize, UNATIVE_OFFSET cnsAlign);
private:
CORINFO_FIELD_HANDLE emitFltOrDblConst(double constValue, emitAttr attr);
@@ -2178,9 +2173,9 @@ class emitter
dataSection* dsdList;
dataSection* dsdLast;
UNATIVE_OFFSET dsdOffs;
- bool align16;
+ UNATIVE_OFFSET alignment; // in bytes, defaults to 4
- dataSecDsc() : dsdList(nullptr), dsdLast(nullptr), dsdOffs(0), align16(false)
+ dataSecDsc() : dsdList(nullptr), dsdLast(nullptr), dsdOffs(0), alignment(4)
{
}
};
diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp
index 876e5cab8d9fa3..7df6edf7ea6c49 100644
--- a/src/coreclr/src/jit/emitarm64.cpp
+++ b/src/coreclr/src/jit/emitarm64.cpp
@@ -604,20 +604,23 @@ void emitter::emitInsSanityCheck(instrDesc* id)
break;
case IF_DV_2N: // DV_2N .........iiiiiii ......nnnnnddddd Vd Vn imm (shift - scalar)
- assert(id->idOpSize() == EA_8BYTE);
+ ins = id->idIns();
+ datasize = id->idOpSize();
assert(insOptsNone(id->idInsOpt()));
assert(isVectorRegister(id->idReg1()));
assert(isVectorRegister(id->idReg2()));
- assert(isValidImmShift(emitGetInsSC(id), EA_8BYTE));
+ assert(isValidVectorShiftAmount(emitGetInsSC(id), datasize, emitInsIsVectorRightShift(ins)));
break;
case IF_DV_2O: // DV_2O .Q.......iiiiiii ......nnnnnddddd Vd Vn imm (shift - vector)
- assert(isValidVectorDatasize(id->idOpSize()));
- assert(isValidArrangement(id->idOpSize(), id->idInsOpt()));
+ ins = id->idIns();
+ datasize = id->idOpSize();
+ elemsize = optGetElemsize(id->idInsOpt());
+ assert(isValidVectorDatasize(datasize));
+ assert(isValidArrangement(datasize, id->idInsOpt()));
assert(isVectorRegister(id->idReg1()));
assert(isVectorRegister(id->idReg2()));
- elemsize = optGetElemsize(id->idInsOpt());
- assert(isValidImmShift(emitGetInsSC(id), elemsize));
+ assert(isValidVectorShiftAmount(emitGetInsSC(id), elemsize, emitInsIsVectorRightShift(ins)));
break;
case IF_DV_2B: // DV_2B .Q.........iiiii ......nnnnnddddd Rd Vn[] (umov/smov - to general)
@@ -649,12 +652,13 @@ void emitter::emitInsSanityCheck(instrDesc* id)
break;
case IF_DV_2D: // DV_2D .Q.........iiiii ......nnnnnddddd Vd Vn[] (dup - vector)
+ ins = id->idIns();
datasize = id->idOpSize();
assert(isValidVectorDatasize(datasize));
assert(isValidArrangement(datasize, id->idInsOpt()));
elemsize = optGetElemsize(id->idInsOpt());
index = emitGetInsSC(id);
- assert(isValidVectorIndex(datasize, elemsize, index));
+ assert((ins == INS_dup) || isValidVectorIndex(datasize, elemsize, index));
assert(isVectorRegister(id->idReg1()));
assert(isVectorRegister(id->idReg2()));
break;
@@ -757,8 +761,6 @@ void emitter::emitInsSanityCheck(instrDesc* id)
case IF_DV_2T: // DV_2T .Q......XX...... ......nnnnnddddd Sd Vn (addv, saddlv, smaxv, sminv, uaddlv,
// umaxv, uminv)
assert(isValidVectorDatasize(id->idOpSize()));
- elemsize = optGetElemsize(id->idInsOpt());
- assert((elemsize != EA_8BYTE) && (id->idInsOpt() != INS_OPTS_2S)); // can't use 2D or 1D or 2S
assert(isVectorRegister(id->idReg1()));
assert(isVectorRegister(id->idReg2()));
break;
@@ -788,6 +790,7 @@ void emitter::emitInsSanityCheck(instrDesc* id)
break;
case IF_DV_3AI: // DV_3AI .Q......XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (vector by elem)
+ case IF_DV_3HI: // DV_3HI ........XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (smlal{2}, umlal{2} by element)
assert(isValidVectorDatasize(id->idOpSize()));
assert(isValidArrangement(id->idOpSize(), id->idInsOpt()));
assert(isVectorRegister(id->idReg1()));
@@ -818,6 +821,22 @@ void emitter::emitInsSanityCheck(instrDesc* id)
break;
case IF_DV_3C: // DV_3C .Q.........mmmmm ......nnnnnddddd Vd Vn Vm (vector)
+ switch (id->idIns())
+ {
+ case INS_tbl:
+ case INS_tbl_2regs:
+ case INS_tbl_3regs:
+ case INS_tbl_4regs:
+ case INS_tbx:
+ case INS_tbx_2regs:
+ case INS_tbx_3regs:
+ case INS_tbx_4regs:
+ elemsize = optGetElemsize(id->idInsOpt());
+ assert(elemsize == EA_1BYTE);
+ break;
+ default:
+ break;
+ }
assert(isValidVectorDatasize(id->idOpSize()));
assert(isValidArrangement(id->idOpSize(), id->idInsOpt()));
assert(isVectorRegister(id->idReg1()));
@@ -843,9 +862,8 @@ void emitter::emitInsSanityCheck(instrDesc* id)
assert(isValidVectorIndex(EA_16BYTE, elemsize, emitGetInsSC(id)));
break;
- case IF_DV_3E: // DV_3E ...........mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+ case IF_DV_3E: // DV_3E ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
assert(insOptsNone(id->idInsOpt()));
- assert(id->idOpSize() == EA_8BYTE);
assert(isVectorRegister(id->idReg1()));
assert(isVectorRegister(id->idReg2()));
assert(isVectorRegister(id->idReg3()));
@@ -859,6 +877,23 @@ void emitter::emitInsSanityCheck(instrDesc* id)
assert(isVectorRegister(id->idReg3()));
break;
+ case IF_DV_3G: // DV_3G .Q.........mmmmm .iiii.nnnnnddddd Vd Vn Vm imm (vector)
+ assert(isValidVectorDatasize(id->idOpSize()));
+ assert(isValidArrangement(id->idOpSize(), id->idInsOpt()));
+ assert(isValidVectorIndex(id->idOpSize(), EA_1BYTE, emitGetInsSC(id)));
+ assert(isVectorRegister(id->idReg1()));
+ assert(isVectorRegister(id->idReg2()));
+ assert(isVectorRegister(id->idReg3()));
+ break;
+
+ case IF_DV_3H: // DV_3H ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (addhn{2}, raddhn{2}, rsubhn{2},
+ // subhn{2}, pmull{2})
+ assert(isValidArrangement(id->idOpSize(), id->idInsOpt()));
+ assert(isVectorRegister(id->idReg1()));
+ assert(isVectorRegister(id->idReg2()));
+ assert(isVectorRegister(id->idReg3()));
+ break;
+
case IF_DV_4A: // DR_4A .........X.mmmmm .aaaaannnnnddddd Rd Rn Rm Ra (scalar)
assert(isValidGeneralDatasize(id->idOpSize()));
assert(isVectorRegister(id->idReg1()));
@@ -912,7 +947,6 @@ bool emitter::emitInsMayWriteToGCReg(instrDesc* id)
case IF_DR_3C: // DR_3C X..........mmmmm xxxsssnnnnnddddd Rd Rn Rm ext(Rm) LSL imm(0-4)
case IF_DR_3D: // DR_3D X..........mmmmm cccc..nnnnnddddd Rd Rn Rm cond
case IF_DR_3E: // DR_3E X........X.mmmmm ssssssnnnnnddddd Rd Rn Rm imm(0-63)
- case IF_DV_3F: // DV_3F ...........mmmmm ......nnnnnddddd Vd Vn Vm (vector) - Vd both source and dest
case IF_DR_4A: // DR_4A X..........mmmmm .aaaaannnnnddddd Rd Rn Rm Ra
@@ -946,7 +980,13 @@ bool emitter::emitInsMayWriteToGCReg(instrDesc* id)
case IF_DV_3C: // DV_3C .Q.........mmmmm ......nnnnnddddd Vd Vn Vm (vector)
case IF_DV_3D: // DV_3D .........X.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
case IF_DV_3DI: // DV_3DI .........XLmmmmm ....H.nnnnnddddd Vd Vn Vm[] (scalar by elem)
- case IF_DV_3E: // DV_3E ...........mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+ case IF_DV_3E: // DV_3E ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+ case IF_DV_3F: // DV_3F .Q......XX.mmmmm ......nnnnnddddd Vd Vn Vm (vector)
+ case IF_DV_3G: // DV_3G .Q.........mmmmm .iiii.nnnnnddddd Vd Vn Vm imm (vector)
+ case IF_DV_3H: // DV_3H ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (addhn{2}, raddhn{2}, rsubhn{2},
+ // subhn{2}, pmull{2})
+ case IF_DV_3HI: // DV_3HI ........XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (smlal{2}, smlsl{2}, smull{2},
+ // umlal{2}, umlsl{2}, umull{2} vector by elem)
case IF_DV_4A: // DV_4A .........X.mmmmm .aaaaannnnnddddd Vd Va Vn Vm (scalar)
// Tracked GC pointers cannot be placed into the SIMD registers.
return false;
@@ -1339,13 +1379,13 @@ emitter::insFormat emitter::emitInsFormat(instruction ins)
// clang-format off
const static insFormat insFormats[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 ) fmt,
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 ) fmt,
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) fmt,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) fmt,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) fmt,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) fmt,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) fmt,
+ #define INST1(id, nm, info, fmt, e1 ) fmt,
+ #define INST2(id, nm, info, fmt, e1, e2 ) fmt,
+ #define INST3(id, nm, info, fmt, e1, e2, e3 ) fmt,
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 ) fmt,
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) fmt,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) fmt,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) fmt,
#include "instrs.h"
};
// clang-format on
@@ -1356,76 +1396,81 @@ emitter::insFormat emitter::emitInsFormat(instruction ins)
return insFormats[ins];
}
-// INST_FP is 1
-#define LD 2
-#define ST 4
-#define CMP 8
+#define LD 1
+#define ST 2
+#define CMP 4
+#define RSH 8
// clang-format off
/*static*/ const BYTE CodeGenInterface::instInfo[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 ) ldst | INST_FP*fp,
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 ) ldst | INST_FP*fp,
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) ldst | INST_FP*fp,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) ldst | INST_FP*fp,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) ldst | INST_FP*fp,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) ldst | INST_FP*fp,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) ldst | INST_FP*fp,
+ #define INST1(id, nm, info, fmt, e1 ) info,
+ #define INST2(id, nm, info, fmt, e1, e2 ) info,
+ #define INST3(id, nm, info, fmt, e1, e2, e3 ) info,
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 ) info,
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) info,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) info,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) info,
#include "instrs.h"
};
// clang-format on
-/*****************************************************************************
- *
- * Returns true if the instruction is some kind of compare or test instruction
- */
-
+//------------------------------------------------------------------------
+// emitInsIsCompare: Returns true if the instruction is some kind of compare or test instruction.
+//
bool emitter::emitInsIsCompare(instruction ins)
{
// We have pseudo ins like lea which are not included in emitInsLdStTab.
if (ins < ArrLen(CodeGenInterface::instInfo))
- return (CodeGenInterface::instInfo[ins] & CMP) ? true : false;
+ return (CodeGenInterface::instInfo[ins] & CMP) != 0;
else
return false;
}
-/*****************************************************************************
- *
- * Returns true if the instruction is some kind of load instruction
- */
-
+//------------------------------------------------------------------------
+// emitInsIsLoad: Returns true if the instruction is some kind of load instruction.
+//
bool emitter::emitInsIsLoad(instruction ins)
{
// We have pseudo ins like lea which are not included in emitInsLdStTab.
if (ins < ArrLen(CodeGenInterface::instInfo))
- return (CodeGenInterface::instInfo[ins] & LD) ? true : false;
+ return (CodeGenInterface::instInfo[ins] & LD) != 0;
else
return false;
}
-/*****************************************************************************
- *
- * Returns true if the instruction is some kind of store instruction
- */
+//------------------------------------------------------------------------
+// emitInsIsStore: Returns true if the instruction is some kind of store instruction.
+//
bool emitter::emitInsIsStore(instruction ins)
{
// We have pseudo ins like lea which are not included in emitInsLdStTab.
if (ins < ArrLen(CodeGenInterface::instInfo))
- return (CodeGenInterface::instInfo[ins] & ST) ? true : false;
+ return (CodeGenInterface::instInfo[ins] & ST) != 0;
else
return false;
}
-/*****************************************************************************
- *
- * Returns true if the instruction is some kind of load/store instruction
- */
-
+//------------------------------------------------------------------------
+// emitInsIsLoadOrStore: Returns true if the instruction is some kind of load or store instruction.
+//
bool emitter::emitInsIsLoadOrStore(instruction ins)
{
// We have pseudo ins like lea which are not included in emitInsLdStTab.
if (ins < ArrLen(CodeGenInterface::instInfo))
- return (CodeGenInterface::instInfo[ins] & (LD | ST)) ? true : false;
+ return (CodeGenInterface::instInfo[ins] & (LD | ST)) != 0;
+ else
+ return false;
+}
+
+//------------------------------------------------------------------------
+// emitInsIsVectorRightShift: Returns true if the instruction is ASIMD right shift.
+//
+bool emitter::emitInsIsVectorRightShift(instruction ins)
+{
+ // We have pseudo ins like lea which are not included in emitInsLdStTab.
+ if (ins < ArrLen(CodeGenInterface::instInfo))
+ return (CodeGenInterface::instInfo[ins] & RSH) != 0;
else
return false;
}
@@ -1433,6 +1478,7 @@ bool emitter::emitInsIsLoadOrStore(instruction ins)
#undef LD
#undef ST
#undef CMP
+#undef RHS
/*****************************************************************************
*
@@ -1444,101 +1490,101 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
// clang-format off
const static code_t insCodes1[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 ) e1,
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 ) e1,
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) e1,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) e1,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) e1,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) e1,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e1,
+ #define INST1(id, nm, info, fmt, e1 ) e1,
+ #define INST2(id, nm, info, fmt, e1, e2 ) e1,
+ #define INST3(id, nm, info, fmt, e1, e2, e3 ) e1,
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 ) e1,
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) e1,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) e1,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e1,
#include "instrs.h"
};
const static code_t insCodes2[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 ) e2,
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) e2,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) e2,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) e2,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) e2,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e2,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 ) e2,
+ #define INST3(id, nm, info, fmt, e1, e2, e3 ) e2,
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 ) e2,
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) e2,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) e2,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e2,
#include "instrs.h"
};
const static code_t insCodes3[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) e3,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) e3,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) e3,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) e3,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e3,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 ) e3,
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 ) e3,
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) e3,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) e3,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e3,
#include "instrs.h"
};
const static code_t insCodes4[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 )
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) e4,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) e4,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) e4,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e4,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 )
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 ) e4,
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) e4,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) e4,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e4,
#include "instrs.h"
};
const static code_t insCodes5[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 )
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 )
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) e5,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) e5,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e5,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 )
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 )
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 ) e5,
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) e5,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e5,
#include "instrs.h"
};
const static code_t insCodes6[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 )
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 )
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 )
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) e6,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e6,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 )
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 )
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 )
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 ) e6,
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e6,
#include "instrs.h"
};
const static code_t insCodes7[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 )
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 )
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 )
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 )
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e7,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 )
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 )
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 )
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 )
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e7,
#include "instrs.h"
};
const static code_t insCodes8[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 )
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 )
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 )
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 )
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e8,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 )
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 )
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 )
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 )
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e8,
#include "instrs.h"
};
const static code_t insCodes9[] =
{
- #define INST1(id, nm, fp, ldst, fmt, e1 )
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 )
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 )
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 )
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 )
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 )
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e9,
+ #define INST1(id, nm, info, fmt, e1 )
+ #define INST2(id, nm, info, fmt, e1, e2 )
+ #define INST3(id, nm, info, fmt, e1, e2, e3 )
+ #define INST4(id, nm, info, fmt, e1, e2, e3, e4 )
+ #define INST5(id, nm, info, fmt, e1, e2, e3, e4, e5 )
+ #define INST6(id, nm, info, fmt, e1, e2, e3, e4, e5, e6 )
+ #define INST9(id, nm, info, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) e9,
#include "instrs.h"
};
// clang-format on
@@ -1559,6 +1605,7 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
const static insFormat formatEncode4G[4] = {IF_DR_2E, IF_DR_2F, IF_DV_2M, IF_DV_2L};
const static insFormat formatEncode4H[4] = {IF_DV_3E, IF_DV_3A, IF_DV_2L, IF_DV_2M};
const static insFormat formatEncode4I[4] = {IF_DV_3D, IF_DV_3B, IF_DV_2G, IF_DV_2A};
+ const static insFormat formatEncode4J[4] = {IF_DV_2N, IF_DV_2O, IF_DV_3E, IF_DV_3A};
const static insFormat formatEncode3A[3] = {IF_DR_3A, IF_DR_3B, IF_DI_2C};
const static insFormat formatEncode3B[3] = {IF_DR_2A, IF_DR_2B, IF_DI_1C};
const static insFormat formatEncode3C[3] = {IF_DR_3A, IF_DR_3B, IF_DV_3C};
@@ -1569,6 +1616,7 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
const static insFormat formatEncode3H[3] = {IF_DR_3A, IF_DV_3A, IF_DV_3AI};
const static insFormat formatEncode3I[3] = {IF_DR_2E, IF_DR_2F, IF_DV_2M};
const static insFormat formatEncode3J[3] = {IF_LS_2D, IF_LS_3F, IF_LS_2E};
+ const static insFormat formatEncode3K[3] = {IF_DR_3A, IF_DV_3H, IF_DV_3HI};
const static insFormat formatEncode2A[2] = {IF_DR_2E, IF_DR_2F};
const static insFormat formatEncode2B[2] = {IF_DR_3A, IF_DR_3B};
const static insFormat formatEncode2C[2] = {IF_DR_3A, IF_DI_2D};
@@ -1586,6 +1634,7 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
const static insFormat formatEncode2O[2] = {IF_DV_3E, IF_DV_3A};
const static insFormat formatEncode2P[2] = {IF_DV_2Q, IF_DV_3B};
const static insFormat formatEncode2Q[2] = {IF_DV_2S, IF_DV_3A};
+ const static insFormat formatEncode2R[2] = {IF_DV_3H, IF_DV_3HI};
code_t code = BAD_CODE;
insFormat insFmt = emitInsFormat(ins);
@@ -1759,6 +1808,17 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
}
break;
+ case IF_EN4J:
+ for (index = 0; index < 4; index++)
+ {
+ if (fmt == formatEncode4J[index])
+ {
+ encoding_found = true;
+ break;
+ }
+ }
+ break;
+
case IF_EN3A:
for (index = 0; index < 3; index++)
{
@@ -1869,6 +1929,17 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
}
break;
+ case IF_EN3K:
+ for (index = 0; index < 3; index++)
+ {
+ if (fmt == formatEncode3K[index])
+ {
+ encoding_found = true;
+ break;
+ }
+ }
+ break;
+
case IF_EN2A:
for (index = 0; index < 2; index++)
{
@@ -2056,91 +2127,27 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
}
break;
- case IF_BI_0A:
- case IF_BI_0B:
- case IF_BI_0C:
- case IF_BI_1A:
- case IF_BI_1B:
- case IF_BR_1A:
- case IF_BR_1B:
- case IF_LS_1A:
- case IF_LS_2A:
- case IF_LS_2B:
- case IF_LS_2C:
- case IF_LS_3A:
- case IF_LS_3B:
- case IF_LS_3C:
- case IF_LS_3D:
- case IF_LS_3E:
- case IF_DI_1A:
- case IF_DI_1B:
- case IF_DI_1C:
- case IF_DI_1D:
- case IF_DI_1E:
- case IF_DI_1F:
- case IF_DI_2A:
- case IF_DI_2B:
- case IF_DI_2C:
- case IF_DI_2D:
- case IF_DR_1D:
- case IF_DR_2A:
- case IF_DR_2B:
- case IF_DR_2C:
- case IF_DR_2D:
- case IF_DR_2E:
- case IF_DR_2F:
- case IF_DR_2G:
- case IF_DR_2H:
- case IF_DR_2I:
- case IF_DR_3A:
- case IF_DR_3B:
- case IF_DR_3C:
- case IF_DR_3D:
- case IF_DR_3E:
- case IF_DR_4A:
- case IF_DV_1A:
- case IF_DV_1B:
- case IF_DV_1C:
- case IF_DV_2A:
- case IF_DV_2B:
- case IF_DV_2C:
- case IF_DV_2D:
- case IF_DV_2E:
- case IF_DV_2F:
- case IF_DV_2G:
- case IF_DV_2H:
- case IF_DV_2I:
- case IF_DV_2J:
- case IF_DV_2K:
- case IF_DV_2L:
- case IF_DV_2M:
- case IF_DV_2N:
- case IF_DV_2O:
- case IF_DV_2P:
- case IF_DV_2R:
- case IF_DV_2T:
- case IF_DV_2U:
- case IF_DV_3A:
- case IF_DV_3AI:
- case IF_DV_3B:
- case IF_DV_3BI:
- case IF_DV_3C:
- case IF_DV_3D:
- case IF_DV_3DI:
- case IF_DV_3E:
- case IF_DV_3F:
- case IF_DV_4A:
- case IF_SN_0A:
- case IF_SI_0A:
- case IF_SI_0B:
-
- index = 0;
- encoding_found = true;
+ case IF_EN2R:
+ for (index = 0; index < 2; index++)
+ {
+ if (fmt == formatEncode2R[index])
+ {
+ encoding_found = true;
+ break;
+ }
+ }
break;
default:
-
- encoding_found = false;
+ if (fmt == insFmt)
+ {
+ encoding_found = true;
+ index = 0;
+ }
+ else
+ {
+ encoding_found = false;
+ }
break;
}
@@ -2879,12 +2886,11 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
* 'size' specifies the size of the result (16 or 32 bits)
*/
-/*static*/ INT32 emitter::emitDecodeByteShiftedImm(const emitter::byteShiftedImm bsImm, emitAttr size)
+/*static*/ UINT32 emitter::emitDecodeByteShiftedImm(const emitter::byteShiftedImm bsImm, emitAttr size)
{
bool onesShift = (bsImm.immOnes == 1);
- unsigned bySh = bsImm.immBY; // Num Bytes to shift 0,1,2,3
- INT32 val = (INT32)bsImm.immVal; // 8-bit immediate
- INT32 result = val;
+ unsigned bySh = bsImm.immBY; // Num Bytes to shift 0,1,2,3
+ UINT32 result = (UINT32)bsImm.immVal; // 8-bit immediate
if (bySh > 0)
{
@@ -3244,15 +3250,16 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
}
//------------------------------------------------------------------------
-// insGetLoadStoreRegisterListSize: Returns a size of the register list a given instruction operates on.
+// insGetRegisterListSize: Returns a size of the register list a given instruction operates on.
//
// Arguments:
-// ins - A Load/Store Vector instruction (e.g. ld1 (2 registers), ld1r, st1).
+// ins - An instruction which uses a register list
+// (e.g. ld1 (2 registers), ld1r, st1, tbl, tbx).
//
// Return value:
// A number of consecutive SIMD and floating-point registers the instruction loads to/store from.
//
-/*static*/ unsigned emitter::insGetLoadStoreRegisterListSize(instruction ins)
+/*static*/ unsigned emitter::insGetRegisterListSize(instruction ins)
{
unsigned registerListSize = 0;
@@ -3261,6 +3268,8 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
case INS_ld1:
case INS_ld1r:
case INS_st1:
+ case INS_tbl:
+ case INS_tbx:
registerListSize = 1;
break;
@@ -3269,6 +3278,8 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
case INS_ld2r:
case INS_st1_2regs:
case INS_st2:
+ case INS_tbl_2regs:
+ case INS_tbx_2regs:
registerListSize = 2;
break;
@@ -3277,6 +3288,8 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
case INS_ld3r:
case INS_st1_3regs:
case INS_st3:
+ case INS_tbl_3regs:
+ case INS_tbx_3regs:
registerListSize = 3;
break;
@@ -3285,6 +3298,8 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
case INS_ld4r:
case INS_st1_4regs:
case INS_st4:
+ case INS_tbl_4regs:
+ case INS_tbx_4regs:
registerListSize = 4;
break;
@@ -3370,6 +3385,48 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt)
}
}
+// For the given 'srcArrangement' returns the "widen" 'dstArrangement' specifying the destination vector register
+// arrangement
+// asserts and returns INS_OPTS_NONE if an invalid 'srcArrangement' value is passed
+//
+/*static*/ insOpts emitter::optWidenDstArrangement(insOpts srcArrangement)
+{
+ insOpts dstArrangement = INS_OPTS_NONE;
+
+ switch (srcArrangement)
+ {
+ case INS_OPTS_8B:
+ dstArrangement = INS_OPTS_4H;
+ break;
+
+ case INS_OPTS_16B:
+ dstArrangement = INS_OPTS_8H;
+ break;
+
+ case INS_OPTS_4H:
+ dstArrangement = INS_OPTS_2S;
+ break;
+
+ case INS_OPTS_8H:
+ dstArrangement = INS_OPTS_4S;
+ break;
+
+ case INS_OPTS_2S:
+ dstArrangement = INS_OPTS_1D;
+ break;
+
+ case INS_OPTS_4S:
+ dstArrangement = INS_OPTS_2D;
+ break;
+
+ default:
+ assert(!" invalid 'srcArrangement' value");
+ break;
+ }
+
+ return dstArrangement;
+}
+
// For the given 'conversion' returns the 'dstsize' specified by the conversion option
/*static*/ emitAttr emitter::optGetDstsize(insOpts conversion)
{
@@ -4357,15 +4414,21 @@ void emitter::emitIns_R_R(
break;
case INS_fcvtl:
- case INS_fcvtl2:
case INS_fcvtn:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(size == EA_8BYTE);
+ assert((opt == INS_OPTS_4H) || (opt == INS_OPTS_2S));
+ fmt = IF_DV_2A;
+ break;
+
+ case INS_fcvtl2:
case INS_fcvtn2:
assert(isVectorRegister(reg1));
assert(isVectorRegister(reg2));
- assert(isValidVectorDatasize(size));
- assert(insOptsNone(opt));
- assert(size == EA_8BYTE); // Narrowing from Double or Widening to Double (Half not supported)
- fmt = IF_DV_2G;
+ assert(size == EA_16BYTE);
+ assert((opt == INS_OPTS_8H) || (opt == INS_OPTS_4S));
+ fmt = IF_DV_2A;
break;
case INS_scvtf:
@@ -4608,6 +4671,17 @@ void emitter::emitIns_R_R(
fmt = IF_DV_2G;
break;
+ case INS_sadalp:
+ case INS_saddlp:
+ case INS_uadalp:
+ case INS_uaddlp:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isValidArrangement(size, opt));
+ assert((opt != INS_OPTS_1D) && (opt != INS_OPTS_2D)); // The encoding size = 11, Q = x is reserved
+ fmt = IF_DV_2T;
+ break;
+
default:
unreached();
break;
@@ -4750,6 +4824,7 @@ void emitter::emitIns_R_R_I(
bool canEncode;
bitMaskImm bmi;
unsigned registerListSize;
+ bool isRightShift;
case INS_mov:
// Check for the 'mov' aliases for the vector registers
@@ -4803,19 +4878,21 @@ void emitter::emitIns_R_R_I(
fmt = IF_DI_2B;
break;
- case INS_sshr:
- case INS_ssra:
+ case INS_shl:
+ case INS_sli:
+ case INS_sri:
case INS_srshr:
case INS_srsra:
- case INS_shl:
- case INS_ushr:
- case INS_usra:
+ case INS_sshr:
+ case INS_ssra:
case INS_urshr:
case INS_ursra:
- case INS_sri:
- case INS_sli:
+ case INS_ushr:
+ case INS_usra:
assert(isVectorRegister(reg1));
assert(isVectorRegister(reg2));
+ isRightShift = emitInsIsVectorRightShift(ins);
+
if (insOptsAnyArrangement(opt))
{
// Vector operation
@@ -4823,7 +4900,7 @@ void emitter::emitIns_R_R_I(
assert(isValidArrangement(size, opt));
elemsize = optGetElemsize(opt);
assert(isValidVectorElemsize(elemsize));
- assert(isValidImmShift(imm, elemsize));
+ assert(isValidVectorShiftAmount(imm, elemsize, isRightShift));
assert(opt != INS_OPTS_1D); // Reserved encoding
fmt = IF_DV_2O;
break;
@@ -4833,7 +4910,63 @@ void emitter::emitIns_R_R_I(
// Scalar operation
assert(insOptsNone(opt));
assert(size == EA_8BYTE); // only supported size
- assert(isValidImmShift(imm, size));
+ assert(isValidVectorShiftAmount(imm, size, isRightShift));
+ fmt = IF_DV_2N;
+ }
+ break;
+
+ case INS_sqshl:
+ case INS_uqshl:
+ case INS_sqshlu:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ isRightShift = emitInsIsVectorRightShift(ins);
+
+ if (insOptsAnyArrangement(opt))
+ {
+ // Vector operation
+ assert(isValidArrangement(size, opt));
+ assert(opt != INS_OPTS_1D); // The encoding immh = 1xxx, Q = 0 is reserved
+ elemsize = optGetElemsize(opt);
+ assert(isValidVectorShiftAmount(imm, elemsize, isRightShift));
+ fmt = IF_DV_2O;
+ }
+ else
+ {
+ // Scalar operation
+ assert(insOptsNone(opt));
+ assert(isValidVectorElemsize(size));
+ assert(isValidVectorShiftAmount(imm, size, isRightShift));
+ fmt = IF_DV_2N;
+ }
+ break;
+
+ case INS_sqrshrn:
+ case INS_sqrshrun:
+ case INS_sqshrn:
+ case INS_sqshrun:
+ case INS_uqrshrn:
+ case INS_uqshrn:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ isRightShift = emitInsIsVectorRightShift(ins);
+
+ if (insOptsAnyArrangement(opt))
+ {
+ // Vector operation
+ assert(isValidArrangement(size, opt));
+ assert((opt != INS_OPTS_1D) && (opt != INS_OPTS_2D)); // The encoding immh = 1xxx, Q = x is reserved
+ elemsize = optGetElemsize(opt);
+ assert(isValidVectorShiftAmount(imm, elemsize, isRightShift));
+ fmt = IF_DV_2O;
+ }
+ else
+ {
+ // Scalar operation
+ assert(insOptsNone(opt));
+ assert(isValidVectorElemsize(size));
+ assert(size != EA_8BYTE); // The encoding immh = 1xxx is reserved
+ assert(isValidVectorShiftAmount(imm, size, isRightShift));
fmt = IF_DV_2N;
}
break;
@@ -4843,19 +4976,20 @@ void emitter::emitIns_R_R_I(
assert(imm == 0);
__fallthrough;
- case INS_shrn:
case INS_rshrn:
+ case INS_shrn:
case INS_sshll:
case INS_ushll:
assert(isVectorRegister(reg1));
assert(isVectorRegister(reg2));
+ isRightShift = emitInsIsVectorRightShift(ins);
// Vector operation
assert(size == EA_8BYTE);
assert(isValidArrangement(size, opt));
elemsize = optGetElemsize(opt);
assert(elemsize != EA_8BYTE); // Reserved encodings
assert(isValidVectorElemsize(elemsize));
- assert(isValidImmShift(imm, elemsize));
+ assert(isValidVectorShiftAmount(imm, elemsize, isRightShift));
fmt = IF_DV_2O;
break;
@@ -4864,19 +4998,27 @@ void emitter::emitIns_R_R_I(
assert(imm == 0);
__fallthrough;
- case INS_shrn2:
case INS_rshrn2:
+ case INS_shrn2:
+ case INS_sqrshrn2:
+ case INS_sqrshrun2:
+ case INS_sqshrn2:
+ case INS_sqshrun2:
case INS_sshll2:
+ case INS_uqrshrn2:
+ case INS_uqshrn2:
case INS_ushll2:
assert(isVectorRegister(reg1));
assert(isVectorRegister(reg2));
+ isRightShift = emitInsIsVectorRightShift(ins);
+
// Vector operation
assert(size == EA_16BYTE);
assert(isValidArrangement(size, opt));
elemsize = optGetElemsize(opt);
- assert(elemsize != EA_8BYTE); // Reserved encodings
+ assert(elemsize != EA_8BYTE); // The encoding immh = 1xxx, Q = x is reserved
assert(isValidVectorElemsize(elemsize));
- assert(isValidImmShift(imm, elemsize));
+ assert(isValidVectorShiftAmount(imm, elemsize, isRightShift));
fmt = IF_DV_2O;
break;
@@ -4985,12 +5127,17 @@ void emitter::emitIns_R_R_I(
{
if (insOptsAnyArrangement(opt))
{
+ // The size and opt were modified to be based on the
+ // return type but the immediate is based on the operand
+ // which can be of a larger size. As such, we don't
+ // assert the index is valid here and instead do it in
+ // codegen.
+
// Vector operation
assert(isValidVectorDatasize(size));
assert(isValidArrangement(size, opt));
elemsize = optGetElemsize(opt);
assert(isValidVectorElemsize(elemsize));
- assert(isValidVectorIndex(size, elemsize, imm));
assert(opt != INS_OPTS_1D); // Reserved encoding
fmt = IF_DV_2D;
break;
@@ -5170,7 +5317,7 @@ void emitter::emitIns_R_R_I(
if (insOptsAnyArrangement(opt))
{
- registerListSize = insGetLoadStoreRegisterListSize(ins);
+ registerListSize = insGetRegisterListSize(ins);
assert(isValidVectorDatasize(size));
assert(isValidArrangement(size, opt));
assert((size * registerListSize) == imm);
@@ -5204,7 +5351,7 @@ void emitter::emitIns_R_R_I(
assert(isValidArrangement(size, opt));
elemsize = optGetElemsize(opt);
- registerListSize = insGetLoadStoreRegisterListSize(ins);
+ registerListSize = insGetRegisterListSize(ins);
assert((elemsize * registerListSize) == imm);
// Load single structure and replicate post-indexed by an immediate
@@ -5421,6 +5568,30 @@ void emitter::emitIns_R_R_R(
/* Figure out the encoding format of the instruction */
switch (ins)
{
+ case INS_mul:
+ case INS_smull:
+ case INS_umull:
+ if (insOptsAnyArrangement(opt))
+ {
+ // ASIMD instruction
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(isValidArrangement(size, opt));
+ assert((opt != INS_OPTS_1D) && (opt != INS_OPTS_2D)); // The encoding size = 11, Q = x is reserved
+ if (ins == INS_mul)
+ {
+ fmt = IF_DV_3A;
+ }
+ else
+ {
+ fmt = IF_DV_3H;
+ }
+ break;
+ }
+ // Base instruction
+ __fallthrough;
+
case INS_lsl:
case INS_lsr:
case INS_asr:
@@ -5432,10 +5603,8 @@ void emitter::emitIns_R_R_R(
case INS_udiv:
case INS_sdiv:
case INS_mneg:
- case INS_smull:
case INS_smnegl:
case INS_smulh:
- case INS_umull:
case INS_umnegl:
case INS_umulh:
case INS_lslv:
@@ -5458,44 +5627,11 @@ void emitter::emitIns_R_R_R(
fmt = IF_DR_3A;
break;
- case INS_mul:
- if (insOptsNone(opt))
- {
- // general register
- assert(isValidGeneralDatasize(size));
- assert(isGeneralRegister(reg1));
- assert(isGeneralRegister(reg2));
- assert(isGeneralRegister(reg3));
- fmt = IF_DR_3A;
- break;
- }
- __fallthrough;
-
- case INS_mla:
- case INS_mls:
- case INS_pmul:
- assert(insOptsAnyArrangement(opt));
- assert(isVectorRegister(reg1));
- assert(isVectorRegister(reg2));
- assert(isVectorRegister(reg3));
- assert(isValidVectorDatasize(size));
- assert(isValidArrangement(size, opt));
- elemsize = optGetElemsize(opt);
- if (ins == INS_pmul)
- {
- assert(elemsize == EA_1BYTE); // only supports 8B or 16B
- }
- else // INS_mul, INS_mla, INS_mls
- {
- assert(elemsize != EA_8BYTE); // can't use 2D or 1D
- }
- fmt = IF_DV_3A;
- break;
-
case INS_add:
case INS_sub:
if (isVectorRegister(reg1))
{
+ // ASIMD instruction
assert(isVectorRegister(reg2));
assert(isVectorRegister(reg3));
@@ -5516,6 +5652,7 @@ void emitter::emitIns_R_R_R(
}
break;
}
+ // Base instruction
__fallthrough;
case INS_adds:
@@ -5529,6 +5666,10 @@ void emitter::emitIns_R_R_R(
case INS_cmhi:
case INS_cmhs:
case INS_cmtst:
+ case INS_srshl:
+ case INS_sshl:
+ case INS_urshl:
+ case INS_ushl:
assert(isVectorRegister(reg1));
assert(isVectorRegister(reg2));
assert(isVectorRegister(reg3));
@@ -5536,10 +5677,8 @@ void emitter::emitIns_R_R_R(
if (insOptsAnyArrangement(opt))
{
// Vector operation
- assert(isValidVectorDatasize(size));
assert(isValidArrangement(size, opt));
- elemsize = optGetElemsize(opt);
- assert(opt != INS_OPTS_1D); // Reserved encoding
+ assert(opt != INS_OPTS_1D); // The encoding size = 11, Q = 0 is reserved
fmt = IF_DV_3A;
}
else
@@ -5551,6 +5690,34 @@ void emitter::emitIns_R_R_R(
}
break;
+ case INS_sqadd:
+ case INS_sqrshl:
+ case INS_sqshl:
+ case INS_sqsub:
+ case INS_uqadd:
+ case INS_uqrshl:
+ case INS_uqshl:
+ case INS_uqsub:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+
+ if (insOptsAnyArrangement(opt))
+ {
+ // Vector operation
+ assert(isValidArrangement(size, opt));
+ assert(opt != INS_OPTS_1D); // The encoding size = 11, Q = 0 is reserved
+ fmt = IF_DV_3A;
+ }
+ else
+ {
+ // Scalar operation
+ assert(insOptsNone(opt));
+ assert(isValidVectorElemsize(size));
+ fmt = IF_DV_3E;
+ }
+ break;
+
case INS_fcmeq:
case INS_fcmge:
case INS_fcmgt:
@@ -5579,20 +5746,33 @@ void emitter::emitIns_R_R_R(
}
break;
+ case INS_mla:
+ case INS_mls:
case INS_saba:
case INS_sabd:
+ case INS_shadd:
+ case INS_shsub:
case INS_smax:
case INS_smaxp:
case INS_smin:
case INS_sminp:
+ case INS_srhadd:
case INS_uaba:
case INS_uabd:
+ case INS_uhadd:
+ case INS_uhsub:
case INS_umax:
case INS_umaxp:
case INS_umin:
case INS_uminp:
- assert(elemsize != EA_8BYTE); // can't use 2D or 1D
- __fallthrough;
+ case INS_urhadd:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(isValidArrangement(size, opt));
+ assert((opt != INS_OPTS_1D) && (opt != INS_OPTS_2D)); // The encoding size = 11, Q = x is reserved
+ fmt = IF_DV_3A;
+ break;
case INS_addp:
case INS_uzp1:
@@ -5604,13 +5784,8 @@ void emitter::emitIns_R_R_R(
assert(isVectorRegister(reg1));
assert(isVectorRegister(reg2));
assert(isVectorRegister(reg3));
- assert(insOptsAnyArrangement(opt));
-
- // Vector operation
- assert(isValidVectorDatasize(size));
assert(isValidArrangement(size, opt));
- elemsize = optGetElemsize(opt);
-
+ assert(opt != INS_OPTS_1D); // The encoding size = 11, Q = 0 is reserved
fmt = IF_DV_3A;
break;
@@ -5634,6 +5809,14 @@ void emitter::emitIns_R_R_R(
case INS_eor:
case INS_orr:
case INS_orn:
+ case INS_tbl:
+ case INS_tbl_2regs:
+ case INS_tbl_3regs:
+ case INS_tbl_4regs:
+ case INS_tbx:
+ case INS_tbx_2regs:
+ case INS_tbx_3regs:
+ case INS_tbx_4regs:
if (isVectorRegister(reg1))
{
assert(isValidVectorDatasize(size));
@@ -5864,6 +6047,109 @@ void emitter::emitIns_R_R_R(
fmt = IF_LS_3F;
break;
+ case INS_addhn:
+ case INS_raddhn:
+ case INS_rsubhn:
+ case INS_subhn:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_8BYTE);
+ assert(isValidArrangement(size, opt));
+ assert(opt != INS_OPTS_1D); // The encoding size = 11, Q = x is reserved.
+ fmt = IF_DV_3H;
+ break;
+
+ case INS_addhn2:
+ case INS_raddhn2:
+ case INS_rsubhn2:
+ case INS_subhn2:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_16BYTE);
+ assert(isValidArrangement(size, opt));
+ assert(opt != INS_OPTS_2D); // The encoding size = 11, Q = x is reserved.
+ fmt = IF_DV_3H;
+ break;
+
+ case INS_sabal:
+ case INS_sabdl:
+ case INS_saddl:
+ case INS_saddw:
+ case INS_smlal:
+ case INS_smlsl:
+ case INS_ssubl:
+ case INS_ssubw:
+ case INS_uabal:
+ case INS_uabdl:
+ case INS_uaddl:
+ case INS_uaddw:
+ case INS_umlal:
+ case INS_umlsl:
+ case INS_usubl:
+ case INS_usubw:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_8BYTE);
+ assert((opt == INS_OPTS_8B) || (opt == INS_OPTS_4H) || (opt == INS_OPTS_2S));
+ fmt = IF_DV_3H;
+ break;
+
+ case INS_sabal2:
+ case INS_sabdl2:
+ case INS_saddl2:
+ case INS_saddw2:
+ case INS_smlal2:
+ case INS_smlsl2:
+ case INS_ssubl2:
+ case INS_ssubw2:
+ case INS_umlal2:
+ case INS_umlsl2:
+ case INS_smull2:
+ case INS_uabal2:
+ case INS_uabdl2:
+ case INS_uaddl2:
+ case INS_uaddw2:
+ case INS_usubl2:
+ case INS_umull2:
+ case INS_usubw2:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_16BYTE);
+ assert((opt == INS_OPTS_16B) || (opt == INS_OPTS_8H) || (opt == INS_OPTS_4S));
+ fmt = IF_DV_3H;
+ break;
+
+ case INS_pmul:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(isValidArrangement(size, opt));
+ assert((opt == INS_OPTS_8B) || (opt == INS_OPTS_16B));
+ fmt = IF_DV_3A;
+ break;
+
+ case INS_pmull:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_8BYTE);
+ assert((opt == INS_OPTS_8B) || (opt == INS_OPTS_1D));
+ fmt = IF_DV_3H;
+ break;
+
+ case INS_pmull2:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_16BYTE);
+ assert((opt == INS_OPTS_16B) || (opt == INS_OPTS_2D));
+ fmt = IF_DV_3H;
+ break;
+
default:
unreached();
break;
@@ -6058,6 +6344,49 @@ void emitter::emitIns_R_R_R_I(instruction ins,
fmt = IF_LS_3G;
break;
+ case INS_ext:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(isValidVectorDatasize(size));
+ assert(isValidArrangement(size, opt));
+ assert((opt == INS_OPTS_8B) || (opt == INS_OPTS_16B));
+ assert(isValidVectorIndex(size, EA_1BYTE, imm));
+ fmt = IF_DV_3G;
+ break;
+
+ case INS_smlal:
+ case INS_smlsl:
+ case INS_smull:
+ case INS_umlal:
+ case INS_umlsl:
+ case INS_umull:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_8BYTE);
+ assert((opt == INS_OPTS_4H) || (opt == INS_OPTS_2S));
+ elemsize = optGetElemsize(opt);
+ assert(isValidVectorIndex(EA_16BYTE, elemsize, imm));
+ fmt = IF_DV_3HI;
+ break;
+
+ case INS_smlal2:
+ case INS_smlsl2:
+ case INS_smull2:
+ case INS_umlal2:
+ case INS_umlsl2:
+ case INS_umull2:
+ assert(isVectorRegister(reg1));
+ assert(isVectorRegister(reg2));
+ assert(isVectorRegister(reg3));
+ assert(size == EA_16BYTE);
+ assert((opt == INS_OPTS_8H) || (opt == INS_OPTS_4S));
+ elemsize = optGetElemsize(opt);
+ assert(isValidVectorIndex(EA_16BYTE, elemsize, imm));
+ fmt = IF_DV_3HI;
+ break;
+
default:
unreached();
break;
@@ -6424,7 +6753,7 @@ void emitter::emitIns_R_R_I_I(
assert(isValidVectorElemsize(elemsize));
assert(isValidVectorIndex(EA_16BYTE, elemsize, imm1));
- registerListSize = insGetLoadStoreRegisterListSize(ins);
+ registerListSize = insGetRegisterListSize(ins);
assert((elemsize * registerListSize) == (unsigned)imm2);
assert(insOptsPostIndex(opt));
@@ -7322,7 +7651,7 @@ void emitter::emitIns_R_C(
fmt = IF_LARGELDC;
if (isVectorRegister(reg))
{
- assert(isValidScalarDatasize(size));
+ assert(isValidVectorLSDatasize(size));
// For vector (float/double) register, we should have an integer address reg to
// compute long address which consists of page address and page offset.
// For integer constant, this is not needed since the dest reg can be used to
@@ -7335,6 +7664,7 @@ void emitter::emitIns_R_C(
assert(isValidGeneralDatasize(size));
}
break;
+
default:
unreached();
}
@@ -8527,18 +8857,33 @@ void emitter::emitIns_Call(EmitCallType callType,
return bits;
}
-/*****************************************************************************
- *
- * Returns the encoding to shift by 'shift' for an Arm64 vector or scalar instruction
- */
-
-/*static*/ emitter::code_t emitter::insEncodeVectorShift(emitAttr size, ssize_t shift)
+// insEncodeVectorShift: Returns the encoding for the SIMD shift (immediate) instructions.
+//
+// Arguments:
+// size - for the scalar variants specifies 'datasize', for the vector variants specifies 'element size'.
+// shift - if the shift is positive, the operation is a left shift. Otherwise, it is a right shift.
+//
+// Returns:
+// "immh:immb" field of the instruction that contains encoded shift amount.
+//
+/*static*/ emitter::code_t emitter::insEncodeVectorShift(emitAttr size, ssize_t shiftAmount)
{
- assert(shift < getBitWidth(size));
-
- code_t imm = (code_t)(getBitWidth(size) + shift);
+ if (shiftAmount < 0)
+ {
+ shiftAmount = -shiftAmount;
+ // The right shift amount must be in the range 1 to the destination element width in bits.
+ assert((shiftAmount > 0) && (shiftAmount <= getBitWidth(size)));
- return imm << 16;
+ code_t imm = (code_t)(2 * getBitWidth(size) - shiftAmount);
+ return imm << 16;
+ }
+ else
+ {
+ // The left shift amount must in the range 0 to the element width in bits minus 1.
+ assert(shiftAmount < getBitWidth(size));
+ code_t imm = (code_t)(getBitWidth(size) + shiftAmount);
+ return imm << 16;
+ }
}
/*****************************************************************************
@@ -10368,9 +10713,25 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
elemsize = optGetElemsize(id->idInsOpt());
code = emitInsCode(ins, fmt);
code |= insEncodeVectorsize(id->idOpSize()); // Q
- code |= insEncodeFloatElemsize(elemsize); // X
- code |= insEncodeReg_Vd(id->idReg1()); // ddddd
- code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ if ((ins == INS_fcvtl) || (ins == INS_fcvtl2) || (ins == INS_fcvtn) || (ins == INS_fcvtn2))
+ {
+ // fcvtl{2} and fcvtn{2} encode the element size as
+ // esize = 16 << UInt(sz)
+ if (elemsize == EA_4BYTE)
+ {
+ code |= 0x00400000; // X
+ }
+ else
+ {
+ assert(elemsize == EA_2BYTE);
+ }
+ }
+ else
+ {
+ code |= insEncodeFloatElemsize(elemsize); // X
+ }
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
dst += emitOutput_Instr(dst, code);
break;
@@ -10511,11 +10872,12 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
break;
case IF_DV_2N: // DV_2N .........iiiiiii ......nnnnnddddd Vd Vn imm (shift - scalar)
- imm = emitGetInsSC(id);
- code = emitInsCode(ins, fmt);
- code |= insEncodeVectorShift(EA_8BYTE, imm); // iiiiiii
- code |= insEncodeReg_Vd(id->idReg1()); // ddddd
- code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ imm = emitGetInsSC(id);
+ elemsize = id->idOpSize();
+ code = emitInsCode(ins, fmt);
+ code |= insEncodeVectorShift(elemsize, emitInsIsVectorRightShift(ins) ? -imm : imm); // iiiiiii
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
dst += emitOutput_Instr(dst, code);
break;
@@ -10523,10 +10885,10 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
imm = emitGetInsSC(id);
elemsize = optGetElemsize(id->idInsOpt());
code = emitInsCode(ins, fmt);
- code |= insEncodeVectorsize(id->idOpSize()); // Q
- code |= insEncodeVectorShift(elemsize, imm); // iiiiiii
- code |= insEncodeReg_Vd(id->idReg1()); // ddddd
- code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ code |= insEncodeVectorsize(id->idOpSize()); // Q
+ code |= insEncodeVectorShift(elemsize, emitInsIsVectorRightShift(ins) ? -imm : imm); // iiiiiii
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
dst += emitOutput_Instr(dst, code);
break;
@@ -10645,7 +11007,16 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
dst += emitOutput_Instr(dst, code);
break;
- case IF_DV_3E: // DV_3E ...........mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+ case IF_DV_3E: // DV_3E ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+ code = emitInsCode(ins, fmt);
+ elemsize = id->idOpSize();
+ code |= insEncodeElemsize(elemsize); // XX
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ code |= insEncodeReg_Vm(id->idReg3()); // mmmmm
+ dst += emitOutput_Instr(dst, code);
+ break;
+
case IF_DV_3F: // DV_3F ...........mmmmm ......nnnnnddddd Vd Vn Vm (vector) - source dest regs overlap
code = emitInsCode(ins, fmt);
code |= insEncodeReg_Vd(id->idReg1()); // ddddd
@@ -10654,6 +11025,41 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
dst += emitOutput_Instr(dst, code);
break;
+ case IF_DV_3G: // DV_3G .Q.........mmmmm .iiii.nnnnnddddd Vd Vn Vm imm (vector)
+ imm = emitGetInsSC(id);
+ code = emitInsCode(ins, fmt);
+ code |= insEncodeVectorsize(id->idOpSize()); // Q
+ code |= insEncodeReg_Vm(id->idReg3()); // mmmmm
+ code |= ((code_t)imm << 11); // iiii
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ dst += emitOutput_Instr(dst, code);
+ break;
+
+ case IF_DV_3H: // DV_3H ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (addhn{2}, raddhn{2}, rsubhn{2},
+ // subhn{2}, pmull{2})
+ code = emitInsCode(ins, fmt);
+ elemsize = optGetElemsize(id->idInsOpt());
+ code |= insEncodeElemsize(elemsize); // XX
+ code |= insEncodeReg_Vm(id->idReg3()); // mmmmm
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ dst += emitOutput_Instr(dst, code);
+ break;
+
+ case IF_DV_3HI: // DV_3HI ........XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (smlal{2}, umlal{2} by element)
+ code = emitInsCode(ins, fmt);
+ imm = emitGetInsSC(id);
+ elemsize = optGetElemsize(id->idInsOpt());
+ assert(isValidVectorIndex(EA_16BYTE, elemsize, imm));
+ code |= insEncodeElemsize(elemsize); // XX
+ code |= insEncodeVectorIndexLMH(elemsize, imm); // LM H
+ code |= insEncodeReg_Vd(id->idReg1()); // ddddd
+ code |= insEncodeReg_Vn(id->idReg2()); // nnnnn
+ code |= insEncodeReg_Vm(id->idReg3()); // mmmmm
+ dst += emitOutput_Instr(dst, code);
+ break;
+
case IF_DV_4A: // DV_4A .........X.mmmmm .aaaaannnnnddddd Vd Va Vn Vm (scalar)
code = emitInsCode(ins, fmt);
elemsize = id->idOpSize();
@@ -11652,7 +12058,7 @@ void emitter::emitDispIns(
case IF_LS_2D: // LS_2D .Q.............. ....ssnnnnnttttt Vt Rn
case IF_LS_2E: // LS_2E .Q.............. ....ssnnnnnttttt Vt Rn
- registerListSize = insGetLoadStoreRegisterListSize(id->idIns());
+ registerListSize = insGetRegisterListSize(id->idIns());
emitDispVectorRegList(id->idReg1(), registerListSize, id->idInsOpt(), true);
if (fmt == IF_LS_2D)
@@ -11671,7 +12077,7 @@ void emitter::emitDispIns(
case IF_LS_2F: // LS_2F .Q.............. xx.Sssnnnnnttttt Vt[] Rn
case IF_LS_2G: // LS_2G .Q.............. xx.Sssnnnnnttttt Vt[] Rn
- registerListSize = insGetLoadStoreRegisterListSize(id->idIns());
+ registerListSize = insGetRegisterListSize(id->idIns());
elemsize = id->idOpSize();
emitDispVectorElemList(id->idReg1(), registerListSize, elemsize, id->idSmallCns(), true);
@@ -11735,7 +12141,7 @@ void emitter::emitDispIns(
case IF_LS_3F: // LS_3F .Q.........mmmmm ....ssnnnnnttttt Vt Rn Rm
case IF_LS_3G: // LS_3G .Q.........mmmmm ...Sssnnnnnttttt Vt[] Rn Rm
- registerListSize = insGetLoadStoreRegisterListSize(id->idIns());
+ registerListSize = insGetRegisterListSize(id->idIns());
if (fmt == IF_LS_3F)
{
@@ -11922,8 +12328,19 @@ void emitter::emitDispIns(
break;
case IF_DR_2H: // DR_2H X........X...... ......nnnnnddddd Rd Rn
- emitDispReg(id->idReg1(), size, true);
- emitDispReg(id->idReg2(), size, false);
+ if ((ins == INS_uxtb) || (ins == INS_uxth))
+ {
+ // There is no 64-bit variant of uxtb and uxth
+ // However, we allow idOpSize() to have EA_8BYTE value for these instruction
+ emitDispReg(id->idReg1(), EA_4BYTE, true);
+ emitDispReg(id->idReg2(), EA_4BYTE, false);
+ }
+ else
+ {
+ emitDispReg(id->idReg1(), size, true);
+ // sxtb, sxth and sxtb always operate on 32-bit source register
+ emitDispReg(id->idReg2(), EA_4BYTE, false);
+ }
break;
case IF_DR_2I: // DR_2I X..........mmmmm cccc..nnnnn.nzcv Rn Rm nzcv cond
@@ -12063,6 +12480,23 @@ void emitter::emitDispIns(
break;
case IF_DV_2A: // DV_2A .Q.......X...... ......nnnnnddddd Vd Vn (fabs, fcvt - vector)
+ if ((ins == INS_fcvtl) || (ins == INS_fcvtl2))
+ {
+ emitDispVectorReg(id->idReg1(), optWidenElemsize(id->idInsOpt()), true);
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), false);
+ }
+ else if ((ins == INS_fcvtn) || (ins == INS_fcvtn2))
+ {
+ emitDispVectorReg(id->idReg1(), id->idInsOpt(), true);
+ emitDispVectorReg(id->idReg2(), optWidenElemsize(id->idInsOpt()), false);
+ }
+ else
+ {
+ emitDispVectorReg(id->idReg1(), id->idInsOpt(), true);
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), false);
+ }
+ break;
+
case IF_DV_2P: // DV_2P ................ ......nnnnnddddd Vd Vn (aes*, sha1su1)
emitDispVectorReg(id->idReg1(), id->idInsOpt(), true);
emitDispVectorReg(id->idReg2(), id->idInsOpt(), false);
@@ -12203,9 +12637,24 @@ void emitter::emitDispIns(
case IF_DV_2S: // DV_2S ........XX...... ......nnnnnddddd Sd Vn (addp - scalar)
case IF_DV_2T: // DV_2T .Q......XX...... ......nnnnnddddd Sd Vn (addv, saddlv, smaxv, sminv, uaddlv,
// umaxv, uminv)
- elemsize = optGetElemsize(id->idInsOpt());
- emitDispReg(id->idReg1(), elemsize, true);
- emitDispVectorReg(id->idReg2(), id->idInsOpt(), false);
+ if ((ins == INS_sadalp) || (ins == INS_saddlp) || (ins == INS_uadalp) || (ins == INS_uaddlp))
+ {
+ emitDispVectorReg(id->idReg1(), optWidenDstArrangement(id->idInsOpt()), true);
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), false);
+ }
+ else
+ {
+ if ((ins == INS_saddlv) || (ins == INS_uaddlv))
+ {
+ elemsize = optGetElemsize(optWidenDstArrangement(id->idInsOpt()));
+ }
+ else
+ {
+ elemsize = optGetElemsize(id->idInsOpt());
+ }
+ emitDispReg(id->idReg1(), elemsize, true);
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), false);
+ }
break;
case IF_DV_3A: // DV_3A .Q......XX.mmmmm ......nnnnnddddd Vd Vn Vm (vector)
@@ -12217,9 +12666,24 @@ void emitter::emitDispIns(
case IF_DV_3C: // DV_3C .Q.........mmmmm ......nnnnnddddd Vd Vn Vm (vector)
emitDispVectorReg(id->idReg1(), id->idInsOpt(), true);
- if (ins != INS_mov)
+ switch (ins)
{
- emitDispVectorReg(id->idReg2(), id->idInsOpt(), true);
+ case INS_tbl:
+ case INS_tbl_2regs:
+ case INS_tbl_3regs:
+ case INS_tbl_4regs:
+ case INS_tbx:
+ case INS_tbx_2regs:
+ case INS_tbx_3regs:
+ case INS_tbx_4regs:
+ registerListSize = insGetRegisterListSize(ins);
+ emitDispVectorRegList(id->idReg2(), registerListSize, INS_OPTS_16B, true);
+ break;
+ case INS_mov:
+ break;
+ default:
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), true);
+ break;
}
emitDispVectorReg(id->idReg3(), id->idInsOpt(), false);
break;
@@ -12233,7 +12697,7 @@ void emitter::emitDispIns(
break;
case IF_DV_3D: // DV_3D .........X.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
- case IF_DV_3E: // DV_3E ...........mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+ case IF_DV_3E: // DV_3E ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
emitDispReg(id->idReg1(), size, true);
emitDispReg(id->idReg2(), size, true);
emitDispReg(id->idReg3(), size, false);
@@ -12270,6 +12734,59 @@ void emitter::emitDispIns(
emitDispVectorRegIndex(id->idReg3(), elemsize, emitGetInsSC(id), false);
break;
+ case IF_DV_3G: // DV_3G .Q.........mmmmm .iiii.nnnnnddddd Vd Vn Vm imm (vector)
+ emitDispVectorReg(id->idReg1(), id->idInsOpt(), true);
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), true);
+ emitDispVectorReg(id->idReg3(), id->idInsOpt(), true);
+ emitDispImm(emitGetInsSC(id), false);
+ break;
+
+ case IF_DV_3H: // DV_3H ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (addhn{2}, raddhn{2}, rsubhn{2},
+ // subhn{2}, pmull{2})
+ if ((ins == INS_addhn) || (ins == INS_addhn2) || (ins == INS_raddhn) || (ins == INS_raddhn2) ||
+ (ins == INS_subhn) || (ins == INS_subhn2) || (ins == INS_rsubhn) || (ins == INS_rsubhn2))
+ {
+ // These are "high narrow" instruction i.e. their source registers are "wider" than the destination
+ // register.
+ emitDispVectorReg(id->idReg1(), id->idInsOpt(), true);
+ emitDispVectorReg(id->idReg2(), optWidenElemsize(id->idInsOpt()), true);
+ emitDispVectorReg(id->idReg3(), optWidenElemsize(id->idInsOpt()), false);
+ }
+ else
+ {
+ if (((ins == INS_pmull) && (id->idInsOpt() == INS_OPTS_1D)) ||
+ (ins == (INS_pmull2) && (id->idInsOpt() == INS_OPTS_2D)))
+ {
+ // PMULL Vd.1Q, Vn.1D, Vm.1D
+ // PMULL2 Vd.1Q, Vn.2D, Vm.2D
+ printf("%s.1q, ", emitVectorRegName(id->idReg1()));
+ }
+ else
+ {
+ emitDispVectorReg(id->idReg1(), optWidenElemsize(id->idInsOpt()), true);
+ }
+
+ if ((ins == INS_saddw) || (ins == INS_saddw2) || (ins == INS_uaddw) || (ins == INS_uaddw2) ||
+ (ins == INS_ssubw) || (ins == INS_ssubw2) || (ins == INS_usubw) || (ins == INS_usubw2))
+ {
+ emitDispVectorReg(id->idReg2(), optWidenElemsize(id->idInsOpt()), true);
+ }
+ else
+ {
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), true);
+ }
+
+ emitDispVectorReg(id->idReg3(), id->idInsOpt(), false);
+ }
+ break;
+
+ case IF_DV_3HI:
+ emitDispVectorReg(id->idReg1(), optWidenElemsize(id->idInsOpt()), true);
+ emitDispVectorReg(id->idReg2(), id->idInsOpt(), true);
+ elemsize = optGetElemsize(id->idInsOpt());
+ emitDispVectorRegIndex(id->idReg3(), elemsize, emitGetInsSC(id), false);
+ break;
+
case IF_DV_4A: // DV_4A .........X.mmmmm .aaaaannnnnddddd Vd Va Vn Vm (scalar)
emitDispReg(id->idReg1(), size, true);
emitDispReg(id->idReg2(), size, true);
@@ -12361,7 +12878,7 @@ void emitter::emitInsLoadStoreOp(instruction ins, emitAttr attr, regNumber dataR
if (addr->isContained())
{
- assert(addr->OperGet() == GT_LCL_VAR_ADDR || addr->OperGet() == GT_LEA);
+ assert(addr->OperGet() == GT_CLS_VAR_ADDR || addr->OperGet() == GT_LCL_VAR_ADDR || addr->OperGet() == GT_LEA);
int offset = 0;
DWORD lsl = 0;
@@ -12438,7 +12955,13 @@ void emitter::emitInsLoadStoreOp(instruction ins, emitAttr attr, regNumber dataR
}
else // no Index register
{
- if (emitIns_valid_imm_for_ldst_offset(offset, emitTypeSize(indir->TypeGet())))
+ if (addr->OperGet() == GT_CLS_VAR_ADDR)
+ {
+ // Get a temp integer register to compute long address.
+ regNumber addrReg = indir->GetSingleTempReg();
+ emitIns_R_C(ins, attr, dataReg, addrReg, addr->AsClsVar()->gtClsVarHnd, 0);
+ }
+ else if (emitIns_valid_imm_for_ldst_offset(offset, emitTypeSize(indir->TypeGet())))
{
// Then load/store dataReg from/to [memBase + offset]
emitIns_R_R_I(ins, attr, dataReg, memBase->GetRegNum(), offset);
@@ -12896,6 +13419,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_1C;
break;
+ case INS_smaddl:
+ case INS_smsubl:
+ case INS_smnegl:
+ case INS_umaddl:
+ case INS_umsubl:
+ case INS_umnegl:
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ break;
+
default:
// all other instructions
perfScoreUnhandledInstruction(id, &result);
@@ -13557,6 +14090,14 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_2C;
break;
+ case INS_fcvtl:
+ case INS_fcvtl2:
+ case INS_fcvtn:
+ case INS_fcvtn2:
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+
default:
// all other instructions
perfScoreUnhandledInstruction(id, &result);
@@ -13609,14 +14150,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_2C;
break;
- case INS_fcvtl:
- case INS_fcvtl2:
- case INS_fcvtn:
- case INS_fcvtn2:
- result.insThroughput = PERFSCORE_THROUGHPUT_1C;
- result.insLatency = PERFSCORE_LATENCY_4C;
- break;
-
case INS_frecpe:
case INS_frecpx:
case INS_frsqrte:
@@ -13831,9 +14364,48 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
}
break;
- case IF_DV_3C: // mov,and, bic, eor, mov,mvn, orn, bsl, bit, bif (vector)
- result.insThroughput = PERFSCORE_THROUGHPUT_2X;
- result.insLatency = PERFSCORE_LATENCY_1C;
+ case IF_DV_3C: // mov,and, bic, eor, mov,mvn, orn, bsl, bit, bif,
+ // tbl, tbx (vector)
+ switch (ins)
+ {
+ case INS_tbl:
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_1C;
+ break;
+ case INS_tbl_2regs:
+ result.insThroughput = PERFSCORE_THROUGHPUT_3X;
+ result.insLatency = PERFSCORE_LATENCY_2C;
+ break;
+ case INS_tbl_3regs:
+ result.insThroughput = PERFSCORE_THROUGHPUT_4X;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ break;
+ case INS_tbl_4regs:
+ result.insThroughput = PERFSCORE_THROUGHPUT_3X;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+ case INS_tbx:
+ result.insThroughput = PERFSCORE_THROUGHPUT_3X;
+ result.insLatency = PERFSCORE_LATENCY_2C;
+ break;
+ case INS_tbx_2regs:
+ result.insThroughput = PERFSCORE_THROUGHPUT_4X;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ break;
+ case INS_tbx_3regs:
+ result.insThroughput = PERFSCORE_THROUGHPUT_5X;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+ case INS_tbx_4regs:
+ result.insThroughput = PERFSCORE_THROUGHPUT_6X;
+ result.insLatency = PERFSCORE_LATENCY_5C;
+ break;
+ default:
+ // All other instructions
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_1C;
+ break;
+ }
break;
case IF_DV_2E: // mov, dup (scalar)
@@ -13881,6 +14453,11 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_cmgt:
case INS_cmhi:
case INS_cmhs:
+ case INS_shadd:
+ case INS_shsub:
+ case INS_srhadd:
+ case INS_srshl:
+ case INS_sshl:
case INS_smax:
case INS_smaxp:
case INS_smin:
@@ -13889,6 +14466,11 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_umaxp:
case INS_umin:
case INS_uminp:
+ case INS_uhadd:
+ case INS_uhsub:
+ case INS_urhadd:
+ case INS_urshl:
+ case INS_ushl:
case INS_uzp1:
case INS_uzp2:
case INS_zip1:
@@ -13915,7 +14497,11 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_cmtst:
case INS_pmul:
case INS_sabd:
+ case INS_sqadd:
+ case INS_sqsub:
case INS_uabd:
+ case INS_uqadd:
+ case INS_uqsub:
result.insThroughput = PERFSCORE_THROUGHPUT_2X;
result.insLatency = PERFSCORE_LATENCY_3C;
break;
@@ -13923,6 +14509,10 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_mul:
case INS_mla:
case INS_mls:
+ case INS_sqshl:
+ case INS_sqrshl:
+ case INS_uqrshl:
+ case INS_uqshl:
result.insThroughput = PERFSCORE_THROUGHPUT_2X;
result.insLatency = PERFSCORE_LATENCY_4C;
break;
@@ -13950,6 +14540,11 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_2C;
break;
+ case IF_DV_3G: // ext
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_2C;
+ break;
+
case IF_DV_2L: // abs, neg, cmeq, cmge, cmgt, cmle, cmlt (scalar)
case IF_DV_2M: // (vector)
// abs, neg, mvn, not, cmeq, cmge, cmgt, cmle, cmlt,
@@ -14048,9 +14643,52 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_rshrn:
case INS_rshrn2:
case INS_srshr:
+ case INS_sqshrn:
+ case INS_sqshrn2:
+ case INS_ssra:
case INS_urshr:
- result.insThroughput = PERFSCORE_THROUGHPUT_2X;
- result.insLatency = PERFSCORE_LATENCY_3C;
+ case INS_uqshrn:
+ case INS_uqshrn2:
+ case INS_usra:
+ if (id->idOpSize() == EA_16BYTE)
+ {
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ }
+ else
+ {
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ }
+ break;
+
+ case INS_srsra:
+ case INS_ursra:
+ result.insThroughput = PERFSCORE_THROUGHPUT_2C;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+
+ case INS_sqrshrn:
+ case INS_sqrshrn2:
+ case INS_sqrshrun:
+ case INS_sqrshrun2:
+ case INS_sqshrun:
+ case INS_sqshrun2:
+ case INS_sqshl:
+ case INS_sqshlu:
+ case INS_uqrshrn:
+ case INS_uqrshrn2:
+ case INS_uqshl:
+ if (id->idOpSize() == EA_16BYTE)
+ {
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ }
+ else
+ {
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ }
break;
default:
@@ -14095,6 +14733,90 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
}
break;
+ case IF_DV_3H: // addhn{2}, raddhn{2}, rsubhn{2}, sabal{2}, sabdl{2}, saddl{2}, saddw{2}, ssubl{2}, ssubw{2},
+ // pmull{2}
+ case IF_DV_3HI: // subhn{2}, uabal{2}, uabdl{2}, uaddl{2}, uaddw{2}, usubl{2}, usubw{2}
+ switch (ins)
+ {
+ case INS_addhn:
+ case INS_addhn2:
+ case INS_sabdl:
+ case INS_sabdl2:
+ case INS_saddl:
+ case INS_saddl2:
+ case INS_saddw:
+ case INS_saddw2:
+ case INS_ssubl:
+ case INS_ssubl2:
+ case INS_ssubw:
+ case INS_ssubw2:
+ case INS_subhn:
+ case INS_subhn2:
+ case INS_uabdl:
+ case INS_uabdl2:
+ case INS_uaddl:
+ case INS_uaddl2:
+ case INS_uaddw:
+ case INS_uaddw2:
+ case INS_usubl:
+ case INS_usubl2:
+ case INS_usubw:
+ case INS_usubw2:
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ break;
+
+ case INS_raddhn:
+ case INS_raddhn2:
+ case INS_rsubhn:
+ case INS_rsubhn2:
+ case INS_sabal:
+ case INS_sabal2:
+ case INS_uabal:
+ case INS_uabal2:
+ result.insThroughput = PERFSCORE_THROUGHPUT_2C;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+
+ case INS_smlal:
+ case INS_smlal2:
+ case INS_smlsl:
+ case INS_smlsl2:
+ case INS_smull:
+ case INS_smull2:
+ case INS_umlal:
+ case INS_umlal2:
+ case INS_umlsl:
+ case INS_umlsl2:
+ case INS_umull:
+ case INS_umull2:
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+
+ case INS_pmull:
+ case INS_pmull2:
+ if ((id->idInsOpt() == INS_OPTS_8B) || (id->idInsOpt() == INS_OPTS_16B))
+ {
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ }
+ else
+ {
+ // Crypto polynomial (64x64) multiply long
+ assert((id->idInsOpt() == INS_OPTS_1D) || (id->idInsOpt() == INS_OPTS_2D));
+ result.insThroughput = PERFSCORE_THROUGHPUT_1C;
+ result.insLatency = PERFSCORE_LATENCY_2C;
+ }
+ break;
+
+ default:
+ // all other instructions
+ perfScoreUnhandledInstruction(id, &result);
+ break;
+ }
+ break;
+
case IF_SI_0A: // brk imm16
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
result.insLatency = PERFSCORE_LATENCY_1C;
@@ -14120,6 +14842,18 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_4C;
break;
+ case INS_sadalp:
+ case INS_uadalp:
+ result.insThroughput = PERFSCORE_THROUGHPUT_2C;
+ result.insLatency = PERFSCORE_LATENCY_4C;
+ break;
+
+ case INS_saddlp:
+ case INS_uaddlp:
+ result.insThroughput = PERFSCORE_THROUGHPUT_2X;
+ result.insLatency = PERFSCORE_LATENCY_3C;
+ break;
+
default:
// all other instructions
perfScoreUnhandledInstruction(id, &result);
diff --git a/src/coreclr/src/jit/emitarm64.h b/src/coreclr/src/jit/emitarm64.h
index f6286a6062360a..9c365c005d1fd4 100644
--- a/src/coreclr/src/jit/emitarm64.h
+++ b/src/coreclr/src/jit/emitarm64.h
@@ -87,6 +87,7 @@ bool emitInsIsCompare(instruction ins);
bool emitInsIsLoad(instruction ins);
bool emitInsIsStore(instruction ins);
bool emitInsIsLoadOrStore(instruction ins);
+bool emitInsIsVectorRightShift(instruction ins);
emitAttr emitInsTargetRegSize(instrDesc* id);
emitAttr emitInsLoadStoreSize(instrDesc* id);
@@ -187,7 +188,7 @@ union byteShiftedImm {
static emitter::byteShiftedImm emitEncodeByteShiftedImm(INT64 imm, emitAttr size, bool allow_MSL);
-static INT32 emitDecodeByteShiftedImm(const emitter::byteShiftedImm bsImm, emitAttr size);
+static UINT32 emitDecodeByteShiftedImm(const emitter::byteShiftedImm bsImm, emitAttr size);
/************************************************************************
*
@@ -300,8 +301,8 @@ static code_t insEncodeVectorIndex2(emitAttr elemsize, ssize_t index2);
// Returns the encoding to select 'index' for an Arm64 'mul' elem instruction
static code_t insEncodeVectorIndexLMH(emitAttr elemsize, ssize_t index);
-// Returns the encoding to shift by 'shift' bits for an Arm64 vector or scalar instruction
-static code_t insEncodeVectorShift(emitAttr size, ssize_t shift);
+// Returns the encoding for ASIMD Shift instruction.
+static code_t insEncodeVectorShift(emitAttr size, ssize_t shiftAmount);
// Returns the encoding to select the 1/2/4/8 byte elemsize for an Arm64 vector instruction
static code_t insEncodeElemsize(emitAttr size);
@@ -438,6 +439,11 @@ static emitAttr optGetElemsize(insOpts arrangement);
// For the given 'arrangement' returns the 'widen-arrangement' specified by the vector register arrangement
static insOpts optWidenElemsize(insOpts arrangement);
+// For the given 'srcArrangement' returns the "widen" 'dstArrangement' specifying the destination vector register
+// arrangement
+// of Long Pairwise instructions. Note that destination vector elements twice as long as the source vector elements.
+static insOpts optWidenDstArrangement(insOpts srcArrangement);
+
// For the given 'conversion' returns the 'dstsize' specified by the conversion option
static emitAttr optGetDstsize(insOpts conversion);
@@ -448,9 +454,9 @@ static emitAttr optGetSrcsize(insOpts conversion);
// for an element of size 'elemsize' in a vector register of size 'datasize'
static bool isValidVectorIndex(emitAttr datasize, emitAttr elemsize, ssize_t index);
-// For a given Load/Store Vector instruction 'ins' returns a number of consecutive SIMD registers
-// the instruction loads to/store from.
-static unsigned insGetLoadStoreRegisterListSize(instruction ins);
+// For a given instruction 'ins' which contains a register lists returns a
+// number of consecutive SIMD registers the instruction loads to/store from.
+static unsigned insGetRegisterListSize(instruction ins);
/************************************************************************/
/* Public inline informational methods */
@@ -512,6 +518,13 @@ inline static unsigned isValidImmShift(ssize_t imm, emitAttr size)
return (imm >= 0) && (imm < getBitWidth(size));
}
+// Returns true if the 'shiftAmount' represents a valid shift for the given 'size'.
+inline static unsigned isValidVectorShiftAmount(ssize_t shiftAmount, emitAttr size, bool rightShift)
+{
+ return (rightShift && (shiftAmount >= 1) && (shiftAmount <= getBitWidth(size))) ||
+ ((shiftAmount >= 0) && (shiftAmount < getBitWidth(size)));
+}
+
inline static bool isValidGeneralDatasize(emitAttr size)
{
return (size == EA_8BYTE) || (size == EA_4BYTE);
diff --git a/src/coreclr/src/jit/emitfmtsarm64.h b/src/coreclr/src/jit/emitfmtsarm64.h
index 3717868c6176a9..c39f85d99ae697 100644
--- a/src/coreclr/src/jit/emitfmtsarm64.h
+++ b/src/coreclr/src/jit/emitfmtsarm64.h
@@ -61,6 +61,7 @@ IF_DEF(EN4F, IS_NONE, NONE) // Instruction has 4 possible encoding types, type F
IF_DEF(EN4G, IS_NONE, NONE) // Instruction has 4 possible encoding types, type G
IF_DEF(EN4H, IS_NONE, NONE) // Instruction has 4 possible encoding types, type H
IF_DEF(EN4I, IS_NONE, NONE) // Instruction has 4 possible encoding types, type I
+IF_DEF(EN4J, IS_NONE, NONE) // Instruction has 3 possible encoding types, type J
IF_DEF(EN3A, IS_NONE, NONE) // Instruction has 3 possible encoding types, type A
IF_DEF(EN3B, IS_NONE, NONE) // Instruction has 3 possible encoding types, type B
IF_DEF(EN3C, IS_NONE, NONE) // Instruction has 3 possible encoding types, type C
@@ -71,6 +72,7 @@ IF_DEF(EN3G, IS_NONE, NONE) // Instruction has 3 possible encoding types, type G
IF_DEF(EN3H, IS_NONE, NONE) // Instruction has 3 possible encoding types, type H
IF_DEF(EN3I, IS_NONE, NONE) // Instruction has 3 possible encoding types, type I
IF_DEF(EN3J, IS_NONE, NONE) // Instruction has 3 possible encoding types, type J
+IF_DEF(EN3K, IS_NONE, NONE) // Instruction has 3 possible encoding types, type K
IF_DEF(EN2A, IS_NONE, NONE) // Instruction has 2 possible encoding types, type A
IF_DEF(EN2B, IS_NONE, NONE) // Instruction has 2 possible encoding types, type B
IF_DEF(EN2C, IS_NONE, NONE) // Instruction has 2 possible encoding types, type C
@@ -88,6 +90,7 @@ IF_DEF(EN2N, IS_NONE, NONE) // Instruction has 2 possible encoding types, type N
IF_DEF(EN2O, IS_NONE, NONE) // Instruction has 2 possible encoding types, type O
IF_DEF(EN2P, IS_NONE, NONE) // Instruction has 2 possible encoding types, type P
IF_DEF(EN2Q, IS_NONE, NONE) // Instruction has 2 possible encoding types, type Q
+IF_DEF(EN2R, IS_NONE, NONE) // Instruction has 2 possible encoding types, type R
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
@@ -207,17 +210,20 @@ IF_DEF(DV_2S, IS_NONE, NONE) // DV_2S ........XX...... ......nnnnnddddd S
IF_DEF(DV_2T, IS_NONE, NONE) // DV_2T .Q......XX...... ......nnnnnddddd Sd Vn (addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv)
IF_DEF(DV_2U, IS_NONE, NONE) // DV_2U ................ ......nnnnnddddd Sd Sn (sha1h)
-IF_DEF(DV_3A, IS_NONE, NONE) // DV_3A .Q......XX.mmmmm ......nnnnnddddd Vd Vn Vm (vector)
-IF_DEF(DV_3AI, IS_NONE, NONE) // DV_3AI .Q......XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (vector by elem)
-IF_DEF(DV_3B, IS_NONE, NONE) // DV_3B .Q.......X.mmmmm ......nnnnnddddd Vd Vn Vm (vector)
-IF_DEF(DV_3BI, IS_NONE, NONE) // DV_3BI .Q.......XLmmmmm ....H.nnnnnddddd Vd Vn Vm[] (vector by elem)
-IF_DEF(DV_3C, IS_NONE, NONE) // DV_3C .Q.........mmmmm ......nnnnnddddd Vd Vn Vm (vector)
-IF_DEF(DV_3D, IS_NONE, NONE) // DV_3D .........X.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
-IF_DEF(DV_3DI, IS_NONE, NONE) // DV_3DI .........XLmmmmm ....H.nnnnnddddd Vd Vn Vm[] (scalar by elem)
-IF_DEF(DV_3E, IS_NONE, NONE) // DV_3E ...........mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
-IF_DEF(DV_3F, IS_NONE, NONE) // DV_3F ...........mmmmm ......nnnnnddddd Qd Sn Vm (Qd used as both source and destination)
-
-IF_DEF(DV_4A, IS_NONE, NONE) // DV_4A .........X.mmmmm .aaaaannnnnddddd Vd Vn Vm Va (scalar)
+IF_DEF(DV_3A, IS_NONE, NONE) // DV_3A .Q......XX.mmmmm ......nnnnnddddd Vd Vn Vm (vector)
+IF_DEF(DV_3AI, IS_NONE, NONE) // DV_3AI .Q......XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (vector by elem)
+IF_DEF(DV_3B, IS_NONE, NONE) // DV_3B .Q.......X.mmmmm ......nnnnnddddd Vd Vn Vm (vector)
+IF_DEF(DV_3BI, IS_NONE, NONE) // DV_3BI .Q.......XLmmmmm ....H.nnnnnddddd Vd Vn Vm[] (vector by elem)
+IF_DEF(DV_3C, IS_NONE, NONE) // DV_3C .Q.........mmmmm ......nnnnnddddd Vd Vn Vm (vector)
+IF_DEF(DV_3D, IS_NONE, NONE) // DV_3D .........X.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+IF_DEF(DV_3DI, IS_NONE, NONE) // DV_3DI .........XLmmmmm ....H.nnnnnddddd Vd Vn Vm[] (scalar by elem)
+IF_DEF(DV_3E, IS_NONE, NONE) // DV_3E ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (scalar)
+IF_DEF(DV_3F, IS_NONE, NONE) // DV_3F ...........mmmmm ......nnnnnddddd Qd Sn Vm (Qd used as both source and destination)
+IF_DEF(DV_3G, IS_NONE, NONE) // DV_3G .Q.........mmmmm .iiii.nnnnnddddd Vd Vn Vm imm (vector)
+IF_DEF(DV_3H, IS_NONE, NONE) // DV_3H ........XX.mmmmm ......nnnnnddddd Vd Vn Vm (addhn{2}, raddhn{2}, rsubhn{2}, pmull{2}, smlal{2}, subhn{2}, umlal{2} vector)
+IF_DEF(DV_3HI, IS_NONE, NONE) // DV_3HI ........XXLMmmmm ....H.nnnnnddddd Vd Vn Vm[] (smlal{2}, smlsl{2}, smull{2}, umlal{2}, umlsl{2}, umull{2} vector by elem)
+
+IF_DEF(DV_4A, IS_NONE, NONE) // DV_4A .........X.mmmmm .aaaaannnnnddddd Vd Vn Vm Va (scalar)
IF_DEF(SN_0A, IS_NONE, NONE) // SN_0A ................ ................
IF_DEF(SI_0A, IS_NONE, NONE) // SI_0A ...........iiiii iiiiiiiiiii..... imm16
diff --git a/src/coreclr/src/jit/emitpub.h b/src/coreclr/src/jit/emitpub.h
index cd28e0355c03ba..e1f5e80b5295bd 100644
--- a/src/coreclr/src/jit/emitpub.h
+++ b/src/coreclr/src/jit/emitpub.h
@@ -83,17 +83,17 @@ void emitIns_J(instruction ins, BasicBlock* dst, int instrCount = 0);
/* Emit initialized data sections */
/************************************************************************/
-UNATIVE_OFFSET emitDataGenBeg(UNATIVE_OFFSET size, bool align);
+UNATIVE_OFFSET emitDataGenBeg(UNATIVE_OFFSET size, UNATIVE_OFFSET alignment);
UNATIVE_OFFSET emitBBTableDataGenBeg(unsigned numEntries, bool relativeAddr);
-void emitDataGenData(unsigned offs, const void* data, size_t size);
+void emitDataGenData(unsigned offs, const void* data, UNATIVE_OFFSET size);
void emitDataGenData(unsigned offs, BasicBlock* label);
void emitDataGenEnd();
-UNATIVE_OFFSET emitDataConst(const void* cnsAddr, unsigned cnsSize, bool dblAlign);
+UNATIVE_OFFSET emitDataConst(const void* cnsAddr, UNATIVE_OFFSET cnsSize, UNATIVE_OFFSET cnsAlign);
UNATIVE_OFFSET emitDataSize();
diff --git a/src/coreclr/src/jit/emitxarch.cpp b/src/coreclr/src/jit/emitxarch.cpp
index 6cf6b4d45f7cd0..0167887f0c9195 100644
--- a/src/coreclr/src/jit/emitxarch.cpp
+++ b/src/coreclr/src/jit/emitxarch.cpp
@@ -1937,13 +1937,14 @@ inline UNATIVE_OFFSET emitter::emitInsSizeSV(code_t code, int var, int dsp)
/* Is this a stack parameter reference? */
- if (emitComp->lvaIsParameter(var)
+ if ((emitComp->lvaIsParameter(var)
#if !defined(TARGET_AMD64) || defined(UNIX_AMD64_ABI)
- && !emitComp->lvaIsRegArgument(var)
+ && !emitComp->lvaIsRegArgument(var)
#endif // !TARGET_AMD64 || UNIX_AMD64_ABI
- )
+ ) ||
+ (static_cast(var) == emitComp->lvaRetAddrVar))
{
- /* If no EBP frame, arguments are off of ESP, above temps */
+ /* If no EBP frame, arguments and ret addr are off of ESP, above temps */
if (!EBPbased)
{
@@ -9447,7 +9448,8 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
// Use the large version if this is not a byte. This trick will not
// work in case of SSE2 and AVX instructions.
- if ((size != EA_1BYTE) && (ins != INS_imul) && !IsSSEInstruction(ins) && !IsAVXInstruction(ins))
+ if ((size != EA_1BYTE) && (ins != INS_imul) && (ins != INS_bsf) && (ins != INS_bsr) && !IsSSEInstruction(ins) &&
+ !IsAVXInstruction(ins))
{
code++;
}
@@ -10213,8 +10215,9 @@ BYTE* emitter::emitOutputSV(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
}
// Use the large version if this is not a byte
- if ((size != EA_1BYTE) && (ins != INS_imul) && (!insIsCMOV(ins)) && !IsSSEInstruction(ins) &&
- !IsAVXInstruction(ins))
+ // TODO-XArch-Cleanup Can the need for the 'w' size bit be encoded in the instruction flags?
+ if ((size != EA_1BYTE) && (ins != INS_imul) && (ins != INS_bsf) && (ins != INS_bsr) && (!insIsCMOV(ins)) &&
+ !IsSSEInstruction(ins) && !IsAVXInstruction(ins))
{
code |= 0x1;
}
@@ -10762,7 +10765,12 @@ BYTE* emitter::emitOutputCV(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
}
// Check that the offset is properly aligned (i.e. the ddd in [ddd])
- assert((emitChkAlign == false) || (ins == INS_lea) || (((size_t)addr & (byteSize - 1)) == 0));
+ // When SMALL_CODE is set, we only expect 4-byte alignment, otherwise
+ // we expect the same alignment as the size of the constant.
+
+ assert((emitChkAlign == false) || (ins == INS_lea) ||
+ ((emitComp->compCodeOpt() == Compiler::SMALL_CODE) && (((size_t)addr & 3) == 0)) ||
+ (((size_t)addr & (byteSize - 1)) == 0));
}
else
{
@@ -11247,7 +11255,8 @@ BYTE* emitter::emitOutputRR(BYTE* dst, instrDesc* id)
#endif // TARGET_AMD64
}
#ifdef FEATURE_HW_INTRINSICS
- else if ((ins == INS_crc32) || (ins == INS_lzcnt) || (ins == INS_popcnt) || (ins == INS_tzcnt))
+ else if ((ins == INS_bsf) || (ins == INS_bsr) || (ins == INS_crc32) || (ins == INS_lzcnt) || (ins == INS_popcnt) ||
+ (ins == INS_tzcnt))
{
code = insEncodeRMreg(ins, code);
if ((ins == INS_crc32) && (size > EA_1BYTE))
@@ -14825,6 +14834,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency += PERFSCORE_LATENCY_2C;
break;
+ case INS_bsf:
+ case INS_bsr:
case INS_pextrb:
case INS_pextrd:
case INS_pextrw:
diff --git a/src/coreclr/src/jit/flowgraph.cpp b/src/coreclr/src/jit/flowgraph.cpp
index e8229286aaf39e..778962636fb0ab 100644
--- a/src/coreclr/src/jit/flowgraph.cpp
+++ b/src/coreclr/src/jit/flowgraph.cpp
@@ -271,23 +271,16 @@ void Compiler::fgInstrumentMethod()
HRESULT res = info.compCompHnd->allocMethodBlockCounts(countOfBlocks, &profileBlockCountsStart);
- Statement* stmt;
-
if (!SUCCEEDED(res))
{
// The E_NOTIMPL status is returned when we are profiling a generic method from a different assembly
if (res == E_NOTIMPL)
{
- // In such cases we still want to add the method entry callback node
-
- GenTreeCall::Use* args = gtNewCallArgs(gtNewIconEmbMethHndNode(info.compMethodHnd));
- GenTree* call = gtNewHelperCallNode(CORINFO_HELP_BBT_FCN_ENTER, TYP_VOID, args);
-
- stmt = gtNewStmt(call);
+ // expected failure...
}
else
{
- noway_assert(!"Error: failed to allocate profileBlockCounts");
+ noway_assert(!"Error: failed to allocate profileBlockCounts");
return;
}
}
@@ -310,8 +303,8 @@ void Compiler::fgInstrumentMethod()
}
// Assign the current block's IL offset into the profile data
- currentBlockCounts->ILOffset = block->bbCodeOffs;
- assert(currentBlockCounts->ExecutionCount == 0); // This value should already be zero-ed out
+ currentBlockCounts->ILOffset = block->bbCodeOffs;
+ currentBlockCounts->ExecutionCount = 0;
size_t addrOfCurrentExecutionCount = (size_t)¤tBlockCounts->ExecutionCount;
@@ -337,50 +330,51 @@ void Compiler::fgInstrumentMethod()
// Check that we allocated and initialized the same number of BlockCounts tuples
noway_assert(countOfBlocks == 0);
- // Add the method entry callback node
-
- GenTree* arg;
+ // When prejitting, add the method entry callback node
+ if (opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PREJIT))
+ {
+ GenTree* arg;
#ifdef FEATURE_READYTORUN_COMPILER
- if (opts.IsReadyToRun())
- {
- mdMethodDef currentMethodToken = info.compCompHnd->getMethodDefFromMethod(info.compMethodHnd);
+ if (opts.IsReadyToRun())
+ {
+ mdMethodDef currentMethodToken = info.compCompHnd->getMethodDefFromMethod(info.compMethodHnd);
- CORINFO_RESOLVED_TOKEN resolvedToken;
- resolvedToken.tokenContext = MAKE_METHODCONTEXT(info.compMethodHnd);
- resolvedToken.tokenScope = info.compScopeHnd;
- resolvedToken.token = currentMethodToken;
- resolvedToken.tokenType = CORINFO_TOKENKIND_Method;
+ CORINFO_RESOLVED_TOKEN resolvedToken;
+ resolvedToken.tokenContext = MAKE_METHODCONTEXT(info.compMethodHnd);
+ resolvedToken.tokenScope = info.compScopeHnd;
+ resolvedToken.token = currentMethodToken;
+ resolvedToken.tokenType = CORINFO_TOKENKIND_Method;
- info.compCompHnd->resolveToken(&resolvedToken);
+ info.compCompHnd->resolveToken(&resolvedToken);
- arg = impTokenToHandle(&resolvedToken);
- }
- else
+ arg = impTokenToHandle(&resolvedToken);
+ }
+ else
#endif
- {
- arg = gtNewIconEmbMethHndNode(info.compMethodHnd);
- }
-
- GenTreeCall::Use* args = gtNewCallArgs(arg);
- GenTree* call = gtNewHelperCallNode(CORINFO_HELP_BBT_FCN_ENTER, TYP_VOID, args);
+ {
+ arg = gtNewIconEmbMethHndNode(info.compMethodHnd);
+ }
- // Get the address of the first blocks ExecutionCount
- size_t addrOfFirstExecutionCount = (size_t)&profileBlockCountsStart->ExecutionCount;
+ GenTreeCall::Use* args = gtNewCallArgs(arg);
+ GenTree* call = gtNewHelperCallNode(CORINFO_HELP_BBT_FCN_ENTER, TYP_VOID, args);
- // Read Basic-Block count value
- GenTree* valueNode = gtNewIndOfIconHandleNode(TYP_INT, addrOfFirstExecutionCount, GTF_ICON_BBC_PTR, false);
+ // Get the address of the first blocks ExecutionCount
+ size_t addrOfFirstExecutionCount = (size_t)&profileBlockCountsStart->ExecutionCount;
- // Compare Basic-Block count value against zero
- GenTree* relop = gtNewOperNode(GT_NE, TYP_INT, valueNode, gtNewIconNode(0, TYP_INT));
- GenTree* colon = new (this, GT_COLON) GenTreeColon(TYP_VOID, gtNewNothingNode(), call);
- GenTree* cond = gtNewQmarkNode(TYP_VOID, relop, colon);
- stmt = gtNewStmt(cond);
- }
+ // Read Basic-Block count value
+ GenTree* valueNode = gtNewIndOfIconHandleNode(TYP_INT, addrOfFirstExecutionCount, GTF_ICON_BBC_PTR, false);
- fgEnsureFirstBBisScratch();
+ // Compare Basic-Block count value against zero
+ GenTree* relop = gtNewOperNode(GT_NE, TYP_INT, valueNode, gtNewIconNode(0, TYP_INT));
+ GenTree* colon = new (this, GT_COLON) GenTreeColon(TYP_VOID, gtNewNothingNode(), call);
+ GenTree* cond = gtNewQmarkNode(TYP_VOID, relop, colon);
+ Statement* stmt = gtNewStmt(cond);
- fgInsertStmtAtEnd(fgFirstBB, stmt);
+ fgEnsureFirstBBisScratch();
+ fgInsertStmtAtEnd(fgFirstBB, stmt);
+ }
+ }
}
/*****************************************************************************
@@ -1106,28 +1100,59 @@ flowList* Compiler::fgAddRefPred(BasicBlock* block,
assert(!fgCheapPredsValid);
- flowList* flow;
-
// Keep the predecessor list in lowest to highest bbNum order. This allows us to discover the loops in
// optFindNaturalLoops from innermost to outermost.
//
+ // If we are initializing preds, we rely on the fact that we are adding references in increasing
+ // order of blockPred->bbNum to avoid searching the list.
+ //
// TODO-Throughput: Inserting an edge for a block in sorted order requires searching every existing edge.
// Thus, inserting all the edges for a block is quadratic in the number of edges. We need to either
// not bother sorting for debuggable code, or sort in optFindNaturalLoops, or better, make the code in
// optFindNaturalLoops not depend on order. This also requires ensuring that nobody else has taken a
// dependency on this order. Note also that we don't allow duplicates in the list; we maintain a flDupCount
// count of duplication. This also necessitates walking the flow list for every edge we add.
-
+ //
+ flowList* flow = nullptr;
flowList** listp = &block->bbPreds;
- while ((*listp != nullptr) && ((*listp)->flBlock->bbNum < blockPred->bbNum))
+
+ if (initializingPreds)
{
- listp = &(*listp)->flNext;
+ // List is sorted order and we're adding references in
+ // increasing blockPred->bbNum order. The only possible
+ // dup list entry is the last one.
+ //
+ flowList* flowLast = block->bbLastPred;
+ if (flowLast != nullptr)
+ {
+ listp = &flowLast->flNext;
+
+ assert(flowLast->flBlock->bbNum <= blockPred->bbNum);
+
+ if (flowLast->flBlock == blockPred)
+ {
+ flow = flowLast;
+ }
+ }
}
+ else
+ {
+ // References are added randomly, so we have to search.
+ //
+ while ((*listp != nullptr) && ((*listp)->flBlock->bbNum < blockPred->bbNum))
+ {
+ listp = &(*listp)->flNext;
+ }
- if ((*listp != nullptr) && ((*listp)->flBlock == blockPred))
+ if ((*listp != nullptr) && ((*listp)->flBlock == blockPred))
+ {
+ flow = *listp;
+ }
+ }
+
+ if (flow != nullptr)
{
// The predecessor block already exists in the flow list; simply add to its duplicate count.
- flow = *listp;
noway_assert(flow->flDupCount > 0);
flow->flDupCount++;
}
@@ -1150,6 +1175,11 @@ flowList* Compiler::fgAddRefPred(BasicBlock* block,
flow->flBlock = blockPred;
flow->flDupCount = 1;
+ if (initializingPreds)
+ {
+ block->bbLastPred = flow;
+ }
+
if (fgHaveValidEdgeWeights)
{
// We are creating an edge from blockPred to block
@@ -2986,6 +3016,9 @@ void Compiler::fgRemoveCheapPred(BasicBlock* block, BasicBlock* blockPred)
}
}
+//------------------------------------------------------------------------
+// fgRemovePreds - remove all pred information from blocks
+//
void Compiler::fgRemovePreds()
{
C_ASSERT(offsetof(BasicBlock, bbPreds) ==
@@ -3001,10 +3034,13 @@ void Compiler::fgRemovePreds()
fgCheapPredsValid = false;
}
-/*****************************************************************************
- *
- * Function called to compute the bbPreds lists.
- */
+//------------------------------------------------------------------------
+// fgComputePreds - compute the bbPreds lists
+//
+// Notes:
+// Resets and then fills in the list of predecessors for each basic
+// block. Assumes blocks (via bbNext) are in increasing bbNum order.
+//
void Compiler::fgComputePreds()
{
noway_assert(fgFirstBB);
@@ -3020,21 +3056,20 @@ void Compiler::fgComputePreds()
}
#endif // DEBUG
- // reset the refs count for each basic block
-
- for (block = fgFirstBB; block; block = block->bbNext)
+ // Reset everything pred related
+ for (BasicBlock* block = fgFirstBB; block != nullptr; block = block->bbNext)
{
- block->bbRefs = 0;
+ block->bbPreds = nullptr;
+ block->bbLastPred = nullptr;
+ block->bbRefs = 0;
}
- /* the first block is always reachable! */
+ // the first block is always reachable
fgFirstBB->bbRefs = 1;
- /* Treat the initial block as a jump target */
+ // Treat the initial block as a jump target
fgFirstBB->bbFlags |= BBF_JMP_TARGET | BBF_HAS_LABEL;
- fgRemovePreds();
-
for (block = fgFirstBB; block; block = block->bbNext)
{
switch (block->bbJumpKind)
@@ -3464,8 +3499,12 @@ void Compiler::fgMarkGCPollBlocks()
bool blockNeedsPoll = false;
switch (block->bbJumpKind)
{
- case BBJ_COND:
case BBJ_ALWAYS:
+ if (block->isBBCallAlwaysPairTail())
+ {
+ break;
+ }
+ case BBJ_COND:
blockNeedsPoll = (block->bbJumpDest->bbNum <= block->bbNum);
break;
@@ -3527,6 +3566,8 @@ void Compiler::fgCreateGCPolls()
if (verbose)
{
printf("*************** In fgCreateGCPolls() for %s\n", info.compFullName);
+ fgDispBasicBlocks(false);
+ printf("\n");
}
#endif // DEBUG
@@ -3792,7 +3833,15 @@ void Compiler::fgCreateGCPolls()
{
noway_assert(opts.OptimizationEnabled());
fgReorderBlocks();
+ fgUpdateChangedFlowGraph();
+ }
+#ifdef DEBUG
+ if (verbose)
+ {
+ printf("*************** After fgCreateGCPolls()\n");
+ fgDispBasicBlocks(true);
}
+#endif // DEBUG
}
/*****************************************************************************
@@ -3833,19 +3882,21 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
assert(containsStmt);
}
#endif
+ // Create the GC_CALL node
+ GenTree* call = gtNewHelperCallNode(CORINFO_HELP_POLL_GC, TYP_VOID);
+ call = fgMorphCall(call->AsCall());
+ gtSetEvalOrder(call);
- if (GCPOLL_CALL == pollType)
+ if (pollType == GCPOLL_CALL)
{
createdPollBlocks = false;
- GenTreeCall* call = gtNewHelperCallNode(CORINFO_HELP_POLL_GC, TYP_VOID);
- GenTree* temp = fgMorphCall(call);
if (stmt != nullptr)
{
// The GC_POLL should be inserted relative to the supplied statement. The safer
// location for the insertion is prior to the current statement since the supplied
// statement could be a GT_JTRUE (see fgNewStmtNearEnd() for more details).
- Statement* newStmt = gtNewStmt(temp);
+ Statement* newStmt = gtNewStmt(call);
// Set the GC_POLL statement to have the same IL offset at the subsequent one.
newStmt->SetILOffsetX(stmt->GetILOffsetX());
@@ -3854,11 +3905,11 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
else if (block->bbJumpKind == BBJ_ALWAYS)
{
// for BBJ_ALWAYS I don't need to insert it before the condition. Just append it.
- fgNewStmtAtEnd(block, temp);
+ fgNewStmtAtEnd(block, call);
}
else
{
- Statement* newStmt = fgNewStmtNearEnd(block, temp);
+ Statement* newStmt = fgNewStmtNearEnd(block, call);
// For DDB156656, we need to associate the GC Poll with the IL offset (and therefore sequence
// point) of the tree before which we inserted the poll. One example of when this is a
// problem:
@@ -3895,8 +3946,9 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
}
#endif // DEBUG
}
- else
+ else // GCPOLL_INLINE
{
+ assert(pollType == GCPOLL_INLINE);
createdPollBlocks = true;
// if we're doing GCPOLL_INLINE, then:
// 1) Create two new blocks: Poll and Bottom. The original block is called Top.
@@ -3904,33 +3956,55 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
// I want to create:
// top -> poll -> bottom (lexically)
// so that we jump over poll to get to bottom.
- BasicBlock* top = block;
- BasicBlock* poll = fgNewBBafter(BBJ_NONE, top, true);
- BasicBlock* bottom = fgNewBBafter(top->bbJumpKind, poll, true);
- BBjumpKinds oldJumpKind = top->bbJumpKind;
+ BasicBlock* top = block;
+ BasicBlock* topFallThrough = nullptr;
+ unsigned char lpIndexFallThrough = BasicBlock::NOT_IN_LOOP;
+
+ if (top->bbJumpKind == BBJ_COND)
+ {
+ topFallThrough = top->bbNext;
+ lpIndexFallThrough = topFallThrough->bbNatLoopNum;
+ }
+
+ BasicBlock* poll = fgNewBBafter(BBJ_NONE, top, true);
+ BasicBlock* bottom = fgNewBBafter(top->bbJumpKind, poll, true);
+ BBjumpKinds oldJumpKind = top->bbJumpKind;
+ unsigned char lpIndex = top->bbNatLoopNum;
// Update block flags
const unsigned __int64 originalFlags = top->bbFlags | BBF_GC_SAFE_POINT;
- // Unlike Fei's inliner from puclr, I'm allowed to split loops.
- // And we keep a few other flags...
+ // We are allowed to split loops and we need to keep a few other flags...
+ //
noway_assert((originalFlags & (BBF_SPLIT_NONEXIST & ~(BBF_LOOP_HEAD | BBF_LOOP_CALL0 | BBF_LOOP_CALL1))) == 0);
top->bbFlags = originalFlags & (~BBF_SPLIT_LOST | BBF_GC_SAFE_POINT);
bottom->bbFlags |= originalFlags & (BBF_SPLIT_GAINED | BBF_IMPORTED | BBF_GC_SAFE_POINT);
bottom->inheritWeight(top);
poll->bbFlags |= originalFlags & (BBF_SPLIT_GAINED | BBF_IMPORTED | BBF_GC_SAFE_POINT);
- // 9) Mark Poll as rarely run.
+ // Mark Poll as rarely run.
poll->bbSetRunRarely();
+ poll->bbNatLoopNum = lpIndex; // Set the bbNatLoopNum in case we are in a loop
+
+ // Bottom gets all the outgoing edges and inherited flags of Original.
+ bottom->bbJumpDest = top->bbJumpDest;
+ bottom->bbNatLoopNum = lpIndex; // Set the bbNatLoopNum in case we are in a loop
+ if (lpIndex != BasicBlock::NOT_IN_LOOP)
+ {
+ // Set the new lpBottom in the natural loop table
+ optLoopTable[lpIndex].lpBottom = bottom;
+ }
- // 5) Bottom gets all the outgoing edges and inherited flags of Original.
- bottom->bbJumpDest = top->bbJumpDest;
+ if (lpIndexFallThrough != BasicBlock::NOT_IN_LOOP)
+ {
+ // Set the new lpHead in the natural loop table
+ optLoopTable[lpIndexFallThrough].lpHead = bottom;
+ }
- // 2) Add a GC_CALL node to Poll.
- GenTreeCall* call = gtNewHelperCallNode(CORINFO_HELP_POLL_GC, TYP_VOID);
+ // Add the GC_CALL node to Poll.
fgNewStmtAtEnd(poll, call);
- // 3) Remove the last statement from Top and add it to Bottom.
+ // Remove the last statement from Top and add it to Bottom.
if (oldJumpKind != BBJ_ALWAYS)
{
// if I'm always jumping to the target, then this is not a condition that needs moving.
@@ -3945,9 +4019,15 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
// for BBJ_ALWAYS blocks, bottom is an empty block.
- // 4) Create a GT_EQ node that checks against g_TrapReturningThreads. True jumps to Bottom,
- // false falls through to poll. Add this to the end of Top. Top is now BBJ_COND. Bottom is
- // now a jump target
+ // Create a GT_EQ node that checks against g_TrapReturningThreads. True jumps to Bottom,
+ // false falls through to poll. Add this to the end of Top. Top is now BBJ_COND. Bottom is
+ // now a jump target
+ CLANG_FORMAT_COMMENT_ANCHOR;
+
+#ifdef ENABLE_FAST_GCPOLL_HELPER
+ // Prefer the fast gc poll helepr over the double indirection
+ noway_assert(pAddrOfCaptureThreadGlobal == nullptr);
+#endif
GenTree* value; // The value of g_TrapReturningThreads
if (pAddrOfCaptureThreadGlobal != nullptr)
@@ -3974,18 +4054,28 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
trapRelop->gtFlags |= GTF_RELOP_JMP_USED | GTF_DONT_CSE;
GenTree* trapCheck = gtNewOperNode(GT_JTRUE, TYP_VOID, trapRelop);
+ gtSetEvalOrder(trapCheck);
fgNewStmtAtEnd(top, trapCheck);
+
+#ifdef DEBUG
+ if (verbose)
+ {
+ printf("Adding trapCheck in " FMT_BB "\n", top->bbNum);
+ gtDispTree(trapCheck);
+ }
+#endif
+
top->bbJumpDest = bottom;
top->bbJumpKind = BBJ_COND;
bottom->bbFlags |= BBF_JMP_TARGET;
- // 7) Bottom has Top and Poll as its predecessors. Poll has just Top as a predecessor.
+ // Bottom has Top and Poll as its predecessors. Poll has just Top as a predecessor.
fgAddRefPred(bottom, poll);
fgAddRefPred(bottom, top);
fgAddRefPred(poll, top);
- // 8) Replace Top with Bottom in the predecessor list of all outgoing edges from Bottom (1 for
- // jumps, 2 for conditional branches, N for switches).
+ // Replace Top with Bottom in the predecessor list of all outgoing edges from Bottom
+ // (1 for unconditional branches, 2 for conditional branches, N for switches).
switch (oldJumpKind)
{
case BBJ_NONE:
@@ -4031,6 +4121,9 @@ bool Compiler::fgCreateGCPoll(GCPollType pollType, BasicBlock* block, Statement*
gtDispBlockStmts(poll);
printf(" bottom block is " FMT_BB "\n", bottom->bbNum);
gtDispBlockStmts(bottom);
+
+ printf("\nAfter this change in fgCreateGCPoll the BB graph is:");
+ fgDispBasicBlocks(false);
}
#endif // DEBUG
}
@@ -5953,7 +6046,14 @@ void Compiler::fgFindBasicBlocks()
{
// The lifetime of this var might expand multiple BBs. So it is a long lifetime compiler temp.
lvaInlineeReturnSpillTemp = lvaGrabTemp(false DEBUGARG("Inline return value spill temp"));
- lvaTable[lvaInlineeReturnSpillTemp].lvType = info.compRetNativeType;
+ if (compDoOldStructRetyping())
+ {
+ lvaTable[lvaInlineeReturnSpillTemp].lvType = info.compRetNativeType;
+ }
+ else
+ {
+ lvaTable[lvaInlineeReturnSpillTemp].lvType = info.compRetType;
+ }
// If the method returns a ref class, set the class of the spill temp
// to the method's return value. We may update this later if it turns
@@ -6890,7 +6990,7 @@ PhaseStatus Compiler::fgImport()
if ((block->bbFlags & BBF_IMPORTED) != 0)
{
// Assume if we generate any IR for the block we generate IR for the entire block.
- if (!block->isEmpty())
+ if (block->firstStmt() != nullptr)
{
IL_OFFSET beginOffset = block->bbCodeOffs;
IL_OFFSET endOffset = block->bbCodeOffsEnd;
@@ -7795,18 +7895,26 @@ inline void Compiler::fgMarkLoopHead(BasicBlock* block)
return;
}
-#ifdef DEBUG
- if (verbose)
- {
- printf("no guaranteed callsite exits, marking method as fully interruptible\n");
- }
-#endif
-
// only enable fully interruptible code for if we're hijacking.
if (GCPOLL_NONE == opts.compGCPollType)
{
+#ifdef DEBUG
+ if (verbose)
+ {
+ printf("no guaranteed callsite exits, marking method as fully interruptible\n");
+ }
+#endif
SetInterruptible(true);
}
+ else
+ {
+#ifdef DEBUG
+ if (verbose)
+ {
+ printf("no guaranteed callsite exits, but we are using GC Poll calls\n");
+ }
+#endif
+ }
}
GenTree* Compiler::fgGetCritSectOfStaticMethod()
@@ -7833,7 +7941,7 @@ GenTree* Compiler::fgGetCritSectOfStaticMethod()
// Collectible types requires that for shared generic code, if we use the generic context paramter
// that we report it. (This is a conservative approach, we could detect some cases particularly when the
// context parameter is this that we don't need the eager reporting logic.)
- lvaGenericsContextUseCount++;
+ lvaGenericsContextInUse = true;
switch (kind.runtimeLookupKind)
{
@@ -7847,6 +7955,7 @@ GenTree* Compiler::fgGetCritSectOfStaticMethod()
{
// In this case, the hidden param is the class handle.
tree = gtNewLclvNode(info.compTypeCtxtArg, TYP_I_IMPL);
+ tree->gtFlags |= GTF_VAR_CONTEXT;
break;
}
@@ -7854,6 +7963,7 @@ GenTree* Compiler::fgGetCritSectOfStaticMethod()
{
// In this case, the hidden param is the method handle.
tree = gtNewLclvNode(info.compTypeCtxtArg, TYP_I_IMPL);
+ tree->gtFlags |= GTF_VAR_CONTEXT;
// Call helper CORINFO_HELP_GETCLASSFROMMETHODPARAM to get the class handle
// from the method handle.
tree = gtNewHelperCallNode(CORINFO_HELP_GETCLASSFROMMETHODPARAM, TYP_I_IMPL, gtNewCallArgs(tree));
@@ -8568,7 +8678,18 @@ class MergedReturns
if (comp->compMethodReturnsNativeScalarType())
{
- returnLocalDsc.lvType = genActualType(comp->info.compRetNativeType);
+ if (!comp->compDoOldStructRetyping())
+ {
+ returnLocalDsc.lvType = genActualType(comp->info.compRetType);
+ if (varTypeIsStruct(returnLocalDsc.lvType))
+ {
+ comp->lvaSetStruct(returnLocalNum, comp->info.compMethodInfo->args.retTypeClass, false);
+ }
+ }
+ else
+ {
+ returnLocalDsc.lvType = genActualType(comp->info.compRetNativeType);
+ }
}
else if (comp->compMethodReturnsRetBufAddr())
{
@@ -10145,6 +10266,12 @@ bool Compiler::fgCanCompactBlocks(BasicBlock* block, BasicBlock* bNext)
return false;
}
+ // Don't compact away any loop entry blocks that we added in optCanonicalizeLoops
+ if (optIsLoopEntry(block))
+ {
+ return false;
+ }
+
#if defined(TARGET_ARM)
// We can't compact a finally target block, as we need to generate special code for such blocks during code
// generation
@@ -10826,7 +10953,11 @@ void Compiler::fgRemoveConditionalJump(BasicBlock* block)
{
test->SetRootNode(sideEffList);
- fgMorphBlockStmt(block, test DEBUGARG("fgRemoveConditionalJump"));
+ if (fgStmtListThreaded)
+ {
+ gtSetStmtInfo(test);
+ fgSetStmtSeq(test);
+ }
}
}
}
@@ -11386,10 +11517,12 @@ BasicBlock* Compiler::fgConnectFallThrough(BasicBlock* bSrc, BasicBlock* bDst)
{
fgAddRefPred(jmpBlk, bSrc, fgGetPredForBlock(bDst, bSrc));
}
+ // Record the loop number in the new block
+ jmpBlk->bbNatLoopNum = bSrc->bbNatLoopNum;
// When adding a new jmpBlk we will set the bbWeight and bbFlags
//
- if (fgHaveValidEdgeWeights)
+ if (fgHaveValidEdgeWeights && fgHaveProfileData())
{
noway_assert(fgComputePredsDone);
@@ -11408,7 +11541,6 @@ BasicBlock* Compiler::fgConnectFallThrough(BasicBlock* bSrc, BasicBlock* bDst)
BasicBlock::weight_t weightDiff = (newEdge->edgeWeightMax() - newEdge->edgeWeightMin());
BasicBlock::weight_t slop = BasicBlock::GetSlopFraction(bSrc, bDst);
-
//
// If the [min/max] values for our edge weight is within the slop factor
// then we will set the BBF_PROF_WEIGHT flag for the block
@@ -21225,6 +21357,8 @@ void Compiler::fgDebugCheckFlags(GenTree* tree)
return;
}
break;
+ case GT_ADDR:
+ assert(!op1->CanCSE());
default:
break;
@@ -21896,7 +22030,7 @@ unsigned Compiler::fgCheckInlineDepthAndRecursion(InlineInfo* inlineInfo)
for (; inlineContext != nullptr; inlineContext = inlineContext->GetParent())
{
-
+ assert(inlineContext->GetCode() != nullptr);
depth++;
if (inlineContext->GetCode() == candidateCode)
@@ -22180,12 +22314,11 @@ void Compiler::fgNoteNonInlineCandidate(Statement* stmt, GenTreeCall* call)
*/
GenTree* Compiler::fgGetStructAsStructPtr(GenTree* tree)
{
- noway_assert((tree->gtOper == GT_LCL_VAR) || (tree->gtOper == GT_FIELD) || (tree->gtOper == GT_IND) ||
- (tree->gtOper == GT_BLK) || (tree->gtOper == GT_OBJ) || tree->OperIsSIMD() ||
- // tree->gtOper == GT_CALL || cannot get address of call.
- // tree->gtOper == GT_MKREFANY || inlining should've been aborted due to mkrefany opcode.
- // tree->gtOper == GT_RET_EXPR || cannot happen after fgUpdateInlineReturnExpressionPlaceHolder
- (tree->gtOper == GT_COMMA));
+ noway_assert(tree->OperIs(GT_LCL_VAR, GT_FIELD, GT_IND, GT_BLK, GT_OBJ, GT_COMMA) || tree->OperIsSIMD() ||
+ tree->OperIsHWIntrinsic());
+ // GT_CALL, cannot get address of call.
+ // GT_MKREFANY, inlining should've been aborted due to mkrefany opcode.
+ // GT_RET_EXPR, cannot happen after fgUpdateInlineReturnExpressionPlaceHolder
switch (tree->OperGet())
{
@@ -23647,14 +23780,12 @@ Statement* Compiler::fgInlinePrependStatements(InlineInfo* inlineInfo)
// If the local is used check whether we need to insert explicit zero initialization.
if (tmpNum != BAD_VAR_NUM)
{
- if (!fgVarNeedsExplicitZeroInit(lvaGetDesc(tmpNum), bbInALoop, bbIsReturn))
+ LclVarDsc* const tmpDsc = lvaGetDesc(tmpNum);
+ if (!fgVarNeedsExplicitZeroInit(tmpNum, bbInALoop, bbIsReturn))
{
-#ifdef DEBUG
- if (verbose)
- {
- printf("\nSkipping zero initialization of V%02u\n", tmpNum);
- }
-#endif // DEBUG
+ JITDUMP("\nSuppressing zero-init for V%02u -- expect to zero in prolog\n", tmpNum);
+ tmpDsc->lvSuppressedZeroInit = 1;
+ compSuppressedZeroInit = true;
continue;
}
@@ -23720,38 +23851,6 @@ Statement* Compiler::fgInlinePrependStatements(InlineInfo* inlineInfo)
void Compiler::fgInlineAppendStatements(InlineInfo* inlineInfo, BasicBlock* block, Statement* stmtAfter)
{
- // If this inlinee was passed a runtime lookup generic context and
- // ignores it, we can decrement the "generic context was used" ref
- // count, because we created a new lookup tree and incremented the
- // count when we imported the type parameter argument to pass to
- // the inlinee. See corresponding logic in impImportCall that
- // checks the sig for CORINFO_CALLCONV_PARAMTYPE.
- //
- // Does this method require a context (type) parameter?
- if ((inlineInfo->inlineCandidateInfo->methInfo.args.callConv & CORINFO_CALLCONV_PARAMTYPE) != 0)
- {
- // Did the computation of that parameter require the
- // caller to perform a runtime lookup?
- if (inlineInfo->inlineCandidateInfo->exactContextNeedsRuntimeLookup)
- {
- // Fetch the temp for the generic context as it would
- // appear in the inlinee's body.
- const unsigned typeCtxtArg = inlineInfo->typeContextArg;
- const unsigned tmpNum = inlineInfo->lclTmpNum[typeCtxtArg];
-
- // Was it used in the inline body?
- if (tmpNum == BAD_VAR_NUM)
- {
- // No -- so the associated runtime lookup is not needed
- // and also no longer provides evidence that the generic
- // context should be kept alive.
- JITDUMP("Inlinee ignores runtime lookup generics context\n");
- assert(lvaGenericsContextUseCount > 0);
- lvaGenericsContextUseCount--;
- }
- }
- }
-
// Null out any gc ref locals
if (!inlineInfo->HasGcRefLocals())
{
@@ -25823,6 +25922,10 @@ PhaseStatus Compiler::fgTailMergeThrows()
JITDUMP("Method does not have multiple noreturn calls.\n");
return PhaseStatus::MODIFIED_NOTHING;
}
+ else
+ {
+ JITDUMP("Scanning the %u candidates\n", optNoReturnCallCount);
+ }
// This transformation requires block pred lists to be built
// so that flow can be safely updated.
@@ -25888,11 +25991,16 @@ PhaseStatus Compiler::fgTailMergeThrows()
continue;
}
- // For throw helpers the block should have exactly one statement....
- // (this isn't guaranteed, but seems likely)
- Statement* stmt = block->firstStmt();
+ // We only look at the first statement for throw helper calls.
+ // Remainder of the block will be dead code.
+ //
+ // Throw helper calls could show up later in the block; we
+ // won't try merging those as we'd need to match up all the
+ // prior statements or split the block at this point, etc.
+ //
+ Statement* const stmt = block->firstStmt();
- if ((stmt == nullptr) || (stmt->GetNextStmt() != nullptr))
+ if (stmt == nullptr)
{
continue;
}
@@ -25954,13 +26062,14 @@ PhaseStatus Compiler::fgTailMergeThrows()
// We walk the map rather than the block list, to save a bit of time.
BlockToBlockMap::KeyIterator iter(blockMap.Begin());
BlockToBlockMap::KeyIterator end(blockMap.End());
- int updateCount = 0;
+ unsigned updateCount = 0;
for (; !iter.Equal(end); iter++)
{
BasicBlock* const nonCanonicalBlock = iter.Get();
BasicBlock* const canonicalBlock = iter.GetValue();
flowList* nextPredEdge = nullptr;
+ bool updated = false;
// Walk pred list of the non canonical block, updating flow to target
// the canonical block instead.
@@ -25974,14 +26083,14 @@ PhaseStatus Compiler::fgTailMergeThrows()
case BBJ_NONE:
{
fgTailMergeThrowsFallThroughHelper(predBlock, nonCanonicalBlock, canonicalBlock, predEdge);
- updateCount++;
+ updated = true;
}
break;
case BBJ_ALWAYS:
{
fgTailMergeThrowsJumpToHelper(predBlock, nonCanonicalBlock, canonicalBlock, predEdge);
- updateCount++;
+ updated = true;
}
break;
@@ -25997,7 +26106,7 @@ PhaseStatus Compiler::fgTailMergeThrows()
{
fgTailMergeThrowsJumpToHelper(predBlock, nonCanonicalBlock, canonicalBlock, predEdge);
}
- updateCount++;
+ updated = true;
}
break;
@@ -26005,7 +26114,7 @@ PhaseStatus Compiler::fgTailMergeThrows()
{
JITDUMP("*** " FMT_BB " now branching to " FMT_BB "\n", predBlock->bbNum, canonicalBlock->bbNum);
fgReplaceSwitchJumpTarget(predBlock, canonicalBlock, nonCanonicalBlock);
- updateCount++;
+ updated = true;
}
break;
@@ -26015,6 +26124,11 @@ PhaseStatus Compiler::fgTailMergeThrows()
break;
}
}
+
+ if (updated)
+ {
+ updateCount++;
+ }
}
if (updateCount == 0)
@@ -26022,13 +26136,18 @@ PhaseStatus Compiler::fgTailMergeThrows()
return PhaseStatus::MODIFIED_NOTHING;
}
+ // TODO: Update the count of noreturn call sites -- this feeds a heuristic in morph
+ // to determine if these noreturn calls should be tail called.
+ //
+ // Updating the count does not lead to better results, so deferring for now.
+ //
+ JITDUMP("Made %u updates\n", updateCount);
+ assert(updateCount < optNoReturnCallCount);
+
// If we altered flow, reset fgModified. Given where we sit in the
// phase list, flow-dependent side data hasn't been built yet, so
// nothing needs invalidation.
//
- // Note we could invoke a cleanup pass here, but optOptimizeFlow
- // seems to be missing some safety checks and doesn't expect to
- // see an already cleaned-up flow graph.
assert(fgModified);
fgModified = false;
return PhaseStatus::MODIFIED_EVERYTHING;
diff --git a/src/coreclr/src/jit/gentree.cpp b/src/coreclr/src/jit/gentree.cpp
index f5b72fc566316a..3ff1403ed021ea 100644
--- a/src/coreclr/src/jit/gentree.cpp
+++ b/src/coreclr/src/jit/gentree.cpp
@@ -622,15 +622,12 @@ void GenTree::CopyReg(GenTree* from)
//
bool GenTree::gtHasReg() const
{
- bool hasReg;
+ bool hasReg = false;
if (IsMultiRegCall())
{
- // Have to cast away const-ness because GetReturnTypeDesc() is a non-const method
- GenTree* tree = const_cast(this);
- GenTreeCall* call = tree->AsCall();
- unsigned regCount = call->GetReturnTypeDesc()->GetReturnRegCount();
- hasReg = false;
+ const GenTreeCall* call = AsCall();
+ const unsigned regCount = call->GetReturnTypeDesc()->GetReturnRegCount();
// A Multi-reg call node is said to have regs, if it has
// reg assigned to each of its result registers.
@@ -645,11 +642,9 @@ bool GenTree::gtHasReg() const
}
else if (IsCopyOrReloadOfMultiRegCall())
{
- GenTree* tree = const_cast(this);
- GenTreeCopyOrReload* copyOrReload = tree->AsCopyOrReload();
- GenTreeCall* call = copyOrReload->gtGetOp1()->AsCall();
- unsigned regCount = call->GetReturnTypeDesc()->GetReturnRegCount();
- hasReg = false;
+ const GenTreeCopyOrReload* copyOrReload = AsCopyOrReload();
+ const GenTreeCall* call = copyOrReload->gtGetOp1()->AsCall();
+ const unsigned regCount = call->GetReturnTypeDesc()->GetReturnRegCount();
// A Multi-reg copy or reload node is said to have regs,
// if it has valid regs in any of the positions.
@@ -693,9 +688,7 @@ int GenTree::GetRegisterDstCount() const
}
else if (IsMultiRegCall())
{
- // temporarily cast away const-ness as AsCall() method is not declared const
- GenTree* temp = const_cast(this);
- return temp->AsCall()->GetReturnTypeDesc()->GetReturnRegCount();
+ return AsCall()->GetReturnTypeDesc()->GetReturnRegCount();
}
else if (IsCopyOrReload())
{
@@ -722,6 +715,14 @@ int GenTree::GetRegisterDstCount() const
#endif
}
#endif
+
+#if defined(TARGET_XARCH) && defined(FEATURE_HW_INTRINSICS)
+ if (OperIs(GT_HWINTRINSIC))
+ {
+ assert(TypeGet() == TYP_STRUCT);
+ return 2;
+ }
+#endif
assert(!"Unexpected multi-reg node");
return 0;
}
@@ -742,9 +743,8 @@ regMaskTP GenTree::gtGetRegMask() const
if (IsMultiRegCall())
{
// temporarily cast away const-ness as AsCall() method is not declared const
- resultMask = genRegMask(GetRegNum());
- GenTree* temp = const_cast(this);
- resultMask |= temp->AsCall()->GetOtherRegMask();
+ resultMask = genRegMask(GetRegNum());
+ resultMask |= AsCall()->GetOtherRegMask();
}
else if (IsCopyOrReloadOfMultiRegCall())
{
@@ -752,10 +752,9 @@ regMaskTP GenTree::gtGetRegMask() const
// positions that need to be copied or reloaded. Hence we need
// to consider only those registers for computing reg mask.
- GenTree* tree = const_cast(this);
- GenTreeCopyOrReload* copyOrReload = tree->AsCopyOrReload();
- GenTreeCall* call = copyOrReload->gtGetOp1()->AsCall();
- unsigned regCount = call->GetReturnTypeDesc()->GetReturnRegCount();
+ const GenTreeCopyOrReload* copyOrReload = AsCopyOrReload();
+ const GenTreeCall* call = copyOrReload->gtGetOp1()->AsCall();
+ const unsigned regCount = call->GetReturnTypeDesc()->GetReturnRegCount();
resultMask = RBM_NONE;
for (unsigned i = 0; i < regCount; ++i)
@@ -770,9 +769,8 @@ regMaskTP GenTree::gtGetRegMask() const
#if FEATURE_ARG_SPLIT
else if (OperIsPutArgSplit())
{
- GenTree* tree = const_cast(this);
- GenTreePutArgSplit* splitArg = tree->AsPutArgSplit();
- unsigned regCount = splitArg->gtNumRegs;
+ const GenTreePutArgSplit* splitArg = AsPutArgSplit();
+ const unsigned regCount = splitArg->gtNumRegs;
resultMask = RBM_NONE;
for (unsigned i = 0; i < regCount; ++i)
@@ -1288,6 +1286,15 @@ bool GenTree::Compare(GenTree* op1, GenTree* op2, bool swapOK)
return true;
}
break;
+
+ case GT_CNS_STR:
+ if ((op1->AsStrCon()->gtSconCPX == op2->AsStrCon()->gtSconCPX) &&
+ (op1->AsStrCon()->gtScpHnd == op2->AsStrCon()->gtScpHnd))
+ {
+ return true;
+ }
+ break;
+
#if 0
// TODO-CQ: Enable this in the future
case GT_CNS_LNG:
@@ -1450,7 +1457,7 @@ bool GenTree::Compare(GenTree* op1, GenTree* op2, bool swapOK)
if ((op1->AsHWIntrinsic()->gtHWIntrinsicId != op2->AsHWIntrinsic()->gtHWIntrinsicId) ||
(op1->AsHWIntrinsic()->gtSIMDBaseType != op2->AsHWIntrinsic()->gtSIMDBaseType) ||
(op1->AsHWIntrinsic()->gtSIMDSize != op2->AsHWIntrinsic()->gtSIMDSize) ||
- (op1->AsHWIntrinsic()->gtIndexBaseType != op2->AsHWIntrinsic()->gtIndexBaseType))
+ (op1->AsHWIntrinsic()->GetOtherBaseType() != op2->AsHWIntrinsic()->GetOtherBaseType()))
{
return false;
}
@@ -2120,7 +2127,7 @@ unsigned Compiler::gtHashValue(GenTree* tree)
hash += tree->AsHWIntrinsic()->gtHWIntrinsicId;
hash += tree->AsHWIntrinsic()->gtSIMDBaseType;
hash += tree->AsHWIntrinsic()->gtSIMDSize;
- hash += tree->AsHWIntrinsic()->gtIndexBaseType;
+ hash += tree->AsHWIntrinsic()->GetOtherBaseType();
break;
#endif // FEATURE_HW_INTRINSICS
@@ -5550,6 +5557,47 @@ bool GenTree::OperMayThrow(Compiler* comp)
return false;
}
+//-----------------------------------------------------------------------------------
+// GetFieldCount: Return the register count for a multi-reg lclVar.
+//
+// Arguments:
+// compiler - the current Compiler instance.
+//
+// Return Value:
+// Returns the number of registers defined by this node.
+//
+// Notes:
+// This must be a multireg lclVar.
+//
+unsigned int GenTreeLclVar::GetFieldCount(Compiler* compiler)
+{
+ assert(IsMultiReg());
+ LclVarDsc* varDsc = compiler->lvaGetDesc(GetLclNum());
+ return varDsc->lvFieldCnt;
+}
+
+//-----------------------------------------------------------------------------------
+// GetFieldTypeByIndex: Get a specific register's type, based on regIndex, that is produced
+// by this multi-reg node.
+//
+// Arguments:
+// compiler - the current Compiler instance.
+// idx - which register type to return.
+//
+// Return Value:
+// The register type assigned to this index for this node.
+//
+// Notes:
+// This must be a multireg lclVar and 'regIndex' must be a valid index for this node.
+//
+var_types GenTreeLclVar::GetFieldTypeByIndex(Compiler* compiler, unsigned idx)
+{
+ assert(IsMultiReg());
+ LclVarDsc* varDsc = compiler->lvaGetDesc(GetLclNum());
+ LclVarDsc* fieldVarDsc = compiler->lvaGetDesc(varDsc->lvFieldLclStart + idx);
+ return fieldVarDsc->TypeGet();
+}
+
#if DEBUGGABLE_GENTREE
// static
GenTree::VtablePtr GenTree::s_vtablesForOpers[] = {nullptr};
@@ -6058,12 +6106,13 @@ GenTreeCall* Compiler::gtNewCallNode(
{
node->gtFlags |= (use.GetNode()->gtFlags & GTF_ALL_EFFECT);
}
- node->gtCallType = callType;
- node->gtCallMethHnd = callHnd;
- node->gtCallArgs = args;
- node->gtCallThisArg = nullptr;
- node->fgArgInfo = nullptr;
- node->callSig = nullptr;
+ node->gtCallType = callType;
+ node->gtCallMethHnd = callHnd;
+ node->gtCallArgs = args;
+ node->gtCallThisArg = nullptr;
+ node->fgArgInfo = nullptr;
+ INDEBUG(node->callSig = nullptr;)
+ node->tailCallInfo = nullptr;
node->gtRetClsHnd = nullptr;
node->gtControlExpr = nullptr;
node->gtCallMoreFlags = 0;
@@ -6123,21 +6172,14 @@ GenTreeCall* Compiler::gtNewCallNode(
// Initialize spill flags of gtOtherRegs
node->ClearOtherRegFlags();
-#if defined(TARGET_X86) || defined(TARGET_ARM)
- // Initialize the multi-reg long return info if necessary
+#if !defined(TARGET_64BIT)
if (varTypeIsLong(node))
{
- // The return type will remain as the incoming long type
- node->gtReturnType = node->gtType;
-
+ assert(node->gtReturnType == node->gtType);
// Initialize Return type descriptor of call node
- ReturnTypeDesc* retTypeDesc = node->GetReturnTypeDesc();
- retTypeDesc->InitializeLongReturnType(this);
-
- // must be a long returned in two registers
- assert(retTypeDesc->GetReturnRegCount() == 2);
+ node->InitializeLongReturnType();
}
-#endif // defined(TARGET_X86) || defined(TARGET_ARM)
+#endif // !defined(TARGET_64BIT)
return node;
}
@@ -6422,7 +6464,7 @@ GenTree* Compiler::gtArgNodeByLateArgInx(GenTreeCall* call, unsigned lateArgInx)
* Create a node that will assign 'src' to 'dst'.
*/
-GenTree* Compiler::gtNewAssignNode(GenTree* dst, GenTree* src)
+GenTreeOp* Compiler::gtNewAssignNode(GenTree* dst, GenTree* src)
{
/* Mark the target as being assigned */
@@ -6439,7 +6481,7 @@ GenTree* Compiler::gtNewAssignNode(GenTree* dst, GenTree* src)
/* Create the assignment node */
- GenTree* asg = gtNewOperNode(GT_ASG, dst->TypeGet(), dst, src);
+ GenTreeOp* asg = gtNewOperNode(GT_ASG, dst->TypeGet(), dst, src)->AsOp();
/* Mark the expression as containing an assignment */
@@ -7430,7 +7472,7 @@ GenTree* Compiler::gtCloneExpr(
GenTreeHWIntrinsic(hwintrinsicOp->TypeGet(), hwintrinsicOp->gtGetOp1(),
hwintrinsicOp->gtGetOp2IfPresent(), hwintrinsicOp->gtHWIntrinsicId,
hwintrinsicOp->gtSIMDBaseType, hwintrinsicOp->gtSIMDSize);
- copy->AsHWIntrinsic()->gtIndexBaseType = hwintrinsicOp->gtIndexBaseType;
+ copy->AsHWIntrinsic()->SetOtherBaseType(hwintrinsicOp->GetOtherBaseType());
}
break;
#endif
@@ -7747,7 +7789,11 @@ GenTreeCall* Compiler::gtCloneExprCallHelper(GenTreeCall* tree, unsigned addFlag
// we only really need one physical copy of it. Therefore a shallow pointer copy will suffice.
// (Note that this still holds even if the tree we are cloning was created by an inlinee compiler,
// because the inlinee still uses the inliner's memory allocator anyway.)
- copy->callSig = tree->callSig;
+ INDEBUG(copy->callSig = tree->callSig;)
+
+ // The tail call info does not change after it is allocated, so for the same reasons as above
+ // a shallow copy suffices.
+ copy->tailCallInfo = tree->tailCallInfo;
copy->gtCallType = tree->gtCallType;
copy->gtReturnType = tree->gtReturnType;
@@ -7798,6 +7844,15 @@ GenTreeCall* Compiler::gtCloneExprCallHelper(GenTreeCall* tree, unsigned addFlag
copy->CopyOtherRegFlags(tree);
+ // We keep track of the number of no return calls, so if we've cloned
+ // one of these, update the tracking.
+ //
+ if (tree->IsNoReturn())
+ {
+ assert(copy->IsNoReturn());
+ setMethodHasNoReturnCalls();
+ }
+
return copy;
}
@@ -9874,6 +9929,12 @@ void Compiler::gtDispNode(GenTree* tree, IndentStack* indentStack, __in __in_z _
--msgLength;
break;
}
+ if (tree->gtFlags & GTF_VAR_MULTIREG)
+ {
+ printf((tree->gtFlags & GTF_VAR_DEF) ? "M" : "m");
+ --msgLength;
+ break;
+ }
if (tree->gtFlags & GTF_VAR_DEF)
{
printf("D");
@@ -9892,6 +9953,13 @@ void Compiler::gtDispNode(GenTree* tree, IndentStack* indentStack, __in __in_z _
--msgLength;
break;
}
+ if (tree->gtFlags & GTF_VAR_CONTEXT)
+ {
+ printf("!");
+ --msgLength;
+ break;
+ }
+
goto DASH;
case GT_EQ:
@@ -10137,39 +10205,49 @@ void Compiler::gtDispRegVal(GenTree* tree)
break;
}
+#if FEATURE_MULTIREG_RET
if (tree->IsMultiRegCall())
{
- // 0th reg is GettRegNum(), which is already printed above.
+ // 0th reg is GetRegNum(), which is already printed above.
// Print the remaining regs of a multi-reg call node.
- GenTreeCall* call = tree->AsCall();
- unsigned regCount = call->GetReturnTypeDesc()->TryGetReturnRegCount();
+ const GenTreeCall* call = tree->AsCall();
+ const unsigned regCount = call->GetReturnTypeDesc()->TryGetReturnRegCount();
for (unsigned i = 1; i < regCount; ++i)
{
printf(",%s", compRegVarName(call->GetRegNumByIdx(i)));
}
}
- else if (tree->IsCopyOrReloadOfMultiRegCall())
+ else if (tree->IsCopyOrReload())
{
- GenTreeCopyOrReload* copyOrReload = tree->AsCopyOrReload();
- GenTreeCall* call = tree->gtGetOp1()->AsCall();
- unsigned regCount = call->GetReturnTypeDesc()->TryGetReturnRegCount();
- for (unsigned i = 1; i < regCount; ++i)
+ GenTree* op1 = tree->gtGetOp1();
+ const GenTreeCopyOrReload* copyOrReload = tree->AsCopyOrReload();
+ unsigned regCount = 0;
+ if (op1->OperIs(GT_CALL))
{
- printf(",%s", compRegVarName(copyOrReload->GetRegNumByIdx(i)));
- }
- }
-
-#if FEATURE_MULTIREG_RET
- if (tree->IsCopyOrReload())
- {
- for (int i = 1; i < MAX_RET_REG_COUNT; i++)
- {
- regNumber reg = (regNumber)tree->AsCopyOrReload()->GetRegNumByIdx(i);
- if (reg == REG_NA)
+ if (op1->IsMultiRegCall())
{
- break;
+ regCount = op1->AsCall()->GetReturnTypeDesc()->TryGetReturnRegCount();
+ // If it hasn't yet been initialized, we'd still like to see the registers printed.
+ if (regCount == 0)
+ {
+ regCount = MAX_RET_REG_COUNT;
+ }
}
- printf(",%s", compRegVarName(reg));
+ }
+ else if (op1->IsMultiRegLclVar())
+ {
+ regCount = op1->AsLclVar()->GetFieldCount(this);
+ }
+ else if (op1->IsMultiRegNode())
+ {
+ regCount = op1->GetMultiRegCount();
+ }
+ // We will only have valid regs for positions that require copy or reload.
+ // But we'd like to keep track of where they are so we print all positions.
+ for (unsigned i = 1; i < regCount; i++)
+ {
+ regNumber reg = tree->AsCopyOrReload()->GetRegNumByIdx(i);
+ printf(",%s", (reg == REG_NA) ? ",NA" : compRegVarName(reg));
}
}
#endif
@@ -10236,6 +10314,10 @@ void Compiler::gtGetLclVarNameInfo(unsigned lclNum, const char** ilKindOut, cons
{
ilName = "GsCookie";
}
+ else if (lclNum == lvaRetAddrVar)
+ {
+ ilName = "ReturnAddress";
+ }
#if FEATURE_FIXED_OUT_ARGS
else if (lclNum == lvaPInvokeFrameRegSaveVar)
{
@@ -11285,10 +11367,10 @@ void Compiler::gtDispTree(GenTree* tree,
printf(" %s", eeGetFieldName(tree->AsField()->gtFldHnd), 0);
}
+ gtDispCommonEndLine(tree);
+
if (tree->AsField()->gtFldObj && !topOnly)
{
- gtDispVN(tree);
- printf("\n");
gtDispChild(tree->AsField()->gtFldObj, indentStack, IIArcBottom);
}
@@ -12421,11 +12503,10 @@ GenTree* Compiler::gtFoldTypeCompare(GenTree* tree)
GenTree* op2TunneledHandle = nullptr;
CORINFO_CLASS_HANDLE cls1Hnd = NO_CLASS_HANDLE;
CORINFO_CLASS_HANDLE cls2Hnd = NO_CLASS_HANDLE;
- unsigned runtimeLookupCount = 0;
// Try and find class handles from op1 and op2
- cls1Hnd = gtGetHelperArgClassHandle(op1ClassFromHandle, &runtimeLookupCount, &op1TunneledHandle);
- cls2Hnd = gtGetHelperArgClassHandle(op2ClassFromHandle, &runtimeLookupCount, &op2TunneledHandle);
+ cls1Hnd = gtGetHelperArgClassHandle(op1ClassFromHandle, &op1TunneledHandle);
+ cls2Hnd = gtGetHelperArgClassHandle(op2ClassFromHandle, &op2TunneledHandle);
// If we have both class handles, try and resolve the type equality test completely.
bool resolveFailed = false;
@@ -12444,11 +12525,6 @@ GenTree* Compiler::gtFoldTypeCompare(GenTree* tree)
const int compareResult = operatorIsEQ ^ typesAreEqual ? 0 : 1;
JITDUMP("Runtime reports comparison is known at jit time: %u\n", compareResult);
GenTree* result = gtNewIconNode(compareResult);
-
- // Any runtime lookups that fed into this compare are
- // now dead code, so they no longer require the runtime context.
- assert(lvaGenericsContextUseCount >= runtimeLookupCount);
- lvaGenericsContextUseCount -= runtimeLookupCount;
return result;
}
else
@@ -12611,15 +12687,12 @@ GenTree* Compiler::gtFoldTypeCompare(GenTree* tree)
//
// Arguments:
// tree - tree that passes the handle to the helper
-// runtimeLookupCount [optional, in/out] - incremented if tree was a runtime lookup
// handleTree [optional, out] - set to the literal operand tree for indirect handles
//
// Returns:
// The compile time class handle if known.
//
-CORINFO_CLASS_HANDLE Compiler::gtGetHelperArgClassHandle(GenTree* tree,
- unsigned* runtimeLookupCount,
- GenTree** handleTree)
+CORINFO_CLASS_HANDLE Compiler::gtGetHelperArgClassHandle(GenTree* tree, GenTree** handleTree)
{
CORINFO_CLASS_HANDLE result = NO_CLASS_HANDLE;
@@ -12639,11 +12712,6 @@ CORINFO_CLASS_HANDLE Compiler::gtGetHelperArgClassHandle(GenTree* tree,
else if (tree->OperGet() == GT_RUNTIMELOOKUP)
{
result = tree->AsRuntimeLookup()->GetClassHandle();
-
- if (runtimeLookupCount != nullptr)
- {
- *runtimeLookupCount = *runtimeLookupCount + 1;
- }
}
// Or something reached indirectly
else if (tree->gtOper == GT_IND)
@@ -15071,6 +15139,14 @@ GenTree* Compiler::gtNewTempAssign(
// and call returns. Lowering and Codegen will handle these.
ok = true;
}
+ else if ((dstTyp == TYP_STRUCT) && (valTyp == TYP_INT))
+ {
+ // It could come from `ASG(struct, 0)` that was propagated to `RETURN struct(0)`,
+ // and now it is merging to a struct again.
+ assert(!compDoOldStructRetyping());
+ assert(tmp == genReturnLocal);
+ ok = true;
+ }
if (!ok)
{
@@ -15099,15 +15175,34 @@ GenTree* Compiler::gtNewTempAssign(
// struct types. We don't have a convenient way to do that for all SIMD temps, since some
// internal trees use SIMD types that are not used by the input IL. In this case, we allow
// a null type handle and derive the necessary information about the type from its varType.
- CORINFO_CLASS_HANDLE structHnd = gtGetStructHandleIfPresent(val);
- if (varTypeIsStruct(varDsc) && ((structHnd != NO_CLASS_HANDLE) || (varTypeIsSIMD(valTyp))))
+ CORINFO_CLASS_HANDLE valStructHnd = gtGetStructHandleIfPresent(val);
+ if (varTypeIsStruct(varDsc) && (valStructHnd == NO_CLASS_HANDLE) && !varTypeIsSIMD(valTyp))
+ {
+ // There are 2 special cases:
+ // 1. we have lost classHandle from a FIELD node because the parent struct has overlapping fields,
+ // the field was transformed as IND opr GT_LCL_FLD;
+ // 2. we are propogating `ASG(struct V01, 0)` to `RETURN(struct V01)`, `CNT_INT` doesn't `structHnd`;
+ // in these cases, we can use the type of the merge return for the assignment.
+ assert(val->OperIs(GT_IND, GT_LCL_FLD, GT_CNS_INT));
+ assert(!compDoOldStructRetyping());
+ assert(tmp == genReturnLocal);
+ valStructHnd = lvaGetStruct(genReturnLocal);
+ assert(valStructHnd != NO_CLASS_HANDLE);
+ }
+
+ if ((valStructHnd != NO_CLASS_HANDLE) && val->IsConstInitVal())
+ {
+ assert(!compDoOldStructRetyping());
+ asg = gtNewAssignNode(dest, val);
+ }
+ else if (varTypeIsStruct(varDsc) && ((valStructHnd != NO_CLASS_HANDLE) || varTypeIsSIMD(valTyp)))
{
// The struct value may be be a child of a GT_COMMA.
GenTree* valx = val->gtEffectiveVal(/*commaOnly*/ true);
- if (structHnd != NO_CLASS_HANDLE)
+ if (valStructHnd != NO_CLASS_HANDLE)
{
- lvaSetStruct(tmp, structHnd, false);
+ lvaSetStruct(tmp, valStructHnd, false);
}
else
{
@@ -15115,7 +15210,7 @@ GenTree* Compiler::gtNewTempAssign(
}
dest->gtFlags |= GTF_DONT_CSE;
valx->gtFlags |= GTF_DONT_CSE;
- asg = impAssignStruct(dest, val, structHnd, (unsigned)CHECK_SPILL_NONE, pAfterStmt, ilOffset, block);
+ asg = impAssignStruct(dest, val, valStructHnd, (unsigned)CHECK_SPILL_NONE, pAfterStmt, ilOffset, block);
}
else
{
@@ -15123,7 +15218,8 @@ GenTree* Compiler::gtNewTempAssign(
// when the ABI calls for returning a struct as a primitive type.
// TODO-1stClassStructs: When we stop "lying" about the types for ABI purposes, the
// 'genReturnLocal' should be the original struct type.
- assert(!varTypeIsStruct(valTyp) || typGetObjLayout(structHnd)->GetSize() == genTypeSize(varDsc));
+ assert(!varTypeIsStruct(valTyp) || ((valStructHnd != NO_CLASS_HANDLE) &&
+ (typGetObjLayout(valStructHnd)->GetSize() == genTypeSize(varDsc))));
asg = gtNewAssignNode(dest, val);
}
@@ -15221,9 +15317,7 @@ GenTree* Compiler::gtNewRefCOMfield(GenTree* objPtr,
#if FEATURE_MULTIREG_RET
if (varTypeIsStruct(call))
{
- // Initialize Return type descriptor of call node.
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- retTypeDesc->InitializeStructReturnType(this, structType);
+ call->InitializeStructReturnType(this, structType);
}
#endif // FEATURE_MULTIREG_RET
@@ -16435,14 +16529,8 @@ bool GenTree::isContained() const
else if (OperKind() & GTK_RELOP)
{
// We have to cast away const-ness since AsOp() method is non-const.
- GenTree* childNode = const_cast(this)->AsOp()->gtOp1;
- assert((isMarkedContained == false) || childNode->IsSIMDEqualityOrInequality());
- }
-
- // these either produce a result in register or set flags reg.
- else if (IsSIMDEqualityOrInequality())
- {
- assert(!isMarkedContained);
+ const GenTree* childNode = AsOp()->gtGetOp1();
+ assert(isMarkedContained == false);
}
// if it's contained it can't be unused.
@@ -17071,7 +17159,7 @@ GenTree* Compiler::gtGetSIMDZero(var_types simdType, var_types baseType, CORINFO
// We only return the HWIntrinsicNode if SSE is supported, since it is possible for
// the user to disable the SSE HWIntrinsic support via the COMPlus configuration knobs
// even though the hardware vector types are still available.
- return gtNewSimdHWIntrinsicNode(simdType, NI_Vector128_Zero, baseType, size);
+ return gtNewSimdHWIntrinsicNode(simdType, NI_Vector128_get_Zero, baseType, size);
}
return nullptr;
case TYP_SIMD32:
@@ -17080,7 +17168,7 @@ GenTree* Compiler::gtGetSIMDZero(var_types simdType, var_types baseType, CORINFO
// We only return the HWIntrinsicNode if AVX is supported, since it is possible for
// the user to disable the AVX HWIntrinsic support via the COMPlus configuration knobs
// even though the hardware vector types are still available.
- return gtNewSimdHWIntrinsicNode(simdType, NI_Vector256_Zero, baseType, size);
+ return gtNewSimdHWIntrinsicNode(simdType, NI_Vector256_get_Zero, baseType, size);
}
return nullptr;
default:
@@ -17140,6 +17228,12 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleIfPresent(GenTree* tree)
if (varTypeIsSIMD(tree))
{
structHnd = gtGetStructHandleForSIMD(tree->gtType, TYP_FLOAT);
+#ifdef FEATURE_HW_INTRINSICS
+ if (structHnd == NO_CLASS_HANDLE)
+ {
+ structHnd = gtGetStructHandleForHWSIMD(tree->gtType, TYP_FLOAT);
+ }
+#endif
}
#endif
break;
@@ -17173,28 +17267,28 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleIfPresent(GenTree* tree)
}
else
{
- GenTree* addr = tree->AsIndir()->Addr();
+ GenTree* addr = tree->AsIndir()->Addr();
+ FieldSeqNode* fieldSeq = nullptr;
if ((addr->OperGet() == GT_ADD) && addr->gtGetOp2()->OperIs(GT_CNS_INT))
{
- FieldSeqNode* fieldSeq = addr->gtGetOp2()->AsIntCon()->gtFieldSeq;
-
- if (fieldSeq != nullptr)
- {
- while (fieldSeq->m_next != nullptr)
- {
- fieldSeq = fieldSeq->m_next;
- }
- if (fieldSeq != FieldSeqStore::NotAField() && !fieldSeq->IsPseudoField())
- {
- CORINFO_FIELD_HANDLE fieldHnd = fieldSeq->m_fieldHnd;
- CorInfoType fieldCorType = info.compCompHnd->getFieldType(fieldHnd, &structHnd);
- assert(fieldCorType == CORINFO_TYPE_VALUECLASS);
- }
- }
+ fieldSeq = addr->gtGetOp2()->AsIntCon()->gtFieldSeq;
}
- else if (addr->OperGet() == GT_LCL_VAR)
+ else
{
- structHnd = gtGetStructHandleIfPresent(addr);
+ GetZeroOffsetFieldMap()->Lookup(addr, &fieldSeq);
+ }
+ if (fieldSeq != nullptr)
+ {
+ while (fieldSeq->m_next != nullptr)
+ {
+ fieldSeq = fieldSeq->m_next;
+ }
+ if (fieldSeq != FieldSeqStore::NotAField() && !fieldSeq->IsPseudoField())
+ {
+ CORINFO_FIELD_HANDLE fieldHnd = fieldSeq->m_fieldHnd;
+ CorInfoType fieldCorType = info.compCompHnd->getFieldType(fieldHnd, &structHnd);
+ assert(fieldCorType == CORINFO_TYPE_VALUECLASS);
+ }
}
}
}
@@ -17206,11 +17300,21 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleIfPresent(GenTree* tree)
#endif // FEATURE_SIMD
#ifdef FEATURE_HW_INTRINSICS
case GT_HWINTRINSIC:
- structHnd = gtGetStructHandleForHWSIMD(tree->gtType, tree->AsHWIntrinsic()->gtSIMDBaseType);
+ if ((tree->gtFlags & GTF_SIMDASHW_OP) != 0)
+ {
+ structHnd = gtGetStructHandleForSIMD(tree->gtType, tree->AsHWIntrinsic()->gtSIMDBaseType);
+ }
+ else
+ {
+ structHnd = gtGetStructHandleForHWSIMD(tree->gtType, tree->AsHWIntrinsic()->gtSIMDBaseType);
+ }
break;
#endif
break;
}
+ // TODO-1stClassStructs: add a check that `structHnd != NO_CLASS_HANDLE`,
+ // nowadays it won't work because the right part of an ASG could have struct type without a handle
+ // (check `fgMorphBlockOperand(isBlkReqd`) and a few other cases.
}
return structHnd;
}
@@ -18351,13 +18455,8 @@ bool GenTree::isCommutativeSIMDIntrinsic()
case SIMDIntrinsicAdd:
case SIMDIntrinsicBitwiseAnd:
case SIMDIntrinsicBitwiseOr:
- case SIMDIntrinsicBitwiseXor:
case SIMDIntrinsicEqual:
- case SIMDIntrinsicMax:
- case SIMDIntrinsicMin:
case SIMDIntrinsicMul:
- case SIMDIntrinsicOpEquality:
- case SIMDIntrinsicOpInEquality:
return true;
default:
return false;
@@ -18549,40 +18648,6 @@ GenTreeHWIntrinsic* Compiler::gtNewScalarHWIntrinsicNode(
GenTreeHWIntrinsic(type, gtNewArgList(op1, op2, op3), hwIntrinsicID, TYP_UNKNOWN, 0);
}
-//---------------------------------------------------------------------------------------
-// gtNewMustThrowException:
-// create a throw node (calling into JIT helper) that must be thrown.
-// The result would be a comma node: COMMA(jithelperthrow(void), x) where x's type should be specified.
-//
-// Arguments
-// helper - JIT helper ID
-// type - return type of the node
-//
-// Return Value
-// pointer to the throw node
-//
-GenTree* Compiler::gtNewMustThrowException(unsigned helper, var_types type, CORINFO_CLASS_HANDLE clsHnd)
-{
- GenTreeCall* node = gtNewHelperCallNode(helper, TYP_VOID);
- node->gtCallMoreFlags |= GTF_CALL_M_DOES_NOT_RETURN;
- if (type != TYP_VOID)
- {
- unsigned dummyTemp = lvaGrabTemp(true DEBUGARG("dummy temp of must thrown exception"));
- if (type == TYP_STRUCT)
- {
- lvaSetStruct(dummyTemp, clsHnd, false);
- type = lvaTable[dummyTemp].lvType; // struct type is normalized
- }
- else
- {
- lvaTable[dummyTemp].lvType = type;
- }
- GenTree* dummyNode = gtNewLclvNode(dummyTemp, type);
- return gtNewOperNode(GT_COMMA, type, node, dummyNode);
- }
- return node;
-}
-
// Returns true for the HW Instrinsic instructions that have MemoryLoad semantics, false otherwise
bool GenTreeHWIntrinsic::OperIsMemoryLoad() const
{
@@ -18672,6 +18737,40 @@ bool GenTreeHWIntrinsic::OperIsMemoryLoadOrStore() const
#endif // FEATURE_HW_INTRINSICS
+//---------------------------------------------------------------------------------------
+// gtNewMustThrowException:
+// create a throw node (calling into JIT helper) that must be thrown.
+// The result would be a comma node: COMMA(jithelperthrow(void), x) where x's type should be specified.
+//
+// Arguments
+// helper - JIT helper ID
+// type - return type of the node
+//
+// Return Value
+// pointer to the throw node
+//
+GenTree* Compiler::gtNewMustThrowException(unsigned helper, var_types type, CORINFO_CLASS_HANDLE clsHnd)
+{
+ GenTreeCall* node = gtNewHelperCallNode(helper, TYP_VOID);
+ node->gtCallMoreFlags |= GTF_CALL_M_DOES_NOT_RETURN;
+ if (type != TYP_VOID)
+ {
+ unsigned dummyTemp = lvaGrabTemp(true DEBUGARG("dummy temp of must thrown exception"));
+ if (type == TYP_STRUCT)
+ {
+ lvaSetStruct(dummyTemp, clsHnd, false);
+ type = lvaTable[dummyTemp].lvType; // struct type is normalized
+ }
+ else
+ {
+ lvaTable[dummyTemp].lvType = type;
+ }
+ GenTree* dummyNode = gtNewLclvNode(dummyTemp, type);
+ return gtNewOperNode(GT_COMMA, type, node, dummyNode);
+ }
+ return node;
+}
+
//---------------------------------------------------------------------------------------
// InitializeStructReturnType:
// Initialize the Return Type Descriptor for a method that returns a struct type
@@ -18799,16 +18898,10 @@ void ReturnTypeDesc::InitializeStructReturnType(Compiler* comp, CORINFO_CLASS_HA
// InitializeLongReturnType:
// Initialize the Return Type Descriptor for a method that returns a TYP_LONG
//
-// Arguments
-// comp - Compiler Instance
-//
-// Return Value
-// None
-//
-void ReturnTypeDesc::InitializeLongReturnType(Compiler* comp)
+void ReturnTypeDesc::InitializeLongReturnType()
{
+ assert(!m_inited);
#if defined(TARGET_X86) || defined(TARGET_ARM)
-
// Setups up a ReturnTypeDesc for returning a long using two registers
//
assert(MAX_RET_REG_COUNT >= 2);
@@ -18840,7 +18933,7 @@ void ReturnTypeDesc::InitializeLongReturnType(Compiler* comp)
// x86 and ARM return long in multiple registers.
// ARM and ARM64 return HFA struct in multiple registers.
//
-regNumber ReturnTypeDesc::GetABIReturnReg(unsigned idx)
+regNumber ReturnTypeDesc::GetABIReturnReg(unsigned idx) const
{
unsigned count = GetReturnRegCount();
assert(idx < count);
@@ -18969,7 +19062,7 @@ regNumber ReturnTypeDesc::GetABIReturnReg(unsigned idx)
// of return registers and wants to know the set of return registers.
//
// static
-regMaskTP ReturnTypeDesc::GetABIReturnRegs()
+regMaskTP ReturnTypeDesc::GetABIReturnRegs() const
{
regMaskTP resultMask = RBM_NONE;
@@ -19042,3 +19135,20 @@ regNumber GenTree::ExtractTempReg(regMaskTP mask /* = (regMaskTP)-1 */)
gtRsvdRegs &= ~tempRegMask;
return genRegNumFromMask(tempRegMask);
}
+
+#ifdef TARGET_ARM
+//------------------------------------------------------------------------
+// IsOffsetMisaligned: check if the field needs a special handling on arm.
+//
+// Return Value:
+// true if it is a float field with a misaligned offset, false otherwise.
+//
+bool GenTreeLclFld::IsOffsetMisaligned() const
+{
+ if (varTypeIsFloating(gtType))
+ {
+ return ((m_lclOffs % emitTypeSize(TYP_FLOAT)) != 0);
+ }
+ return false;
+}
+#endif // TARGET_ARM
diff --git a/src/coreclr/src/jit/gentree.h b/src/coreclr/src/jit/gentree.h
index ad1e1e10146438..ec0cbee87192e4 100644
--- a/src/coreclr/src/jit/gentree.h
+++ b/src/coreclr/src/jit/gentree.h
@@ -732,23 +732,24 @@ struct GenTree
#define GTF_NOREG_AT_USE 0x00000100 // tree node is in memory at the point of use
-#define GTF_SET_FLAGS 0x00000800 // Requires that codegen for this node set the flags. Use gtSetFlags() to check this flag.
-#define GTF_USE_FLAGS 0x00001000 // Indicates that this node uses the flags bits.
+#define GTF_SET_FLAGS 0x00000200 // Requires that codegen for this node set the flags. Use gtSetFlags() to check this flag.
+#define GTF_USE_FLAGS 0x00000400 // Indicates that this node uses the flags bits.
-#define GTF_MAKE_CSE 0x00002000 // Hoisted expression: try hard to make this into CSE (see optPerformHoistExpr)
-#define GTF_DONT_CSE 0x00004000 // Don't bother CSE'ing this expr
-#define GTF_COLON_COND 0x00008000 // This node is conditionally executed (part of ? :)
+#define GTF_MAKE_CSE 0x00000800 // Hoisted expression: try hard to make this into CSE (see optPerformHoistExpr)
+#define GTF_DONT_CSE 0x00001000 // Don't bother CSE'ing this expr
+#define GTF_COLON_COND 0x00002000 // This node is conditionally executed (part of ? :)
#define GTF_NODE_MASK (GTF_COLON_COND)
-#define GTF_BOOLEAN 0x00040000 // value is known to be 0/1
+#define GTF_BOOLEAN 0x00004000 // value is known to be 0/1
-#define GTF_UNSIGNED 0x00100000 // With GT_CAST: the source operand is an unsigned type
+#define GTF_UNSIGNED 0x00008000 // With GT_CAST: the source operand is an unsigned type
// With operators: the specified node is an unsigned operator
-#define GTF_LATE_ARG 0x00200000 // The specified node is evaluated to a temp in the arg list, and this temp is added to gtCallLateArgs.
-#define GTF_SPILL 0x00400000 // Needs to be spilled here
+ //
+#define GTF_LATE_ARG 0x00010000 // The specified node is evaluated to a temp in the arg list, and this temp is added to gtCallLateArgs.
+#define GTF_SPILL 0x00020000 // Needs to be spilled here
-#define GTF_COMMON_MASK 0x007FFFFF // mask of all the flags above
+#define GTF_COMMON_MASK 0x0003FFFF // mask of all the flags above
#define GTF_REUSE_REG_VAL 0x00800000 // This is set by the register allocator on nodes whose value already exists in the
// register assigned to this node, so the code generator does not have to generate
@@ -766,25 +767,38 @@ struct GenTree
// NB: GTF_VAR_* and GTF_REG_* share the same namespace of flags.
// These flags are also used by GT_LCL_FLD.
-#define GTF_VAR_DEF 0x80000000 // GT_LCL_VAR -- this is a definition
-#define GTF_VAR_USEASG 0x40000000 // GT_LCL_VAR -- this is a partial definition, a use of the previous definition is implied
- // A partial definition usually occurs when a struct field is assigned to (s.f = ...) or
- // when a scalar typed variable is assigned to via a narrow store (*((byte*)&i) = ...).
-#define GTF_VAR_CAST 0x10000000 // GT_LCL_VAR -- has been explictly cast (variable node may not be type of local)
-#define GTF_VAR_ITERATOR 0x08000000 // GT_LCL_VAR -- this is a iterator reference in the loop condition
-#define GTF_VAR_CLONED 0x01000000 // GT_LCL_VAR -- this node has been cloned or is a clone
- // Relevant for inlining optimizations (see fgInlinePrependStatements)
+#define GTF_VAR_DEF 0x80000000 // GT_LCL_VAR -- this is a definition
+#define GTF_VAR_USEASG 0x40000000 // GT_LCL_VAR -- this is a partial definition, a use of the previous definition is implied
+ // A partial definition usually occurs when a struct field is assigned to (s.f = ...) or
+ // when a scalar typed variable is assigned to via a narrow store (*((byte*)&i) = ...).
+// Last-use bits.
+// Note that a node marked GTF_VAR_MULTIREG can only be a pure definition of all the fields, or a pure use of all the fields,
+// so we don't need the equivalent of GTF_VAR_USEASG.
+
+#define GTF_VAR_MULTIREG_DEATH0 0x04000000 // GT_LCL_VAR -- The last-use bit for a lclVar (the first register if it is multireg).
+#define GTF_VAR_DEATH GTF_VAR_MULTIREG_DEATH0
+#define GTF_VAR_MULTIREG_DEATH1 0x08000000 // GT_LCL_VAR -- The last-use bit for the second register of a multireg lclVar.
+#define GTF_VAR_MULTIREG_DEATH2 0x10000000 // GT_LCL_VAR -- The last-use bit for the third register of a multireg lclVar.
+#define GTF_VAR_MULTIREG_DEATH3 0x20000000 // GT_LCL_VAR -- The last-use bit for the fourth register of a multireg lclVar.
+#define GTF_VAR_DEATH_MASK (GTF_VAR_MULTIREG_DEATH0|GTF_VAR_MULTIREG_DEATH1 | GTF_VAR_MULTIREG_DEATH2 | GTF_VAR_MULTIREG_DEATH3)
+// This is the amount we have to shift, plus the regIndex, to get the last use bit we want.
+#define MULTIREG_LAST_USE_SHIFT 26
+#define GTF_VAR_MULTIREG 0x02000000 // This is a struct or (on 32-bit platforms) long variable that is used or defined
+ // to/from a multireg source or destination (e.g. a call arg or return, or an op
+ // that returns its result in multiple registers such as a long multiply).
+
+#define GTF_LIVENESS_MASK (GTF_VAR_DEF | GTF_VAR_USEASG | GTF_VAR_DEATH_MASK)
+
+#define GTF_VAR_CAST 0x01000000 // GT_LCL_VAR -- has been explictly cast (variable node may not be type of local)
+#define GTF_VAR_ITERATOR 0x00800000 // GT_LCL_VAR -- this is a iterator reference in the loop condition
+#define GTF_VAR_CLONED 0x00400000 // GT_LCL_VAR -- this node has been cloned or is a clone
+#define GTF_VAR_CONTEXT 0x00200000 // GT_LCL_VAR -- this node is part of a runtime lookup
-// TODO-Cleanup: Currently, GTF_REG_BIRTH is used only by stackfp
-// We should consider using it more generally for VAR_BIRTH, instead of
-// GTF_VAR_DEF && !GTF_VAR_USEASG
-#define GTF_REG_BIRTH 0x04000000 // GT_LCL_VAR, -- enregistered variable born here
-#define GTF_VAR_DEATH 0x02000000 // GT_LCL_VAR, -- variable dies here (last use)
+ // Relevant for inlining optimizations (see fgInlinePrependStatements)
#define GTF_VAR_ARR_INDEX 0x00000020 // The variable is part of (the index portion of) an array index expression.
// Shares a value with GTF_REVERSE_OPS, which is meaningless for local var.
-#define GTF_LIVENESS_MASK (GTF_VAR_DEF | GTF_VAR_USEASG | GTF_REG_BIRTH | GTF_VAR_DEATH)
// For additional flags for GT_CALL node see GTF_CALL_M_*
@@ -800,6 +814,8 @@ struct GenTree
#define GTF_CALL_POP_ARGS 0x04000000 // GT_CALL -- caller pop arguments?
#define GTF_CALL_HOISTABLE 0x02000000 // GT_CALL -- call is hoistable
+#define GTF_MEMORYBARRIER_LOAD 0x40000000 // GT_MEMORYBARRIER -- Load barrier
+
#define GTF_NOP_DEATH 0x40000000 // GT_NOP -- operand dies here
#define GTF_FLD_VOLATILE 0x40000000 // GT_FIELD/GT_CLS_VAR -- same as GTF_IND_VOLATILE
@@ -899,6 +915,9 @@ struct GenTree
#define GTF_SIMD12_OP 0x80000000 // GT_SIMD -- Indicates that the operands need to be handled as SIMD12
// even if they have been retyped as SIMD16.
+#define GTF_SIMDASHW_OP 0x80000000 // GT_HWINTRINSIC -- Indicates that the structHandle should be gotten from gtGetStructHandleForSIMD
+ // rarther than from gtGetStructHandleForHWSIMD.
+
//---------------------------------------------------------------------
//
// GenTree flags stored in gtDebugFlags.
@@ -1627,11 +1646,10 @@ struct GenTree
inline bool IsFPZero();
inline bool IsIntegralConst(ssize_t constVal);
inline bool IsIntegralConstVector(ssize_t constVal);
+ inline bool IsSIMDZero();
inline bool IsBoxedValue();
- inline bool IsSIMDEqualityOrInequality() const;
-
static bool OperIsList(genTreeOps gtOper)
{
return gtOper == GT_LIST;
@@ -1698,6 +1716,9 @@ struct GenTree
// Returns true if it is a call node returning its value in more than one register
inline bool IsMultiRegCall() const;
+ // Returns true if it is a struct lclVar node residing in multiple registers.
+ inline bool IsMultiRegLclVar() const;
+
// Returns true if it is a node returning its value in more than one register
inline bool IsMultiRegNode() const;
@@ -1710,6 +1731,9 @@ struct GenTree
// Returns the type of the regIndex'th register defined by a multi-reg node.
var_types GetRegTypeByIndex(int regIndex);
+ // Returns the GTF flag equivalent for the regIndex'th register of a multi-reg node.
+ unsigned int GetRegSpillFlagByIdx(int regIndex) const;
+
// Returns true if it is a GT_COPY or GT_RELOAD node
inline bool IsCopyOrReload() const;
@@ -1941,6 +1965,21 @@ struct GenTree
ClearRegOptional();
}
+ bool CanCSE() const
+ {
+ return ((gtFlags & GTF_DONT_CSE) == 0);
+ }
+
+ void SetDoNotCSE()
+ {
+ gtFlags |= GTF_DONT_CSE;
+ }
+
+ void ClearDoNotCSE()
+ {
+ gtFlags &= ~GTF_DONT_CSE;
+ }
+
bool IsReverseOp() const
{
return (gtFlags & GTF_REVERSE_OPS) ? true : false;
@@ -3108,12 +3147,195 @@ struct GenTreeLclVarCommon : public GenTreeUnOp
#endif
};
+//------------------------------------------------------------------------
+// MultiRegSpillFlags
+//
+// GTF_SPILL or GTF_SPILLED flag on a multi-reg node indicates that one or
+// more of its result regs are in that state. The spill flags of each register
+// are stored here. We only need 2 bits per returned register,
+// so this is treated as a 2-bit array. No architecture needs more than 8 bits.
+//
+typedef unsigned char MultiRegSpillFlags;
+static const unsigned PACKED_GTF_SPILL = 1;
+static const unsigned PACKED_GTF_SPILLED = 2;
+
+//----------------------------------------------------------------------
+// GetMultiRegSpillFlagsByIdx: get spill flag associated with the return register
+// specified by its index.
+//
+// Arguments:
+// idx - Position or index of the return register
+//
+// Return Value:
+// Returns GTF_* flags associated with the register. Only GTF_SPILL and GTF_SPILLED are considered.
+//
+inline unsigned GetMultiRegSpillFlagsByIdx(MultiRegSpillFlags flags, unsigned idx)
+{
+ static_assert_no_msg(MAX_RET_REG_COUNT * 2 <= sizeof(unsigned char) * BITS_PER_BYTE);
+ assert(idx < MAX_RET_REG_COUNT);
+
+ unsigned bits = flags >> (idx * 2); // It doesn't matter that we possibly leave other high bits here.
+ unsigned spillFlags = 0;
+ if (bits & PACKED_GTF_SPILL)
+ {
+ spillFlags |= GTF_SPILL;
+ }
+ if (bits & PACKED_GTF_SPILLED)
+ {
+ spillFlags |= GTF_SPILLED;
+ }
+ return spillFlags;
+}
+
+//----------------------------------------------------------------------
+// SetMultiRegSpillFlagsByIdx: set spill flags for the register specified by its index.
+//
+// Arguments:
+// oldFlags - The current value of the MultiRegSpillFlags for a node.
+// flagsToSet - GTF_* flags. Only GTF_SPILL and GTF_SPILLED are allowed.
+// Note that these are the flags used on non-multireg nodes,
+// and this method adds the appropriate flags to the
+// incoming MultiRegSpillFlags and returns it.
+// idx - Position or index of the register
+//
+// Return Value:
+// The new value for the node's MultiRegSpillFlags.
+//
+inline MultiRegSpillFlags SetMultiRegSpillFlagsByIdx(MultiRegSpillFlags oldFlags, unsigned flagsToSet, unsigned idx)
+{
+ static_assert_no_msg(MAX_RET_REG_COUNT * 2 <= sizeof(unsigned char) * BITS_PER_BYTE);
+ assert(idx < MAX_RET_REG_COUNT);
+
+ MultiRegSpillFlags newFlags = oldFlags;
+ unsigned bits = 0;
+ if (flagsToSet & GTF_SPILL)
+ {
+ bits |= PACKED_GTF_SPILL;
+ }
+ if (flagsToSet & GTF_SPILLED)
+ {
+ bits |= PACKED_GTF_SPILLED;
+ }
+
+ const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
+
+ // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
+ newFlags = (unsigned char)((newFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
+ return newFlags;
+}
+
// gtLclVar -- load/store/addr of local variable
struct GenTreeLclVar : public GenTreeLclVarCommon
{
+private:
+ regNumberSmall gtOtherReg[MAX_MULTIREG_COUNT - 1];
+ MultiRegSpillFlags gtSpillFlags;
+ unsigned int GetLastUseBit(int regIndex)
+ {
+ assert(regIndex < 4);
+ static_assert_no_msg((1 << MULTIREG_LAST_USE_SHIFT) == GTF_VAR_MULTIREG_DEATH0);
+ return (1 << (MULTIREG_LAST_USE_SHIFT + regIndex));
+ }
+
+public:
INDEBUG(IL_OFFSET gtLclILoffs;) // instr offset of ref (only for JIT dumps)
+ // Multireg support
+ bool IsMultiReg() const
+ {
+ return ((gtFlags & GTF_VAR_MULTIREG) != 0);
+ }
+ void ClearMultiReg()
+ {
+ gtFlags &= ~GTF_VAR_MULTIREG;
+ }
+ void SetMultiReg()
+ {
+ gtFlags |= GTF_VAR_MULTIREG;
+ ClearOtherRegFlags();
+ }
+
+ regNumber GetRegNumByIdx(int regIndex)
+ {
+ assert(regIndex < MAX_MULTIREG_COUNT);
+ return (regIndex == 0) ? GetRegNum() : (regNumber)gtOtherReg[regIndex - 1];
+ }
+
+ void SetRegNumByIdx(regNumber reg, int regIndex)
+ {
+ assert(regIndex < MAX_MULTIREG_COUNT);
+ if (regIndex == 0)
+ {
+ SetRegNum(reg);
+ }
+ else
+ {
+ gtOtherReg[regIndex - 1] = regNumberSmall(reg);
+ }
+ }
+
+ bool IsLastUse(int regIndex)
+ {
+ return (gtFlags & GetLastUseBit(regIndex)) != 0;
+ }
+
+ bool HasLastUse()
+ {
+ return (gtFlags & (GTF_VAR_DEATH_MASK)) != 0;
+ }
+
+ void SetLastUse(int regIndex)
+ {
+ unsigned int bitToSet = gtFlags |= GetLastUseBit(regIndex);
+ }
+
+ void ClearLastUse(int regIndex)
+ {
+ gtFlags &= ~GetLastUseBit(regIndex);
+ }
+
+ unsigned GetRegSpillFlagByIdx(unsigned idx) const
+ {
+ return GetMultiRegSpillFlagsByIdx(gtSpillFlags, idx);
+ }
+
+ void SetRegSpillFlagByIdx(unsigned flags, unsigned idx)
+ {
+ gtSpillFlags = SetMultiRegSpillFlagsByIdx(gtSpillFlags, flags, idx);
+ }
+
+ unsigned int GetFieldCount(Compiler* compiler);
+ var_types GetFieldTypeByIndex(Compiler* compiler, unsigned idx);
+
+ //-------------------------------------------------------------------
+ // clearOtherRegFlags: clear GTF_* flags associated with gtOtherRegs
+ //
+ // Arguments:
+ // None
+ //
+ // Return Value:
+ // None
+ void ClearOtherRegFlags()
+ {
+ gtSpillFlags = 0;
+ }
+
+ //-------------------------------------------------------------------------
+ // CopyOtherRegFlags: copy GTF_* flags associated with gtOtherRegs from
+ // the given LclVar node.
+ //
+ // Arguments:
+ // fromCall - GenTreeLclVar node from which to copy
+ //
+ // Return Value:
+ // None
+ //
+ void CopyOtherRegFlags(GenTreeLclVar* from)
+ {
+ this->gtSpillFlags = from->gtSpillFlags;
+ }
+
GenTreeLclVar(genTreeOps oper,
var_types type,
unsigned lclNum DEBUGARG(IL_OFFSET ilOffs = BAD_IL_OFFSET) DEBUGARG(bool largeNode = false))
@@ -3165,6 +3387,10 @@ struct GenTreeLclFld : public GenTreeLclVarCommon
m_fieldSeq = fieldSeq;
}
+#ifdef TARGET_ARM
+ bool IsOffsetMisaligned() const;
+#endif // TARGET_ARM
+
#if DEBUGGABLE_GENTREE
GenTreeLclFld() : GenTreeLclVarCommon()
{
@@ -3378,8 +3604,8 @@ struct ReturnTypeDesc
void InitializeStructReturnType(Compiler* comp, CORINFO_CLASS_HANDLE retClsHnd);
// Initialize the Return Type Descriptor for a method that returns a TYP_LONG
- // Only needed for X86
- void InitializeLongReturnType(Compiler* comp);
+ // Only needed for X86 and arm32.
+ void InitializeLongReturnType();
// Reset type descriptor to defaults
void Reset()
@@ -3458,6 +3684,7 @@ struct ReturnTypeDesc
}
else
{
+ assert(m_inited);
return ((m_regType[0] != TYP_UNKNOWN) && (m_regType[1] != TYP_UNKNOWN));
}
}
@@ -3473,7 +3700,7 @@ struct ReturnTypeDesc
// var_type of the return register specified by its index.
// asserts if the index does not have a valid register return type.
- var_types GetReturnRegType(unsigned index)
+ var_types GetReturnRegType(unsigned index) const
{
var_types result = m_regType[index];
assert(result != TYP_UNKNOWN);
@@ -3489,10 +3716,70 @@ struct ReturnTypeDesc
}
// Get ith ABI return register
- regNumber GetABIReturnReg(unsigned idx);
+ regNumber GetABIReturnReg(unsigned idx) const;
// Get reg mask of ABI return registers
- regMaskTP GetABIReturnRegs();
+ regMaskTP GetABIReturnRegs() const;
+};
+
+class TailCallSiteInfo
+{
+ bool m_isCallvirt : 1;
+ bool m_isCalli : 1;
+ CORINFO_SIG_INFO m_sig;
+ CORINFO_RESOLVED_TOKEN m_token;
+
+public:
+ // Is the tailcall a callvirt instruction?
+ bool IsCallvirt()
+ {
+ return m_isCallvirt;
+ }
+
+ // Is the tailcall a calli instruction?
+ bool IsCalli()
+ {
+ return m_isCalli;
+ }
+
+ // Get the token of the callee
+ CORINFO_RESOLVED_TOKEN* GetToken()
+ {
+ assert(!IsCalli());
+ return &m_token;
+ }
+
+ // Get the signature of the callee
+ CORINFO_SIG_INFO* GetSig()
+ {
+ return &m_sig;
+ }
+
+ // Mark the tailcall as a calli with the given signature
+ void SetCalli(CORINFO_SIG_INFO* sig)
+ {
+ m_isCallvirt = false;
+ m_isCalli = true;
+ m_sig = *sig;
+ }
+
+ // Mark the tailcall as a callvirt with the given signature and token
+ void SetCallvirt(CORINFO_SIG_INFO* sig, CORINFO_RESOLVED_TOKEN* token)
+ {
+ m_isCallvirt = true;
+ m_isCalli = false;
+ m_sig = *sig;
+ m_token = *token;
+ }
+
+ // Mark the tailcall as a call with the given signature and token
+ void SetCall(CORINFO_SIG_INFO* sig, CORINFO_RESOLVED_TOKEN* token)
+ {
+ m_isCallvirt = false;
+ m_isCalli = false;
+ m_sig = *sig;
+ m_token = *token;
+ }
};
class fgArgInfo;
@@ -3626,14 +3913,16 @@ struct GenTreeCall final : public GenTree
regList regArgList;
#endif
- // TODO-Throughput: Revisit this (this used to be only defined if
- // FEATURE_FIXED_OUT_ARGS was enabled, so this makes GenTreeCall 4 bytes bigger on x86).
- CORINFO_SIG_INFO* callSig; // Used by tail calls and to register callsites with the EE
+#ifdef DEBUG
+ // Used to register callsites with the EE
+ CORINFO_SIG_INFO* callSig;
+#endif
+
+ TailCallSiteInfo* tailCallInfo;
#if FEATURE_MULTIREG_RET
// State required to support multi-reg returning call nodes.
- // For now it is enabled only for x64 unix.
//
// TODO-AllArch: enable for all call nodes to unify single-reg and multi-reg returns.
ReturnTypeDesc gtReturnTypeDesc;
@@ -3642,14 +3931,7 @@ struct GenTreeCall final : public GenTree
// The following array holds the other reg numbers of multi-reg return.
regNumberSmall gtOtherRegs[MAX_RET_REG_COUNT - 1];
- // GTF_SPILL or GTF_SPILLED flag on a multi-reg call node indicates that one or
- // more of its result regs are in that state. The spill flag of each of the
- // return register is stored here. We only need 2 bits per returned register,
- // so this is treated as a 2-bit array. No architecture needs more than 8 bits.
-
- static const unsigned PACKED_GTF_SPILL = 1;
- static const unsigned PACKED_GTF_SPILLED = 2;
- unsigned char gtSpillFlags;
+ MultiRegSpillFlags gtSpillFlags;
#endif // FEATURE_MULTIREG_RET
@@ -3662,12 +3944,8 @@ struct GenTreeCall final : public GenTree
// Returns
// Type descriptor of the value returned by call
//
- // Note:
- // Right now implemented only for x64 unix and yet to be
- // implemented for other multi-reg target arch (Arm64/Arm32/x86).
- //
// TODO-AllArch: enable for all call nodes to unify single-reg and multi-reg returns.
- ReturnTypeDesc* GetReturnTypeDesc()
+ const ReturnTypeDesc* GetReturnTypeDesc() const
{
#if FEATURE_MULTIREG_RET
return >ReturnTypeDesc;
@@ -3676,6 +3954,27 @@ struct GenTreeCall final : public GenTree
#endif
}
+ void InitializeLongReturnType()
+ {
+#if FEATURE_MULTIREG_RET
+ gtReturnTypeDesc.InitializeLongReturnType();
+#endif
+ }
+
+ void InitializeStructReturnType(Compiler* comp, CORINFO_CLASS_HANDLE retClsHnd)
+ {
+#if FEATURE_MULTIREG_RET
+ gtReturnTypeDesc.InitializeStructReturnType(comp, retClsHnd);
+#endif
+ }
+
+ void ResetReturnType()
+ {
+#if FEATURE_MULTIREG_RET
+ gtReturnTypeDesc.Reset();
+#endif
+ }
+
//---------------------------------------------------------------------------
// GetRegNumByIdx: get ith return register allocated to this call node.
//
@@ -3772,72 +4071,20 @@ struct GenTreeCall final : public GenTree
// Get reg mask of all the valid registers of gtOtherRegs array
regMaskTP GetOtherRegMask() const;
- //----------------------------------------------------------------------
- // GetRegSpillFlagByIdx: get spill flag associated with the return register
- // specified by its index.
- //
- // Arguments:
- // idx - Position or index of the return register
- //
- // Return Value:
- // Returns GTF_* flags associated with the register. Only GTF_SPILL and GTF_SPILLED are considered.
- //
unsigned GetRegSpillFlagByIdx(unsigned idx) const
{
- static_assert_no_msg(MAX_RET_REG_COUNT * 2 <= sizeof(unsigned char) * BITS_PER_BYTE);
- assert(idx < MAX_RET_REG_COUNT);
-
#if FEATURE_MULTIREG_RET
- unsigned bits = gtSpillFlags >> (idx * 2); // It doesn't matter that we possibly leave other high bits here.
- unsigned spillFlags = 0;
- if (bits & PACKED_GTF_SPILL)
- {
- spillFlags |= GTF_SPILL;
- }
- if (bits & PACKED_GTF_SPILLED)
- {
- spillFlags |= GTF_SPILLED;
- }
- return spillFlags;
+ return GetMultiRegSpillFlagsByIdx(gtSpillFlags, idx);
#else
assert(!"unreached");
return 0;
#endif
}
- //----------------------------------------------------------------------
- // SetRegSpillFlagByIdx: set spill flags for the return register
- // specified by its index.
- //
- // Arguments:
- // flags - GTF_* flags. Only GTF_SPILL and GTF_SPILLED are allowed.
- // idx - Position or index of the return register
- //
- // Return Value:
- // None
- //
void SetRegSpillFlagByIdx(unsigned flags, unsigned idx)
{
- static_assert_no_msg(MAX_RET_REG_COUNT * 2 <= sizeof(unsigned char) * BITS_PER_BYTE);
- assert(idx < MAX_RET_REG_COUNT);
-
#if FEATURE_MULTIREG_RET
- unsigned bits = 0;
- if (flags & GTF_SPILL)
- {
- bits |= PACKED_GTF_SPILL;
- }
- if (flags & GTF_SPILLED)
- {
- bits |= PACKED_GTF_SPILLED;
- }
-
- const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
-
- // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
- gtSpillFlags = (unsigned char)((gtSpillFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
-#else
- unreached();
+ gtSpillFlags = SetMultiRegSpillFlagsByIdx(gtSpillFlags, flags, idx);
#endif
}
@@ -3891,7 +4138,7 @@ struct GenTreeCall final : public GenTree
#define GTF_CALL_M_NONVIRT_SAME_THIS 0x00000080 // GT_CALL -- callee "this" pointer is
// equal to caller this pointer (only for GTF_CALL_NONVIRT)
#define GTF_CALL_M_FRAME_VAR_DEATH 0x00000100 // GT_CALL -- the compLvFrameListRoot variable dies here (last use)
-#define GTF_CALL_M_TAILCALL_VIA_HELPER 0x00000200 // GT_CALL -- call is a tail call dispatched via tail call JIT helper.
+#define GTF_CALL_M_TAILCALL_VIA_JIT_HELPER 0x00000200 // GT_CALL -- call is a tail call dispatched via tail call JIT helper.
#if FEATURE_TAILCALL_OPT
#define GTF_CALL_M_IMPLICIT_TAILCALL 0x00000400 // GT_CALL -- call is an opportunistic
@@ -3955,6 +4202,16 @@ struct GenTreeCall final : public GenTree
return (gtFlags & GTF_CALL_INLINE_CANDIDATE) != 0;
}
+ bool IsR2ROrVirtualStubRelativeIndir()
+ {
+#if defined(FEATURE_READYTORUN_COMPILER) && defined(TARGET_ARMARCH)
+ bool isVirtualStub = (gtFlags & GTF_CALL_VIRT_KIND_MASK) == GTF_CALL_VIRT_STUB;
+ return ((IsR2RRelativeIndir()) || (isVirtualStub && (IsVirtualStubRelativeIndir())));
+#else
+ return false;
+#endif // FEATURE_READYTORUN_COMPILER && TARGET_ARMARCH
+ }
+
bool HasNonStandardAddedArgs(Compiler* compiler) const;
int GetNonStandardAddedArgCount(Compiler* compiler) const;
@@ -3994,18 +4251,29 @@ struct GenTreeCall final : public GenTree
//
bool HasMultiRegRetVal() const
{
-#if defined(TARGET_X86)
- return varTypeIsLong(gtType);
-#elif FEATURE_MULTIREG_RET && defined(TARGET_ARM)
- return varTypeIsLong(gtType) || (varTypeIsStruct(gtType) && !HasRetBufArg());
+#ifdef FEATURE_MULTIREG_RET
+#if defined(TARGET_X86) || defined(TARGET_ARM)
+ if (varTypeIsLong(gtType))
+ {
+ return true;
+ }
#elif defined(FEATURE_HFA) && defined(TARGET_ARM64)
// SIMD types are returned in vector regs on ARM64.
- return (gtType == TYP_STRUCT) && !HasRetBufArg();
-#elif FEATURE_MULTIREG_RET
- return varTypeIsStruct(gtType) && !HasRetBufArg();
-#else
+ if (varTypeIsSIMD(gtType))
+ {
+ return false;
+ }
+#endif // FEATURE_HFA && TARGET_ARM64
+
+ if (!varTypeIsStruct(gtType) || HasRetBufArg())
+ {
+ return false;
+ }
+ // Now it is a struct that is returned in registers.
+ return GetReturnTypeDesc()->IsMultiRegRetType();
+#else // !FEATURE_MULTIREG_RET
return false;
-#endif
+#endif // !FEATURE_MULTIREG_RET
}
// Returns true if VM has flagged this method as CORINFO_FLG_PINVOKE.
@@ -4036,15 +4304,26 @@ struct GenTreeCall final : public GenTree
return IsTailPrefixedCall() || IsImplicitTailCall();
}
- bool IsTailCallViaHelper() const
+ // Check whether this is a tailcall dispatched via JIT helper. We only use
+ // this mechanism on x86 as it is faster than our other more general
+ // tailcall mechanism.
+ bool IsTailCallViaJitHelper() const
{
- return IsTailCall() && (gtCallMoreFlags & GTF_CALL_M_TAILCALL_VIA_HELPER);
+#ifdef TARGET_X86
+ return IsTailCall() && (gtCallMoreFlags & GTF_CALL_M_TAILCALL_VIA_JIT_HELPER);
+#else
+ return false;
+#endif
}
#if FEATURE_FASTTAILCALL
bool IsFastTailCall() const
{
- return IsTailCall() && !(gtCallMoreFlags & GTF_CALL_M_TAILCALL_VIA_HELPER);
+#ifdef TARGET_X86
+ return IsTailCall() && !(gtCallMoreFlags & GTF_CALL_M_TAILCALL_VIA_JIT_HELPER);
+#else
+ return IsTailCall();
+#endif
}
#else // !FEATURE_FASTTAILCALL
bool IsFastTailCall() const
@@ -4291,9 +4570,7 @@ struct GenTreeMultiRegOp : public GenTreeOp
// return register is stored here. We only need 2 bits per returned register,
// so this is treated as a 2-bit array. No architecture needs more than 8 bits.
- static const unsigned PACKED_GTF_SPILL = 1;
- static const unsigned PACKED_GTF_SPILLED = 2;
- unsigned char gtSpillFlags;
+ MultiRegSpillFlags gtSpillFlags;
GenTreeMultiRegOp(genTreeOps oper, var_types type, GenTree* op1, GenTree* op2)
: GenTreeOp(oper, type, op1, op2), gtOtherReg(REG_NA)
@@ -4303,11 +4580,7 @@ struct GenTreeMultiRegOp : public GenTreeOp
unsigned GetRegCount() const
{
- if (GetRegNum() == REG_NA || GetRegNum() == REG_STK)
- {
- return 0;
- }
- return (gtOtherReg == REG_NA || gtOtherReg == REG_STK) ? 1 : 2;
+ return (TypeGet() == TYP_LONG) ? 2 : 1;
}
//---------------------------------------------------------------------------
@@ -4331,63 +4604,16 @@ struct GenTreeMultiRegOp : public GenTreeOp
return gtOtherReg;
}
- //----------------------------------------------------------------------
- // GetRegSpillFlagByIdx: get spill flag associated with the register
- // specified by its index.
- //
- // Arguments:
- // idx - Position or index of the register
- //
- // Return Value:
- // Returns GTF_* flags associated with the register. Only GTF_SPILL and GTF_SPILLED are considered.
- //
unsigned GetRegSpillFlagByIdx(unsigned idx) const
{
- assert(idx < MAX_REG_ARG);
-
- unsigned bits = gtSpillFlags >> (idx * 2); // It doesn't matter that we possibly leave other high bits here.
- unsigned spillFlags = 0;
- if (bits & PACKED_GTF_SPILL)
- {
- spillFlags |= GTF_SPILL;
- }
- if (bits & PACKED_GTF_SPILLED)
- {
- spillFlags |= GTF_SPILLED;
- }
-
- return spillFlags;
+ return GetMultiRegSpillFlagsByIdx(gtSpillFlags, idx);
}
- //----------------------------------------------------------------------
- // SetRegSpillFlagByIdx: set spill flags for the register
- // specified by its index.
- //
- // Arguments:
- // flags - GTF_* flags. Only GTF_SPILL and GTF_SPILLED are allowed.
- // idx - Position or index of the register
- //
- // Return Value:
- // None
- //
void SetRegSpillFlagByIdx(unsigned flags, unsigned idx)
{
- assert(idx < MAX_REG_ARG);
-
- unsigned bits = 0;
- if (flags & GTF_SPILL)
- {
- bits |= PACKED_GTF_SPILL;
- }
- if (flags & GTF_SPILLED)
- {
- bits |= PACKED_GTF_SPILLED;
- }
-
- const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
-
- // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
- gtSpillFlags = (unsigned char)((gtSpillFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
+#if FEATURE_MULTIREG_RET
+ gtSpillFlags = SetMultiRegSpillFlagsByIdx(gtSpillFlags, flags, idx);
+#endif
}
//--------------------------------------------------------------------------
@@ -4447,6 +4673,10 @@ struct GenTreeFptrVal : public GenTree
GenTreeFptrVal(var_types type, CORINFO_METHOD_HANDLE meth) : GenTree(GT_FTN_ADDR, type), gtFptrMethod(meth)
{
+#ifdef FEATURE_READYTORUN_COMPILER
+ gtEntryPoint.addr = nullptr;
+ gtEntryPoint.accessType = IAT_VALUE;
+#endif
}
#if DEBUGGABLE_GENTREE
GenTreeFptrVal() : GenTree()
@@ -4501,12 +4731,65 @@ struct GenTreeIntrinsic : public GenTreeOp
struct GenTreeJitIntrinsic : public GenTreeOp
{
- var_types gtSIMDBaseType; // SIMD vector base type
- unsigned gtSIMDSize; // SIMD vector size in bytes, use 0 for scalar intrinsics
+private:
+ ClassLayout* m_layout;
+
+ union {
+ var_types gtOtherBaseType; // For AVX2 Gather* intrinsics
+ regNumberSmall gtOtherReg; // For intrinsics that return 2 registers
+ };
+
+public:
+ var_types gtSIMDBaseType; // SIMD vector base type
+ unsigned char gtSIMDSize; // SIMD vector size in bytes, use 0 for scalar intrinsics
+
+#if defined(FEATURE_SIMD)
+ union {
+ SIMDIntrinsicID gtSIMDIntrinsicID; // operation Id
+ NamedIntrinsic gtHWIntrinsicId;
+ };
+#else
+ NamedIntrinsic gtHWIntrinsicId;
+#endif
+
+ ClassLayout* GetLayout() const
+ {
+ return m_layout;
+ }
+
+ void SetLayout(ClassLayout* layout)
+ {
+ assert(layout != nullptr);
+ m_layout = layout;
+ }
+
+ regNumber GetOtherReg() const
+ {
+ return (regNumber)gtOtherReg;
+ }
+ void SetOtherReg(regNumber reg)
+ {
+ gtOtherReg = (regNumberSmall)reg;
+ assert(gtOtherReg == reg);
+ }
+
+ var_types GetOtherBaseType() const
+ {
+ return gtOtherBaseType;
+ }
+
+ void SetOtherBaseType(var_types type)
+ {
+ gtOtherBaseType = type;
+ }
GenTreeJitIntrinsic(genTreeOps oper, var_types type, GenTree* op1, GenTree* op2, var_types baseType, unsigned size)
- : GenTreeOp(oper, type, op1, op2), gtSIMDBaseType(baseType), gtSIMDSize(size)
+ : GenTreeOp(oper, type, op1, op2)
+ , gtSIMDBaseType(baseType)
+ , gtSIMDSize((unsigned char)size)
+ , gtHWIntrinsicId(NI_Illegal)
{
+ assert(gtSIMDSize == size);
}
bool isSIMD() const
@@ -4526,17 +4809,18 @@ struct GenTreeJitIntrinsic : public GenTreeOp
/* gtSIMD -- SIMD intrinsic (possibly-binary op [NULL op2 is allowed] with additional fields) */
struct GenTreeSIMD : public GenTreeJitIntrinsic
{
- SIMDIntrinsicID gtSIMDIntrinsicID; // operation Id
GenTreeSIMD(var_types type, GenTree* op1, SIMDIntrinsicID simdIntrinsicID, var_types baseType, unsigned size)
- : GenTreeJitIntrinsic(GT_SIMD, type, op1, nullptr, baseType, size), gtSIMDIntrinsicID(simdIntrinsicID)
+ : GenTreeJitIntrinsic(GT_SIMD, type, op1, nullptr, baseType, size)
{
+ gtSIMDIntrinsicID = simdIntrinsicID;
}
GenTreeSIMD(
var_types type, GenTree* op1, GenTree* op2, SIMDIntrinsicID simdIntrinsicID, var_types baseType, unsigned size)
- : GenTreeJitIntrinsic(GT_SIMD, type, op1, op2, baseType, size), gtSIMDIntrinsicID(simdIntrinsicID)
+ : GenTreeJitIntrinsic(GT_SIMD, type, op1, op2, baseType, size)
{
+ gtSIMDIntrinsicID = simdIntrinsicID;
}
bool OperIsMemoryLoad() const; // Returns true for the SIMD Instrinsic instructions that have MemoryLoad semantics,
@@ -4553,21 +4837,16 @@ struct GenTreeSIMD : public GenTreeJitIntrinsic
#ifdef FEATURE_HW_INTRINSICS
struct GenTreeHWIntrinsic : public GenTreeJitIntrinsic
{
- NamedIntrinsic gtHWIntrinsicId;
- var_types gtIndexBaseType; // for AVX2 Gather* intrinsics
-
GenTreeHWIntrinsic(var_types type, NamedIntrinsic hwIntrinsicID, var_types baseType, unsigned size)
: GenTreeJitIntrinsic(GT_HWINTRINSIC, type, nullptr, nullptr, baseType, size)
- , gtHWIntrinsicId(hwIntrinsicID)
- , gtIndexBaseType(TYP_UNKNOWN)
{
+ gtHWIntrinsicId = hwIntrinsicID;
}
GenTreeHWIntrinsic(var_types type, GenTree* op1, NamedIntrinsic hwIntrinsicID, var_types baseType, unsigned size)
: GenTreeJitIntrinsic(GT_HWINTRINSIC, type, op1, nullptr, baseType, size)
- , gtHWIntrinsicId(hwIntrinsicID)
- , gtIndexBaseType(TYP_UNKNOWN)
{
+ gtHWIntrinsicId = hwIntrinsicID;
if (OperIsMemoryStore())
{
gtFlags |= (GTF_GLOB_REF | GTF_ASG);
@@ -4577,9 +4856,8 @@ struct GenTreeHWIntrinsic : public GenTreeJitIntrinsic
GenTreeHWIntrinsic(
var_types type, GenTree* op1, GenTree* op2, NamedIntrinsic hwIntrinsicID, var_types baseType, unsigned size)
: GenTreeJitIntrinsic(GT_HWINTRINSIC, type, op1, op2, baseType, size)
- , gtHWIntrinsicId(hwIntrinsicID)
- , gtIndexBaseType(TYP_UNKNOWN)
{
+ gtHWIntrinsicId = hwIntrinsicID;
if (OperIsMemoryStore())
{
gtFlags |= (GTF_GLOB_REF | GTF_ASG);
@@ -5808,13 +6086,7 @@ struct GenTreePutArgSplit : public GenTreePutArgStk
// gtOtherRegs holds the other reg numbers of struct.
regNumberSmall gtOtherRegs[MAX_REG_ARG - 1];
- // GTF_SPILL or GTF_SPILLED flag on a multi-reg struct node indicates that one or
- // more of its result regs are in that state. The spill flag of each of the
- // return register is stored here. We only need 2 bits per register,
- // so this is treated as a 2-bit array.
- static const unsigned PACKED_GTF_SPILL = 1;
- static const unsigned PACKED_GTF_SPILLED = 2;
- unsigned char gtSpillFlags;
+ MultiRegSpillFlags gtSpillFlags;
//---------------------------------------------------------------------------
// GetRegNumByIdx: get ith register allocated to this struct argument.
@@ -5878,63 +6150,16 @@ struct GenTreePutArgSplit : public GenTreePutArgStk
}
}
- //----------------------------------------------------------------------
- // GetRegSpillFlagByIdx: get spill flag associated with the register
- // specified by its index.
- //
- // Arguments:
- // idx - Position or index of the register
- //
- // Return Value:
- // Returns GTF_* flags associated with the register. Only GTF_SPILL and GTF_SPILLED are considered.
- //
unsigned GetRegSpillFlagByIdx(unsigned idx) const
{
- assert(idx < MAX_REG_ARG);
-
- unsigned bits = gtSpillFlags >> (idx * 2); // It doesn't matter that we possibly leave other high bits here.
- unsigned spillFlags = 0;
- if (bits & PACKED_GTF_SPILL)
- {
- spillFlags |= GTF_SPILL;
- }
- if (bits & PACKED_GTF_SPILLED)
- {
- spillFlags |= GTF_SPILLED;
- }
-
- return spillFlags;
+ return GetMultiRegSpillFlagsByIdx(gtSpillFlags, idx);
}
- //----------------------------------------------------------------------
- // SetRegSpillFlagByIdx: set spill flags for the register
- // specified by its index.
- //
- // Arguments:
- // flags - GTF_* flags. Only GTF_SPILL and GTF_SPILLED are allowed.
- // idx - Position or index of the register
- //
- // Return Value:
- // None
- //
void SetRegSpillFlagByIdx(unsigned flags, unsigned idx)
{
- assert(idx < MAX_REG_ARG);
-
- unsigned bits = 0;
- if (flags & GTF_SPILL)
- {
- bits |= PACKED_GTF_SPILL;
- }
- if (flags & GTF_SPILLED)
- {
- bits |= PACKED_GTF_SPILLED;
- }
-
- const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
-
- // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
- gtSpillFlags = (unsigned char)((gtSpillFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
+#if FEATURE_MULTIREG_RET
+ gtSpillFlags = SetMultiRegSpillFlagsByIdx(gtSpillFlags, flags, idx);
+#endif
}
//--------------------------------------------------------------------------
@@ -6582,30 +6807,79 @@ inline bool GenTree::IsIntegralConstVector(ssize_t constVal)
assert(gtGetOp2IfPresent() == nullptr);
return true;
}
-#endif
+#endif // FEATURE_SIMD
- return false;
-}
+#ifdef FEATURE_HW_INTRINSICS
+ if (gtOper == GT_HWINTRINSIC)
+ {
+ GenTreeHWIntrinsic* node = AsHWIntrinsic();
-inline bool GenTree::IsBoxedValue()
-{
- assert(gtOper != GT_BOX || AsBox()->BoxOp() != nullptr);
- return (gtOper == GT_BOX) && (gtFlags & GTF_BOX_VALUE);
+ if (!varTypeIsIntegral(node->gtSIMDBaseType))
+ {
+ // Can't be an integral constant
+ return false;
+ }
+
+ GenTree* op1 = gtGetOp1();
+ GenTree* op2 = gtGetOp2();
+
+ NamedIntrinsic intrinsicId = node->gtHWIntrinsicId;
+
+ if (op1 == nullptr)
+ {
+ assert(op2 == nullptr);
+
+ if (constVal == 0)
+ {
+#if defined(TARGET_XARCH)
+ return (intrinsicId == NI_Vector128_get_Zero) || (intrinsicId == NI_Vector256_get_Zero);
+#elif defined(TARGET_ARM64)
+ return (intrinsicId == NI_Vector64_get_Zero) || (intrinsicId == NI_Vector128_get_Zero);
+#endif // !TARGET_XARCH && !TARGET_ARM64
+ }
+ }
+ else if ((op2 == nullptr) && !op1->OperIsList())
+ {
+ if (op1->IsIntegralConst(constVal))
+ {
+#if defined(TARGET_XARCH)
+ return (intrinsicId == NI_Vector128_Create) || (intrinsicId == NI_Vector256_Create);
+#elif defined(TARGET_ARM64)
+ return (intrinsicId == NI_Vector64_Create) || (intrinsicId == NI_Vector128_Create);
+#endif // !TARGET_XARCH && !TARGET_ARM64
+ }
+ }
+ }
+#endif // FEATURE_HW_INTRINSICS
+
+ return false;
}
-inline bool GenTree::IsSIMDEqualityOrInequality() const
+//-------------------------------------------------------------------
+// IsSIMDZero: returns true if this this is a SIMD vector
+// with all its elements equal to zero.
+//
+// Returns:
+// True if this represents an integral const SIMD vector.
+//
+inline bool GenTree::IsSIMDZero()
{
#ifdef FEATURE_SIMD
- if (gtOper == GT_SIMD)
+ if ((gtOper == GT_SIMD) && (AsSIMD()->gtSIMDIntrinsicID == SIMDIntrinsicInit))
{
- SIMDIntrinsicID id = AsSIMD()->gtSIMDIntrinsicID;
- return (id == SIMDIntrinsicOpEquality) || (id == SIMDIntrinsicOpInEquality);
+ return (gtGetOp1()->IsIntegralConst(0) || gtGetOp1()->IsFPZero());
}
#endif
return false;
}
+inline bool GenTree::IsBoxedValue()
+{
+ assert(gtOper != GT_BOX || AsBox()->BoxOp() != nullptr);
+ return (gtOper == GT_BOX) && (gtFlags & GTF_BOX_VALUE);
+}
+
inline GenTree* GenTree::MoveNext()
{
assert(OperIsAnyList());
@@ -6821,6 +7095,15 @@ inline bool GenTree::IsMultiRegCall() const
return false;
}
+inline bool GenTree::IsMultiRegLclVar() const
+{
+ if (OperIs(GT_LCL_VAR, GT_STORE_LCL_VAR))
+ {
+ return AsLclVar()->IsMultiReg();
+ }
+ return false;
+}
+
//-----------------------------------------------------------------------------------
// IsMultiRegNode: whether a node returning its value in more than one register
//
@@ -6862,6 +7145,16 @@ inline bool GenTree::IsMultiRegNode() const
return true;
}
#endif // FEATURE_MULTIREG_RET
+#if defined(TARGET_XARCH) && defined(FEATURE_HW_INTRINSICS)
+ if (OperIs(GT_HWINTRINSIC))
+ {
+ return (TypeGet() == TYP_STRUCT);
+ }
+#endif
+ if (IsMultiRegLclVar())
+ {
+ return true;
+ }
return false;
}
//-----------------------------------------------------------------------------------
@@ -6873,11 +7166,6 @@ inline bool GenTree::IsMultiRegNode() const
// Return Value:
// Returns the number of registers defined by this node.
//
-// Notes:
-// All targets that support multi-reg ops of any kind also support multi-reg return
-// values for calls. Should that change with a future target, this method will need
-// to change accordingly.
-//
inline unsigned GenTree::GetMultiRegCount()
{
#if FEATURE_MULTIREG_RET
@@ -6905,6 +7193,24 @@ inline unsigned GenTree::GetMultiRegCount()
return AsCopyOrReload()->GetRegCount();
}
#endif // FEATURE_MULTIREG_RET
+#if defined(TARGET_XARCH) && defined(FEATURE_HW_INTRINSICS)
+ if (OperIs(GT_HWINTRINSIC))
+ {
+ assert(TypeGet() == TYP_STRUCT);
+ return 2;
+ }
+#endif
+ if (OperIs(GT_LCL_VAR, GT_STORE_LCL_VAR))
+ {
+ assert((gtFlags & GTF_VAR_MULTIREG) != 0);
+ // The register count for a multireg lclVar requires looking at the LclVarDsc,
+ // which requires a Compiler instance. The caller must handle this separately.
+ // The register count for a multireg lclVar requires looking at the LclVarDsc,
+ // which requires a Compiler instance. The caller must use the GetFieldCount
+ // method on GenTreeLclVar.
+
+ assert(!"MultiRegCount for LclVar");
+ }
assert(!"GetMultiRegCount called with non-multireg node");
return 1;
}
@@ -6956,6 +7262,17 @@ inline regNumber GenTree::GetRegByIndex(int regIndex)
return AsCopyOrReload()->GetRegNumByIdx(regIndex);
}
#endif // FEATURE_MULTIREG_RET
+#if defined(TARGET_XARCH) && defined(FEATURE_HW_INTRINSICS)
+ if (OperIs(GT_HWINTRINSIC))
+ {
+ assert(regIndex == 1);
+ return AsHWIntrinsic()->GetOtherReg();
+ }
+#endif
+ if (OperIs(GT_LCL_VAR, GT_STORE_LCL_VAR))
+ {
+ return AsLclVar()->GetRegNumByIdx(regIndex);
+ }
assert(!"Invalid regIndex for GetRegFromMultiRegNode");
return REG_NA;
@@ -7001,10 +7318,89 @@ inline var_types GenTree::GetRegTypeByIndex(int regIndex)
#endif
#endif // FEATURE_MULTIREG_RET
+
+#if defined(TARGET_XARCH) && defined(FEATURE_HW_INTRINSICS)
+ if (OperIs(GT_HWINTRINSIC))
+ {
+ // At this time, the only multi-reg HW intrinsics all return the type of their
+ // arguments. If this changes, we will need a way to record or determine this.
+ assert(TypeGet() == TYP_STRUCT);
+ return gtGetOp1()->TypeGet();
+ }
+#endif
+ if (OperIs(GT_LCL_VAR, GT_STORE_LCL_VAR))
+ {
+ if (TypeGet() == TYP_LONG)
+ {
+ return TYP_INT;
+ }
+ assert(TypeGet() == TYP_STRUCT);
+ assert((gtFlags & GTF_VAR_MULTIREG) != 0);
+ // The register type for a multireg lclVar requires looking at the LclVarDsc,
+ // which requires a Compiler instance. The caller must use the GetFieldTypeByIndex
+ // on GenTreeLclVar.
+ assert(!"GetRegTypeByIndex for LclVar");
+ }
+
assert(!"Invalid node type for GetRegTypeByIndex");
return TYP_UNDEF;
}
+//-----------------------------------------------------------------------------------
+// GetRegSpillFlagByIdx: Get a specific register's spill flags, based on regIndex,
+// for this multi-reg node.
+//
+// Arguments:
+// regIndex - which register's spill flags to return
+//
+// Return Value:
+// The spill flags (GTF_SPILL GTF_SPILLED) for this register.
+//
+// Notes:
+// This must be a multireg node and 'regIndex' must be a valid index for this node.
+// This method returns the GTF "equivalent" flags based on the packed flags on the multireg node.
+//
+inline unsigned int GenTree::GetRegSpillFlagByIdx(int regIndex) const
+{
+#if FEATURE_MULTIREG_RET
+ if (IsMultiRegCall())
+ {
+ return AsCall()->AsCall()->GetRegSpillFlagByIdx(regIndex);
+ }
+
+#if FEATURE_ARG_SPLIT
+ if (OperIsPutArgSplit())
+ {
+ return AsPutArgSplit()->GetRegSpillFlagByIdx(regIndex);
+ }
+#endif
+#if !defined(TARGET_64BIT)
+ if (OperIsMultiRegOp())
+ {
+ return AsMultiRegOp()->GetRegSpillFlagByIdx(regIndex);
+ }
+#endif
+
+#endif // FEATURE_MULTIREG_RET
+
+#if defined(TARGET_XARCH) && defined(FEATURE_HW_INTRINSICS)
+ if (OperIs(GT_HWINTRINSIC))
+ {
+ // At this time, the only multi-reg HW intrinsics all return the type of their
+ // arguments. If this changes, we will need a way to record or determine this.
+ assert(TypeGet() == TYP_STRUCT);
+ return gtGetOp1()->TypeGet();
+ }
+#endif
+ if (OperIs(GT_LCL_VAR, GT_STORE_LCL_VAR))
+ {
+ return AsLclVar()->GetRegSpillFlagByIdx(regIndex);
+ }
+
+ assert(!"Invalid node type for GetRegSpillFlagByIdx");
+ return TYP_UNDEF;
+}
+
//-------------------------------------------------------------------------
// IsCopyOrReload: whether this is a GT_COPY or GT_RELOAD node.
//
diff --git a/src/coreclr/src/jit/hwintrinsic.cpp b/src/coreclr/src/jit/hwintrinsic.cpp
index 65792decbcb6c5..16332b859894b6 100644
--- a/src/coreclr/src/jit/hwintrinsic.cpp
+++ b/src/coreclr/src/jit/hwintrinsic.cpp
@@ -10,12 +10,12 @@
static const HWIntrinsicInfo hwIntrinsicInfoArray[] = {
// clang-format off
#if defined(TARGET_XARCH)
-#define HARDWARE_INTRINSIC(id, name, isa, ival, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, flag) \
- {NI_##id, name, InstructionSet_##isa, ival, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, static_cast(flag)},
+#define HARDWARE_INTRINSIC(isa, name, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, flag) \
+ {NI_##isa##_##name, #name, InstructionSet_##isa, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, static_cast(flag)},
#include "hwintrinsiclistxarch.h"
#elif defined (TARGET_ARM64)
-#define HARDWARE_INTRINSIC(isa, name, ival, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, flag) \
- {NI_##isa##_##name, #name, InstructionSet_##isa, ival, static_cast(size), numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, static_cast(flag)},
+#define HARDWARE_INTRINSIC(isa, name, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, flag) \
+ {NI_##isa##_##name, #name, InstructionSet_##isa, size, numarg, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, category, static_cast(flag)},
#include "hwintrinsiclistarm64.h"
#else
#error Unsupported platform
@@ -59,8 +59,6 @@ var_types Compiler::getBaseTypeFromArgIfNeeded(NamedIntrinsic intrinsic,
CORINFO_SIG_INFO* sig,
var_types baseType)
{
- HWIntrinsicCategory category = HWIntrinsicInfo::lookupCategory(intrinsic);
-
if (HWIntrinsicInfo::BaseTypeFromSecondArg(intrinsic) || HWIntrinsicInfo::BaseTypeFromFirstArg(intrinsic))
{
CORINFO_ARG_LIST_HANDLE arg = sig->args;
@@ -91,50 +89,6 @@ var_types Compiler::getBaseTypeFromArgIfNeeded(NamedIntrinsic intrinsic,
return baseType;
}
-//------------------------------------------------------------------------
-// impUnsupportedHWIntrinsic: returns a node for an unsupported HWIntrinsic
-//
-// Arguments:
-// helper - JIT helper ID for the exception to be thrown
-// method - method handle of the intrinsic function.
-// sig - signature of the intrinsic call
-// mustExpand - true if the intrinsic must return a GenTree*; otherwise, false
-//
-// Return Value:
-// a gtNewMustThrowException if mustExpand is true; otherwise, nullptr
-//
-GenTree* Compiler::impUnsupportedHWIntrinsic(unsigned helper,
- CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig,
- bool mustExpand)
-{
- // We've hit some error case and may need to return a node for the given error.
- //
- // When `mustExpand=false`, we are attempting to inline the intrinsic directly into another method. In this
- // scenario, we need to return `nullptr` so that a GT_CALL to the intrinsic is emitted instead. This is to
- // ensure that everything continues to behave correctly when optimizations are enabled (e.g. things like the
- // inliner may expect the node we return to have a certain signature, and the `MustThrowException` node won't
- // match that).
- //
- // When `mustExpand=true`, we are in a GT_CALL to the intrinsic and are attempting to JIT it. This will generally
- // be in response to an indirect call (e.g. done via reflection) or in response to an earlier attempt returning
- // `nullptr` (under `mustExpand=false`). In that scenario, we are safe to return the `MustThrowException` node.
-
- if (mustExpand)
- {
- for (unsigned i = 0; i < sig->numArgs; i++)
- {
- impPopStack();
- }
-
- return gtNewMustThrowException(helper, JITtype2varType(sig->retType), sig->retTypeClass);
- }
- else
- {
- return nullptr;
- }
-}
-
CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleForHWSIMD(var_types simdType, var_types simdBaseType)
{
if (simdType == TYP_SIMD16)
@@ -202,6 +156,8 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleForHWSIMD(var_types simdType, va
{
case TYP_FLOAT:
return m_simdHandleCache->Vector64FloatHandle;
+ case TYP_DOUBLE:
+ return m_simdHandleCache->Vector64DoubleHandle;
case TYP_INT:
return m_simdHandleCache->Vector64IntHandle;
case TYP_USHORT:
@@ -214,6 +170,10 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleForHWSIMD(var_types simdType, va
return m_simdHandleCache->Vector64ByteHandle;
case TYP_UINT:
return m_simdHandleCache->Vector64UIntHandle;
+ case TYP_LONG:
+ return m_simdHandleCache->Vector64LongHandle;
+ case TYP_ULONG:
+ return m_simdHandleCache->Vector64ULongHandle;
default:
assert(!"Didn't find a class handle for simdType");
}
@@ -223,7 +183,6 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleForHWSIMD(var_types simdType, va
return NO_CLASS_HANDLE;
}
-#ifdef FEATURE_HW_INTRINSICS
//------------------------------------------------------------------------
// vnEncodesResultTypeForHWIntrinsic(NamedIntrinsic hwIntrinsicID):
//
@@ -284,22 +243,24 @@ CORINFO_CLASS_HANDLE Compiler::gtGetStructHandleForHWSIMD(var_types simdType, va
// If we see two (or more) different instructions we need the extra VNF_SimdType arg
return (diffInsCount >= 2);
}
-#endif // FEATURE_HW_INTRINSICS
//------------------------------------------------------------------------
// lookupId: Gets the NamedIntrinsic for a given method name and InstructionSet
//
// Arguments:
+// comp -- The compiler
+// sig -- The signature of the intrinsic
// className -- The name of the class associated with the HWIntrinsic to lookup
// methodName -- The name of the method associated with the HWIntrinsic to lookup
// enclosingClassName -- The name of the enclosing class of X64 classes
//
// Return Value:
// The NamedIntrinsic associated with methodName and isa
-NamedIntrinsic HWIntrinsicInfo::lookupId(Compiler* comp,
- const char* className,
- const char* methodName,
- const char* enclosingClassName)
+NamedIntrinsic HWIntrinsicInfo::lookupId(Compiler* comp,
+ CORINFO_SIG_INFO* sig,
+ const char* className,
+ const char* methodName,
+ const char* enclosingClassName)
{
// TODO-Throughput: replace sequential search by binary search
CORINFO_InstructionSet isa = lookupIsa(className, enclosingClassName);
@@ -322,14 +283,23 @@ NamedIntrinsic HWIntrinsicInfo::lookupId(Compiler* comp,
for (int i = 0; i < (NI_HW_INTRINSIC_END - NI_HW_INTRINSIC_START - 1); i++)
{
+ const HWIntrinsicInfo& intrinsicInfo = hwIntrinsicInfoArray[i];
+
if (isa != hwIntrinsicInfoArray[i].isa)
{
continue;
}
- if (strcmp(methodName, hwIntrinsicInfoArray[i].name) == 0)
+ int numArgs = static_cast(intrinsicInfo.numArgs);
+
+ if ((numArgs != -1) && (sig->numArgs != static_cast(intrinsicInfo.numArgs)))
{
- return hwIntrinsicInfoArray[i].id;
+ continue;
+ }
+
+ if (strcmp(methodName, intrinsicInfo.name) == 0)
+ {
+ return intrinsicInfo.id;
}
}
@@ -353,9 +323,11 @@ NamedIntrinsic HWIntrinsicInfo::lookupId(Compiler* comp,
// get the SIMD size from the GenTreeHWIntrinsic node.
unsigned HWIntrinsicInfo::lookupSimdSize(Compiler* comp, NamedIntrinsic id, CORINFO_SIG_INFO* sig)
{
- if (HWIntrinsicInfo::HasFixedSimdSize(id))
+ unsigned simdSize = 0;
+
+ if (tryLookupSimdSize(id, &simdSize))
{
- return lookupSimdSize(id);
+ return simdSize;
}
CORINFO_CLASS_HANDLE typeHnd = nullptr;
@@ -375,7 +347,6 @@ unsigned HWIntrinsicInfo::lookupSimdSize(Compiler* comp, NamedIntrinsic id, CORI
typeHnd = sig->retTypeSigClass;
}
- unsigned simdSize = 0;
var_types baseType = comp->getBaseTypeAndSizeOfSIMDType(typeHnd, &simdSize);
assert((simdSize > 0) && (baseType != TYP_UNKNOWN));
return simdSize;
@@ -498,26 +469,30 @@ bool HWIntrinsicInfo::isImmOp(NamedIntrinsic id, const GenTree* op)
}
//------------------------------------------------------------------------
-// // getArgForHWIntrinsic: pop an argument from the stack and validate its type
+// getArgForHWIntrinsic: pop an argument from the stack and validate its type
//
// Arguments:
-// argType -- the required type of argument
-// argClass -- the class handle of argType
+// argType -- the required type of argument
+// argClass -- the class handle of argType
+// expectAddr -- if true indicates we are expecting type stack entry to be a TYP_BYREF.
//
// Return Value:
// the validated argument
//
-GenTree* Compiler::getArgForHWIntrinsic(var_types argType, CORINFO_CLASS_HANDLE argClass)
+GenTree* Compiler::getArgForHWIntrinsic(var_types argType, CORINFO_CLASS_HANDLE argClass, bool expectAddr)
{
GenTree* arg = nullptr;
- if (argType == TYP_STRUCT)
+ if (varTypeIsStruct(argType))
{
- unsigned int argSizeBytes;
- var_types base = getBaseTypeAndSizeOfSIMDType(argClass, &argSizeBytes);
- argType = getSIMDTypeForSize(argSizeBytes);
- assert((argType == TYP_SIMD8) || (argType == TYP_SIMD16) || (argType == TYP_SIMD32));
- arg = impSIMDPopStack(argType);
- assert((arg->TypeGet() == TYP_SIMD8) || (arg->TypeGet() == TYP_SIMD16) || (arg->TypeGet() == TYP_SIMD32));
+ if (!varTypeIsSIMD(argType))
+ {
+ unsigned int argSizeBytes;
+ var_types base = getBaseTypeAndSizeOfSIMDType(argClass, &argSizeBytes);
+ argType = getSIMDTypeForSize(argSizeBytes);
+ }
+ assert(varTypeIsSIMD(argType));
+ arg = impSIMDPopStack(argType, expectAddr);
+ assert(varTypeIsSIMD(arg->TypeGet()));
}
else
{
@@ -533,15 +508,18 @@ GenTree* Compiler::getArgForHWIntrinsic(var_types argType, CORINFO_CLASS_HANDLE
// addRangeCheckIfNeeded: add a GT_HW_INTRINSIC_CHK node for non-full-range imm-intrinsic
//
// Arguments:
-// intrinsic -- intrinsic ID
-// immOP -- the last operand of the intrinsic that points to the imm-arg
-// mustExpand -- true if the compiler is compiling the fallback(GT_CALL) of this intrinsics
+// intrinsic -- intrinsic ID
+// immOp -- the immediate operand of the intrinsic
+// mustExpand -- true if the compiler is compiling the fallback(GT_CALL) of this intrinsics
+// immLowerBound -- lower incl. bound for a value of the immediate operand (for a non-full-range imm-intrinsic)
+// immUpperBound -- upper incl. bound for a value of the immediate operand (for a non-full-range imm-intrinsic)
//
// Return Value:
// add a GT_HW_INTRINSIC_CHK node for non-full-range imm-intrinsic, which would throw ArgumentOutOfRangeException
// when the imm-argument is not in the valid range
//
-GenTree* Compiler::addRangeCheckIfNeeded(NamedIntrinsic intrinsic, GenTree* immOp, bool mustExpand)
+GenTree* Compiler::addRangeCheckIfNeeded(
+ NamedIntrinsic intrinsic, GenTree* immOp, bool mustExpand, int immLowerBound, int immUpperBound)
{
assert(immOp != nullptr);
// Full-range imm-intrinsics do not need the range-check
@@ -555,19 +533,37 @@ GenTree* Compiler::addRangeCheckIfNeeded(NamedIntrinsic intrinsic, GenTree* immO
)
{
assert(!immOp->IsCnsIntOrI());
- GenTree* upperBoundNode = gtNewIconNode(HWIntrinsicInfo::lookupImmUpperBound(intrinsic), TYP_INT);
- GenTree* index = nullptr;
- if ((immOp->gtFlags & GTF_SIDE_EFFECT) != 0)
- {
- index = fgInsertCommaFormTemp(&immOp);
- }
- else
+ assert(varTypeIsUnsigned(immOp));
+
+ // Bounds check for value of an immediate operand
+ // (immLowerBound <= immOp) && (immOp <= immUpperBound)
+ //
+ // implemented as a single comparison in the form of
+ //
+ // if ((immOp - immLowerBound) >= (immUpperBound - immLowerBound + 1))
+ // {
+ // throw new ArgumentOutOfRangeException();
+ // }
+ //
+ // The value of (immUpperBound - immLowerBound + 1) is denoted as adjustedUpperBound.
+
+ const ssize_t adjustedUpperBound = (ssize_t)immUpperBound - immLowerBound + 1;
+ GenTree* adjustedUpperBoundNode = gtNewIconNode(adjustedUpperBound, TYP_INT);
+
+ GenTree* immOpDup = nullptr;
+
+ immOp = impCloneExpr(immOp, &immOpDup, NO_CLASS_HANDLE, (unsigned)CHECK_SPILL_ALL,
+ nullptr DEBUGARG("Clone an immediate operand for immediate value bounds check"));
+
+ if (immLowerBound != 0)
{
- index = gtCloneExpr(immOp);
+ immOpDup = gtNewOperNode(GT_SUB, TYP_INT, immOpDup, gtNewIconNode(immLowerBound, TYP_INT));
}
+
GenTreeBoundsChk* hwIntrinsicChk = new (this, GT_HW_INTRINSIC_CHK)
- GenTreeBoundsChk(GT_HW_INTRINSIC_CHK, TYP_VOID, index, upperBoundNode, SCK_RNGCHK_FAIL);
+ GenTreeBoundsChk(GT_HW_INTRINSIC_CHK, TYP_VOID, immOpDup, adjustedUpperBoundNode, SCK_RNGCHK_FAIL);
hwIntrinsicChk->gtThrowKind = SCK_ARG_RNG_EXCPN;
+
return gtNewOperNode(GT_COMMA, immOp->TypeGet(), hwIntrinsicChk, immOp);
}
else
@@ -610,6 +606,67 @@ static bool impIsTableDrivenHWIntrinsic(NamedIntrinsic intrinsicId, HWIntrinsicC
!HWIntrinsicInfo::HasSpecialImport(intrinsicId);
}
+//------------------------------------------------------------------------
+// isSupportedBaseType
+//
+// Arguments:
+// intrinsicId - HW intrinsic id
+// baseType - Base type of the intrinsic.
+//
+// Return Value:
+// returns true if the baseType is supported for given intrinsic.
+//
+static bool isSupportedBaseType(NamedIntrinsic intrinsic, var_types baseType)
+{
+ // We don't actually check the intrinsic outside of the false case as we expect
+ // the exposed managed signatures are either generic and support all types
+ // or they are explicit and support the type indicated.
+ if (varTypeIsArithmetic(baseType))
+ {
+ return true;
+ }
+
+#ifdef TARGET_XARCH
+ assert((intrinsic == NI_Vector128_As) || (intrinsic == NI_Vector128_AsByte) ||
+ (intrinsic == NI_Vector128_AsDouble) || (intrinsic == NI_Vector128_AsInt16) ||
+ (intrinsic == NI_Vector128_AsInt32) || (intrinsic == NI_Vector128_AsInt64) ||
+ (intrinsic == NI_Vector128_AsSByte) || (intrinsic == NI_Vector128_AsSingle) ||
+ (intrinsic == NI_Vector128_AsUInt16) || (intrinsic == NI_Vector128_AsUInt32) ||
+ (intrinsic == NI_Vector128_AsUInt64) || (intrinsic == NI_Vector128_get_AllBitsSet) ||
+ (intrinsic == NI_Vector128_get_Count) || (intrinsic == NI_Vector128_get_Zero) ||
+ (intrinsic == NI_Vector128_GetElement) || (intrinsic == NI_Vector128_WithElement) ||
+ (intrinsic == NI_Vector128_ToScalar) || (intrinsic == NI_Vector128_ToVector256) ||
+ (intrinsic == NI_Vector128_ToVector256Unsafe) || (intrinsic == NI_Vector256_As) ||
+ (intrinsic == NI_Vector256_AsByte) || (intrinsic == NI_Vector256_AsDouble) ||
+ (intrinsic == NI_Vector256_AsInt16) || (intrinsic == NI_Vector256_AsInt32) ||
+ (intrinsic == NI_Vector256_AsInt64) || (intrinsic == NI_Vector256_AsSByte) ||
+ (intrinsic == NI_Vector256_AsSingle) || (intrinsic == NI_Vector256_AsUInt16) ||
+ (intrinsic == NI_Vector256_AsUInt32) || (intrinsic == NI_Vector256_AsUInt64) ||
+ (intrinsic == NI_Vector256_get_AllBitsSet) || (intrinsic == NI_Vector256_get_Count) ||
+ (intrinsic == NI_Vector256_get_Zero) || (intrinsic == NI_Vector256_GetElement) ||
+ (intrinsic == NI_Vector256_WithElement) || (intrinsic == NI_Vector256_GetLower) ||
+ (intrinsic == NI_Vector256_ToScalar));
+#else
+ assert((intrinsic == NI_Vector64_AsByte) || (intrinsic == NI_Vector64_AsInt16) ||
+ (intrinsic == NI_Vector64_AsInt32) || (intrinsic == NI_Vector64_AsSByte) ||
+ (intrinsic == NI_Vector64_AsSingle) || (intrinsic == NI_Vector64_AsUInt16) ||
+ (intrinsic == NI_Vector64_AsUInt32) || (intrinsic == NI_Vector64_get_AllBitsSet) ||
+ (intrinsic == NI_Vector64_get_Count) || (intrinsic == NI_Vector64_get_Zero) ||
+ (intrinsic == NI_Vector64_GetElement) || (intrinsic == NI_Vector64_ToScalar) ||
+ (intrinsic == NI_Vector64_ToVector128) || (intrinsic == NI_Vector64_ToVector128Unsafe) ||
+ (intrinsic == NI_Vector128_As) || (intrinsic == NI_Vector128_AsByte) ||
+ (intrinsic == NI_Vector128_AsDouble) || (intrinsic == NI_Vector128_AsInt16) ||
+ (intrinsic == NI_Vector128_AsInt32) || (intrinsic == NI_Vector128_AsInt64) ||
+ (intrinsic == NI_Vector128_AsSByte) || (intrinsic == NI_Vector128_AsSingle) ||
+ (intrinsic == NI_Vector128_AsUInt16) || (intrinsic == NI_Vector128_AsUInt32) ||
+ (intrinsic == NI_Vector128_AsUInt64) || (intrinsic == NI_Vector128_get_AllBitsSet) ||
+ (intrinsic == NI_Vector128_get_Count) || (intrinsic == NI_Vector128_get_Zero) ||
+ (intrinsic == NI_Vector128_GetElement) || (intrinsic == NI_Vector128_GetLower) ||
+ (intrinsic == NI_Vector128_ToScalar));
+#endif
+ return false;
+}
+
//------------------------------------------------------------------------
// impHWIntrinsic: Import a hardware intrinsic as a GT_HWINTRINSIC node if possible
//
@@ -641,32 +698,79 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
baseType = getBaseTypeAndSizeOfSIMDType(sig->retTypeSigClass, &sizeBytes);
retType = getSIMDTypeForSize(sizeBytes);
assert(sizeBytes != 0);
+
+ // We want to return early here for cases where retType was TYP_STRUCT as per method signature and
+ // rather than deferring the decision after getting the baseType of arg.
+ if (!isSupportedBaseType(intrinsic, baseType))
+ {
+ return nullptr;
+ }
+ }
+
+ baseType = getBaseTypeFromArgIfNeeded(intrinsic, clsHnd, sig, baseType);
+
+ if (baseType == TYP_UNKNOWN)
+ {
+ if (category != HW_Category_Scalar)
+ {
+ unsigned int sizeBytes;
+ baseType = getBaseTypeAndSizeOfSIMDType(clsHnd, &sizeBytes);
+ assert((category == HW_Category_Special) || (sizeBytes != 0));
+ }
+ else
+ {
+ baseType = retType;
+ }
+ }
+
+ // Immediately return if the category is other than scalar/special and this is not a supported base type.
+ if ((category != HW_Category_Special) && (category != HW_Category_Scalar) &&
+ !isSupportedBaseType(intrinsic, baseType))
+ {
+ return nullptr;
+ }
+
+ unsigned simdSize = HWIntrinsicInfo::lookupSimdSize(this, intrinsic, sig);
+
+ GenTree* immOp = nullptr;
+
+#ifdef TARGET_ARM64
+ if (intrinsic == NI_AdvSimd_Insert)
+ {
+ assert(sig->numArgs == 3);
+ immOp = impStackTop(1).val;
+ assert(HWIntrinsicInfo::isImmOp(intrinsic, immOp));
+ }
+ else
+#endif
+ if ((sig->numArgs > 0) && HWIntrinsicInfo::isImmOp(intrinsic, impStackTop().val))
+ {
+ // NOTE: The following code assumes that for all intrinsics
+ // taking an immediate operand, that operand will be last.
+ immOp = impStackTop().val;
}
- // NOTE: The following code assumes that for all intrinsics
- // taking an immediate operand, that operand will be last.
- if (sig->numArgs > 0 && HWIntrinsicInfo::isImmOp(intrinsic, impStackTop().val))
+ if (immOp != nullptr)
{
- GenTree* lastOp = impStackTop().val;
- // The imm-HWintrinsics that do not accept all imm8 values may throw
- // ArgumentOutOfRangeException when the imm argument is not in the valid range
- if (!HWIntrinsicInfo::HasFullRangeImm(intrinsic))
+ if (!HWIntrinsicInfo::HasFullRangeImm(intrinsic) && immOp->IsCnsIntOrI())
{
- if (!mustExpand && lastOp->IsCnsIntOrI() &&
- !HWIntrinsicInfo::isInImmRange(intrinsic, (int)lastOp->AsIntCon()->IconValue()))
+ const int ival = (int)immOp->AsIntCon()->IconValue();
+
+ if (!HWIntrinsicInfo::isInImmRange(intrinsic, ival, simdSize, baseType))
{
+ assert(!mustExpand);
+ // The imm-HWintrinsics that do not accept all imm8 values may throw
+ // ArgumentOutOfRangeException when the imm argument is not in the valid range
return nullptr;
}
}
-
- if (!lastOp->IsCnsIntOrI())
+ else if (!immOp->IsCnsIntOrI())
{
if (HWIntrinsicInfo::NoJmpTableImm(intrinsic))
{
return impNonConstFallback(intrinsic, retType, baseType);
}
-
- if (!mustExpand)
+ else if (!mustExpand)
{
// When the imm-argument is not a constant and we are not being forced to expand, we need to
// return nullptr so a GT_CALL to the intrinsic method is emitted instead. The
@@ -687,14 +791,25 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
// table-driven importer of simple intrinsics
if (impIsTableDrivenHWIntrinsic(intrinsic, category))
{
- baseType = getBaseTypeFromArgIfNeeded(intrinsic, clsHnd, sig, baseType);
- unsigned simdSize = HWIntrinsicInfo::lookupSimdSize(this, intrinsic, sig);
bool isScalar = category == HW_Category_Scalar;
CORINFO_ARG_LIST_HANDLE argList = sig->args;
var_types argType = TYP_UNKNOWN;
CORINFO_CLASS_HANDLE argClass;
+ int immLowerBound = 0;
+ int immUpperBound = 0;
+
+ if (immOp != nullptr)
+ {
+#if defined(TARGET_XARCH)
+ immUpperBound = HWIntrinsicInfo::lookupImmUpperBound(intrinsic);
+#elif defined(TARGET_ARM64)
+ HWIntrinsicInfo::lookupImmBounds(intrinsic, simdSize, baseType, &immLowerBound, &immUpperBound);
+#endif
+ }
+
assert(numArgs >= 0);
+
if (!isScalar && ((HWIntrinsicInfo::lookupIns(intrinsic, baseType) == INS_invalid) ||
((simdSize != 8) && (simdSize != 16) && (simdSize != 32))))
{
@@ -742,7 +857,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass)));
op2 = getArgForHWIntrinsic(argType, argClass);
- op2 = addRangeCheckIfNeeded(intrinsic, op2, mustExpand);
+ op2 = addRangeCheckIfNeeded(intrinsic, op2, mustExpand, immLowerBound, immUpperBound);
argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, argList, &argClass)));
op1 = getArgForHWIntrinsic(argType, argClass);
@@ -764,6 +879,13 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
// to the code generator. May encode the overload info in other way.
retNode->AsHWIntrinsic()->gtSIMDBaseType = JITtype2varType(corType);
}
+#ifdef TARGET_ARM64
+ if ((intrinsic == NI_AdvSimd_AddWideningUpper) || (intrinsic == NI_AdvSimd_SubtractWideningUpper))
+ {
+ assert(varTypeIsSIMD(op1->TypeGet()));
+ retNode->AsHWIntrinsic()->SetOtherBaseType(getBaseTypeOfSIMDType(argClass));
+ }
+#endif
break;
}
@@ -775,8 +897,6 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg3, &argClass)));
GenTree* op3 = getArgForHWIntrinsic(argType, argClass);
- op3 = addRangeCheckIfNeeded(intrinsic, op3, mustExpand);
-
argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass)));
op2 = getArgForHWIntrinsic(argType, argClass);
@@ -785,6 +905,17 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, argList, &argClass)));
op1 = getArgForHWIntrinsic(argType, argClass);
+#ifdef TARGET_ARM64
+ if (intrinsic == NI_AdvSimd_Insert)
+ {
+ op2 = addRangeCheckIfNeeded(intrinsic, op2, mustExpand, immLowerBound, immUpperBound);
+ }
+ else
+#endif
+ {
+ op3 = addRangeCheckIfNeeded(intrinsic, op3, mustExpand, immLowerBound, immUpperBound);
+ }
+
retNode = isScalar ? gtNewScalarHWIntrinsicNode(retType, op1, op2, op3, intrinsic)
: gtNewSimdHWIntrinsicNode(retType, op1, op2, op3, intrinsic, baseType, simdSize);
@@ -792,7 +923,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
if (intrinsic == NI_AVX2_GatherVector128 || intrinsic == NI_AVX2_GatherVector256)
{
assert(varTypeIsSIMD(op2->TypeGet()));
- retNode->AsHWIntrinsic()->gtIndexBaseType = getBaseTypeOfSIMDType(op2ArgClass);
+ retNode->AsHWIntrinsic()->SetOtherBaseType(getBaseTypeOfSIMDType(op2ArgClass));
}
#endif
break;
@@ -820,7 +951,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
return retNode;
}
- return impSpecialIntrinsic(intrinsic, clsHnd, method, sig);
+ return impSpecialIntrinsic(intrinsic, clsHnd, method, sig, baseType, retType, simdSize);
}
#endif // FEATURE_HW_INTRINSICS
diff --git a/src/coreclr/src/jit/hwintrinsic.h b/src/coreclr/src/jit/hwintrinsic.h
index 488e77f8278d90..34a92d858e43dc 100644
--- a/src/coreclr/src/jit/hwintrinsic.h
+++ b/src/coreclr/src/jit/hwintrinsic.h
@@ -55,76 +55,202 @@ enum HWIntrinsicFlag : unsigned int
// NoCodeGen
// - should be transformed in the compiler front-end, cannot reach CodeGen
- HW_Flag_NoCodeGen = 0x8,
-
- // Unfixed SIMD-size
- // - overloaded on multiple vector sizes (SIMD size in the table is unreliable)
- HW_Flag_UnfixedSIMDSize = 0x10,
+ HW_Flag_NoCodeGen = 0x4,
// Multi-instruction
// - that one intrinsic can generate multiple instructions
- HW_Flag_MultiIns = 0x20,
-
- // NoContainment
- // the intrinsic cannot be handled by comtainment,
- // all the intrinsic that have explicit memory load/store semantics should have this flag
- HW_Flag_NoContainment = 0x40,
-
- // Copy Upper bits
- // some SIMD scalar intrinsics need the semantics of copying upper bits from the source operand
- HW_Flag_CopyUpperBits = 0x80,
+ HW_Flag_MultiIns = 0x8,
// Select base type using the first argument type
- HW_Flag_BaseTypeFromFirstArg = 0x100,
+ HW_Flag_BaseTypeFromFirstArg = 0x10,
+
+ // Select base type using the second argument type
+ HW_Flag_BaseTypeFromSecondArg = 0x20,
// Indicates compFloatingPointUsed does not need to be set.
- HW_Flag_NoFloatingPointUsed = 0x200,
+ HW_Flag_NoFloatingPointUsed = 0x40,
// Maybe IMM
// the intrinsic has either imm or Vector overloads
- HW_Flag_MaybeIMM = 0x400,
+ HW_Flag_MaybeIMM = 0x80,
// NoJmpTable IMM
// the imm intrinsic does not need jumptable fallback when it gets non-const argument
- HW_Flag_NoJmpTableIMM = 0x800,
-
- // Select base type using the second argument type
- HW_Flag_BaseTypeFromSecondArg = 0x1000,
+ HW_Flag_NoJmpTableIMM = 0x100,
// Special codegen
// the intrinsics need special rules in CodeGen,
// but may be table-driven in the front-end
- HW_Flag_SpecialCodeGen = 0x2000,
+ HW_Flag_SpecialCodeGen = 0x200,
+ // Special import
+ // the intrinsics need special rules in importer,
+ // but may be table-driven in the back-end
+ HW_Flag_SpecialImport = 0x400,
+
+// The below is for defining platform-specific flags
#if defined(TARGET_XARCH)
+ // Copy Upper bits
+ // some SIMD scalar intrinsics need the semantics of copying upper bits from the source operand
+ HW_Flag_CopyUpperBits = 0x800,
+
+ // Maybe Memory Load/Store
+ // - some intrinsics may have pointer overloads but without HW_Category_MemoryLoad/HW_Category_MemoryStore
+ HW_Flag_MaybeMemoryLoad = 0x1000,
+ HW_Flag_MaybeMemoryStore = 0x2000,
+
// No Read/Modify/Write Semantics
// the intrinsic doesn't have read/modify/write semantics in two/three-operand form.
HW_Flag_NoRMWSemantics = 0x4000,
+
+ // NoContainment
+ // the intrinsic cannot be handled by comtainment,
+ // all the intrinsic that have explicit memory load/store semantics should have this flag
+ HW_Flag_NoContainment = 0x8000,
+
#elif defined(TARGET_ARM64)
// The intrinsic has read/modify/write semantics in multiple-operands form.
- HW_Flag_HasRMWSemantics = 0x4000,
+ HW_Flag_HasRMWSemantics = 0x800,
+
+ // The intrinsic supports some sort of containment analysis.
+ HW_Flag_SupportsContainment = 0x1000,
#else
#error Unsupported platform
#endif
+};
- // Special import
- // the intrinsics need special rules in importer,
- // but may be table-driven in the back-end
- HW_Flag_SpecialImport = 0x8000,
+#if defined(TARGET_XARCH)
+// This mirrors the System.Runtime.Intrinsics.X86.FloatComparisonMode enumeration
+enum class FloatComparisonMode : unsigned char
+{
+ // _CMP_EQ_OQ
+ OrderedEqualNonSignaling = 0,
- // Maybe Memory Load/Store
- // - some intrinsics may have pointer overloads but without HW_Category_MemoryLoad/HW_Category_MemoryStore
- HW_Flag_MaybeMemoryLoad = 0x10000,
- HW_Flag_MaybeMemoryStore = 0x20000,
+ // _CMP_LT_OS
+ OrderedLessThanSignaling = 1,
+
+ // _CMP_LE_OS
+ OrderedLessThanOrEqualSignaling = 2,
+
+ // _CMP_UNORD_Q
+ UnorderedNonSignaling = 3,
+
+ // _CMP_NEQ_UQ
+ UnorderedNotEqualNonSignaling = 4,
+
+ // _CMP_NLT_US
+ UnorderedNotLessThanSignaling = 5,
+
+ // _CMP_NLE_US
+ UnorderedNotLessThanOrEqualSignaling = 6,
+
+ // _CMP_ORD_Q
+ OrderedNonSignaling = 7,
+
+ // _CMP_EQ_UQ
+ UnorderedEqualNonSignaling = 8,
+
+ // _CMP_NGE_US
+ UnorderedNotGreaterThanOrEqualSignaling = 9,
+
+ // _CMP_NGT_US
+ UnorderedNotGreaterThanSignaling = 10,
+
+ // _CMP_FALSE_OQ
+ OrderedFalseNonSignaling = 11,
+
+ // _CMP_NEQ_OQ
+ OrderedNotEqualNonSignaling = 12,
+
+ // _CMP_GE_OS
+ OrderedGreaterThanOrEqualSignaling = 13,
+
+ // _CMP_GT_OS
+ OrderedGreaterThanSignaling = 14,
+
+ // _CMP_TRUE_UQ
+ UnorderedTrueNonSignaling = 15,
+
+ // _CMP_EQ_OS
+ OrderedEqualSignaling = 16,
+
+ // _CMP_LT_OQ
+ OrderedLessThanNonSignaling = 17,
+
+ // _CMP_LE_OQ
+ OrderedLessThanOrEqualNonSignaling = 18,
+
+ // _CMP_UNORD_S
+ UnorderedSignaling = 19,
+
+ // _CMP_NEQ_US
+ UnorderedNotEqualSignaling = 20,
+
+ // _CMP_NLT_UQ
+ UnorderedNotLessThanNonSignaling = 21,
+
+ // _CMP_NLE_UQ
+ UnorderedNotLessThanOrEqualNonSignaling = 22,
+
+ // _CMP_ORD_S
+ OrderedSignaling = 23,
+
+ // _CMP_EQ_US
+ UnorderedEqualSignaling = 24,
+
+ // _CMP_NGE_UQ
+ UnorderedNotGreaterThanOrEqualNonSignaling = 25,
+
+ // _CMP_NGT_UQ
+ UnorderedNotGreaterThanNonSignaling = 26,
+
+ // _CMP_FALSE_OS
+ OrderedFalseSignaling = 27,
+
+ // _CMP_NEQ_OS
+ OrderedNotEqualSignaling = 28,
+
+ // _CMP_GE_OQ
+ OrderedGreaterThanOrEqualNonSignaling = 29,
+
+ // _CMP_GT_OQ
+ OrderedGreaterThanNonSignaling = 30,
+
+ // _CMP_TRUE_US
+ UnorderedTrueSignaling = 31,
+};
+
+enum class FloatRoundingMode : unsigned char
+{
+ // _MM_FROUND_TO_NEAREST_INT
+ ToNearestInteger = 0x00,
+
+ // _MM_FROUND_TO_NEG_INF
+ ToNegativeInfinity = 0x01,
+
+ // _MM_FROUND_TO_POS_INF
+ ToPositiveInfinity = 0x02,
+
+ // _MM_FROUND_TO_ZERO
+ ToZero = 0x03,
+
+ // _MM_FROUND_CUR_DIRECTION
+ CurrentDirection = 0x04,
+
+ // _MM_FROUND_RAISE_EXC
+ RaiseException = 0x00,
+
+ // _MM_FROUND_NO_EXC
+ NoException = 0x08,
};
+#endif // TARGET_XARCH
struct HWIntrinsicInfo
{
NamedIntrinsic id;
const char* name;
CORINFO_InstructionSet isa;
- int ival;
- unsigned simdSize;
+ int simdSize;
int numArgs;
instruction ins[10];
HWIntrinsicCategory category;
@@ -132,24 +258,34 @@ struct HWIntrinsicInfo
static const HWIntrinsicInfo& lookup(NamedIntrinsic id);
- static NamedIntrinsic lookupId(Compiler* comp,
- const char* className,
- const char* methodName,
- const char* enclosingClassName);
+ static NamedIntrinsic lookupId(Compiler* comp,
+ CORINFO_SIG_INFO* sig,
+ const char* className,
+ const char* methodName,
+ const char* enclosingClassName);
static CORINFO_InstructionSet lookupIsa(const char* className, const char* enclosingClassName);
static unsigned lookupSimdSize(Compiler* comp, NamedIntrinsic id, CORINFO_SIG_INFO* sig);
static int lookupNumArgs(const GenTreeHWIntrinsic* node);
static GenTree* lookupLastOp(const GenTreeHWIntrinsic* node);
- static int lookupImmUpperBound(NamedIntrinsic id);
+#if defined(TARGET_XARCH)
+ static int lookupImmUpperBound(NamedIntrinsic intrinsic);
+#elif defined(TARGET_ARM64)
+ static void lookupImmBounds(
+ NamedIntrinsic intrinsic, int simdSize, var_types baseType, int* lowerBound, int* upperBound);
+#else
+#error Unsupported platform
+#endif
+
+ static bool isInImmRange(NamedIntrinsic id, int ival, int simdSize, var_types baseType);
static bool isImmOp(NamedIntrinsic id, const GenTree* op);
- static bool isInImmRange(NamedIntrinsic id, int ival);
static bool isFullyImplementedIsa(CORINFO_InstructionSet isa);
static bool isScalarIsa(CORINFO_InstructionSet isa);
#ifdef TARGET_XARCH
static bool isAVX2GatherIntrinsic(NamedIntrinsic id);
+ static FloatComparisonMode lookupFloatComparisonModeForSwappedArgs(FloatComparisonMode comparison);
#endif
// Member lookup
@@ -169,14 +305,221 @@ struct HWIntrinsicInfo
return lookup(id).isa;
}
- static int lookupIval(NamedIntrinsic id)
+#ifdef TARGET_XARCH
+ static int lookupIval(NamedIntrinsic id, bool opportunisticallyDependsOnAVX)
{
- return lookup(id).ival;
+ switch (id)
+ {
+ case NI_SSE_CompareEqual:
+ case NI_SSE_CompareScalarEqual:
+ case NI_SSE2_CompareEqual:
+ case NI_SSE2_CompareScalarEqual:
+ case NI_AVX_CompareEqual:
+ {
+ return static_cast(FloatComparisonMode::OrderedEqualNonSignaling);
+ }
+
+ case NI_SSE_CompareGreaterThan:
+ case NI_SSE_CompareScalarGreaterThan:
+ case NI_SSE2_CompareGreaterThan:
+ case NI_SSE2_CompareScalarGreaterThan:
+ case NI_AVX_CompareGreaterThan:
+ {
+ if (opportunisticallyDependsOnAVX)
+ {
+ return static_cast(FloatComparisonMode::OrderedGreaterThanSignaling);
+ }
+
+ // CompareGreaterThan is not directly supported in hardware without AVX support.
+ // We will return the inverted case here and lowering will itself swap the ops
+ // to ensure the emitted code remains correct. This simplifies the overall logic
+ // here and for other use cases.
+
+ assert(id != NI_AVX_CompareGreaterThan);
+ return static_cast(FloatComparisonMode::OrderedLessThanSignaling);
+ }
+
+ case NI_SSE_CompareLessThan:
+ case NI_SSE_CompareScalarLessThan:
+ case NI_SSE2_CompareLessThan:
+ case NI_SSE2_CompareScalarLessThan:
+ case NI_AVX_CompareLessThan:
+ {
+ return static_cast(FloatComparisonMode::OrderedLessThanSignaling);
+ }
+
+ case NI_SSE_CompareGreaterThanOrEqual:
+ case NI_SSE_CompareScalarGreaterThanOrEqual:
+ case NI_SSE2_CompareGreaterThanOrEqual:
+ case NI_SSE2_CompareScalarGreaterThanOrEqual:
+ case NI_AVX_CompareGreaterThanOrEqual:
+ {
+ if (opportunisticallyDependsOnAVX)
+ {
+ return static_cast(FloatComparisonMode::OrderedGreaterThanOrEqualSignaling);
+ }
+
+ // CompareGreaterThanOrEqual is not directly supported in hardware without AVX support.
+ // We will return the inverted case here and lowering will itself swap the ops
+ // to ensure the emitted code remains correct. This simplifies the overall logic
+ // here and for other use cases.
+
+ assert(id != NI_AVX_CompareGreaterThanOrEqual);
+ return static_cast(FloatComparisonMode::OrderedLessThanOrEqualSignaling);
+ }
+
+ case NI_SSE_CompareLessThanOrEqual:
+ case NI_SSE_CompareScalarLessThanOrEqual:
+ case NI_SSE2_CompareLessThanOrEqual:
+ case NI_SSE2_CompareScalarLessThanOrEqual:
+ case NI_AVX_CompareLessThanOrEqual:
+ {
+ return static_cast(FloatComparisonMode::OrderedLessThanOrEqualSignaling);
+ }
+
+ case NI_SSE_CompareNotEqual:
+ case NI_SSE_CompareScalarNotEqual:
+ case NI_SSE2_CompareNotEqual:
+ case NI_SSE2_CompareScalarNotEqual:
+ case NI_AVX_CompareNotEqual:
+ {
+ return static_cast(FloatComparisonMode::UnorderedNotEqualNonSignaling);
+ }
+
+ case NI_SSE_CompareNotGreaterThan:
+ case NI_SSE_CompareScalarNotGreaterThan:
+ case NI_SSE2_CompareNotGreaterThan:
+ case NI_SSE2_CompareScalarNotGreaterThan:
+ case NI_AVX_CompareNotGreaterThan:
+ {
+ if (opportunisticallyDependsOnAVX)
+ {
+ return static_cast(FloatComparisonMode::UnorderedNotGreaterThanSignaling);
+ }
+
+ // CompareNotGreaterThan is not directly supported in hardware without AVX support.
+ // We will return the inverted case here and lowering will itself swap the ops
+ // to ensure the emitted code remains correct. This simplifies the overall logic
+ // here and for other use cases.
+
+ assert(id != NI_AVX_CompareNotGreaterThan);
+ return static_cast(FloatComparisonMode::UnorderedNotLessThanSignaling);
+ }
+
+ case NI_SSE_CompareNotLessThan:
+ case NI_SSE_CompareScalarNotLessThan:
+ case NI_SSE2_CompareNotLessThan:
+ case NI_SSE2_CompareScalarNotLessThan:
+ case NI_AVX_CompareNotLessThan:
+ {
+ return static_cast(FloatComparisonMode::UnorderedNotLessThanSignaling);
+ }
+
+ case NI_SSE_CompareNotGreaterThanOrEqual:
+ case NI_SSE_CompareScalarNotGreaterThanOrEqual:
+ case NI_SSE2_CompareNotGreaterThanOrEqual:
+ case NI_SSE2_CompareScalarNotGreaterThanOrEqual:
+ case NI_AVX_CompareNotGreaterThanOrEqual:
+ {
+ if (opportunisticallyDependsOnAVX)
+ {
+ return static_cast(FloatComparisonMode::UnorderedNotGreaterThanOrEqualSignaling);
+ }
+
+ // CompareNotGreaterThanOrEqual is not directly supported in hardware without AVX support.
+ // We will return the inverted case here and lowering will itself swap the ops
+ // to ensure the emitted code remains correct. This simplifies the overall logic
+ // here and for other use cases.
+
+ assert(id != NI_AVX_CompareNotGreaterThanOrEqual);
+ return static_cast(FloatComparisonMode::UnorderedNotLessThanOrEqualSignaling);
+ }
+
+ case NI_SSE_CompareNotLessThanOrEqual:
+ case NI_SSE_CompareScalarNotLessThanOrEqual:
+ case NI_SSE2_CompareNotLessThanOrEqual:
+ case NI_SSE2_CompareScalarNotLessThanOrEqual:
+ case NI_AVX_CompareNotLessThanOrEqual:
+ {
+ return static_cast(FloatComparisonMode::UnorderedNotLessThanOrEqualSignaling);
+ }
+
+ case NI_SSE_CompareOrdered:
+ case NI_SSE_CompareScalarOrdered:
+ case NI_SSE2_CompareOrdered:
+ case NI_SSE2_CompareScalarOrdered:
+ case NI_AVX_CompareOrdered:
+ {
+ return static_cast(FloatComparisonMode::OrderedNonSignaling);
+ }
+
+ case NI_SSE_CompareUnordered:
+ case NI_SSE_CompareScalarUnordered:
+ case NI_SSE2_CompareUnordered:
+ case NI_SSE2_CompareScalarUnordered:
+ case NI_AVX_CompareUnordered:
+ {
+ return static_cast(FloatComparisonMode::UnorderedNonSignaling);
+ }
+
+ case NI_SSE41_Ceiling:
+ case NI_SSE41_CeilingScalar:
+ case NI_SSE41_RoundToPositiveInfinity:
+ case NI_SSE41_RoundToPositiveInfinityScalar:
+ case NI_AVX_Ceiling:
+ case NI_AVX_RoundToPositiveInfinity:
+ {
+ return static_cast(FloatRoundingMode::ToPositiveInfinity);
+ }
+
+ case NI_SSE41_Floor:
+ case NI_SSE41_FloorScalar:
+ case NI_SSE41_RoundToNegativeInfinity:
+ case NI_SSE41_RoundToNegativeInfinityScalar:
+ case NI_AVX_Floor:
+ case NI_AVX_RoundToNegativeInfinity:
+ {
+ return static_cast(FloatRoundingMode::ToNegativeInfinity);
+ }
+
+ case NI_SSE41_RoundCurrentDirection:
+ case NI_SSE41_RoundCurrentDirectionScalar:
+ case NI_AVX_RoundCurrentDirection:
+ {
+ return static_cast(FloatRoundingMode::CurrentDirection);
+ }
+
+ case NI_SSE41_RoundToNearestInteger:
+ case NI_SSE41_RoundToNearestIntegerScalar:
+ case NI_AVX_RoundToNearestInteger:
+ {
+ return static_cast(FloatRoundingMode::ToNearestInteger);
+ }
+
+ case NI_SSE41_RoundToZero:
+ case NI_SSE41_RoundToZeroScalar:
+ case NI_AVX_RoundToZero:
+ {
+ return static_cast(FloatRoundingMode::ToZero);
+ }
+
+ default:
+ {
+ return -1;
+ }
+ }
}
+#endif
- static unsigned lookupSimdSize(NamedIntrinsic id)
+ static bool tryLookupSimdSize(NamedIntrinsic id, unsigned* pSimdSize)
{
- return lookup(id).simdSize;
+ bool succeeded = false;
+ if (lookup(id).simdSize != -1)
+ {
+ *pSimdSize = lookup(id).simdSize;
+ succeeded = true;
+ }
+ return succeeded;
}
static int lookupNumArgs(NamedIntrinsic id)
@@ -224,12 +567,6 @@ struct HWIntrinsicInfo
return (flags & HW_Flag_NoCodeGen) == 0;
}
- static bool HasFixedSimdSize(NamedIntrinsic id)
- {
- HWIntrinsicFlag flags = lookupFlags(id);
- return (flags & HW_Flag_UnfixedSIMDSize) == 0;
- }
-
static bool GeneratesMultipleIns(NamedIntrinsic id)
{
HWIntrinsicFlag flags = lookupFlags(id);
@@ -239,13 +576,13 @@ struct HWIntrinsicInfo
static bool SupportsContainment(NamedIntrinsic id)
{
HWIntrinsicFlag flags = lookupFlags(id);
+#if defined(TARGET_XARCH)
return (flags & HW_Flag_NoContainment) == 0;
- }
-
- static bool CopiesUpperBits(NamedIntrinsic id)
- {
- HWIntrinsicFlag flags = lookupFlags(id);
- return (flags & HW_Flag_CopyUpperBits) != 0;
+#elif defined(TARGET_ARM64)
+ return (flags & HW_Flag_SupportsContainment) != 0;
+#else
+#error Unsupported platform
+#endif
}
static bool BaseTypeFromFirstArg(NamedIntrinsic id)
@@ -266,6 +603,13 @@ struct HWIntrinsicInfo
return (flags & HW_Flag_MaybeIMM) != 0;
}
+#ifdef TARGET_XARCH
+ static bool CopiesUpperBits(NamedIntrinsic id)
+ {
+ HWIntrinsicFlag flags = lookupFlags(id);
+ return (flags & HW_Flag_CopyUpperBits) != 0;
+ }
+
static bool MaybeMemoryLoad(NamedIntrinsic id)
{
HWIntrinsicFlag flags = lookupFlags(id);
@@ -277,6 +621,7 @@ struct HWIntrinsicInfo
HWIntrinsicFlag flags = lookupFlags(id);
return (flags & HW_Flag_MaybeMemoryStore) != 0;
}
+#endif
static bool NoJmpTableImm(NamedIntrinsic id)
{
@@ -315,6 +660,104 @@ struct HWIntrinsicInfo
}
};
+#ifdef TARGET_ARM64
+
+struct HWIntrinsic final
+{
+ HWIntrinsic(const GenTreeHWIntrinsic* node)
+ : op1(nullptr), op2(nullptr), op3(nullptr), numOperands(0), baseType(TYP_UNDEF)
+ {
+ assert(node != nullptr);
+
+ id = node->gtHWIntrinsicId;
+ category = HWIntrinsicInfo::lookupCategory(id);
+
+ assert(HWIntrinsicInfo::RequiresCodegen(id));
+
+ InitializeOperands(node);
+ InitializeBaseType(node);
+ }
+
+ bool IsTableDriven() const
+ {
+ // TODO-Arm64-Cleanup - make more categories to the table-driven framework
+ bool isTableDrivenCategory = category != HW_Category_Helper;
+ bool isTableDrivenFlag = !HWIntrinsicInfo::GeneratesMultipleIns(id) && !HWIntrinsicInfo::HasSpecialCodegen(id);
+
+ return isTableDrivenCategory && isTableDrivenFlag;
+ }
+
+ NamedIntrinsic id;
+ HWIntrinsicCategory category;
+ GenTree* op1;
+ GenTree* op2;
+ GenTree* op3;
+ int numOperands;
+ var_types baseType;
+
+private:
+ void InitializeOperands(const GenTreeHWIntrinsic* node)
+ {
+ op1 = node->gtGetOp1();
+ op2 = node->gtGetOp2();
+
+ if (op1 == nullptr)
+ {
+ numOperands = 0;
+ }
+ else if (op1->OperIsList())
+ {
+ assert(op2 == nullptr);
+
+ GenTreeArgList* list = op1->AsArgList();
+ op1 = list->Current();
+ list = list->Rest();
+ op2 = list->Current();
+ list = list->Rest();
+ op3 = list->Current();
+
+ assert(list->Rest() == nullptr);
+
+ numOperands = 3;
+ }
+ else if (op2 != nullptr)
+ {
+ numOperands = 2;
+ }
+ else
+ {
+ numOperands = 1;
+ }
+ }
+
+ void InitializeBaseType(const GenTreeHWIntrinsic* node)
+ {
+ baseType = node->gtSIMDBaseType;
+
+ if (baseType == TYP_UNKNOWN)
+ {
+ assert(category == HW_Category_Scalar);
+
+ if (HWIntrinsicInfo::BaseTypeFromFirstArg(id))
+ {
+ assert(op1 != nullptr);
+ baseType = op1->TypeGet();
+ }
+ else if (HWIntrinsicInfo::BaseTypeFromSecondArg(id))
+ {
+ assert(op2 != nullptr);
+ baseType = op2->TypeGet();
+ }
+ else
+ {
+ baseType = node->TypeGet();
+ }
+ }
+ }
+};
+
+#endif // TARGET_ARM64
+
#endif // FEATURE_HW_INTRINSICS
#endif // _HW_INTRINSIC_H_
diff --git a/src/coreclr/src/jit/hwintrinsicarm64.cpp b/src/coreclr/src/jit/hwintrinsicarm64.cpp
index 7f494ab96582f5..dc7bbcab49f049 100644
--- a/src/coreclr/src/jit/hwintrinsicarm64.cpp
+++ b/src/coreclr/src/jit/hwintrinsicarm64.cpp
@@ -114,37 +114,6 @@ CORINFO_InstructionSet HWIntrinsicInfo::lookupIsa(const char* className, const c
}
}
-//------------------------------------------------------------------------
-// lookupImmUpperBound: Gets the upper bound for the imm-value of a given NamedIntrinsic
-//
-// Arguments:
-// id -- The NamedIntrinsic associated with the HWIntrinsic to lookup
-//
-// Return Value:
-// The upper bound for the imm-value of the intrinsic associated with id
-//
-int HWIntrinsicInfo::lookupImmUpperBound(NamedIntrinsic id)
-{
- assert(HWIntrinsicInfo::HasFullRangeImm(id));
- return 255;
-}
-
-//------------------------------------------------------------------------
-// isInImmRange: Check if ival is valid for the intrinsic
-//
-// Arguments:
-// id -- The NamedIntrinsic associated with the HWIntrinsic to lookup
-// ival -- the imm value to be checked
-//
-// Return Value:
-// true if ival is valid for the intrinsic
-//
-bool HWIntrinsicInfo::isInImmRange(NamedIntrinsic id, int ival)
-{
- assert(HWIntrinsicInfo::lookupCategory(id) == HW_Category_IMM);
- return ival <= lookupImmUpperBound(id) && ival >= 0;
-}
-
//------------------------------------------------------------------------
// isFullyImplementedIsa: Gets a value that indicates whether the InstructionSet is fully implemented
//
@@ -207,6 +176,138 @@ bool HWIntrinsicInfo::isScalarIsa(CORINFO_InstructionSet isa)
}
}
+//------------------------------------------------------------------------
+// lookupImmBounds: Gets the lower and upper bounds for the imm-value of a given NamedIntrinsic
+//
+// Arguments:
+// intrinsic -- NamedIntrinsic associated with the HWIntrinsic to lookup
+// simdType -- vector size
+// baseType -- base type of the Vector64/128
+// pImmLowerBound [OUT] - The lower incl. bound for a value of the intrinsic immediate operand
+// pImmUpperBound [OUT] - The upper incl. bound for a value of the intrinsic immediate operand
+//
+void HWIntrinsicInfo::lookupImmBounds(
+ NamedIntrinsic intrinsic, int simdSize, var_types baseType, int* pImmLowerBound, int* pImmUpperBound)
+{
+ assert(HWIntrinsicInfo::lookupCategory(intrinsic) == HW_Category_IMM);
+
+ assert(pImmLowerBound != nullptr);
+ assert(pImmUpperBound != nullptr);
+
+ int immLowerBound = 0;
+ int immUpperBound = 0;
+
+ if (HWIntrinsicInfo::HasFullRangeImm(intrinsic))
+ {
+ immUpperBound = 255;
+ }
+ else
+ {
+ switch (intrinsic)
+ {
+ case NI_AdvSimd_DuplicateSelectedScalarToVector64:
+ case NI_AdvSimd_DuplicateSelectedScalarToVector128:
+ case NI_AdvSimd_Extract:
+ case NI_AdvSimd_ExtractVector128:
+ case NI_AdvSimd_ExtractVector64:
+ case NI_AdvSimd_Insert:
+ case NI_AdvSimd_Arm64_DuplicateSelectedScalarToVector128:
+ case NI_Vector64_GetElement:
+ case NI_Vector128_GetElement:
+ immUpperBound = Compiler::getSIMDVectorLength(simdSize, baseType) - 1;
+ break;
+
+ case NI_AdvSimd_ShiftLeftLogical:
+ case NI_AdvSimd_ShiftLeftLogicalSaturate:
+ case NI_AdvSimd_ShiftLeftLogicalSaturateScalar:
+ case NI_AdvSimd_ShiftLeftLogicalSaturateUnsigned:
+ case NI_AdvSimd_ShiftLeftLogicalSaturateUnsignedScalar:
+ case NI_AdvSimd_ShiftLeftLogicalScalar:
+ case NI_AdvSimd_ShiftLeftLogicalWideningLower:
+ case NI_AdvSimd_ShiftLeftLogicalWideningUpper:
+ case NI_AdvSimd_Arm64_ShiftLeftLogicalSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftLeftLogicalSaturateUnsignedScalar:
+ // The left shift amount is in the range 0 to the element width in bits minus 1.
+ immUpperBound = BITS_PER_BYTE * genTypeSize(baseType) - 1;
+ break;
+
+ case NI_AdvSimd_ShiftRightArithmetic:
+ case NI_AdvSimd_ShiftRightArithmeticAdd:
+ case NI_AdvSimd_ShiftRightArithmeticAddScalar:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateUnsignedLower:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateUnsignedUpper:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightArithmeticRounded:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedAdd:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedAddScalar:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateUnsignedLower:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateUnsignedUpper:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedScalar:
+ case NI_AdvSimd_ShiftRightArithmeticScalar:
+ case NI_AdvSimd_ShiftRightLogical:
+ case NI_AdvSimd_ShiftRightLogicalAdd:
+ case NI_AdvSimd_ShiftRightLogicalAddScalar:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingLower:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingUpper:
+ case NI_AdvSimd_ShiftRightLogicalRounded:
+ case NI_AdvSimd_ShiftRightLogicalRoundedAdd:
+ case NI_AdvSimd_ShiftRightLogicalRoundedAddScalar:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingLower:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingUpper:
+ case NI_AdvSimd_ShiftRightLogicalRoundedScalar:
+ case NI_AdvSimd_ShiftRightLogicalScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticNarrowingSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticNarrowingSaturateUnsignedScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticRoundedNarrowingSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticRoundedNarrowingSaturateUnsignedScalar:
+ case NI_AdvSimd_Arm64_ShiftRightLogicalNarrowingSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftRightLogicalRoundedNarrowingSaturateScalar:
+ // The right shift amount, in the range 1 to the element width in bits.
+ immLowerBound = 1;
+ immUpperBound = BITS_PER_BYTE * genTypeSize(baseType);
+ break;
+ default:
+ unreached();
+ }
+ }
+
+ assert(immLowerBound <= immUpperBound);
+
+ *pImmLowerBound = immLowerBound;
+ *pImmUpperBound = immUpperBound;
+}
+
+//------------------------------------------------------------------------
+// isInImmRange: Check if ival is valid for the intrinsic
+//
+// Arguments:
+// id -- the NamedIntrinsic associated with the HWIntrinsic to lookup
+// ival -- the imm value to be checked
+// simdType -- vector size
+// baseType -- base type of the Vector64/128
+//
+// Return Value:
+// true if ival is valid for the intrinsic
+//
+bool HWIntrinsicInfo::isInImmRange(NamedIntrinsic id, int ival, int simdSize, var_types baseType)
+{
+ assert(HWIntrinsicInfo::lookupCategory(id) == HW_Category_IMM);
+
+ int immLowerBound = 0;
+ int immUpperBound = 0;
+
+ lookupImmBounds(id, simdSize, baseType, &immLowerBound, &immUpperBound);
+
+ return (immLowerBound <= ival) && (ival <= immUpperBound);
+}
+
//------------------------------------------------------------------------
// impNonConstFallback: generate alternate code when the imm-arg is not a compile-time constant
//
@@ -230,7 +331,9 @@ GenTree* Compiler::impNonConstFallback(NamedIntrinsic intrinsic, var_types simdT
// intrinsic -- id of the intrinsic function.
// clsHnd -- class handle containing the intrinsic function.
// method -- method handle of the intrinsic function.
-// sig -- signature of the intrinsic call
+// sig -- signature of the intrinsic call.
+// baseType -- generic argument of the intrinsic.
+// retType -- return type of the intrinsic.
//
// Return Value:
// The GT_HWINTRINSIC node, or nullptr if not a supported intrinsic
@@ -238,50 +341,16 @@ GenTree* Compiler::impNonConstFallback(NamedIntrinsic intrinsic, var_types simdT
GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig)
+ CORINFO_SIG_INFO* sig,
+ var_types baseType,
+ var_types retType,
+ unsigned simdSize)
{
HWIntrinsicCategory category = HWIntrinsicInfo::lookupCategory(intrinsic);
int numArgs = sig->numArgs;
- var_types retType = JITtype2varType(sig->retType);
- var_types baseType = TYP_UNKNOWN;
-
- if ((retType == TYP_STRUCT) && featureSIMD)
- {
- unsigned int sizeBytes;
- baseType = getBaseTypeAndSizeOfSIMDType(sig->retTypeSigClass, &sizeBytes);
- retType = getSIMDTypeForSize(sizeBytes);
- assert(sizeBytes != 0);
- if (!varTypeIsArithmetic(baseType))
- {
- assert((intrinsic == NI_Vector64_AsByte) || (intrinsic == NI_Vector128_As));
- return nullptr;
- }
- }
-
- baseType = getBaseTypeFromArgIfNeeded(intrinsic, clsHnd, sig, baseType);
-
- if (baseType == TYP_UNKNOWN)
- {
- if (category != HW_Category_Scalar)
- {
- unsigned int sizeBytes;
- baseType = getBaseTypeAndSizeOfSIMDType(clsHnd, &sizeBytes);
- assert(sizeBytes != 0);
- }
- else
- {
- baseType = retType;
- }
- }
-
- if (!varTypeIsArithmetic(baseType))
- {
- return nullptr;
- }
-
- unsigned simdSize = HWIntrinsicInfo::lookupSimdSize(this, intrinsic, sig);
assert(numArgs >= 0);
+ assert(varTypeIsArithmetic(baseType));
GenTree* retNode = nullptr;
GenTree* op1 = nullptr;
@@ -325,6 +394,47 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
assert(retNode->gtType == getSIMDTypeForSize(getSIMDTypeSizeInBytes(sig->retTypeSigClass)));
break;
}
+
+ case NI_Vector64_Create:
+ case NI_Vector128_Create:
+ {
+ // We shouldn't handle this as an intrinsic if the
+ // respective ISAs have been disabled by the user.
+
+ if (!compExactlyDependsOn(InstructionSet_AdvSimd))
+ {
+ break;
+ }
+
+ if (sig->numArgs == 1)
+ {
+ op1 = impPopStack().val;
+ retNode = gtNewSimdHWIntrinsicNode(retType, op1, intrinsic, baseType, simdSize);
+ }
+ else if (sig->numArgs == 2)
+ {
+ op2 = impPopStack().val;
+ op1 = impPopStack().val;
+ retNode = gtNewSimdHWIntrinsicNode(retType, op1, op2, intrinsic, baseType, simdSize);
+ }
+ else
+ {
+ assert(sig->numArgs >= 3);
+
+ GenTreeArgList* tmp = nullptr;
+
+ for (unsigned i = 0; i < sig->numArgs; i++)
+ {
+ tmp = gtNewArgList(impPopStack().val);
+ tmp->gtOp2 = op1;
+ op1 = tmp;
+ }
+
+ retNode = gtNewSimdHWIntrinsicNode(retType, op1, intrinsic, baseType, simdSize);
+ }
+ break;
+ }
+
case NI_Vector64_get_Count:
case NI_Vector128_get_Count:
{
@@ -336,7 +446,17 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
retNode = countNode;
break;
}
+ case NI_Vector64_get_Zero:
+ case NI_Vector64_get_AllBitsSet:
+ case NI_Vector128_get_Zero:
+ case NI_Vector128_get_AllBitsSet:
+ {
+ assert(!sig->hasThis());
+ assert(numArgs == 0);
+ retNode = gtNewSimdHWIntrinsicNode(retType, intrinsic, baseType, simdSize);
+ break;
+ }
default:
{
return nullptr;
diff --git a/src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp
index 61139e2e6ab46a..179c1807e118a1 100644
--- a/src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp
+++ b/src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp
@@ -9,104 +9,167 @@
#ifdef FEATURE_HW_INTRINSICS
-#include "emit.h"
#include "codegen.h"
-#include "sideeffects.h"
-#include "lower.h"
-#include "gcinfo.h"
-#include "gcinfoencoder.h"
-struct HWIntrinsic final
+// HWIntrinsicImmOpHelper: constructs the helper class instance.
+// This also determines what type of "switch" table is being used (if an immediate operand is not constant) and do
+// some preparation work:
+//
+// a) If an immediate operand can be either 0 or 1, this creates .
+//
+// b) If an immediate operand can take any value in [0, upperBound), this extract a internal register from an
+// intrinsic node. The register will be later used to store computed branch target address.
+//
+// Arguments:
+// codeGen -- an instance of CodeGen class.
+// immOp -- an immediate operand of the intrinsic.
+// intrin -- a hardware intrinsic tree node.
+//
+// Note: This class is designed to be used in the following way
+// HWIntrinsicImmOpHelper helper(this, immOp, intrin);
+//
+// for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+// {
+// -- emit an instruction for a given value of helper.ImmValue()
+// }
+//
+// This allows to combine logic for cases when immOp->isContainedIntOrIImmed() is either true or false in a form
+// of a for-loop.
+//
+CodeGen::HWIntrinsicImmOpHelper::HWIntrinsicImmOpHelper(CodeGen* codeGen, GenTree* immOp, GenTreeHWIntrinsic* intrin)
+ : codeGen(codeGen), endLabel(nullptr), nonZeroLabel(nullptr), branchTargetReg(REG_NA)
{
- HWIntrinsic(const GenTreeHWIntrinsic* node)
- : op1(nullptr), op2(nullptr), op3(nullptr), numOperands(0), baseType(TYP_UNDEF)
- {
- assert(node != nullptr);
-
- id = node->gtHWIntrinsicId;
- category = HWIntrinsicInfo::lookupCategory(id);
-
- assert(HWIntrinsicInfo::RequiresCodegen(id));
+ assert(codeGen != nullptr);
+ assert(HWIntrinsicInfo::isImmOp(intrin->gtHWIntrinsicId, immOp));
- InitializeOperands(node);
- InitializeBaseType(node);
- }
-
- bool IsTableDriven() const
+ if (immOp->isContainedIntOrIImmed())
{
- // TODO-Arm64-Cleanup - make more categories to the table-driven framework
- bool isTableDrivenCategory = category != HW_Category_Helper;
- bool isTableDrivenFlag = !HWIntrinsicInfo::GeneratesMultipleIns(id) && !HWIntrinsicInfo::HasSpecialCodegen(id);
+ nonConstImmReg = REG_NA;
- return isTableDrivenCategory && isTableDrivenFlag;
+ immValue = (int)immOp->AsIntCon()->IconValue();
+ immLowerBound = immValue;
+ immUpperBound = immValue;
}
-
- NamedIntrinsic id;
- HWIntrinsicCategory category;
- GenTree* op1;
- GenTree* op2;
- GenTree* op3;
- int numOperands;
- var_types baseType;
-
-private:
- void InitializeOperands(const GenTreeHWIntrinsic* node)
+ else
{
- op1 = node->gtGetOp1();
- op2 = node->gtGetOp2();
+ HWIntrinsicInfo::lookupImmBounds(intrin->gtHWIntrinsicId, intrin->gtSIMDSize, intrin->gtSIMDBaseType,
+ &immLowerBound, &immUpperBound);
- assert(op1 != nullptr);
+ nonConstImmReg = immOp->GetRegNum();
+ immValue = immLowerBound;
- if (op1->OperIsList())
+ if (TestImmOpZeroOrOne())
{
- assert(op2 == nullptr);
+ nonZeroLabel = codeGen->genCreateTempLabel();
+ }
+ else
+ {
+ // At the moment, this helper supports only intrinsics that correspond to one machine instruction.
+ // If we ever encounter an intrinsic that is either lowered into multiple instructions or
+ // the number of instructions that correspond to each case is unknown apriori - we can extend support to
+ // these by
+ // using the same approach as in hwintrinsicxarch.cpp - adding an additional indirection level in form of a
+ // branch table.
+ assert(!HWIntrinsicInfo::GeneratesMultipleIns(intrin->gtHWIntrinsicId));
+ branchTargetReg = intrin->GetSingleTempReg();
+ }
- GenTreeArgList* list = op1->AsArgList();
- op1 = list->Current();
- list = list->Rest();
- op2 = list->Current();
- list = list->Rest();
- op3 = list->Current();
+ endLabel = codeGen->genCreateTempLabel();
+ }
+}
- assert(list->Rest() == nullptr);
+//------------------------------------------------------------------------
+// EmitBegin: emits the beginning of a "switch" table, no-op if an immediate operand is constant.
+//
+// Note: The function is called at the beginning of code generation and emits
+// a) If an immediate operand can be either 0 or 1
+//
+// cbnz , nonConstImmReg
+//
+// b) If an immediate operand can take any value in [0, upperBound) range
+//
+// adr branchTargetReg,
+// add branchTargetReg, branchTargetReg, nonConstImmReg, lsl #3
+// br branchTargetReg
+//
+// When an immediate operand is non constant this also defines right after the emitted code.
+//
+void CodeGen::HWIntrinsicImmOpHelper::EmitBegin()
+{
+ if (NonConstImmOp())
+ {
+ BasicBlock* beginLabel = codeGen->genCreateTempLabel();
- numOperands = 3;
- }
- else if (op2 != nullptr)
+ if (TestImmOpZeroOrOne())
{
- numOperands = 2;
+ GetEmitter()->emitIns_J_R(INS_cbnz, EA_4BYTE, nonZeroLabel, nonConstImmReg);
}
else
{
- numOperands = 1;
+ // Here we assume that each case consists of one arm64 instruction followed by "b endLabel".
+ // Since an arm64 instruction is 4 bytes, we branch to AddressOf(beginLabel) + (nonConstImmReg << 3).
+ GetEmitter()->emitIns_R_L(INS_adr, EA_8BYTE, beginLabel, branchTargetReg);
+ GetEmitter()->emitIns_R_R_R_I(INS_add, EA_8BYTE, branchTargetReg, branchTargetReg, nonConstImmReg, 3,
+ INS_OPTS_LSL);
+
+ // If the lower bound is non zero we need to adjust the branch target value by subtracting
+ // (immLowerBound << 3).
+ if (immLowerBound != 0)
+ {
+ GetEmitter()->emitIns_R_R_I(INS_sub, EA_8BYTE, branchTargetReg, branchTargetReg,
+ ((ssize_t)immLowerBound << 3));
+ }
+
+ GetEmitter()->emitIns_R(INS_br, EA_8BYTE, branchTargetReg);
}
+
+ codeGen->genDefineInlineTempLabel(beginLabel);
}
+}
- void InitializeBaseType(const GenTreeHWIntrinsic* node)
+//------------------------------------------------------------------------
+// EmitCaseEnd: emits the end of a "case", no-op if an immediate operand is constant.
+//
+// Note: The function is called at the end of each "case" (i.e. after an instruction has been emitted for a given
+// immediate value ImmValue())
+// and emits
+//
+// b
+//
+// After the last "case" this defines .
+//
+// If an immediate operand is either 0 or 1 it also defines after the first "case".
+//
+void CodeGen::HWIntrinsicImmOpHelper::EmitCaseEnd()
+{
+ assert(!Done());
+
+ if (NonConstImmOp())
{
- baseType = node->gtSIMDBaseType;
+ const bool isLastCase = (immValue == immUpperBound);
- if (baseType == TYP_UNKNOWN)
+ if (isLastCase)
+ {
+ codeGen->genDefineInlineTempLabel(endLabel);
+ }
+ else
{
- assert(category == HW_Category_Scalar);
+ GetEmitter()->emitIns_J(INS_b, endLabel);
- if (HWIntrinsicInfo::BaseTypeFromFirstArg(id))
+ if (TestImmOpZeroOrOne())
{
- assert(op1 != nullptr);
- baseType = op1->TypeGet();
- }
- else if (HWIntrinsicInfo::BaseTypeFromSecondArg(id))
- {
- assert(op2 != nullptr);
- baseType = op2->TypeGet();
+ codeGen->genDefineInlineTempLabel(nonZeroLabel);
}
else
{
- baseType = node->TypeGet();
+ BasicBlock* tempLabel = codeGen->genCreateTempLabel();
+ codeGen->genDefineInlineTempLabel(tempLabel);
}
}
}
-};
+
+ immValue++;
+}
//------------------------------------------------------------------------
// genHWIntrinsic: Generates the code for a given hardware intrinsic node.
@@ -141,6 +204,10 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
op1Reg = intrin.op1->GetRegNum();
break;
+ case 0:
+ assert(HWIntrinsicInfo::lookupNumArgs(intrin.id) == 0);
+ break;
+
default:
unreached();
}
@@ -148,13 +215,17 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
emitAttr emitSize;
insOpts opt = INS_OPTS_NONE;
- if ((intrin.category == HW_Category_SIMDScalar) || (intrin.category == HW_Category_Scalar))
+ if (intrin.category == HW_Category_SIMDScalar)
+ {
+ emitSize = emitTypeSize(intrin.baseType);
+ }
+ else if (intrin.category == HW_Category_Scalar)
{
emitSize = emitActualTypeSize(intrin.baseType);
}
else
{
- emitSize = EA_SIZE(node->gtSIMDSize);
+ emitSize = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
opt = genGetSimdInsOpt(emitSize, intrin.baseType);
if ((opt == INS_OPTS_1D) && (intrin.category == HW_Category_SimpleSIMD))
@@ -185,7 +256,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
if (targetReg != op1Reg)
{
- GetEmitter()->emitIns_R_R(INS_mov, emitSize, targetReg, op1Reg);
+ GetEmitter()->emitIns_R_R(INS_mov, emitTypeSize(node), targetReg, op1Reg);
}
GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op2Reg, opt);
}
@@ -202,8 +273,9 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
if (targetReg != op1Reg)
{
- GetEmitter()->emitIns_R_R(INS_mov, emitSize, targetReg, op1Reg);
+ GetEmitter()->emitIns_R_R(INS_mov, emitTypeSize(node), targetReg, op1Reg);
}
+
GetEmitter()->emitIns_R_R_R(ins, emitSize, targetReg, op2Reg, op3Reg, opt);
break;
@@ -214,7 +286,6 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
else
{
instruction ins = INS_invalid;
-
switch (intrin.id)
{
case NI_Crc32_ComputeCrc32:
@@ -249,6 +320,61 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
ins = INS_crc32cx;
break;
+ case NI_AdvSimd_AddWideningLower:
+ assert(varTypeIsIntegral(intrin.baseType));
+ if (intrin.op1->TypeGet() == TYP_SIMD8)
+ {
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_uaddl : INS_saddl;
+ }
+ else
+ {
+ assert(intrin.op1->TypeGet() == TYP_SIMD16);
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_uaddw : INS_saddw;
+ }
+ break;
+
+ case NI_AdvSimd_SubtractWideningLower:
+ assert(varTypeIsIntegral(intrin.baseType));
+ if (intrin.op1->TypeGet() == TYP_SIMD8)
+ {
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_usubl : INS_ssubl;
+ }
+ else
+ {
+ assert(intrin.op1->TypeGet() == TYP_SIMD16);
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_usubw : INS_ssubw;
+ }
+ break;
+
+ case NI_AdvSimd_AddWideningUpper:
+ assert(varTypeIsIntegral(intrin.baseType));
+ if (node->GetOtherBaseType() == intrin.baseType)
+ {
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_uaddl2 : INS_saddl2;
+ }
+ else
+ {
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_uaddw2 : INS_saddw2;
+ }
+ break;
+
+ case NI_AdvSimd_SubtractWideningUpper:
+ assert(varTypeIsIntegral(intrin.baseType));
+ if (node->GetOtherBaseType() == intrin.baseType)
+ {
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_usubl2 : INS_ssubl2;
+ }
+ else
+ {
+ ins = varTypeIsUnsigned(intrin.baseType) ? INS_usubw2 : INS_ssubw2;
+ }
+ break;
+
+ case NI_Aes_PolynomialMultiplyWideningLower:
+ ins = INS_pmull;
+ opt = INS_OPTS_1D;
+ break;
+
default:
ins = HWIntrinsicInfo::lookupIns(intrin.id, intrin.baseType);
break;
@@ -286,6 +412,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
case NI_Crc32_ComputeCrc32C:
case NI_Crc32_Arm64_ComputeCrc32:
case NI_Crc32_Arm64_ComputeCrc32C:
+ case NI_Aes_PolynomialMultiplyWideningLower:
GetEmitter()->emitIns_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, opt);
break;
@@ -319,6 +446,315 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
GetEmitter()->emitIns_R_R(ins, emitSize, op2Reg, op1Reg, opt);
break;
+ case NI_AdvSimd_DuplicateSelectedScalarToVector64:
+ case NI_AdvSimd_DuplicateSelectedScalarToVector128:
+ case NI_AdvSimd_Arm64_DuplicateSelectedScalarToVector128:
+ {
+ HWIntrinsicImmOpHelper helper(this, intrin.op2, node);
+
+ // Prior to codegen, the emitSize is based on node->gtSIMDSize which
+ // tracks the size of the first operand and is used to tell if the index
+ // is in range. However, when actually emitting it needs to be the size
+ // of the return and the size of the operand is interpreted based on the
+ // index value.
+
+ assert(
+ GetEmitter()->isValidVectorIndex(emitSize, GetEmitter()->optGetElemsize(opt), helper.ImmValue()));
+
+ emitSize = emitActualTypeSize(node->gtType);
+ opt = genGetSimdInsOpt(emitSize, intrin.baseType);
+
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int elementIndex = helper.ImmValue();
+
+ assert(opt != INS_OPTS_NONE);
+ GetEmitter()->emitIns_R_R_I(ins, emitSize, targetReg, op1Reg, elementIndex, opt);
+ }
+
+ break;
+ }
+
+ case NI_AdvSimd_Extract:
+ {
+ HWIntrinsicImmOpHelper helper(this, intrin.op2, node);
+
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int elementIndex = helper.ImmValue();
+
+ GetEmitter()->emitIns_R_R_I(ins, emitTypeSize(intrin.baseType), targetReg, op1Reg, elementIndex,
+ INS_OPTS_NONE);
+ }
+ }
+ break;
+
+ case NI_AdvSimd_ExtractVector64:
+ case NI_AdvSimd_ExtractVector128:
+ {
+ opt = (intrin.id == NI_AdvSimd_ExtractVector64) ? INS_OPTS_8B : INS_OPTS_16B;
+
+ HWIntrinsicImmOpHelper helper(this, intrin.op3, node);
+
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int elementIndex = helper.ImmValue();
+ const int byteIndex = genTypeSize(intrin.baseType) * elementIndex;
+
+ GetEmitter()->emitIns_R_R_R_I(ins, emitSize, targetReg, op1Reg, op2Reg, byteIndex, opt);
+ }
+ }
+ break;
+
+ case NI_AdvSimd_Insert:
+ assert(isRMW);
+ assert(targetReg != op3Reg);
+
+ if (targetReg != op1Reg)
+ {
+ GetEmitter()->emitIns_R_R(INS_mov, emitSize, targetReg, op1Reg);
+ }
+
+ if (intrin.op3->isContainedFltOrDblImmed())
+ {
+ assert(intrin.op2->isContainedIntOrIImmed());
+ assert(intrin.op2->AsIntCon()->gtIconVal == 0);
+
+ const double dataValue = intrin.op3->AsDblCon()->gtDconVal;
+ GetEmitter()->emitIns_R_F(INS_fmov, emitTypeSize(intrin.baseType), targetReg, dataValue,
+ INS_OPTS_NONE);
+ }
+ else
+ {
+ HWIntrinsicImmOpHelper helper(this, intrin.op2, node);
+
+ if (varTypeIsFloating(intrin.baseType))
+ {
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int elementIndex = helper.ImmValue();
+
+ GetEmitter()->emitIns_R_R_I_I(ins, emitTypeSize(intrin.baseType), targetReg, op3Reg,
+ elementIndex, 0, INS_OPTS_NONE);
+ }
+ }
+ else
+ {
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int elementIndex = helper.ImmValue();
+
+ GetEmitter()->emitIns_R_R_I(ins, emitTypeSize(intrin.baseType), targetReg, op3Reg,
+ elementIndex, INS_OPTS_NONE);
+ }
+ }
+ }
+ break;
+
+ case NI_Vector64_CreateScalarUnsafe:
+ case NI_Vector128_CreateScalarUnsafe:
+ if (intrin.op1->isContainedFltOrDblImmed())
+ {
+ // fmov reg, #imm8
+ const double dataValue = intrin.op1->AsDblCon()->gtDconVal;
+ GetEmitter()->emitIns_R_F(ins, emitTypeSize(intrin.baseType), targetReg, dataValue, INS_OPTS_NONE);
+ }
+ else if (varTypeIsFloating(intrin.baseType))
+ {
+ // fmov reg1, reg2
+ GetEmitter()->emitIns_R_R(ins, emitTypeSize(intrin.baseType), targetReg, op1Reg, INS_OPTS_NONE);
+ }
+ else
+ {
+ if (intrin.op1->isContainedIntOrIImmed())
+ {
+ // movi/movni reg, #imm8
+ const ssize_t dataValue = intrin.op1->AsIntCon()->gtIconVal;
+ GetEmitter()->emitIns_R_I(INS_movi, emitSize, targetReg, dataValue, opt);
+ }
+ else
+ {
+ // ins reg1[0], reg2
+ GetEmitter()->emitIns_R_R_I(ins, emitTypeSize(intrin.baseType), targetReg, op1Reg, 0,
+ INS_OPTS_NONE);
+ }
+ }
+ break;
+
+ case NI_AdvSimd_AddWideningLower:
+ case NI_AdvSimd_AddWideningUpper:
+ case NI_AdvSimd_SubtractWideningLower:
+ case NI_AdvSimd_SubtractWideningUpper:
+ GetEmitter()->emitIns_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, opt);
+ break;
+
+ // mvni doesn't support the range of element types, so hard code the 'opts' value.
+ case NI_Vector64_get_Zero:
+ case NI_Vector64_get_AllBitsSet:
+ GetEmitter()->emitIns_R_I(ins, emitSize, targetReg, 0, INS_OPTS_2S);
+ break;
+
+ case NI_Vector128_get_Zero:
+ case NI_Vector128_get_AllBitsSet:
+ GetEmitter()->emitIns_R_I(ins, emitSize, targetReg, 0, INS_OPTS_4S);
+ break;
+
+ case NI_AdvSimd_DuplicateToVector64:
+ case NI_AdvSimd_DuplicateToVector128:
+ case NI_AdvSimd_Arm64_DuplicateToVector64:
+ case NI_AdvSimd_Arm64_DuplicateToVector128:
+ {
+ if (varTypeIsFloating(intrin.baseType))
+ {
+ if (intrin.op1->isContainedFltOrDblImmed())
+ {
+ const double dataValue = intrin.op1->AsDblCon()->gtDconVal;
+ GetEmitter()->emitIns_R_F(INS_fmov, emitSize, targetReg, dataValue, opt);
+ }
+ else if (intrin.id == NI_AdvSimd_Arm64_DuplicateToVector64)
+ {
+ assert(intrin.baseType == TYP_DOUBLE);
+ GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg, opt);
+ }
+ else
+ {
+ GetEmitter()->emitIns_R_R_I(ins, emitSize, targetReg, op1Reg, 0, opt);
+ }
+ }
+ else if (intrin.op1->isContainedIntOrIImmed())
+ {
+ const ssize_t dataValue = intrin.op1->AsIntCon()->gtIconVal;
+ GetEmitter()->emitIns_R_I(INS_movi, emitSize, targetReg, dataValue, opt);
+ }
+ else
+ {
+ GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg, opt);
+ }
+ }
+ break;
+
+ case NI_Vector64_ToVector128:
+ GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg);
+ break;
+
+ case NI_Vector64_ToVector128Unsafe:
+ case NI_Vector128_GetLower:
+ if (op1Reg != targetReg)
+ {
+ GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg);
+ }
+ break;
+
+ case NI_Vector64_GetElement:
+ case NI_Vector128_GetElement:
+ case NI_Vector64_ToScalar:
+ case NI_Vector128_ToScalar:
+ {
+ ssize_t indexValue = 0;
+ if ((intrin.id == NI_Vector64_GetElement) || (intrin.id == NI_Vector128_GetElement))
+ {
+ assert(intrin.op2->IsCnsIntOrI());
+ indexValue = intrin.op2->AsIntCon()->gtIconVal;
+ }
+
+ // no-op if vector is float/double, targetReg == op1Reg and fetching for 0th index.
+ if ((varTypeIsFloating(intrin.baseType) && (targetReg == op1Reg) && (indexValue == 0)))
+ {
+ break;
+ }
+
+ GetEmitter()->emitIns_R_R_I(ins, emitTypeSize(intrin.baseType), targetReg, op1Reg, indexValue,
+ INS_OPTS_NONE);
+ }
+ break;
+
+ case NI_AdvSimd_ShiftLeftLogicalSaturateScalar:
+ case NI_AdvSimd_ShiftLeftLogicalSaturateUnsignedScalar:
+ case NI_AdvSimd_ShiftLeftLogicalScalar:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedScalar:
+ case NI_AdvSimd_ShiftRightArithmeticScalar:
+ case NI_AdvSimd_ShiftRightLogicalRoundedScalar:
+ case NI_AdvSimd_ShiftRightLogicalScalar:
+ case NI_AdvSimd_Arm64_ShiftLeftLogicalSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftLeftLogicalSaturateUnsignedScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticNarrowingSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticNarrowingSaturateUnsignedScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticRoundedNarrowingSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftRightArithmeticRoundedNarrowingSaturateUnsignedScalar:
+ case NI_AdvSimd_Arm64_ShiftRightLogicalNarrowingSaturateScalar:
+ case NI_AdvSimd_Arm64_ShiftRightLogicalRoundedNarrowingSaturateScalar:
+ opt = INS_OPTS_NONE;
+ emitSize = emitTypeSize(intrin.baseType);
+ __fallthrough;
+
+ case NI_AdvSimd_ShiftLeftLogical:
+ case NI_AdvSimd_ShiftLeftLogicalSaturate:
+ case NI_AdvSimd_ShiftLeftLogicalSaturateUnsigned:
+ case NI_AdvSimd_ShiftLeftLogicalWideningLower:
+ case NI_AdvSimd_ShiftLeftLogicalWideningUpper:
+ case NI_AdvSimd_ShiftRightArithmetic:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateUnsignedLower:
+ case NI_AdvSimd_ShiftRightArithmeticRounded:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateUnsignedLower:
+ case NI_AdvSimd_ShiftRightLogical:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingLower:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingSaturateLower:
+ case NI_AdvSimd_ShiftRightLogicalRounded:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingLower:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingSaturateLower:
+ {
+ HWIntrinsicImmOpHelper helper(this, intrin.op2, node);
+
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int shiftAmount = helper.ImmValue();
+
+ GetEmitter()->emitIns_R_R_I(ins, emitSize, targetReg, op1Reg, shiftAmount, opt);
+ }
+ }
+ break;
+
+ case NI_AdvSimd_ShiftRightArithmeticAddScalar:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedAddScalar:
+ case NI_AdvSimd_ShiftRightLogicalAddScalar:
+ case NI_AdvSimd_ShiftRightLogicalRoundedAddScalar:
+ opt = INS_OPTS_NONE;
+ emitSize = emitTypeSize(intrin.baseType);
+ __fallthrough;
+
+ case NI_AdvSimd_ShiftRightArithmeticAdd:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateUnsignedUpper:
+ case NI_AdvSimd_ShiftRightArithmeticNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedAdd:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateUnsignedUpper:
+ case NI_AdvSimd_ShiftRightArithmeticRoundedNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightLogicalAdd:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightLogicalNarrowingUpper:
+ case NI_AdvSimd_ShiftRightLogicalRoundedAdd:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingSaturateUpper:
+ case NI_AdvSimd_ShiftRightLogicalRoundedNarrowingUpper:
+ {
+ assert(isRMW);
+
+ if (targetReg != op1Reg)
+ {
+ GetEmitter()->emitIns_R_R(INS_mov, emitTypeSize(node), targetReg, op1Reg);
+ }
+
+ HWIntrinsicImmOpHelper helper(this, intrin.op3, node);
+
+ for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd())
+ {
+ const int shiftAmount = helper.ImmValue();
+
+ GetEmitter()->emitIns_R_R_I(ins, emitSize, targetReg, op2Reg, shiftAmount, opt);
+ }
+ }
+ break;
+
default:
unreached();
}
diff --git a/src/coreclr/src/jit/hwintrinsiccodegenxarch.cpp b/src/coreclr/src/jit/hwintrinsiccodegenxarch.cpp
index 0f72d43822d7d5..2b6336d2cecd80 100644
--- a/src/coreclr/src/jit/hwintrinsiccodegenxarch.cpp
+++ b/src/coreclr/src/jit/hwintrinsiccodegenxarch.cpp
@@ -82,9 +82,10 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
NamedIntrinsic intrinsicId = node->gtHWIntrinsicId;
CORINFO_InstructionSet isa = HWIntrinsicInfo::lookupIsa(intrinsicId);
HWIntrinsicCategory category = HWIntrinsicInfo::lookupCategory(intrinsicId);
- int ival = HWIntrinsicInfo::lookupIval(intrinsicId);
int numArgs = HWIntrinsicInfo::lookupNumArgs(node);
+ int ival = HWIntrinsicInfo::lookupIval(intrinsicId, compiler->compOpportunisticallyDependsOn(InstructionSet_AVX));
+
assert(HWIntrinsicInfo::RequiresCodegen(intrinsicId));
if (genIsTableDrivenHWIntrinsic(intrinsicId, category))
@@ -102,7 +103,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
assert(numArgs >= 0);
instruction ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType);
assert(ins != INS_invalid);
- emitAttr simdSize = EA_ATTR(node->gtSIMDSize);
+ emitAttr simdSize = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
assert(simdSize != 0);
switch (numArgs)
@@ -254,11 +255,11 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
}
else if (node->TypeGet() == TYP_VOID)
{
- genHWIntrinsic_R_RM(node, ins, EA_ATTR(node->gtSIMDSize), op1Reg, op2);
+ genHWIntrinsic_R_RM(node, ins, simdSize, op1Reg, op2);
}
else
{
- genHWIntrinsic_R_R_RM(node, ins, EA_ATTR(node->gtSIMDSize));
+ genHWIntrinsic_R_R_RM(node, ins, simdSize);
}
break;
}
@@ -359,6 +360,10 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
case InstructionSet_Vector256:
genBaseIntrinsic(node);
break;
+ case InstructionSet_X86Base:
+ case InstructionSet_X86Base_X64:
+ genX86BaseIntrinsic(node);
+ break;
case InstructionSet_SSE:
case InstructionSet_SSE_X64:
genSSEIntrinsic(node);
@@ -546,7 +551,7 @@ void CodeGen::genHWIntrinsic_R_RM_I(GenTreeHWIntrinsic* node, instruction ins, i
var_types targetType = node->TypeGet();
regNumber targetReg = node->GetRegNum();
GenTree* op1 = node->gtGetOp1();
- emitAttr simdSize = EA_ATTR(node->gtSIMDSize);
+ emitAttr simdSize = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
emitter* emit = GetEmitter();
// TODO-XArch-CQ: Commutative operations can have op1 be contained
@@ -628,7 +633,7 @@ void CodeGen::genHWIntrinsic_R_R_RM_I(GenTreeHWIntrinsic* node, instruction ins,
regNumber targetReg = node->GetRegNum();
GenTree* op1 = node->gtGetOp1();
GenTree* op2 = node->gtGetOp2();
- emitAttr simdSize = EA_ATTR(node->gtSIMDSize);
+ emitAttr simdSize = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
emitter* emit = GetEmitter();
// TODO-XArch-CQ: Commutative operations can have op1 be contained
@@ -792,7 +797,7 @@ void CodeGen::genHWIntrinsic_R_R_RM_R(GenTreeHWIntrinsic* node, instruction ins)
GenTree* op1 = node->gtGetOp1();
GenTree* op2 = node->gtGetOp2();
GenTree* op3 = nullptr;
- emitAttr simdSize = EA_ATTR(node->gtSIMDSize);
+ emitAttr simdSize = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
emitter* emit = GetEmitter();
assert(op1->OperIsList());
@@ -1146,7 +1151,7 @@ void CodeGen::genBaseIntrinsic(GenTreeHWIntrinsic* node)
assert(node->gtGetOp2() == nullptr);
emitter* emit = GetEmitter();
- emitAttr attr = EA_ATTR(node->gtSIMDSize);
+ emitAttr attr = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
instruction ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType);
switch (intrinsicId)
@@ -1231,14 +1236,32 @@ void CodeGen::genBaseIntrinsic(GenTreeHWIntrinsic* node)
break;
}
- case NI_Vector128_Zero:
- case NI_Vector256_Zero:
+ case NI_Vector128_get_Zero:
+ case NI_Vector256_get_Zero:
{
assert(op1 == nullptr);
emit->emitIns_SIMD_R_R_R(ins, attr, targetReg, targetReg, targetReg);
break;
}
+ case NI_Vector128_get_AllBitsSet:
+ case NI_Vector256_get_AllBitsSet:
+ {
+ assert(op1 == nullptr);
+ if (varTypeIsFloating(baseType) && compiler->compOpportunisticallyDependsOn(InstructionSet_AVX))
+ {
+ // The immediate 8 means Equal (unordered, non-signaling)
+ // This is not available without VEX prefix.
+ emit->emitIns_SIMD_R_R_R_I(ins, attr, targetReg, targetReg, targetReg, 8);
+ }
+ else
+ {
+ assert(varTypeIsIntegral(baseType) || !compiler->compIsaSupportedDebugOnly(InstructionSet_AVX));
+ emit->emitIns_SIMD_R_R_R(INS_pcmpeqd, attr, targetReg, targetReg, targetReg);
+ }
+ break;
+ }
+
default:
{
unreached();
@@ -1249,6 +1272,40 @@ void CodeGen::genBaseIntrinsic(GenTreeHWIntrinsic* node)
genProduceReg(node);
}
+//------------------------------------------------------------------------
+// genX86BaseIntrinsic: Generates the code for an X86 base hardware intrinsic node
+//
+// Arguments:
+// node - The hardware intrinsic node
+//
+void CodeGen::genX86BaseIntrinsic(GenTreeHWIntrinsic* node)
+{
+ NamedIntrinsic intrinsicId = node->gtHWIntrinsicId;
+
+ switch (intrinsicId)
+ {
+ case NI_X86Base_BitScanForward:
+ case NI_X86Base_BitScanReverse:
+ case NI_X86Base_X64_BitScanForward:
+ case NI_X86Base_X64_BitScanReverse:
+ {
+ GenTree* op1 = node->gtGetOp1();
+ regNumber targetReg = node->GetRegNum();
+ var_types targetType = node->TypeGet();
+ instruction ins = HWIntrinsicInfo::lookupIns(intrinsicId, targetType);
+
+ genConsumeOperands(node);
+ genHWIntrinsic_R_RM(node, ins, emitTypeSize(targetType), targetReg, op1);
+ genProduceReg(node);
+ break;
+ }
+
+ default:
+ unreached();
+ break;
+ }
+}
+
//------------------------------------------------------------------------
// genSSEIntrinsic: Generates the code for an SSE hardware intrinsic node
//
@@ -1352,25 +1409,6 @@ void CodeGen::genSSE2Intrinsic(GenTreeHWIntrinsic* node)
switch (intrinsicId)
{
- // All integer overloads are handled by table codegen
- case NI_SSE2_CompareLessThan:
- {
- assert(op1 != nullptr);
- assert(op2 != nullptr);
-
- assert(baseType == TYP_DOUBLE);
-
- int ival = HWIntrinsicInfo::lookupIval(intrinsicId);
- assert((ival >= 0) && (ival <= 127));
-
- instruction ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType);
- op1Reg = op1->GetRegNum();
- op2Reg = op2->GetRegNum();
- emit->emitIns_SIMD_R_R_R_I(ins, emitTypeSize(TYP_SIMD16), targetReg, op1Reg, op2Reg, ival);
-
- break;
- }
-
case NI_SSE2_X64_ConvertScalarToVector128Double:
{
assert(baseType == TYP_LONG);
@@ -1621,7 +1659,7 @@ void CodeGen::genAvxOrAvx2Intrinsic(GenTreeHWIntrinsic* node)
{
NamedIntrinsic intrinsicId = node->gtHWIntrinsicId;
var_types baseType = node->gtSIMDBaseType;
- emitAttr attr = EA_ATTR(node->gtSIMDSize);
+ emitAttr attr = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
var_types targetType = node->TypeGet();
instruction ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType);
int numArgs = HWIntrinsicInfo::lookupNumArgs(node);
@@ -1731,7 +1769,7 @@ void CodeGen::genAvxOrAvx2Intrinsic(GenTreeHWIntrinsic* node)
bool isVector128GatherWithVector256Index = (targetType == TYP_SIMD16) && (indexOp->TypeGet() == TYP_SIMD32);
// hwintrinsiclistxarch.h uses Dword index instructions in default
- if (varTypeIsLong(node->gtIndexBaseType))
+ if (varTypeIsLong(node->GetOtherBaseType()))
{
switch (ins)
{
@@ -1934,7 +1972,7 @@ void CodeGen::genFMAIntrinsic(GenTreeHWIntrinsic* node)
{
NamedIntrinsic intrinsicId = node->gtHWIntrinsicId;
var_types baseType = node->gtSIMDBaseType;
- emitAttr attr = EA_ATTR(node->gtSIMDSize);
+ emitAttr attr = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->gtSIMDSize));
instruction ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType);
GenTree* op1 = node->gtGetOp1();
regNumber targetReg = node->GetRegNum();
@@ -1960,16 +1998,7 @@ void CodeGen::genFMAIntrinsic(GenTreeHWIntrinsic* node)
// Intrinsics with CopyUpperBits semantics cannot have op1 be contained
assert(!copiesUpperBits || !op1->isContained());
- if (op3->isContained() || op3->isUsedFromSpillTemp())
- {
- // 213 form: op1 = (op2 * op1) + [op3]
-
- op1Reg = op1->GetRegNum();
- op2Reg = op2->GetRegNum();
-
- isCommutative = !copiesUpperBits;
- }
- else if (op2->isContained() || op2->isUsedFromSpillTemp())
+ if (op2->isContained() || op2->isUsedFromSpillTemp())
{
// 132 form: op1 = (op1 * op3) + [op2]
@@ -1989,7 +2018,7 @@ void CodeGen::genFMAIntrinsic(GenTreeHWIntrinsic* node)
}
else
{
- // 213 form: op1 = (op2 * op1) + op3
+ // 213 form: op1 = (op2 * op1) + [op3]
op1Reg = op1->GetRegNum();
op2Reg = op2->GetRegNum();
diff --git a/src/coreclr/src/jit/hwintrinsiclistarm64.h b/src/coreclr/src/jit/hwintrinsiclistarm64.h
index b314a5e2e4ab9c..be8a0d552da75e 100644
--- a/src/coreclr/src/jit/hwintrinsiclistarm64.h
+++ b/src/coreclr/src/jit/hwintrinsiclistarm64.h
@@ -12,246 +12,393 @@
#ifdef FEATURE_HW_INTRINSICS
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Vector64 Intrinsics
-HARDWARE_INTRINSIC(Vector64, AsByte, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, AsInt16, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, AsInt32, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, AsSByte, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, AsSingle, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, AsUInt16, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, AsUInt32, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector64, get_Count, -1, 8, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector64, AsByte, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, AsInt16, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, AsInt32, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, AsSByte, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, AsSingle, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, AsUInt16, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, AsUInt32, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, Create, 8, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov, INS_mov, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector64, CreateScalarUnsafe, 8, 1, {INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_invalid, INS_invalid, INS_fmov, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector64, get_AllBitsSet, 8, 0, {INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector64, get_Count, 8, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector64, get_Zero, 8, 0, {INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector64, GetElement, 8, 2, {INS_smov, INS_umov, INS_smov, INS_umov, INS_smov, INS_umov, INS_umov, INS_umov, INS_dup, INS_dup}, HW_Category_IMM, HW_Flag_NoJmpTableIMM|HW_Flag_SupportsContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector64, op_Equality, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector64, op_Inequality, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector64, ToScalar, 8, 1, {INS_smov, INS_umov, INS_smov, INS_umov, INS_smov, INS_umov, INS_umov, INS_umov, INS_dup, INS_dup}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector64, ToVector128, 8, 1, {INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector64, ToVector128Unsafe, 8, 1, {INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Vector128 Intrinsics
-HARDWARE_INTRINSIC(Vector128, As, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsByte, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsDouble, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsInt16, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsInt32, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsInt64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsSByte, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsSingle, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsUInt16, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsUInt32, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, AsUInt64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128, get_Count, -1, 16, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, As, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsByte, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsDouble, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsInt16, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsSByte, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsSingle, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsUInt16, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsUInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, AsUInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, Create, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, CreateScalarUnsafe, 16, 1, {INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_fmov, INS_fmov}, HW_Category_SimpleSIMD, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector128, get_AllBitsSet, 16, 0, {INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni, INS_mvni}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector128, get_Count, 16, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, get_Zero, 16, 0, {INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi, INS_movi}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector128, GetElement, 16, 2, {INS_smov, INS_umov, INS_smov, INS_umov, INS_smov, INS_umov, INS_umov, INS_umov, INS_dup, INS_dup}, HW_Category_IMM, HW_Flag_NoJmpTableIMM|HW_Flag_SupportsContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector128, GetLower, 16, 1, {INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov, INS_mov}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(Vector128, op_Equality, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, op_Inequality, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, ToScalar, 16, 1, {INS_smov, INS_umov, INS_smov, INS_umov, INS_smov, INS_umov, INS_umov, INS_umov, INS_dup, INS_dup}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// AdvSimd Intrinsics
-HARDWARE_INTRINSIC(AdvSimd, Abs, -1, -1, 1, {INS_abs, INS_invalid, INS_abs, INS_invalid, INS_abs, INS_invalid, INS_invalid, INS_invalid, INS_fabs, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AdvSimd, AbsScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fabs, INS_fabs}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareGreaterThan, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareGreaterThanOrEqual, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareLessThan, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareLessThanOrEqual, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifference, -1, -1, 2, {INS_sabd, INS_uabd, INS_sabd, INS_uabd, INS_sabd, INS_uabd, INS_invalid, INS_invalid, INS_fabd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifferenceAdd, -1, -1, 3, {INS_saba, INS_uaba, INS_saba, INS_uaba, INS_saba, INS_uaba, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd, Add, -1, -1, 2, {INS_add, INS_add, INS_add, INS_add, INS_add, INS_add, INS_add, INS_add, INS_fadd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, AddPairwise, -1, 8, 2, {INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_invalid, INS_invalid, INS_faddp, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, AddScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_add, INS_add, INS_fadd, INS_fadd}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, And, -1, -1, 2, {INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, BitwiseClear, -1, -1, 2, {INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, BitwiseSelect, -1, -1, 3, {INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, CompareEqual, -1, -1, 2, {INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_invalid, INS_invalid, INS_fcmeq, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, CompareGreaterThan, -1, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, CompareGreaterThanOrEqual, -1, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, CompareLessThan, -1, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, CompareLessThanOrEqual, -1, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, CompareTest, -1, -1, 2, {INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_invalid, INS_invalid, INS_cmtst, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, DivideScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fdiv, INS_fdiv}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, ExtractAndNarrowLow, -1, 8, 1, {INS_xtn, INS_xtn, INS_xtn, INS_xtn, INS_xtn, INS_xtn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, ExtractAndNarrowHigh, -1, 16, 2, {INS_xtn2, INS_xtn2, INS_xtn2, INS_xtn2, INS_xtn2, INS_xtn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd, FusedMultiplyAdd, -1, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmla, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd, FusedMultiplyAddScalar, -1, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmadd, INS_fmadd}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, FusedMultiplyAddNegatedScalar, -1, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fnmadd, INS_fnmadd}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, FusedMultiplySubtract, -1, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmls, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd, FusedMultiplySubtractScalar, -1, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmsub, INS_fmsub}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, FusedMultiplySubtractNegatedScalar, -1, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fnmsub, INS_fnmsub}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd, LeadingSignCount, -1, -1, 1, {INS_cls, INS_invalid, INS_cls, INS_invalid, INS_cls, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, LeadingZeroCount, -1, -1, 1, {INS_clz, INS_clz, INS_clz, INS_clz, INS_clz, INS_clz, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, LoadVector64, -1, 8, 1, {INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AdvSimd, LoadVector128, -1, 16, 1, {INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AdvSimd, Max, -1, -1, 2, {INS_smax, INS_umax, INS_smax, INS_umax, INS_smax, INS_umax, INS_invalid, INS_invalid, INS_fmax, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MaxNumber, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnm, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MaxNumberScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnm, INS_fmaxnm}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MaxPairwise, -1, 8, 2, {INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_invalid, INS_invalid, INS_fmaxp, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, Min, -1, -1, 2, {INS_smin, INS_umin, INS_smin, INS_umin, INS_smin, INS_umin, INS_invalid, INS_invalid, INS_fmin, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MinNumber, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnm, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MinNumberScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnm, INS_fminnm}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MinPairwise, -1, 8, 2, {INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_invalid, INS_invalid, INS_fminp, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, Multiply, -1, -1, 2, {INS_mul, INS_mul, INS_mul, INS_mul, INS_mul, INS_mul, INS_invalid, INS_invalid, INS_fmul, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MultiplyScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmul, INS_fmul}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, MultiplyAdd, -1, -1, 3, {INS_mla, INS_mla, INS_mla, INS_mla, INS_mla, INS_mla, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd, MultiplySubtract, -1, -1, 3, {INS_mls, INS_mls, INS_mls, INS_mls, INS_mls, INS_mls, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd, Negate, -1, -1, 1, {INS_neg, INS_invalid, INS_neg, INS_invalid, INS_neg, INS_invalid, INS_invalid, INS_invalid, INS_fneg, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, NegateScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fneg, INS_fneg}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, Not, -1, -1, 1, {INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, Or, -1, -1, 2, {INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, OrNot, -1, -1, 2, {INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, PolynomialMultiply, -1, -1, 2, {INS_pmul, INS_pmul, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, PopCount, -1, -1, 1, {INS_cnt, INS_cnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, ReciprocalEstimate, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_urecpe, INS_invalid, INS_invalid, INS_frecpe, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, ReciprocalSquareRootEstimate, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ursqrte, INS_invalid, INS_invalid, INS_frsqrte, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, ReciprocalSquareRootStep, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrts, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, ReciprocalStep, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd, SqrtScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsqrt, INS_fsqrt}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, Store, -1, -1, 2, {INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1}, HW_Category_MemoryStore, HW_Flag_UnfixedSIMDSize|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(AdvSimd, Subtract, -1, -1, 2, {INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_fsub, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd, SubtractScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sub, INS_sub, INS_fsub, INS_fsub}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd, Xor, -1, -1, 2, {INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, Abs, -1, 1, {INS_abs, INS_invalid, INS_abs, INS_invalid, INS_abs, INS_invalid, INS_invalid, INS_invalid, INS_fabs, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, AbsScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fabs, INS_fabs}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareGreaterThan, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareGreaterThanOrEqual, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareLessThan, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteCompareLessThanOrEqual, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifference, -1, 2, {INS_sabd, INS_uabd, INS_sabd, INS_uabd, INS_sabd, INS_uabd, INS_invalid, INS_invalid, INS_fabd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifferenceAdd, -1, 3, {INS_saba, INS_uaba, INS_saba, INS_uaba, INS_saba, INS_uaba, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifferenceWideningLower, 8, 2, {INS_sabdl, INS_uabdl, INS_sabdl, INS_uabdl, INS_sabdl, INS_uabdl, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifferenceWideningLowerAndAdd, 8, 3, {INS_sabal, INS_uabal, INS_sabal, INS_uabal, INS_sabal, INS_uabal, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifferenceWideningUpper, 16, 2, {INS_sabdl2, INS_uabdl2, INS_sabdl2, INS_uabdl2, INS_sabdl2, INS_uabdl2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, AbsoluteDifferenceWideningUpperAndAdd, 16, 3, {INS_sabal2, INS_uabal2, INS_sabal2, INS_uabal2, INS_sabal2, INS_uabal2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, Add, -1, 2, {INS_add, INS_add, INS_add, INS_add, INS_add, INS_add, INS_add, INS_add, INS_fadd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, AddHighNarrowingLower, 8, 2, {INS_addhn, INS_addhn, INS_addhn, INS_addhn, INS_addhn, INS_addhn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, AddHighNarrowingUpper, 16, 3, {INS_addhn2, INS_addhn2, INS_addhn2, INS_addhn2, INS_addhn2, INS_addhn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, AddPairwise, 8, 2, {INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_invalid, INS_invalid, INS_faddp, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, AddPairwiseWidening, -1, 1, {INS_saddlp, INS_uaddlp, INS_saddlp, INS_uaddlp, INS_saddlp, INS_uaddlp, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, AddPairwiseWideningAndAdd, -1, 2, {INS_sadalp, INS_uadalp, INS_sadalp, INS_uadalp, INS_sadalp, INS_uadalp, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, AddPairwiseWideningAndAddScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sadalp, INS_uadalp, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, AddPairwiseWideningScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_saddlp, INS_uaddlp, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, AddRoundedHighNarrowingLower, 8, 2, {INS_raddhn, INS_raddhn, INS_raddhn, INS_raddhn, INS_raddhn, INS_raddhn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, AddRoundedHighNarrowingUpper, 16, 3, {INS_raddhn2, INS_raddhn2, INS_raddhn2, INS_raddhn2, INS_raddhn2, INS_raddhn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, AddSaturate, -1, 2, {INS_sqadd, INS_uqadd, INS_sqadd, INS_uqadd, INS_sqadd, INS_uqadd, INS_sqadd, INS_uqadd, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, AddSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqadd, INS_uqadd, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, AddScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_add, INS_add, INS_fadd, INS_fadd}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, AddWideningLower, 8, 2, {INS_saddl, INS_uaddl, INS_saddl, INS_uaddl, INS_saddl, INS_uaddl, INS_saddw, INS_uaddw, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, AddWideningUpper, 16, 2, {INS_saddl2, INS_uaddl2, INS_saddl2, INS_uaddl2, INS_saddl2, INS_uaddl2, INS_saddw2, INS_uaddw2, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, And, -1, 2, {INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and, INS_and}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, BitwiseClear, -1, 2, {INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic, INS_bic}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, BitwiseSelect, -1, 3, {INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl, INS_bsl}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, Ceiling, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frintp, INS_frintp}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, CompareEqual, -1, 2, {INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_cmeq, INS_invalid, INS_invalid, INS_fcmeq, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, CompareGreaterThan, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, CompareGreaterThanOrEqual, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, CompareLessThan, -1, 2, {INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_cmgt, INS_cmhi, INS_invalid, INS_invalid, INS_fcmgt, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, CompareLessThanOrEqual, -1, 2, {INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_cmge, INS_cmhs, INS_invalid, INS_invalid, INS_fcmge, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, CompareTest, -1, 2, {INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_cmtst, INS_invalid, INS_invalid, INS_cmtst, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, DivideScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fdiv, INS_fdiv}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, DuplicateSelectedScalarToVector64, -1, 2, {INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_invalid, INS_invalid, INS_dup, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, DuplicateSelectedScalarToVector128, -1, 2, {INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_invalid, INS_invalid, INS_dup, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, DuplicateToVector64, 8, 1, {INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_invalid, INS_invalid, INS_dup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, DuplicateToVector128, 16, 1, {INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_dup, INS_invalid, INS_invalid, INS_dup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, Extract, -1, 2, {INS_smov, INS_umov, INS_smov, INS_umov, INS_smov, INS_umov, INS_umov, INS_umov, INS_dup, INS_dup}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ExtractNarrowingUpper, 16, 2, {INS_xtn2, INS_xtn2, INS_xtn2, INS_xtn2, INS_xtn2, INS_xtn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ExtractNarrowingLower, 8, 1, {INS_xtn, INS_xtn, INS_xtn, INS_xtn, INS_xtn, INS_xtn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ExtractVector64, 8, 3, {INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_invalid, INS_invalid, INS_ext, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ExtractVector128, 16, 3, {INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_ext, INS_ext}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, Floor, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frintm, INS_frintm}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, FusedAddHalving, -1, 2, {INS_shadd, INS_uhadd, INS_shadd, INS_uhadd, INS_shadd, INS_uhadd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, FusedAddRoundedHalving, -1, 2, {INS_srhadd, INS_urhadd, INS_srhadd, INS_urhadd, INS_srhadd, INS_urhadd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, FusedMultiplyAdd, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmla, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, FusedMultiplyAddScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmadd, INS_fmadd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, FusedMultiplyAddNegatedScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fnmadd, INS_fnmadd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, FusedMultiplySubtract, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmls, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, FusedMultiplySubtractScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmsub, INS_fmsub}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, FusedMultiplySubtractNegatedScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fnmsub, INS_fnmsub}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, FusedSubtractHalving, -1, 2, {INS_shsub, INS_uhsub, INS_shsub, INS_uhsub, INS_shsub, INS_uhsub, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Insert, -1, 3, {INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins, INS_ins}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, LeadingSignCount, -1, 1, {INS_cls, INS_invalid, INS_cls, INS_invalid, INS_cls, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, LeadingZeroCount, -1, 1, {INS_clz, INS_clz, INS_clz, INS_clz, INS_clz, INS_clz, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, LoadVector64, 8, 1, {INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, LoadVector128, 16, 1, {INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1, INS_ld1}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Max, -1, 2, {INS_smax, INS_umax, INS_smax, INS_umax, INS_smax, INS_umax, INS_invalid, INS_invalid, INS_fmax, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MaxNumber, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnm, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MaxNumberScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnm, INS_fmaxnm}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MaxPairwise, 8, 2, {INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_invalid, INS_invalid, INS_fmaxp, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Min, -1, 2, {INS_smin, INS_umin, INS_smin, INS_umin, INS_smin, INS_umin, INS_invalid, INS_invalid, INS_fmin, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MinNumber, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnm, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MinNumberScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnm, INS_fminnm}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MinPairwise, 8, 2, {INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_invalid, INS_invalid, INS_fminp, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Multiply, -1, 2, {INS_mul, INS_mul, INS_mul, INS_mul, INS_mul, INS_mul, INS_invalid, INS_invalid, INS_fmul, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmul, INS_fmul}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyAdd, -1, 3, {INS_mla, INS_mla, INS_mla, INS_mla, INS_mla, INS_mla, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, MultiplySubtract, -1, 3, {INS_mls, INS_mls, INS_mls, INS_mls, INS_mls, INS_mls, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyWideningLower, 8, 2, {INS_smull, INS_umull, INS_smull, INS_umull, INS_smull, INS_umull, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyWideningLowerAndAdd, 8, 3, {INS_smlal, INS_umlal, INS_smlal, INS_umlal, INS_smlal, INS_umlal, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyWideningLowerAndSubtract, 8, 3, {INS_smlsl, INS_umlsl, INS_smlsl, INS_umlsl, INS_smlsl, INS_umlsl, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyWideningUpper, 16, 2, {INS_smull2, INS_umull2, INS_smull2, INS_umull2, INS_smull2, INS_umull2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyWideningUpperAndAdd, 16, 3, {INS_smlal2, INS_umlal2, INS_smlal2, INS_umlal2, INS_smlal2, INS_umlal2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, MultiplyWideningUpperAndSubtract, 16, 3, {INS_smlsl2, INS_umlsl2, INS_smlsl2, INS_umlsl2, INS_smlsl2, INS_umlsl2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, Negate, -1, 1, {INS_neg, INS_invalid, INS_neg, INS_invalid, INS_neg, INS_invalid, INS_invalid, INS_invalid, INS_fneg, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, NegateScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fneg, INS_fneg}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Not, -1, 1, {INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn, INS_mvn}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Or, -1, 2, {INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr, INS_orr}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, OrNot, -1, 2, {INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn, INS_orn}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, PolynomialMultiply, -1, 2, {INS_pmul, INS_pmul, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, PolynomialMultiplyWideningLower, 8, 2, {INS_pmull, INS_pmull, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, PolynomialMultiplyWideningUpper, 16, 2, {INS_pmull2, INS_pmull2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, PopCount, -1, 1, {INS_cnt, INS_cnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ReciprocalEstimate, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_urecpe, INS_invalid, INS_invalid, INS_frecpe, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ReciprocalSquareRootEstimate, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ursqrte, INS_invalid, INS_invalid, INS_frsqrte, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ReciprocalSquareRootStep, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrts, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, ReciprocalStep, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmetic, -1, 2, {INS_sshl, INS_invalid, INS_sshl, INS_invalid, INS_sshl, INS_invalid, INS_sshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticRounded, -1, 2, {INS_srshl, INS_invalid, INS_srshl, INS_invalid, INS_srshl, INS_invalid, INS_srshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticRoundedSaturate, -1, 2, {INS_sqrshl, INS_invalid, INS_sqrshl, INS_invalid, INS_sqrshl, INS_invalid, INS_sqrshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticRoundedSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticRoundedScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_srshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticSaturate, -1, 2, {INS_sqshl, INS_invalid, INS_sqshl, INS_invalid, INS_sqshl, INS_invalid, INS_sqshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftArithmeticScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogical, -1, 2, {INS_shl, INS_shl, INS_shl, INS_shl, INS_shl, INS_shl, INS_shl, INS_shl, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalSaturate, -1, 2, {INS_sqshl, INS_uqshl, INS_sqshl, INS_uqshl, INS_sqshl, INS_uqshl, INS_sqshl, INS_uqshl, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqshl, INS_uqshl, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalSaturateUnsigned, -1, 2, {INS_sqshlu, INS_invalid, INS_sqshlu, INS_invalid, INS_sqshlu, INS_invalid, INS_sqshlu, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalSaturateUnsignedScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqshlu, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_shl, INS_shl, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalWideningLower, 8, 2, {INS_sshll, INS_ushll, INS_sshll, INS_ushll, INS_sshll, INS_ushll, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLeftLogicalWideningUpper, 16, 2, {INS_sshll2, INS_ushll2, INS_sshll2, INS_ushll2, INS_sshll2, INS_ushll2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogical, -1, 2, {INS_ushl, INS_ushl, INS_ushl, INS_ushl, INS_ushl, INS_ushl, INS_ushl, INS_ushl, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalRounded, -1, 2, {INS_urshl, INS_urshl, INS_urshl, INS_urshl, INS_urshl, INS_urshl, INS_urshl, INS_urshl, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalRoundedSaturate, -1, 2, {INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalRoundedSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_uqrshl, INS_uqrshl, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalRoundedScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_urshl, INS_urshl, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalSaturate, -1, 2, {INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_uqshl, INS_uqshl, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftLogicalScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ushl, INS_ushl, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmetic, -1, 2, {INS_sshr, INS_invalid, INS_sshr, INS_invalid, INS_sshr, INS_invalid, INS_sshr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticAdd, -1, 3, {INS_ssra, INS_invalid, INS_ssra, INS_invalid, INS_ssra, INS_invalid, INS_ssra, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticAddScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ssra, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticNarrowingSaturateLower, 8, 2, {INS_sqshrn, INS_invalid, INS_sqshrn, INS_invalid, INS_sqshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticNarrowingSaturateUnsignedLower, 8, 2, {INS_invalid, INS_sqshrun, INS_invalid, INS_sqshrun, INS_invalid, INS_sqshrun, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticNarrowingSaturateUnsignedUpper, 16, 3, {INS_invalid, INS_sqshrun2, INS_invalid, INS_sqshrun2, INS_invalid, INS_sqshrun2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticNarrowingSaturateUpper, 16, 3, {INS_sqshrn2, INS_invalid, INS_sqshrn2, INS_invalid, INS_sqshrn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRounded, -1, 2, {INS_srshr, INS_invalid, INS_srshr, INS_invalid, INS_srshr, INS_invalid, INS_srshr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedAdd, -1, 3, {INS_srsra, INS_invalid, INS_srsra, INS_invalid, INS_srsra, INS_invalid, INS_srsra, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedAddScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_srsra, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedNarrowingSaturateLower, 8, 2, {INS_sqrshrn, INS_invalid, INS_sqrshrn, INS_invalid, INS_sqrshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedNarrowingSaturateUnsignedLower, 8, 2, {INS_invalid, INS_sqrshrun, INS_invalid, INS_sqrshrun, INS_invalid, INS_sqrshrun, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedNarrowingSaturateUnsignedUpper, 16, 3, {INS_invalid, INS_sqrshrun2, INS_invalid, INS_sqrshrun2, INS_invalid, INS_sqrshrun2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedNarrowingSaturateUpper, 16, 3, {INS_sqrshrn2, INS_invalid, INS_sqrshrn2, INS_invalid, INS_sqrshrn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticRoundedScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_srshr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightArithmeticScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sshr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogical, -1, 2, {INS_ushr, INS_ushr, INS_ushr, INS_ushr, INS_ushr, INS_ushr, INS_ushr, INS_ushr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalAdd, -1, 3, {INS_usra, INS_usra, INS_usra, INS_usra, INS_usra, INS_usra, INS_usra, INS_usra, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalAddScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_usra, INS_usra, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalNarrowingLower, 8, 2, {INS_shrn, INS_shrn, INS_shrn, INS_shrn, INS_shrn, INS_shrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalNarrowingSaturateLower, 8, 2, {INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalNarrowingSaturateUpper, 16, 3, {INS_uqshrn2, INS_uqshrn2, INS_uqshrn2, INS_uqshrn2, INS_uqshrn2, INS_uqshrn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalNarrowingUpper, 16, 3, {INS_shrn2, INS_shrn2, INS_shrn2, INS_shrn2, INS_shrn2, INS_shrn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRounded, -1, 2, {INS_urshr, INS_urshr, INS_urshr, INS_urshr, INS_urshr, INS_urshr, INS_urshr, INS_urshr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedAdd, -1, 3, {INS_ursra, INS_ursra, INS_ursra, INS_ursra, INS_ursra, INS_ursra, INS_ursra, INS_ursra, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedAddScalar, 8, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ursra, INS_ursra, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedNarrowingLower, 8, 2, {INS_rshrn, INS_rshrn, INS_rshrn, INS_rshrn, INS_rshrn, INS_rshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedNarrowingSaturateLower, 8, 2, {INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedNarrowingSaturateUpper, 16, 3, {INS_uqrshrn2, INS_uqrshrn2, INS_uqrshrn2, INS_uqrshrn2, INS_uqrshrn2, INS_uqrshrn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedNarrowingUpper, 16, 3, {INS_rshrn2, INS_rshrn2, INS_rshrn2, INS_rshrn2, INS_rshrn2, INS_rshrn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalRoundedScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_urshr, INS_urshr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, ShiftRightLogicalScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ushr, INS_ushr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, SignExtendWideningLower, 8, 1, {INS_sxtl, INS_invalid, INS_sxtl, INS_invalid, INS_sxtl, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, SignExtendWideningUpper, 16, 1, {INS_sxtl2, INS_invalid, INS_sxtl2, INS_invalid, INS_sxtl2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, SqrtScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsqrt, INS_fsqrt}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, Store, -1, 2, {INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1}, HW_Category_MemoryStore, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AdvSimd, Subtract, -1, 2, {INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_sub, INS_fsub, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, SubtractHighNarrowingLower, 8, 2, {INS_subhn, INS_subhn, INS_subhn, INS_subhn, INS_subhn, INS_subhn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, SubtractHighNarrowingUpper, 16, 3, {INS_subhn2, INS_subhn2, INS_subhn2, INS_subhn2, INS_subhn2, INS_subhn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, SubtractRoundedHighNarrowingLower, 8, 2, {INS_rsubhn, INS_rsubhn, INS_rsubhn, INS_rsubhn, INS_rsubhn, INS_rsubhn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, SubtractRoundedHighNarrowingUpper, 16, 3, {INS_rsubhn2, INS_rsubhn2, INS_rsubhn2, INS_rsubhn2, INS_rsubhn2, INS_rsubhn2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, SubtractSaturate, -1, 2, {INS_sqsub, INS_uqsub, INS_sqsub, INS_uqsub, INS_sqsub, INS_uqsub, INS_sqsub, INS_uqsub, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, SubtractSaturateScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqsub, INS_uqsub, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, SubtractScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sub, INS_sub, INS_fsub, INS_fsub}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, SubtractWideningLower, 8, 2, {INS_ssubl, INS_usubl, INS_ssubl, INS_usubl, INS_ssubl, INS_usubl, INS_ssubw, INS_usubw, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, SubtractWideningUpper, 16, 2, {INS_ssubl2, INS_usubl2, INS_ssubl2, INS_usubl2, INS_ssubl2, INS_usubl2, INS_ssubw2, INS_usubw2, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd, VectorTableLookup, 8, 2, {INS_tbl, INS_tbl, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd, VectorTableLookupExtension, 8, 3, {INS_tbx, INS_tbx, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd, Xor, -1, 2, {INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor, INS_eor}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd, ZeroExtendWideningLower, 8, 1, {INS_uxtl, INS_uxtl, INS_uxtl, INS_uxtl, INS_uxtl, INS_uxtl, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd, ZeroExtendWideningUpper, 16, 1, {INS_uxtl2, INS_uxtl2, INS_uxtl2, INS_uxtl2, INS_uxtl2, INS_uxtl2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// AdvSimd 64-bit only Intrinsics
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Abs, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_abs, INS_invalid, INS_invalid, INS_fabs}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_abs, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThan, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThanOrEqual, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThanOrEqualScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_facge}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThanScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_facgt}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThan, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThanOrEqual, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThanOrEqualScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_facge}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThanScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_facgt}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteDifference, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fabd}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteDifferenceScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fabd, INS_fabd}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Add, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fadd}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AddAcross, -1, -1, 1, {INS_addv, INS_addv, INS_addv, INS_addv, INS_addv, INS_addv, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AddPairwise, -1, 16, 2, {INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_faddp, INS_faddp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, AddPairwiseScalar, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addp, INS_addp, INS_faddp, INS_faddp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareEqual, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmeq, INS_cmeq, INS_invalid, INS_fcmeq}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareEqualScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmeq, INS_cmeq, INS_fcmeq, INS_fcmeq}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThan, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_invalid, INS_fcmgt}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanOrEqual, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanOrEqualScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThan, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_invalid, INS_fcmgt}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqual, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqualScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareTest, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmtst, INS_cmtst, INS_invalid, INS_cmtst}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareTestScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmtst, INS_cmtst, INS_invalid, INS_cmtst}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Divide, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fdiv, INS_fdiv}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, FusedMultiplyAdd, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmla}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, FusedMultiplySubtract, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmls}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Max, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmax}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxAcross, -1, -1, 1, {INS_smaxv, INS_umaxv, INS_smaxv, INS_umaxv, INS_smaxv, INS_umaxv, INS_invalid, INS_invalid, INS_fmaxv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumber, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnm}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumberAcross, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnmv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumberPairwise, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnmp, INS_fmaxnmp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumberPairwiseScalar, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnmp, INS_fmaxnmp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxPairwise, -1, 16, 2, {INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_invalid, INS_invalid, INS_fmaxp, INS_fmaxp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxPairwiseScalar, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxp, INS_fmaxp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmax, INS_fmax}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Min, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmin}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinAcross, -1, -1, 1, {INS_sminv, INS_uminv, INS_sminv, INS_uminv, INS_sminv, INS_uminv, INS_invalid, INS_invalid, INS_fminv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumber, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnm}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumberAcross, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnmv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumberPairwise, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnmp, INS_fminnmp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumberPairwiseScalar, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnmp, INS_fminnmp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinPairwise, -1, 16, 2, {INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_invalid, INS_invalid, INS_fminp, INS_fminp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinPairwiseScalar, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminp, INS_fminp}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MinScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmin, INS_fmin}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Multiply, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmul}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MultiplyExtended, -1, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmulx, INS_fmulx}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, MultiplyExtendedScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmulx, INS_fmulx}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Negate, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_neg, INS_invalid, INS_invalid, INS_fneg}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, NegateScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_neg, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalEstimate, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecpe}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalEstimateScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecpe, INS_frecpe}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalExponentScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecpx, INS_frecpx}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootEstimate, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrte}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootEstimateScalar, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrte, INS_frsqrte}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootStep, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrts}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootStepScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrts, INS_frsqrts}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalStep, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecps}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalStepScalar, -1, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecps, INS_frecps}, HW_Category_SIMDScalar, HW_Flag_NoContainment|HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ReverseElementBits, -1, -1, 1, {INS_rbit, INS_rbit, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Sqrt, -1, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsqrt, INS_fsqrt}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, Subtract, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsub}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, TransposeEven, -1, -1, 2, {INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, TransposeOdd, -1, -1, 2, {INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, UnzipEven, -1, -1, 2, {INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, UnzipOdd, -1, -1, 2, {INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ZipHigh, -1, -1, 2, {INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AdvSimd_Arm64, ZipLow, -1, -1, 2, {INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Abs, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_abs, INS_invalid, INS_invalid, INS_fabs}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_abs, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_facge}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareGreaterThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_facgt}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facge, INS_facge}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteCompareLessThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_facgt, INS_facgt}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteDifference, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fabd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AbsoluteDifferenceScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fabd, INS_fabd}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Add, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fadd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AddAcross, -1, 1, {INS_addv, INS_addv, INS_addv, INS_addv, INS_addv, INS_addv, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AddPairwise, 16, 2, {INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_addp, INS_faddp, INS_faddp}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AddPairwiseScalar, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addp, INS_addp, INS_faddp, INS_faddp}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, AddSaturateScalar, 8, 2, {INS_sqadd, INS_uqadd, INS_sqadd, INS_uqadd, INS_sqadd, INS_uqadd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmeq, INS_cmeq, INS_invalid, INS_fcmeq}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmeq, INS_cmeq, INS_fcmeq, INS_fcmeq}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_invalid, INS_fcmgt}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareGreaterThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_invalid, INS_fcmgt}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_invalid, INS_fcmge}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanOrEqualScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmge, INS_cmhs, INS_fcmge, INS_fcmge}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareLessThanScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmgt, INS_cmhi, INS_fcmgt, INS_fcmgt}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareTest, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmtst, INS_cmtst, INS_invalid, INS_cmtst}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, CompareTestScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmtst, INS_cmtst, INS_invalid, INS_cmtst}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Divide, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fdiv, INS_fdiv}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, DuplicateSelectedScalarToVector128, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_dup, INS_dup, INS_invalid, INS_dup}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, DuplicateToVector64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov, INS_mov, INS_invalid, INS_fmov}, HW_Category_SimpleSIMD, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, DuplicateToVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_dup, INS_dup, INS_invalid, INS_dup}, HW_Category_SimpleSIMD, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, FusedMultiplyAdd, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmla}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, FusedMultiplySubtract, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmls}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Max, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmax}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxAcross, -1, 1, {INS_smaxv, INS_umaxv, INS_smaxv, INS_umaxv, INS_smaxv, INS_umaxv, INS_invalid, INS_invalid, INS_fmaxv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumber, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnm}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumberAcross, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnmv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumberPairwise, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnmp, INS_fmaxnmp}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxNumberPairwiseScalar, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxnmp, INS_fmaxnmp}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxPairwise, 16, 2, {INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_smaxp, INS_umaxp, INS_invalid, INS_invalid, INS_fmaxp, INS_fmaxp}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxPairwiseScalar, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmaxp, INS_fmaxp}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MaxScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmax, INS_fmax}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Min, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmin}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinAcross, -1, 1, {INS_sminv, INS_uminv, INS_sminv, INS_uminv, INS_sminv, INS_uminv, INS_invalid, INS_invalid, INS_fminv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumber, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnm}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumberAcross, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnmv, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumberPairwise, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnmp, INS_fminnmp}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinNumberPairwiseScalar, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminnmp, INS_fminnmp}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinPairwise, 16, 2, {INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_sminp, INS_uminp, INS_invalid, INS_invalid, INS_fminp, INS_fminp}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinPairwiseScalar, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fminp, INS_fminp}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MinScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmin, INS_fmin}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Multiply, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmul}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MultiplyExtended, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmulx, INS_fmulx}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, MultiplyExtendedScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fmulx, INS_fmulx}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Negate, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_neg, INS_invalid, INS_invalid, INS_fneg}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, NegateScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_neg, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalEstimate, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecpe}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalEstimateScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecpe, INS_frecpe}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalExponentScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecpx, INS_frecpx}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootEstimate, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrte}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootEstimateScalar, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrte, INS_frsqrte}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootStep, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrts}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalSquareRootStepScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frsqrts, INS_frsqrts}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalStep, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecps}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReciprocalStepScalar, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_frecps, INS_frecps}, HW_Category_SIMDScalar, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ReverseElementBits, -1, 1, {INS_rbit, INS_rbit, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftArithmeticRoundedSaturateScalar, 8, 2, {INS_sqrshl, INS_invalid, INS_sqrshl, INS_invalid, INS_sqrshl, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftArithmeticSaturateScalar, 8, 2, {INS_sqshl, INS_invalid, INS_sqshl, INS_invalid, INS_sqshl, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftLeftLogicalSaturateScalar, 8, 2, {INS_sqshl, INS_uqshl, INS_sqshl, INS_uqshl, INS_sqshl, INS_uqshl, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftLeftLogicalSaturateUnsignedScalar, 8, 2, {INS_sqshlu, INS_invalid, INS_sqshlu, INS_invalid, INS_sqshlu, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftLogicalRoundedSaturateScalar, 8, 2, {INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_uqrshl, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftLogicalSaturateScalar, 8, 2, {INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_uqshl, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftRightArithmeticNarrowingSaturateScalar, 8, 2, {INS_sqshrn, INS_invalid, INS_sqshrn, INS_invalid, INS_sqshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftRightArithmeticNarrowingSaturateUnsignedScalar, 8, 2, {INS_invalid, INS_sqshrun, INS_invalid, INS_sqshrun, INS_invalid, INS_sqshrun, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftRightArithmeticRoundedNarrowingSaturateScalar, 8, 2, {INS_sqrshrn, INS_invalid, INS_sqrshrn, INS_invalid, INS_sqrshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftRightArithmeticRoundedNarrowingSaturateUnsignedScalar, 8, 2, {INS_invalid, INS_sqrshrun, INS_invalid, INS_sqrshrun, INS_invalid, INS_sqrshrun, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftRightLogicalNarrowingSaturateScalar, 8, 2, {INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_uqshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ShiftRightLogicalRoundedNarrowingSaturateScalar, 8, 2, {INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_uqrshrn, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_SupportsContainment|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Sqrt, -1, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsqrt, INS_fsqrt}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, Subtract, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsub}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, SubtractSaturateScalar, 8, 2, {INS_sqsub, INS_uqsub, INS_sqsub, INS_uqsub, INS_sqsub, INS_uqsub, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, TransposeEven, -1, 2, {INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1, INS_trn1}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, TransposeOdd, -1, 2, {INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2, INS_trn2}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, UnzipEven, -1, 2, {INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1, INS_uzp1}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, UnzipOdd, -1, 2, {INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2, INS_uzp2}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, VectorTableLookup, 16, 2, {INS_tbl, INS_tbl, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, VectorTableLookupExtension, 16, 3, {INS_tbx, INS_tbx, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ZipHigh, -1, 2, {INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2, INS_zip2}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AdvSimd_Arm64, ZipLow, -1, 2, {INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1, INS_zip1}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// AES Intrinsics
-HARDWARE_INTRINSIC(Aes, Decrypt, -1, 16, 2, {INS_invalid, INS_aesd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Aes, Encrypt, -1, 16, 2, {INS_invalid, INS_aese, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Aes, InverseMixColumns, -1, 16, 1, {INS_invalid, INS_aesimc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(Aes, MixColumns, -1, 16, 1, {INS_invalid, INS_aesmc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(Aes, Decrypt, 16, 2, {INS_invalid, INS_aesd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Aes, Encrypt, 16, 2, {INS_invalid, INS_aese, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Aes, InverseMixColumns, 16, 1, {INS_invalid, INS_aesimc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(Aes, MixColumns, 16, 1, {INS_invalid, INS_aesmc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(Aes, PolynomialMultiplyWideningLower, 8, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmull, INS_pmull, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Aes, PolynomialMultiplyWideningUpper, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmull2, INS_pmull2, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Base Intrinsics
-HARDWARE_INTRINSIC(ArmBase, LeadingZeroCount, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_clz, INS_clz, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(ArmBase, ReverseElementBits, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rbit, INS_rbit, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(ArmBase, LeadingZeroCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_clz, INS_clz, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(ArmBase, ReverseElementBits, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rbit, INS_rbit, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFlag)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Base 64-bit only Intrinsics
-HARDWARE_INTRINSIC(ArmBase_Arm64, LeadingSignCount, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cls, INS_invalid, INS_cls, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(ArmBase_Arm64, LeadingZeroCount, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_clz, INS_clz, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(ArmBase_Arm64, ReverseElementBits, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rbit, INS_rbit, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(ArmBase_Arm64, LeadingSignCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cls, INS_invalid, INS_cls, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(ArmBase_Arm64, LeadingZeroCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_clz, INS_clz, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(ArmBase_Arm64, ReverseElementBits, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rbit, INS_rbit, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFlag)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// CRC32 Intrinsics
-HARDWARE_INTRINSIC(Crc32, ComputeCrc32, -1, 0, 2, {INS_invalid, INS_crc32b, INS_invalid, INS_crc32h, INS_invalid, INS_crc32w, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(Crc32, ComputeCrc32C, -1, 0, 2, {INS_invalid, INS_crc32cb, INS_invalid, INS_crc32ch, INS_invalid, INS_crc32cw, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(Crc32, ComputeCrc32, 0, 2, {INS_invalid, INS_crc32b, INS_invalid, INS_crc32h, INS_invalid, INS_crc32w, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(Crc32, ComputeCrc32C, 0, 2, {INS_invalid, INS_crc32cb, INS_invalid, INS_crc32ch, INS_invalid, INS_crc32cw, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// CRC32 64-bit only Intrinsics
-HARDWARE_INTRINSIC(Crc32_Arm64, ComputeCrc32, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_crc32x, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(Crc32_Arm64, ComputeCrc32C, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_crc32cx, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(Crc32_Arm64, ComputeCrc32, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_crc32x, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(Crc32_Arm64, ComputeCrc32C, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_crc32cx, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SHA1 Intrinsics
-HARDWARE_INTRINSIC(Sha1, FixedRotate, -1, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1h, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(Sha1, HashUpdateChoose, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1c, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha1, HashUpdateMajority, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1m, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha1, HashUpdateParity, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1p, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha1, ScheduleUpdate0, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1su0, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha1, ScheduleUpdate1, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1su1, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha1, FixedRotate, 8, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1h, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(Sha1, HashUpdateChoose, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1c, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha1, HashUpdateMajority, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1m, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha1, HashUpdateParity, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1p, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha1, ScheduleUpdate0, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1su0, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha1, ScheduleUpdate1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha1su1, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// ISA Function name ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size Number of arguments Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SHA256 Intrinsics
-HARDWARE_INTRINSIC(Sha256, HashUpdate1, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256h, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha256, HashUpdate2, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256h2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha256, ScheduleUpdate0, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256su0, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
-HARDWARE_INTRINSIC(Sha256, ScheduleUpdate1, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256su1, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha256, HashUpdate1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256h, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha256, HashUpdate2, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256h2, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha256, ScheduleUpdate0, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256su0, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
+HARDWARE_INTRINSIC(Sha256, ScheduleUpdate1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256su1, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_HasRMWSemantics)
#endif // FEATURE_HW_INTRINSIC
diff --git a/src/coreclr/src/jit/hwintrinsiclistxarch.h b/src/coreclr/src/jit/hwintrinsiclistxarch.h
index 70fbdc79e13b65..c6017fb12c44ca 100644
--- a/src/coreclr/src/jit/hwintrinsiclistxarch.h
+++ b/src/coreclr/src/jit/hwintrinsiclistxarch.h
@@ -23,626 +23,670 @@
9) Each intrinsic has one or more flags with type of `enum HWIntrinsicFlag`
*/
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Vector128 Intrinsics
-HARDWARE_INTRINSIC(Vector128_As, "As", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsByte, "AsByte", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsDouble, "AsDouble", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsInt16, "AsInt16", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsInt32, "AsInt32", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsInt64, "AsInt64", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsSByte, "AsSByte", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsSingle, "AsSingle", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsUInt16, "AsUInt16", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsUInt32, "AsUInt32", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsUInt64, "AsUInt64", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsVector, "AsVector", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsVector2, "AsVector2", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsVector3, "AsVector3", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsVector4, "AsVector4", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_AsVector128, "AsVector128", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_Count, "get_Count", Vector128, -1, 16, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_CreateScalarUnsafe, "CreateScalarUnsafe", Vector128, -1, 16, 1, {INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_movss, INS_movsdsse2}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_GetElement, "GetElement", Vector128, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128_WithElement, "WithElement", Vector128, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector128_ToScalar, "ToScalar", Vector128, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_movsdsse2}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_ToVector256, "ToVector256", Vector128, -1, 16, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_ToVector256Unsafe, "ToVector256Unsafe", Vector128, -1, 16, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector128_Zero, "get_Zero", Vector128, -1, 16, 0, {INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(Vector128, As, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsByte, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsDouble, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsInt16, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsSByte, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsSingle, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsUInt16, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsUInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsUInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsVector, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsVector2, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsVector3, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsVector4, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, AsVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, Create, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, CreateScalarUnsafe, 16, 1, {INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_movss, INS_movsdsse2}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+// The instruction generated for float/double depends on which ISAs are supported
+HARDWARE_INTRINSIC(Vector128, get_AllBitsSet, 16, 0, {INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_cmpps, INS_cmppd}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, get_Count, 16, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, get_Zero, 16, 0, {INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, GetElement, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector128, op_Equality, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, op_Inequality, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector128, ToScalar, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_movsdsse2}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, ToVector256, 16, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, ToVector256Unsafe, 16, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector128, WithElement, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Vector256 Intrinsics
-HARDWARE_INTRINSIC(Vector256_As, "As", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsByte, "AsByte", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsDouble, "AsDouble", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsInt16, "AsInt16", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsInt32, "AsInt32", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsInt64, "AsInt64", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsSByte, "AsSByte", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsSingle, "AsSingle", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsUInt16, "AsUInt16", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsUInt32, "AsUInt32", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsUInt64, "AsUInt64", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsVector, "AsVector", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_AsVector256, "AsVector256", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_Count, "get_Count", Vector256, -1, 32, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_CreateScalarUnsafe, "CreateScalarUnsafe", Vector256, -1, 32, 1, {INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_movss, INS_movsdsse2}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_GetElement, "GetElement", Vector256, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector256_WithElement, "WithElement", Vector256, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(Vector256_GetLower, "GetLower", Vector256, -1, 32, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_ToScalar, "ToScalar", Vector256, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_movsdsse2}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(Vector256_Zero, "get_Zero", Vector256, -1, 32, 0, {INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(Vector256, As, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsByte, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsDouble, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsInt16, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsInt32, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsInt64, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsSByte, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsSingle, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsUInt16, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsUInt32, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsUInt64, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsVector, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, AsVector256, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+// The instruction generated for float/double depends on which ISAs are supported
+HARDWARE_INTRINSIC(Vector256, get_AllBitsSet, 32, 0, {INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqd, INS_cmpps, INS_cmppd}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, get_Count, 32, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, get_Zero, 32, 0, {INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps, INS_xorps}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, Create, 32, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector256, CreateScalarUnsafe, 32, 1, {INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_mov_i2xmm, INS_movss, INS_movsdsse2}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, GetElement, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(Vector256, GetLower, 32, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, op_Equality, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector256, op_Inequality, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_NoCodeGen)
+HARDWARE_INTRINSIC(Vector256, ToScalar, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_movsdsse2}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(Vector256, WithElement, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// X86Base Intrinsics
+HARDWARE_INTRINSIC(X86Base, BitScanForward, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bsf, INS_bsf, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(X86Base, BitScanReverse, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bsr, INS_bsr, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// X86Base 64-bit-only Intrinsics
+HARDWARE_INTRINSIC(X86Base_X64, BitScanForward, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bsf, INS_bsf, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(X86Base_X64, BitScanReverse, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bsr, INS_bsr, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE Intrinsics
-HARDWARE_INTRINSIC(SSE_Add, "Add", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_AddScalar, "AddScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_And, "And", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_AndNot, "AndNot", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andnps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareEqual, "CompareEqual", SSE, 0, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrderedEqual, "CompareScalarOrderedEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareScalarEqual, "CompareScalarEqual", SSE, 0, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnorderedEqual, "CompareScalarUnorderedEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareGreaterThan, "CompareGreaterThan", SSE, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrderedGreaterThan, "CompareScalarOrderedGreaterThan", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareScalarGreaterThan, "CompareScalarGreaterThan", SSE, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnorderedGreaterThan, "CompareScalarUnorderedGreaterThan", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareGreaterThanOrEqual, "CompareGreaterThanOrEqual", SSE, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrderedGreaterThanOrEqual, "CompareScalarOrderedGreaterThanOrEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareScalarGreaterThanOrEqual, "CompareScalarGreaterThanOrEqual", SSE, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnorderedGreaterThanOrEqual, "CompareScalarUnorderedGreaterThanOrEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareLessThan, "CompareLessThan", SSE, 1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrderedLessThan, "CompareScalarOrderedLessThan", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareScalarLessThan, "CompareScalarLessThan", SSE, 1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnorderedLessThan, "CompareScalarUnorderedLessThan", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareLessThanOrEqual, "CompareLessThanOrEqual", SSE, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrderedLessThanOrEqual, "CompareScalarOrderedLessThanOrEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareScalarLessThanOrEqual, "CompareScalarLessThanOrEqual", SSE, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnorderedLessThanOrEqual, "CompareScalarUnorderedLessThanOrEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareNotEqual, "CompareNotEqual", SSE, 4, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrderedNotEqual, "CompareScalarOrderedNotEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareScalarNotEqual, "CompareScalarNotEqual", SSE, 4, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnorderedNotEqual, "CompareScalarUnorderedNotEqual", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_CompareNotGreaterThan, "CompareNotGreaterThan", SSE, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarNotGreaterThan, "CompareScalarNotGreaterThan", SSE, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareNotGreaterThanOrEqual, "CompareNotGreaterThanOrEqual", SSE, 1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarNotGreaterThanOrEqual, "CompareScalarNotGreaterThanOrEqual", SSE, 1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareNotLessThan, "CompareNotLessThan", SSE, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarNotLessThan, "CompareScalarNotLessThan", SSE, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareNotLessThanOrEqual, "CompareNotLessThanOrEqual", SSE, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarNotLessThanOrEqual, "CompareScalarNotLessThanOrEqual", SSE, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareOrdered, "CompareOrdered", SSE, 7, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarOrdered, "CompareScalarOrdered", SSE, 7, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_CompareUnordered, "CompareUnordered", SSE, 3, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_CompareScalarUnordered, "CompareScalarUnordered", SSE, 3, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_ConvertToInt32, "ConvertToInt32", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_ConvertScalarToVector128Single, "ConvertScalarToVector128Single", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2ss, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromSecondArg|HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_ConvertToInt32WithTruncation, "ConvertToInt32WithTruncation", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_Divide, "Divide", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_DivideScalar, "DivideScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_LoadAlignedVector128, "LoadAlignedVector128", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movaps, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_LoadHigh, "LoadHigh", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhps, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_LoadLow, "LoadLow", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlps, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_LoadScalarVector128, "LoadScalarVector128", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_LoadVector128, "LoadVector128", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movups, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_Max, "Max", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_MaxScalar, "MaxScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_Min, "Min", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_MinScalar, "MinScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_MoveHighToLow, "MoveHighToLow", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhlps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(SSE_MoveLowToHigh, "MoveLowToHigh", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlhps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(SSE_MoveMask, "MoveMask", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movmskps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(SSE_MoveScalar, "MoveScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(SSE_Multiply, "Multiply", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_MultiplyScalar, "MultiplyScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_Or, "Or", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_orps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_Prefetch0, "Prefetch0", SSE, -1, 0, 1, {INS_invalid, INS_prefetcht0, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_Prefetch1, "Prefetch1", SSE, -1, 0, 1, {INS_invalid, INS_prefetcht1, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_Prefetch2, "Prefetch2", SSE, -1, 0, 1, {INS_invalid, INS_prefetcht2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_PrefetchNonTemporal, "PrefetchNonTemporal", SSE, -1, 0, 1, {INS_invalid, INS_prefetchnta, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_Reciprocal, "Reciprocal", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rcpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_ReciprocalScalar, "ReciprocalScalar", SSE, -1, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rcpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_ReciprocalSqrt, "ReciprocalSqrt", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rsqrtps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_ReciprocalSqrtScalar, "ReciprocalSqrtScalar", SSE, -1, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rsqrtss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_Shuffle, "Shuffle", SSE, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_shufps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE_Sqrt, "Sqrt", SSE, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_SqrtScalar, "SqrtScalar", SSE, -1, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_Store, "Store", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movups, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE_StoreAligned, "StoreAligned", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movaps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE_StoreAlignedNonTemporal, "StoreAlignedNonTemporal", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movntps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE_StoreFence, "StoreFence", SSE, -1, 0, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_StoreHigh, "StoreHigh", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE_StoreLow, "StoreLow", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE_StoreScalar, "StoreScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE_Subtract, "Subtract", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_SubtractScalar, "SubtractScalar", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE_UnpackHigh, "UnpackHigh", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpckhps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_UnpackLow, "UnpackLow", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpcklps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE_Xor, "Xor", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xorps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(SSE, Add, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, AddScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, And, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, AndNot, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andnps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrderedEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareScalarEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnorderedEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrderedGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareScalarGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnorderedGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrderedGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareScalarGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnorderedGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrderedLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareScalarLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnorderedLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrderedLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareScalarLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnorderedLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrderedNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareScalarNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnorderedNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, CompareNotGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarNotGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareNotGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarNotGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareNotLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarNotLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareNotLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarNotLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareOrdered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarOrdered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, CompareUnordered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, CompareScalarUnordered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, ConvertToInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, ConvertScalarToVector128Single, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2ss, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromSecondArg|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, ConvertToInt32WithTruncation, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, Divide, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, DivideScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, LoadAlignedVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movaps, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, LoadHigh, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhps, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, LoadLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlps, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, LoadScalarVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, LoadVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movups, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, Max, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, MaxScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, Min, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, MinScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, MoveHighToLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhlps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(SSE, MoveLowToHigh, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlhps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(SSE, MoveMask, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movmskps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(SSE, MoveScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(SSE, Multiply, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, MultiplyScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, Or, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_orps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE, Prefetch0, 0, 1, {INS_invalid, INS_prefetcht0, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, Prefetch1, 0, 1, {INS_invalid, INS_prefetcht1, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, Prefetch2, 0, 1, {INS_invalid, INS_prefetcht2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, PrefetchNonTemporal, 0, 1, {INS_invalid, INS_prefetchnta, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, Reciprocal, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rcpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, ReciprocalScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rcpss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, ReciprocalSqrt, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rsqrtps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, ReciprocalSqrtScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rsqrtss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, Shuffle, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_shufps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE, Sqrt, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, SqrtScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, Store, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movups, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE, StoreAligned, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movaps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE, StoreAlignedNonTemporal, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movntps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE, StoreFence, 0, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, StoreHigh, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE, StoreLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlps, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE, StoreScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE, Subtract, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, SubtractScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE, UnpackHigh, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpckhps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, UnpackLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpcklps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE, Xor, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xorps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE 64-bit-only Intrinsics
-HARDWARE_INTRINSIC(SSE_X64_ConvertToInt64, "ConvertToInt64", SSE_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(SSE_X64_ConvertToInt64WithTruncation, "ConvertToInt64WithTruncation", SSE_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(SSE_X64_ConvertScalarToVector128Single, "ConvertScalarToVector128Single", SSE_X64, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2ss, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromSecondArg|HW_Flag_CopyUpperBits|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(SSE_X64, ConvertToInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(SSE_X64, ConvertToInt64WithTruncation, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttss2si, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(SSE_X64, ConvertScalarToVector128Single, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2ss, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromSecondArg|HW_Flag_CopyUpperBits|HW_Flag_SpecialCodeGen)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE2 Intrinsics
-HARDWARE_INTRINSIC(SSE2_Add, "Add", SSE2, -1, 16, 2, {INS_paddb, INS_paddb, INS_paddw, INS_paddw, INS_paddd, INS_paddd, INS_paddq, INS_paddq, INS_invalid, INS_addpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_AddSaturate, "AddSaturate", SSE2, -1, 16, 2, {INS_paddsb, INS_paddusb, INS_paddsw, INS_paddusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_AddScalar, "AddScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_And, "And", SSE2, -1, 16, 2, {INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_invalid, INS_andpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_AndNot, "AndNot", SSE2, -1, 16, 2, {INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_invalid, INS_andnpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_Average, "Average", SSE2, -1, 16, 2, {INS_invalid, INS_pavgb, INS_invalid, INS_pavgw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_CompareEqual, "CompareEqual", SSE2, 0, 16, 2, {INS_pcmpeqb, INS_pcmpeqb, INS_pcmpeqw, INS_pcmpeqw, INS_pcmpeqd, INS_pcmpeqd, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrderedEqual, "CompareScalarOrderedEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareScalarEqual, "CompareScalarEqual", SSE2, 0, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnorderedEqual, "CompareScalarUnorderedEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareGreaterThan, "CompareGreaterThan", SSE2, 6, 16, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrderedGreaterThan, "CompareScalarOrderedGreaterThan", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareScalarGreaterThan, "CompareScalarGreaterThan", SSE2, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnorderedGreaterThan, "CompareScalarUnorderedGreaterThan", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareGreaterThanOrEqual, "CompareGreaterThanOrEqual", SSE2, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrderedGreaterThanOrEqual, "CompareScalarOrderedGreaterThanOrEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareScalarGreaterThanOrEqual, "CompareScalarGreaterThanOrEqual", SSE2, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnorderedGreaterThanOrEqual, "CompareScalarUnorderedGreaterThanOrEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareLessThan, "CompareLessThan", SSE2, 1, 16, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_Special, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrderedLessThan, "CompareScalarOrderedLessThan", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareScalarLessThan, "CompareScalarLessThan", SSE2, 1, 16, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnorderedLessThan, "CompareScalarUnorderedLessThan", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareLessThanOrEqual, "CompareLessThanOrEqual", SSE2, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrderedLessThanOrEqual, "CompareScalarOrderedLessThanOrEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareScalarLessThanOrEqual, "CompareScalarLessThanOrEqual", SSE2, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnorderedLessThanOrEqual, "CompareScalarUnorderedLessThanOrEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareNotEqual, "CompareNotEqual", SSE2, 4, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrderedNotEqual, "CompareScalarOrderedNotEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareScalarNotEqual, "CompareScalarNotEqual", SSE2, 4, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnorderedNotEqual, "CompareScalarUnorderedNotEqual", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_CompareNotGreaterThan, "CompareNotGreaterThan", SSE2, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarNotGreaterThan, "CompareScalarNotGreaterThan", SSE2, 2, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareNotGreaterThanOrEqual, "CompareNotGreaterThanOrEqual", SSE2, 1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarNotGreaterThanOrEqual, "CompareScalarNotGreaterThanOrEqual", SSE2, 1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareNotLessThan, "CompareNotLessThan", SSE2, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarNotLessThan, "CompareScalarNotLessThan", SSE2, 5, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareNotLessThanOrEqual, "CompareNotLessThanOrEqual", SSE2, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarNotLessThanOrEqual, "CompareScalarNotLessThanOrEqual", SSE2, 6, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareOrdered, "CompareOrdered", SSE2, 7, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarOrdered, "CompareScalarOrdered", SSE2, 7, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_CompareUnordered, "CompareUnordered", SSE2, 3, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_CompareScalarUnordered, "CompareScalarUnordered", SSE2, 3, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_ConvertToInt32, "ConvertToInt32", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertToInt32WithTruncation, "ConvertToInt32WithTruncation", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertToUInt32, "ConvertToUInt32", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertToVector128Double, "ConvertToVector128Double", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2pd, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2pd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertScalarToVector128Double, "ConvertScalarToVector128Double", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2sd, INS_invalid, INS_invalid, INS_invalid, INS_cvtss2sd, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_ConvertToVector128Int32, "ConvertToVector128Int32", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2dq, INS_cvtpd2dq}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertScalarToVector128Int32, "ConvertScalarToVector128Int32", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertToVector128Int32WithTruncation, "ConvertToVector128Int32WithTruncation", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttps2dq, INS_cvttpd2dq}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertToVector128Single, "ConvertToVector128Single", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2ps, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtpd2ps}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_ConvertScalarToVector128Single, "ConvertScalarToVector128Single", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsd2ss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_ConvertScalarToVector128UInt32, "ConvertScalarToVector128UInt32", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_Divide, "Divide", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_DivideScalar, "DivideScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_Extract, "Extract", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_pextrw, INS_pextrw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_Insert, "Insert", SSE2, -1, 16, 3, {INS_invalid, INS_invalid, INS_pinsrw, INS_pinsrw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_LoadAlignedVector128, "LoadAlignedVector128", SSE2, -1, 16, 1, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_invalid, INS_movapd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_LoadFence, "LoadFence", SSE2, -1, 0, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_LoadHigh, "LoadHigh", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhpd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_LoadLow, "LoadLow", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlpd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_LoadScalarVector128, "LoadScalarVector128", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movd, INS_movd, INS_movq, INS_movq, INS_invalid, INS_movsdsse2}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_LoadVector128, "LoadVector128", SSE2, -1, 16, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_invalid, INS_movupd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_MaskMove, "MaskMove", SSE2, -1, 16, 3, {INS_maskmovdqu, INS_maskmovdqu, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_Max, "Max", SSE2, -1, 16, 2, {INS_invalid, INS_pmaxub, INS_pmaxsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_MemoryFence, "MemoryFence", SSE2, -1, 0, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_MaxScalar, "MaxScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_Min, "Min", SSE2, -1, 16, 2, {INS_invalid, INS_pminub, INS_pminsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_MinScalar, "MinScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_MoveMask, "MoveMask", SSE2, -1, 16, 1, {INS_pmovmskb, INS_pmovmskb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movmskpd}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(SSE2_MoveScalar, "MoveScalar", SSE2, -1, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movq, INS_movq, INS_invalid, INS_movsdsse2}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(SSE2_Multiply, "Multiply", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmuludq, INS_invalid, INS_mulpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_MultiplyHigh, "MultiplyHigh", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_pmulhw, INS_pmulhuw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_MultiplyAddAdjacent, "MultiplyAddAdjacent", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmaddwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_MultiplyLow, "MultiplyLow", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_pmullw, INS_pmullw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_MultiplyScalar, "MultiplyScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_Or, "Or", SSE2, -1, 16, 2, {INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_invalid, INS_orpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE2_PackSignedSaturate, "PackSignedSaturate", SSE2, -1, 16, 2, {INS_packsswb, INS_invalid, INS_packssdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_PackUnsignedSaturate, "PackUnsignedSaturate", SSE2, -1, 16, 2, {INS_invalid, INS_packuswb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_SumAbsoluteDifferences, "SumAbsoluteDifferences", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_psadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_ShiftLeftLogical, "ShiftLeftLogical", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_psllw, INS_psllw, INS_pslld, INS_pslld, INS_psllq, INS_psllq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_ShiftLeftLogical128BitLane, "ShiftLeftLogical128BitLane", SSE2, -1, 16, 2, {INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_ShiftRightArithmetic, "ShiftRightArithmetic", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_psraw, INS_invalid, INS_psrad, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_ShiftRightLogical, "ShiftRightLogical", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_psrlw, INS_psrlw, INS_psrld, INS_psrld, INS_psrlq, INS_psrlq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_ShiftRightLogical128BitLane, "ShiftRightLogical128BitLane", SSE2, -1, 16, 2, {INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_Shuffle, "Shuffle", SSE2, -1, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pshufd, INS_pshufd, INS_invalid, INS_invalid, INS_invalid, INS_shufpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_ShuffleHigh, "ShuffleHigh", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_pshufhw, INS_pshufhw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_ShuffleLow, "ShuffleLow", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_pshuflw, INS_pshuflw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE2_Sqrt, "Sqrt", SSE2, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_SqrtScalar, "SqrtScalar", SSE2, -1, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_Store, "Store", SSE2, -1, 16, 2, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_invalid, INS_movupd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_StoreAligned, "StoreAligned", SSE2, -1, 16, 2, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_invalid, INS_movapd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_StoreAlignedNonTemporal, "StoreAlignedNonTemporal", SSE2, -1, 16, 2, {INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_invalid, INS_movntpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_StoreHigh, "StoreHigh", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_StoreLow, "StoreLow", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_StoreNonTemporal, "StoreNonTemporal", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movnti, INS_movnti, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_StoreScalar, "StoreScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movd, INS_movd, INS_movq, INS_movq, INS_invalid, INS_movsdsse2}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_Subtract, "Subtract", SSE2, -1, 16, 2, {INS_psubb, INS_psubb, INS_psubw, INS_psubw, INS_psubd, INS_psubd, INS_psubq, INS_psubq, INS_invalid, INS_subpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_SubtractSaturate, "SubtractSaturate", SSE2, -1, 16, 2, {INS_psubsb, INS_psubusb, INS_psubsw, INS_psubusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_SubtractScalar, "SubtractScalar", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE2_UnpackHigh, "UnpackHigh", SSE2, -1, 16, 2, {INS_punpckhbw, INS_punpckhbw, INS_punpckhwd, INS_punpckhwd, INS_punpckhdq, INS_punpckhdq, INS_punpckhqdq, INS_punpckhqdq, INS_invalid, INS_unpckhpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_UnpackLow, "UnpackLow", SSE2, -1, 16, 2, {INS_punpcklbw, INS_punpcklbw, INS_punpcklwd, INS_punpcklwd, INS_punpckldq, INS_punpckldq, INS_punpcklqdq, INS_punpcklqdq, INS_invalid, INS_unpcklpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE2_Xor, "Xor", SSE2, -1, 16, 2, {INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_invalid, INS_xorpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(SSE2, Add, 16, 2, {INS_paddb, INS_paddb, INS_paddw, INS_paddw, INS_paddd, INS_paddd, INS_paddq, INS_paddq, INS_invalid, INS_addpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, AddSaturate, 16, 2, {INS_paddsb, INS_paddusb, INS_paddsw, INS_paddusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, AddScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, And, 16, 2, {INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_invalid, INS_andpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, AndNot, 16, 2, {INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_invalid, INS_andnpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, Average, 16, 2, {INS_invalid, INS_pavgb, INS_invalid, INS_pavgw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, CompareEqual, 16, 2, {INS_pcmpeqb, INS_pcmpeqb, INS_pcmpeqw, INS_pcmpeqw, INS_pcmpeqd, INS_pcmpeqd, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrderedEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareScalarEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnorderedEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareGreaterThan, 16, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrderedGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareScalarGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnorderedGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrderedGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareScalarGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnorderedGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareLessThan, 16, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrderedLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareScalarLessThan, 16, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnorderedLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrderedLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareScalarLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnorderedLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrderedNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareScalarNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnorderedNotEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_Commutative|HW_Flag_MultiIns|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, CompareNotGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarNotGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareNotGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarNotGreaterThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_SpecialImport|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareNotLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarNotLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareNotLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarNotLessThanOrEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareOrdered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarOrdered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, CompareUnordered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, CompareScalarUnordered, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, ConvertToInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertToInt32WithTruncation, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertToUInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertToVector128Double, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2pd, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2pd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertScalarToVector128Double, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2sd, INS_invalid, INS_invalid, INS_invalid, INS_cvtss2sd, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, ConvertToVector128Int32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2dq, INS_cvtpd2dq}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertScalarToVector128Int32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertToVector128Int32WithTruncation, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttps2dq, INS_cvttpd2dq}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertToVector128Single, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2ps, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtpd2ps}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, ConvertScalarToVector128Single, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsd2ss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, ConvertScalarToVector128UInt32, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, Divide, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, DivideScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, Extract, 16, 2, {INS_invalid, INS_invalid, INS_pextrw, INS_pextrw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, Insert, 16, 3, {INS_invalid, INS_invalid, INS_pinsrw, INS_pinsrw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, LoadAlignedVector128, 16, 1, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_invalid, INS_movapd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, LoadFence, 0, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, LoadHigh, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhpd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, LoadLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlpd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, LoadScalarVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movd, INS_movd, INS_movq, INS_movq, INS_invalid, INS_movsdsse2}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, LoadVector128, 16, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_invalid, INS_movupd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, MaskMove, 16, 3, {INS_maskmovdqu, INS_maskmovdqu, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, Max, 16, 2, {INS_invalid, INS_pmaxub, INS_pmaxsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, MemoryFence, 0, 0, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Special, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, MaxScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, Min, 16, 2, {INS_invalid, INS_pminub, INS_pminsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, MinScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, MoveMask, 16, 1, {INS_pmovmskb, INS_pmovmskb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movmskpd}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(SSE2, MoveScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movq, INS_movq, INS_invalid, INS_movsdsse2}, HW_Category_SIMDScalar, HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(SSE2, Multiply, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmuludq, INS_invalid, INS_mulpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, MultiplyHigh, 16, 2, {INS_invalid, INS_invalid, INS_pmulhw, INS_pmulhuw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, MultiplyAddAdjacent, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmaddwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, MultiplyLow, 16, 2, {INS_invalid, INS_invalid, INS_pmullw, INS_pmullw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, MultiplyScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, Or, 16, 2, {INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_invalid, INS_orpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE2, PackSignedSaturate, 16, 2, {INS_packsswb, INS_invalid, INS_packssdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, PackUnsignedSaturate, 16, 2, {INS_invalid, INS_packuswb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, SumAbsoluteDifferences, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_psadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, ShiftLeftLogical, 16, 2, {INS_invalid, INS_invalid, INS_psllw, INS_psllw, INS_pslld, INS_pslld, INS_psllq, INS_psllq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, ShiftLeftLogical128BitLane, 16, 2, {INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, ShiftRightArithmetic, 16, 2, {INS_invalid, INS_invalid, INS_psraw, INS_invalid, INS_psrad, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, ShiftRightLogical, 16, 2, {INS_invalid, INS_invalid, INS_psrlw, INS_psrlw, INS_psrld, INS_psrld, INS_psrlq, INS_psrlq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, ShiftRightLogical128BitLane, 16, 2, {INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, Shuffle, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pshufd, INS_pshufd, INS_invalid, INS_invalid, INS_invalid, INS_shufpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, ShuffleHigh, 16, 2, {INS_invalid, INS_invalid, INS_pshufhw, INS_pshufhw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, ShuffleLow, 16, 2, {INS_invalid, INS_invalid, INS_pshuflw, INS_pshuflw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE2, Sqrt, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, SqrtScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, Store, 16, 2, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_invalid, INS_movupd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, StoreAligned, 16, 2, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_invalid, INS_movapd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, StoreAlignedNonTemporal, 16, 2, {INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_invalid, INS_movntpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, StoreHigh, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movhpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, StoreLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movlpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, StoreNonTemporal, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movnti, INS_movnti, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, StoreScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movd, INS_movd, INS_movq, INS_movq, INS_invalid, INS_movsdsse2}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2, Subtract, 16, 2, {INS_psubb, INS_psubb, INS_psubw, INS_psubw, INS_psubd, INS_psubd, INS_psubq, INS_psubq, INS_invalid, INS_subpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, SubtractSaturate, 16, 2, {INS_psubsb, INS_psubusb, INS_psubsw, INS_psubusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, SubtractScalar, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE2, UnpackHigh, 16, 2, {INS_punpckhbw, INS_punpckhbw, INS_punpckhwd, INS_punpckhwd, INS_punpckhdq, INS_punpckhdq, INS_punpckhqdq, INS_punpckhqdq, INS_invalid, INS_unpckhpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, UnpackLow, 16, 2, {INS_punpcklbw, INS_punpcklbw, INS_punpcklwd, INS_punpcklwd, INS_punpckldq, INS_punpckldq, INS_punpcklqdq, INS_punpcklqdq, INS_invalid, INS_unpcklpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE2, Xor, 16, 2, {INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_invalid, INS_xorpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE2 64-bit-only Intrinsics
-HARDWARE_INTRINSIC(SSE2_X64_ConvertToInt64, "ConvertToInt64", SSE2_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_cvtsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_X64_ConvertToInt64WithTruncation, "ConvertToInt64WithTruncation", SSE2_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_X64_ConvertToUInt64, "ConvertToUInt64", SSE2_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_X64_ConvertScalarToVector128Double, "ConvertScalarToVector128Double", SSE2_X64, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2sd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(SSE2_X64_ConvertScalarToVector128Int64, "ConvertScalarToVector128Int64", SSE2_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(SSE2_X64_ConvertScalarToVector128UInt64, "ConvertScalarToVector128UInt64", SSE2_X64, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
-HARDWARE_INTRINSIC(SSE2_X64_StoreNonTemporal, "StoreNonTemporal", SSE2_X64, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movnti, INS_movnti, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2_X64, ConvertToInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_cvtsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2_X64, ConvertToInt64WithTruncation, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttsd2si}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2_X64, ConvertToUInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2_X64, ConvertScalarToVector128Double, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtsi2sd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(SSE2_X64, ConvertScalarToVector128Int64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(SSE2_X64, ConvertScalarToVector128UInt64, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_i2xmm, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(SSE2_X64, StoreNonTemporal, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movnti, INS_movnti, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromSecondArg)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE3 Intrinsics
-HARDWARE_INTRINSIC(SSE3_AddSubtract, "AddSubtract", SSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addsubps, INS_addsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE3_HorizontalAdd, "HorizontalAdd", SSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_haddps, INS_haddpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE3_HorizontalSubtract, "HorizontalSubtract", SSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_hsubps, INS_hsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE3_LoadAndDuplicateToVector128, "LoadAndDuplicateToVector128", SSE3, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_lddqu, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movddup}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE3_LoadDquVector128, "LoadDquVector128", SSE3, -1, 16, 1, {INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE3_MoveAndDuplicate, "MoveAndDuplicate", SSE3, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movddup}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE3_MoveHighAndDuplicate, "MoveHighAndDuplicate", SSE3, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movshdup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE3_MoveLowAndDuplicate, "MoveLowAndDuplicate", SSE3, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movsldup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE3, AddSubtract, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addsubps, INS_addsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE3, HorizontalAdd, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_haddps, INS_haddpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE3, HorizontalSubtract, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_hsubps, INS_hsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE3, LoadAndDuplicateToVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_lddqu, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movddup}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE3, LoadDquVector128, 16, 1, {INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE3, MoveAndDuplicate, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movddup}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE3, MoveHighAndDuplicate, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movshdup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE3, MoveLowAndDuplicate, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movsldup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSSE3 Intrinsics
-HARDWARE_INTRINSIC(SSSE3_Abs, "Abs", SSSE3, -1, 16, 1, {INS_invalid, INS_pabsb, INS_invalid, INS_pabsw, INS_invalid, INS_pabsd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSSE3_AlignRight, "AlignRight", SSSE3, -1, 16, 3, {INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSSE3_HorizontalAdd, "HorizontalAdd", SSSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_phaddw, INS_invalid, INS_phaddd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_HorizontalAddSaturate, "HorizontalAddSaturate", SSSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_phaddsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_HorizontalSubtract, "HorizontalSubtract", SSSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_phsubw, INS_invalid, INS_phsubd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_HorizontalSubtractSaturate, "HorizontalSubtractSaturate", SSSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_phsubsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_MultiplyAddAdjacent, "MultiplyAddAdjacent", SSSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_pmaddubsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_MultiplyHighRoundScale, "MultiplyHighRoundScale", SSSE3, -1, 16, 2, {INS_invalid, INS_invalid, INS_pmulhrsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_Shuffle, "Shuffle", SSSE3, -1, 16, 2, {INS_pshufb, INS_pshufb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSSE3_Sign, "Sign", SSSE3, -1, 16, 2, {INS_psignb, INS_invalid, INS_psignw, INS_invalid, INS_psignd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, Abs, 16, 1, {INS_pabsb, INS_invalid, INS_pabsw, INS_invalid, INS_pabsd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(SSSE3, AlignRight, 16, 3, {INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSSE3, HorizontalAdd, 16, 2, {INS_invalid, INS_invalid, INS_phaddw, INS_invalid, INS_phaddd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, HorizontalAddSaturate, 16, 2, {INS_invalid, INS_invalid, INS_phaddsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, HorizontalSubtract, 16, 2, {INS_invalid, INS_invalid, INS_phsubw, INS_invalid, INS_phsubd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, HorizontalSubtractSaturate, 16, 2, {INS_invalid, INS_invalid, INS_phsubsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, MultiplyAddAdjacent, 16, 2, {INS_invalid, INS_invalid, INS_pmaddubsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, MultiplyHighRoundScale, 16, 2, {INS_invalid, INS_invalid, INS_pmulhrsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, Shuffle, 16, 2, {INS_pshufb, INS_pshufb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSSE3, Sign, 16, 2, {INS_psignb, INS_invalid, INS_psignw, INS_invalid, INS_psignd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE41 Intrinsics
-HARDWARE_INTRINSIC(SSE41_Blend, "Blend", SSE41, -1, 16, 3, {INS_invalid, INS_invalid, INS_pblendw, INS_pblendw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blendps, INS_blendpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE41_BlendVariable, "BlendVariable", SSE41, -1, 16, 3, {INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_blendvps, INS_blendvpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE41_Ceiling, "Ceiling", SSE41, 10, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_CeilingScalar, "CeilingScalar", SSE41, 10, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_CompareEqual, "CompareEqual", SSE41, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pcmpeqq, INS_pcmpeqq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE41_ConvertToVector128Int16, "ConvertToVector128Int16", SSE41, -1, 16, 1, {INS_pmovsxbw, INS_pmovzxbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_ConvertToVector128Int32, "ConvertToVector128Int32", SSE41, -1, 16, 1, {INS_pmovsxbd, INS_pmovzxbd, INS_pmovsxwd, INS_pmovzxwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_ConvertToVector128Int64, "ConvertToVector128Int64", SSE41, -1, 16, 1, {INS_pmovsxbq, INS_pmovzxbq, INS_pmovsxwq, INS_pmovzxwq, INS_pmovsxdq, INS_pmovzxdq, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_DotProduct, "DotProduct", SSE41, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_dpps, INS_dppd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE41_Extract, "Extract", SSE41, -1, 16, 2, {INS_pextrb, INS_pextrb, INS_invalid, INS_invalid, INS_pextrd, INS_pextrd, INS_invalid, INS_invalid, INS_extractps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_BaseTypeFromFirstArg|HW_Flag_MultiIns|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_Floor, "Floor", SSE41, 9, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_FloorScalar, "FloorScalar", SSE41, 9, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_Insert, "Insert", SSE41, -1, 16, 3, {INS_pinsrb, INS_pinsrb, INS_invalid, INS_invalid, INS_pinsrd, INS_pinsrd, INS_invalid, INS_invalid, INS_insertps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE41_LoadAlignedVector128NonTemporal, "LoadAlignedVector128NonTemporal", SSE41, -1, 16, 1, {INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_Max, "Max", SSE41, -1, 16, 2, {INS_pmaxsb, INS_invalid, INS_invalid, INS_pmaxuw, INS_pmaxsd, INS_pmaxud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE41_Min, "Min", SSE41, -1, 16, 2, {INS_pminsb, INS_invalid, INS_invalid, INS_pminuw, INS_pminsd, INS_pminud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE41_MinHorizontal, "MinHorizontal", SSE41, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_phminposuw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_MultipleSumAbsoluteDifferences, "MultipleSumAbsoluteDifferences", SSE41, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_mpsadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(SSE41_Multiply, "Multiply", SSE41, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmuldq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE41_MultiplyLow, "MultiplyLow", SSE41, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmulld, INS_pmulld, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE41_PackUnsignedSaturate, "PackUnsignedSaturate", SSE41, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_packusdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(SSE41_RoundCurrentDirection, "RoundCurrentDirection", SSE41, 4, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_RoundCurrentDirectionScalar, "RoundCurrentDirectionScalar", SSE41, 4, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_RoundToNearestInteger, "RoundToNearestInteger", SSE41, 8, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_RoundToNearestIntegerScalar, "RoundToNearestIntegerScalar", SSE41, 8, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_RoundToNegativeInfinity, "RoundToNegativeInfinity", SSE41, 9, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_RoundToNegativeInfinityScalar, "RoundToNegativeInfinityScalar", SSE41, 9, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_RoundToPositiveInfinity, "RoundToPositiveInfinity", SSE41, 10, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_RoundToPositiveInfinityScalar, "RoundToPositiveInfinityScalar", SSE41, 10, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_RoundToZero, "RoundToZero", SSE41, 11, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_RoundToZeroScalar, "RoundToZeroScalar", SSE41, 11, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(SSE41_TestC, "TestC", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(SSE41_TestNotZAndNotC, "TestNotZAndNotC", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(SSE41_TestZ, "TestZ", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(SSE41, Blend, 16, 3, {INS_invalid, INS_invalid, INS_pblendw, INS_pblendw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blendps, INS_blendpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE41, BlendVariable, 16, 3, {INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_pblendvb, INS_blendvps, INS_blendvpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE41, Ceiling, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, CeilingScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, CompareEqual, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pcmpeqq, INS_pcmpeqq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE41, ConvertToVector128Int16, 16, 1, {INS_pmovsxbw, INS_pmovzxbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, ConvertToVector128Int32, 16, 1, {INS_pmovsxbd, INS_pmovzxbd, INS_pmovsxwd, INS_pmovzxwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, ConvertToVector128Int64, 16, 1, {INS_pmovsxbq, INS_pmovzxbq, INS_pmovsxwq, INS_pmovzxwq, INS_pmovsxdq, INS_pmovzxdq, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, DotProduct, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_dpps, INS_dppd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE41, Extract, 16, 2, {INS_pextrb, INS_pextrb, INS_invalid, INS_invalid, INS_pextrd, INS_pextrd, INS_invalid, INS_invalid, INS_extractps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_BaseTypeFromFirstArg|HW_Flag_MultiIns|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, Floor, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, FloorScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, Insert, 16, 3, {INS_pinsrb, INS_pinsrb, INS_invalid, INS_invalid, INS_pinsrd, INS_pinsrd, INS_invalid, INS_invalid, INS_insertps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE41, LoadAlignedVector128NonTemporal, 16, 1, {INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, Max, 16, 2, {INS_pmaxsb, INS_invalid, INS_invalid, INS_pmaxuw, INS_pmaxsd, INS_pmaxud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE41, Min, 16, 2, {INS_pminsb, INS_invalid, INS_invalid, INS_pminuw, INS_pminsd, INS_pminud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE41, MinHorizontal, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_phminposuw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, MultipleSumAbsoluteDifferences, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_mpsadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE41, Multiply, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmuldq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE41, MultiplyLow, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmulld, INS_pmulld, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE41, PackUnsignedSaturate, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_packusdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE41, RoundCurrentDirection, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, RoundCurrentDirectionScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, RoundToNearestInteger, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, RoundToNearestIntegerScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, RoundToNegativeInfinity, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, RoundToNegativeInfinityScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, RoundToPositiveInfinity, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, RoundToPositiveInfinityScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, RoundToZero, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, RoundToZeroScalar, 16, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundss, INS_roundsd}, HW_Category_SIMDScalar, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE41, TestC, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(SSE41, TestNotZAndNotC, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(SSE41, TestZ, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE41 64-bit-only Intrinsics
-HARDWARE_INTRINSIC(SSE41_X64_Extract, "Extract", SSE41_X64, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pextrq, INS_pextrq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_BaseTypeFromFirstArg|HW_Flag_MultiIns|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_X64_Insert, "Insert", SSE41_X64, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pinsrq, INS_pinsrq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(SSE41_X64, Extract, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pextrq, INS_pextrq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_BaseTypeFromFirstArg|HW_Flag_MultiIns|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41_X64, Insert, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pinsrq, INS_pinsrq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE42 Intrinsics
-HARDWARE_INTRINSIC(SSE42_Crc32, "Crc32", SSE42, -1, 0, 2, {INS_invalid, INS_crc32, INS_invalid, INS_crc32, INS_invalid, INS_crc32, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed)
-HARDWARE_INTRINSIC(SSE42_CompareGreaterThan, "CompareGreaterThan", SSE42, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pcmpgtq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE42, Crc32, 0, 2, {INS_invalid, INS_crc32, INS_invalid, INS_crc32, INS_invalid, INS_crc32, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed)
+HARDWARE_INTRINSIC(SSE42, CompareGreaterThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pcmpgtq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE42, CompareLessThan, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pcmpgtq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// SSE42 Intrinsics
-HARDWARE_INTRINSIC(SSE42_X64_Crc32, "Crc32", SSE42_X64, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_crc32, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed)
+HARDWARE_INTRINSIC(SSE42_X64, Crc32, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_crc32, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// AVX Intrinsics
-HARDWARE_INTRINSIC(AVX_Add, "Add", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addps, INS_addpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX_AddSubtract, "AddSubtract", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addsubps, INS_addsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_And, "And", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andps, INS_andpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX_AndNot, "AndNot", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andnps, INS_andnpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_Blend, "Blend", AVX, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blendps, INS_blendpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX_BlendVariable, "BlendVariable", AVX, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vblendvps, INS_vblendvpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_Ceiling, "Ceiling", AVX, 10, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_BroadcastScalarToVector128, "BroadcastScalarToVector128", AVX, -1, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vbroadcastss, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_BroadcastScalarToVector256, "BroadcastScalarToVector256", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vbroadcastss, INS_vbroadcastsd}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_BroadcastVector128ToVector256, "BroadcastVector128ToVector256", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vbroadcastf128, INS_vbroadcastf128}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_Compare, "Compare", AVX, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_IMM, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_CompareScalar, "CompareScalar", AVX, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_cmpsd}, HW_Category_IMM, HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(AVX_ConvertToVector128Int32, "ConvertToVector128Int32", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtpd2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ConvertToVector128Single, "ConvertToVector128Single", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtpd2ps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ConvertToVector256Int32, "ConvertToVector256Int32", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ConvertToVector256Single, "ConvertToVector256Single", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2ps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ConvertToVector256Double, "ConvertToVector256Double", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2pd, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2pd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ConvertToVector128Int32WithTruncation, "ConvertToVector128Int32WithTruncation", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttpd2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ConvertToVector256Int32WithTruncation, "ConvertToVector256Int32WithTruncation", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttps2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_Divide, "Divide", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divps, INS_divpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_DotProduct, "DotProduct", AVX, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_dpps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX_DuplicateEvenIndexed, "DuplicateEvenIndexed", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movsldup, INS_movddup}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_DuplicateOddIndexed, "DuplicateOddIndexed", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movshdup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ExtractVector128, "ExtractVector128", AVX, -1, 32, 2, {INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX_Floor, "Floor", AVX, 9, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_HorizontalAdd, "HorizontalAdd", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_haddps, INS_haddpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_HorizontalSubtract, "HorizontalSubtract", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_hsubps, INS_hsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_InsertVector128, "InsertVector128", AVX, -1, 32, 3, {INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX_LoadAlignedVector256, "LoadAlignedVector256", AVX, -1, 32, 1, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movaps, INS_movapd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_LoadDquVector256, "LoadDquVector256", AVX, -1, 32, 1, {INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_LoadVector256, "LoadVector256", AVX, -1, 32, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_Max, "Max", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxps, INS_maxpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX_Min, "Min", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minps, INS_minpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX_MaskLoad, "MaskLoad", AVX, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vmaskmovps, INS_vmaskmovpd}, HW_Category_MemoryLoad, HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX_MaskStore, "MaskStore", AVX, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vmaskmovps, INS_vmaskmovpd}, HW_Category_MemoryStore, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(AVX_MoveMask, "MoveMask", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movmskps, INS_movmskpd}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX_Multiply, "Multiply", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulps, INS_mulpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX_Or, "Or", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_orps, INS_orpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX_Permute, "Permute", AVX, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermilps, INS_vpermilpd}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX_Permute2x128, "Permute2x128", AVX, -1, 32, 3, {INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX_PermuteVar, "PermuteVar", AVX, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermilpsvar, INS_vpermilpdvar}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX_Reciprocal, "Reciprocal", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rcpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_ReciprocalSqrt, "ReciprocalSqrt", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rsqrtps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_RoundCurrentDirection, "RoundCurrentDirection", AVX, 4, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_RoundToNearestInteger, "RoundToNearestInteger", AVX, 8, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_RoundToNegativeInfinity, "RoundToNegativeInfinity", AVX, 9, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_RoundToPositiveInfinity, "RoundToPositiveInfinity", AVX, 10, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_RoundToZero, "RoundToZero", AVX, 11, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_Shuffle, "Shuffle", AVX, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_shufps, INS_shufpd}, HW_Category_IMM, HW_Flag_NoRMWSemantics|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX_Sqrt, "Sqrt", AVX, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtps, INS_sqrtpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_Store, "Store", AVX, -1, 32, 2, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(AVX_StoreAligned, "StoreAligned", AVX, -1, 32, 2, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movaps, INS_movapd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(AVX_StoreAlignedNonTemporal, "StoreAlignedNonTemporal", AVX, -1, 32, 2, {INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntps, INS_movntpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(AVX_Subtract, "Subtract", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subps, INS_subpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_TestC, "TestC", AVX, -1, 0, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX_TestNotZAndNotC, "TestNotZAndNotC", AVX, -1, 0, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX_TestZ, "TestZ", AVX, -1, 0, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX_UnpackHigh, "UnpackHigh", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpckhps, INS_unpckhpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_UnpackLow, "UnpackLow", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpcklps, INS_unpcklpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX_Xor, "Xor", AVX, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xorps, INS_xorpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(AVX, Add, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addps, INS_addpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, AddSubtract, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_addsubps, INS_addsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, And, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andps, INS_andpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, AndNot, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andnps, INS_andnpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, Blend, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blendps, INS_blendpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, BlendVariable, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vblendvps, INS_vblendvpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, Ceiling, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, BroadcastScalarToVector128, 16, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vbroadcastss, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, BroadcastScalarToVector256, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vbroadcastss, INS_vbroadcastsd}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, BroadcastVector128ToVector256, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vbroadcastf128, INS_vbroadcastf128}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, Compare, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_IMM, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareEqual, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, CompareGreaterThan, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareGreaterThanOrEqual, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareLessThan, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareLessThanOrEqual, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareNotEqual, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, CompareNotGreaterThan, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareNotGreaterThanOrEqual, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareNotLessThan, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareNotLessThanOrEqual, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareOrdered, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareUnordered, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpps, INS_cmppd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, CompareScalar, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cmpss, INS_cmpsd}, HW_Category_IMM, HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(AVX, ConvertToVector128Int32, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtpd2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ConvertToVector128Single, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtpd2ps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ConvertToVector256Int32, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ConvertToVector256Single, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2ps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ConvertToVector256Double, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvtdq2pd, INS_invalid, INS_invalid, INS_invalid, INS_cvtps2pd, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ConvertToVector128Int32WithTruncation, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttpd2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ConvertToVector256Int32WithTruncation, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_cvttps2dq, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, Divide, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_divps, INS_divpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, DotProduct, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_dpps, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, DuplicateEvenIndexed, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movsldup, INS_movddup}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, DuplicateOddIndexed, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movshdup, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ExtractVector128, 32, 2, {INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128, INS_vextractf128}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, Floor, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, HorizontalAdd, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_haddps, INS_haddpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, HorizontalSubtract, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_hsubps, INS_hsubpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, InsertVector128, 32, 3, {INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128, INS_vinsertf128}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, LoadAlignedVector256, 32, 1, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movaps, INS_movapd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, LoadDquVector256, 32, 1, {INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_lddqu, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, LoadVector256, 32, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, Max, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_maxps, INS_maxpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, Min, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_minps, INS_minpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, MaskLoad, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vmaskmovps, INS_vmaskmovpd}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, MaskStore, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vmaskmovps, INS_vmaskmovpd}, HW_Category_MemoryStore, HW_Flag_NoContainment|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AVX, MoveMask, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movmskps, INS_movmskpd}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX, Multiply, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulps, INS_mulpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, Or, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_orps, INS_orpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX, Permute, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermilps, INS_vpermilpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, Permute2x128, 32, 3, {INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128, INS_vperm2f128}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, PermuteVar, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermilpsvar, INS_vpermilpdvar}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, Reciprocal, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rcpps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, ReciprocalSqrt, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rsqrtps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, RoundCurrentDirection, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, RoundToNearestInteger, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, RoundToNegativeInfinity, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, RoundToPositiveInfinity, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, RoundToZero, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_roundps, INS_roundpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, Shuffle, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_shufps, INS_shufpd}, HW_Category_IMM, HW_Flag_NoRMWSemantics|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX, Sqrt, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sqrtps, INS_sqrtpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, Store, 32, 2, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movups, INS_movupd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AVX, StoreAligned, 32, 2, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movaps, INS_movapd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AVX, StoreAlignedNonTemporal, 32, 2, {INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntps, INS_movntpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AVX, Subtract, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_subps, INS_subpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, TestC, -1, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX, TestNotZAndNotC, -1, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX, TestZ, -1, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX, UnpackHigh, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpckhps, INS_unpckhpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, UnpackLow, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_unpcklps, INS_unpcklpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX, Xor, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xorps, INS_xorpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// AVX2 Intrinsics
-HARDWARE_INTRINSIC(AVX2_Abs, "Abs", AVX2, -1, 32, 1, {INS_pabsb, INS_pabsb, INS_pabsw, INS_pabsw, INS_pabsd, INS_pabsd, INS_paddq, INS_paddq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX2_Add, "Add", AVX2, -1, 32, 2, {INS_paddb, INS_paddb, INS_paddw, INS_paddw, INS_paddd, INS_paddd, INS_paddq, INS_paddq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_AddSaturate, "AddSaturate", AVX2, -1, 32, 2, {INS_paddsb, INS_paddusb, INS_paddsw, INS_paddusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_AlignRight, "AlignRight", AVX2, -1, 32, 3, {INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_And, "And", AVX2, -1, 32, 2, {INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_AndNot, "AndNot", AVX2, -1, 32, 2, {INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_Average, "Average", AVX2, -1, 32, 2, {INS_invalid, INS_pavgb, INS_invalid, INS_pavgw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_Blend, "Blend", AVX2, -1, 0, 3, {INS_invalid, INS_invalid, INS_pblendw, INS_pblendw, INS_vpblendd, INS_vpblendd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_UnfixedSIMDSize|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_BlendVariable, "BlendVariable", AVX2, -1, 32, 3, {INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_BroadcastScalarToVector128, "BroadcastScalarToVector128", AVX2, -1, 16, 1, {INS_vpbroadcastb, INS_vpbroadcastb, INS_vpbroadcastw, INS_vpbroadcastw, INS_vpbroadcastd, INS_vpbroadcastd, INS_vpbroadcastq, INS_vpbroadcastq, INS_vbroadcastss, INS_movddup}, HW_Category_SIMDScalar, HW_Flag_MaybeMemoryLoad)
-HARDWARE_INTRINSIC(AVX2_BroadcastScalarToVector256, "BroadcastScalarToVector256", AVX2, -1, 32, 1, {INS_vpbroadcastb, INS_vpbroadcastb, INS_vpbroadcastw, INS_vpbroadcastw, INS_vpbroadcastd, INS_vpbroadcastd, INS_vpbroadcastq, INS_vpbroadcastq, INS_vbroadcastss, INS_vbroadcastsd}, HW_Category_SIMDScalar, HW_Flag_MaybeMemoryLoad)
-HARDWARE_INTRINSIC(AVX2_BroadcastVector128ToVector256, "BroadcastVector128ToVector256", AVX2, -1, 32, 1, {INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_CompareEqual, "CompareEqual", AVX2, -1, 32, 2, {INS_pcmpeqb, INS_pcmpeqb, INS_pcmpeqw, INS_pcmpeqw, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqq, INS_pcmpeqq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_CompareGreaterThan, "CompareGreaterThan", AVX2, -1, 32, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_pcmpgtq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_ExtractVector128, "ExtractVector128", AVX2, -1, 32, 2, {INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ConvertToInt32, "ConvertToInt32", AVX2, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX2_ConvertToUInt32, "ConvertToUInt32", AVX2, -1, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX2_ConvertToVector256Int16, "ConvertToVector256Int16", AVX2, -1, 32, 1, {INS_pmovsxbw, INS_pmovzxbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX2_ConvertToVector256Int32, "ConvertToVector256Int32", AVX2, -1, 32, 1, {INS_pmovsxbd, INS_pmovzxbd, INS_pmovsxwd, INS_pmovzxwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX2_ConvertToVector256Int64, "ConvertToVector256Int64", AVX2, -1, 32, 1, {INS_pmovsxbq, INS_pmovzxbq, INS_pmovsxwq, INS_pmovzxwq, INS_pmovsxdq, INS_pmovzxdq, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX2_GatherVector128, "GatherVector128", AVX2, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_SpecialCodeGen|HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AVX2_GatherVector256, "GatherVector256", AVX2, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AVX2_GatherMaskVector128, "GatherMaskVector128", AVX2, -1, 16, 5, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AVX2_GatherMaskVector256, "GatherMaskVector256", AVX2, -1, 32, 5, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(AVX2_HorizontalAdd, "HorizontalAdd", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_phaddw, INS_invalid, INS_phaddd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_HorizontalAddSaturate, "HorizontalAddSaturate", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_phaddsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_HorizontalSubtract, "HorizontalSubtract", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_phsubw, INS_invalid, INS_phsubd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_HorizontalSubtractSaturate, "HorizontalSubtractSaturate", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_phsubsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_InsertVector128, "InsertVector128", AVX2, -1, 32, 3, {INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_LoadAlignedVector256NonTemporal, "LoadAlignedVector256NonTemporal", AVX2, -1, 32, 1, {INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_MaskLoad, "MaskLoad", AVX2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpmaskmovd, INS_vpmaskmovd, INS_vpmaskmovq, INS_vpmaskmovq, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX2_MaskStore, "MaskStore", AVX2, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpmaskmovd, INS_vpmaskmovd, INS_vpmaskmovq, INS_vpmaskmovq, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoContainment|HW_Flag_UnfixedSIMDSize|HW_Flag_BaseTypeFromSecondArg)
-HARDWARE_INTRINSIC(AVX2_Max, "Max", AVX2, -1, 32, 2, {INS_pmaxsb, INS_pmaxub, INS_pmaxsw, INS_pmaxuw, INS_pmaxsd, INS_pmaxud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_Min, "Min", AVX2, -1, 32, 2, {INS_pminsb, INS_pminub, INS_pminsw, INS_pminuw, INS_pminsd, INS_pminud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_MoveMask, "MoveMask", AVX2, -1, 32, 1, {INS_pmovmskb, INS_pmovmskb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
-HARDWARE_INTRINSIC(AVX2_Multiply, "Multiply", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmuldq, INS_pmuludq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_MultipleSumAbsoluteDifferences, "MultipleSumAbsoluteDifferences", AVX2, -1, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_mpsadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_MultiplyAddAdjacent, "MultiplyAddAdjacent", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_pmaddubsw, INS_invalid, INS_pmaddwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_MultiplyHigh, "MultiplyHigh", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_pmulhw, INS_pmulhuw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_MultiplyHighRoundScale, "MultiplyHighRoundScale", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_pmulhrsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_MultiplyLow, "MultiplyLow", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_pmullw, INS_pmullw, INS_pmulld, INS_pmulld, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_Or, "Or", AVX2, -1, 32, 2, {INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-HARDWARE_INTRINSIC(AVX2_Permute2x128, "Permute2x128", AVX2, -1, 32, 3, {INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_Permute4x64, "Permute4x64", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermq, INS_vpermq, INS_invalid, INS_vpermpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_PermuteVar8x32, "PermuteVar8x32", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermd, INS_vpermd, INS_invalid, INS_invalid, INS_vpermps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport)
-HARDWARE_INTRINSIC(AVX2_PackSignedSaturate, "PackSignedSaturate", AVX2, -1, 32, 2, {INS_packsswb, INS_invalid, INS_packssdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_PackUnsignedSaturate, "PackUnsignedSaturate", AVX2, -1, 32, 2, {INS_invalid, INS_packuswb, INS_invalid, INS_packusdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_ShiftLeftLogical, "ShiftLeftLogical", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_psllw, INS_psllw, INS_pslld, INS_pslld, INS_psllq, INS_psllq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ShiftLeftLogical128BitLane, "ShiftLeftLogical128BitLane", AVX2, -1, 32, 2, {INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ShiftLeftLogicalVariable, "ShiftLeftLogicalVariable", AVX2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpsllvd, INS_vpsllvd, INS_vpsllvq, INS_vpsllvq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX2_ShiftRightArithmetic, "ShiftRightArithmetic", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_psraw, INS_invalid, INS_psrad, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ShiftRightArithmeticVariable, "ShiftRightArithmeticVariable", AVX2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpsravd, INS_vpsravd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX2_ShiftRightLogical, "ShiftRightLogical", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_psrlw, INS_psrlw, INS_psrld, INS_psrld, INS_psrlq, INS_psrlq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ShiftRightLogical128BitLane, "ShiftRightLogical128BitLane", AVX2, -1, 32, 2, {INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ShiftRightLogicalVariable, "ShiftRightLogicalVariable", AVX2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpsrlvd, INS_vpsrlvd, INS_vpsrlvq, INS_vpsrlvq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(AVX2_Shuffle, "Shuffle", AVX2, -1, 32, 2, {INS_pshufb, INS_pshufb, INS_invalid, INS_invalid, INS_pshufd, INS_pshufd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_MaybeIMM)
-HARDWARE_INTRINSIC(AVX2_ShuffleHigh, "ShuffleHigh", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_pshufhw, INS_pshufhw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_ShuffleLow, "ShuffleLow", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_pshuflw, INS_pshuflw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
-HARDWARE_INTRINSIC(AVX2_Sign, "Sign", AVX2, -1, 32, 2, {INS_psignb, INS_invalid, INS_psignw, INS_invalid, INS_psignd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_SumAbsoluteDifferences, "SumAbsoluteDifferences", AVX2, -1, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_psadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_Subtract, "Subtract", AVX2, -1, 32, 2, {INS_psubb, INS_psubb, INS_psubw, INS_psubw, INS_psubd, INS_psubd, INS_psubq, INS_psubq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_SubtractSaturate, "SubtractSaturate", AVX2, -1, 32, 2, {INS_psubsb, INS_psubusb, INS_psubsw, INS_psubusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_UnpackHigh, "UnpackHigh", AVX2, -1, 32, 2, {INS_punpckhbw, INS_punpckhbw, INS_punpckhwd, INS_punpckhwd, INS_punpckhdq, INS_punpckhdq, INS_punpckhqdq, INS_punpckhqdq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_UnpackLow, "UnpackLow", AVX2, -1, 32, 2, {INS_punpcklbw, INS_punpcklbw, INS_punpcklwd, INS_punpcklwd, INS_punpckldq, INS_punpckldq, INS_punpcklqdq, INS_punpcklqdq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AVX2_Xor, "Xor", AVX2, -1, 32, 2, {INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
-
-// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+HARDWARE_INTRINSIC(AVX2, Abs, 32, 1, {INS_pabsb, INS_invalid, INS_pabsw, INS_invalid, INS_pabsd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX2, Add, 32, 2, {INS_paddb, INS_paddb, INS_paddw, INS_paddw, INS_paddd, INS_paddd, INS_paddq, INS_paddq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, AddSaturate, 32, 2, {INS_paddsb, INS_paddusb, INS_paddsw, INS_paddusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, AlignRight, 32, 3, {INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_palignr, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, And, 32, 2, {INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, AndNot, 32, 2, {INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, Average, 32, 2, {INS_invalid, INS_pavgb, INS_invalid, INS_pavgw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, Blend, -1, 3, {INS_invalid, INS_invalid, INS_pblendw, INS_pblendw, INS_vpblendd, INS_vpblendd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, BlendVariable, 32, 3, {INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_vpblendvb, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, BroadcastScalarToVector128, 16, 1, {INS_vpbroadcastb, INS_vpbroadcastb, INS_vpbroadcastw, INS_vpbroadcastw, INS_vpbroadcastd, INS_vpbroadcastd, INS_vpbroadcastq, INS_vpbroadcastq, INS_vbroadcastss, INS_movddup}, HW_Category_SIMDScalar, HW_Flag_MaybeMemoryLoad)
+HARDWARE_INTRINSIC(AVX2, BroadcastScalarToVector256, 32, 1, {INS_vpbroadcastb, INS_vpbroadcastb, INS_vpbroadcastw, INS_vpbroadcastw, INS_vpbroadcastd, INS_vpbroadcastd, INS_vpbroadcastq, INS_vpbroadcastq, INS_vbroadcastss, INS_vbroadcastsd}, HW_Category_SIMDScalar, HW_Flag_MaybeMemoryLoad)
+HARDWARE_INTRINSIC(AVX2, BroadcastVector128ToVector256, 32, 1, {INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_vbroadcasti128, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, CompareEqual, 32, 2, {INS_pcmpeqb, INS_pcmpeqb, INS_pcmpeqw, INS_pcmpeqw, INS_pcmpeqd, INS_pcmpeqd, INS_pcmpeqq, INS_pcmpeqq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, CompareGreaterThan, 32, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_pcmpgtq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, CompareLessThan, 32, 2, {INS_pcmpgtb, INS_invalid, INS_pcmpgtw, INS_invalid, INS_pcmpgtd, INS_invalid, INS_pcmpgtq, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, ExtractVector128, 32, 2, {INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_vextracti128, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ConvertToInt32, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX2, ConvertToUInt32, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mov_xmm2i, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX2, ConvertToVector256Int16, 32, 1, {INS_pmovsxbw, INS_pmovzxbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX2, ConvertToVector256Int32, 32, 1, {INS_pmovsxbd, INS_pmovzxbd, INS_pmovsxwd, INS_pmovzxwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX2, ConvertToVector256Int64, 32, 1, {INS_pmovsxbq, INS_pmovzxbq, INS_pmovsxwq, INS_pmovzxwq, INS_pmovsxdq, INS_pmovzxdq, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX2, GatherVector128, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(AVX2, GatherVector256, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(AVX2, GatherMaskVector128, 16, 5, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(AVX2, GatherMaskVector256, 32, 5, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpgatherdd, INS_vpgatherdd, INS_vpgatherdq, INS_vpgatherdq, INS_vgatherdps, INS_vgatherdpd}, HW_Category_IMM, HW_Flag_MaybeMemoryLoad|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(AVX2, HorizontalAdd, 32, 2, {INS_invalid, INS_invalid, INS_phaddw, INS_invalid, INS_phaddd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, HorizontalAddSaturate, 32, 2, {INS_invalid, INS_invalid, INS_phaddsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, HorizontalSubtract, 32, 2, {INS_invalid, INS_invalid, INS_phsubw, INS_invalid, INS_phsubd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, HorizontalSubtractSaturate, 32, 2, {INS_invalid, INS_invalid, INS_phsubsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, InsertVector128, 32, 3, {INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_vinserti128, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, LoadAlignedVector256NonTemporal, 32, 1, {INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, MaskLoad, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpmaskmovd, INS_vpmaskmovd, INS_vpmaskmovq, INS_vpmaskmovq, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, MaskStore, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpmaskmovd, INS_vpmaskmovd, INS_vpmaskmovq, INS_vpmaskmovq, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_NoContainment|HW_Flag_BaseTypeFromSecondArg)
+HARDWARE_INTRINSIC(AVX2, Max, 32, 2, {INS_pmaxsb, INS_pmaxub, INS_pmaxsw, INS_pmaxuw, INS_pmaxsd, INS_pmaxud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, Min, 32, 2, {INS_pminsb, INS_pminub, INS_pminsw, INS_pminuw, INS_pminsd, INS_pminud, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, MoveMask, 32, 1, {INS_pmovmskb, INS_pmovmskb, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg)
+HARDWARE_INTRINSIC(AVX2, Multiply, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pmuldq, INS_pmuludq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, MultipleSumAbsoluteDifferences, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_mpsadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, MultiplyAddAdjacent, 32, 2, {INS_invalid, INS_invalid, INS_pmaddubsw, INS_invalid, INS_pmaddwd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, MultiplyHigh, 32, 2, {INS_invalid, INS_invalid, INS_pmulhw, INS_pmulhuw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, MultiplyHighRoundScale, 32, 2, {INS_invalid, INS_invalid, INS_pmulhrsw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, MultiplyLow, 32, 2, {INS_invalid, INS_invalid, INS_pmullw, INS_pmullw, INS_pmulld, INS_pmulld, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, Or, 32, 2, {INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+HARDWARE_INTRINSIC(AVX2, Permute2x128, 32, 3, {INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_vperm2i128, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, Permute4x64, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermq, INS_vpermq, INS_invalid, INS_vpermpd}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, PermuteVar8x32, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpermd, INS_vpermd, INS_invalid, INS_invalid, INS_vpermps, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport)
+HARDWARE_INTRINSIC(AVX2, PackSignedSaturate, 32, 2, {INS_packsswb, INS_invalid, INS_packssdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, PackUnsignedSaturate, 32, 2, {INS_invalid, INS_packuswb, INS_invalid, INS_packusdw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, ShiftLeftLogical, 32, 2, {INS_invalid, INS_invalid, INS_psllw, INS_psllw, INS_pslld, INS_pslld, INS_psllq, INS_psllq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ShiftLeftLogical128BitLane, 32, 2, {INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_pslldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ShiftLeftLogicalVariable, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpsllvd, INS_vpsllvd, INS_vpsllvq, INS_vpsllvq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, ShiftRightArithmetic, 32, 2, {INS_invalid, INS_invalid, INS_psraw, INS_invalid, INS_psrad, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ShiftRightArithmeticVariable, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpsravd, INS_vpsravd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, ShiftRightLogical, 32, 2, {INS_invalid, INS_invalid, INS_psrlw, INS_psrlw, INS_psrld, INS_psrld, INS_psrlq, INS_psrlq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_MaybeIMM|HW_Flag_NoJmpTableIMM|HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ShiftRightLogical128BitLane, 32, 2, {INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_psrldq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ShiftRightLogicalVariable, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpsrlvd, INS_vpsrlvd, INS_vpsrlvq, INS_vpsrlvq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, Shuffle, 32, 2, {INS_pshufb, INS_pshufb, INS_invalid, INS_invalid, INS_pshufd, INS_pshufd, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM|HW_Flag_MaybeIMM)
+HARDWARE_INTRINSIC(AVX2, ShuffleHigh, 32, 2, {INS_invalid, INS_invalid, INS_pshufhw, INS_pshufhw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, ShuffleLow, 32, 2, {INS_invalid, INS_invalid, INS_pshuflw, INS_pshuflw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AVX2, Sign, 32, 2, {INS_psignb, INS_invalid, INS_psignw, INS_invalid, INS_psignd, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, SumAbsoluteDifferences, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_psadbw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, Subtract, 32, 2, {INS_psubb, INS_psubb, INS_psubw, INS_psubw, INS_psubd, INS_psubd, INS_psubq, INS_psubq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, SubtractSaturate, 32, 2, {INS_psubsb, INS_psubusb, INS_psubsw, INS_psubusw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, UnpackHigh, 32, 2, {INS_punpckhbw, INS_punpckhbw, INS_punpckhwd, INS_punpckhwd, INS_punpckhdq, INS_punpckhdq, INS_punpckhqdq, INS_punpckhqdq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, UnpackLow, 32, 2, {INS_punpcklbw, INS_punpcklbw, INS_punpcklwd, INS_punpcklwd, INS_punpckldq, INS_punpckldq, INS_punpcklqdq, INS_punpcklqdq, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AVX2, Xor, 32, 2, {INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
+
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// AES Intrinsics
-HARDWARE_INTRINSIC(AES_Decrypt, "Decrypt", AES, -1, 16, 2, {INS_invalid, INS_aesdec, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AES_DecryptLast, "DecryptLast", AES, -1, 16, 2, {INS_invalid, INS_aesdeclast, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AES_Encrypt, "Encrypt", AES, -1, 16, 2, {INS_invalid, INS_aesenc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AES_EncryptLast, "EncryptLast", AES, -1, 16, 2, {INS_invalid, INS_aesenclast, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AES_InverseMixColumns, "InverseMixColumns", AES, -1, 16, 1, {INS_invalid, INS_aesimc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
-HARDWARE_INTRINSIC(AES_KeygenAssist, "KeygenAssist", AES, -1, 16, 2, {INS_invalid, INS_aeskeygenassist,INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(AES, Decrypt, 16, 2, {INS_invalid, INS_aesdec, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AES, DecryptLast, 16, 2, {INS_invalid, INS_aesdeclast, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AES, Encrypt, 16, 2, {INS_invalid, INS_aesenc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AES, EncryptLast, 16, 2, {INS_invalid, INS_aesenclast, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AES, InverseMixColumns, 16, 1, {INS_invalid, INS_aesimc, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(AES, KeygenAssist, 16, 2, {INS_invalid, INS_aeskeygenassist, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// BMI1 Intrinsics
-HARDWARE_INTRINSIC(BMI1_AndNot, "AndNot", BMI1, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andn, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_ExtractLowestSetBit, "ExtractLowestSetBit", BMI1, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsi, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_GetMaskUpToLowestSetBit, "GetMaskUpToLowestSetBit", BMI1, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsmsk, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_ResetLowestSetBit, "ResetLowestSetBit", BMI1, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_TrailingZeroCount, "TrailingZeroCount", BMI1, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_tzcnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
-HARDWARE_INTRINSIC(BMI1_BitFieldExtract, "BitFieldExtract", BMI1, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bextr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns|HW_Flag_SpecialImport)
+HARDWARE_INTRINSIC(BMI1, AndNot, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andn, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1, ExtractLowestSetBit, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsi, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1, GetMaskUpToLowestSetBit, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsmsk, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1, ResetLowestSetBit, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1, TrailingZeroCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_tzcnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+HARDWARE_INTRINSIC(BMI1, BitFieldExtract, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bextr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns|HW_Flag_SpecialImport)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// BMI1 Intrinsics
-HARDWARE_INTRINSIC(BMI1_X64_AndNot, "AndNot", BMI1_X64, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andn, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_X64_ExtractLowestSetBit, "ExtractLowestSetBit", BMI1_X64, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsi, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_X64_GetMaskUpToLowestSetBit, "GetMaskUpToLowestSetBit", BMI1_X64, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsmsk, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_X64_ResetLowestSetBit, "ResetLowestSetBit", BMI1_X64, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI1_X64_TrailingZeroCount, "TrailingZeroCount", BMI1_X64, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_tzcnt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
-HARDWARE_INTRINSIC(BMI1_X64_BitFieldExtract, "BitFieldExtract", BMI1_X64, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bextr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns|HW_Flag_SpecialImport)
+HARDWARE_INTRINSIC(BMI1_X64, AndNot, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_andn, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1_X64, ExtractLowestSetBit, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsi, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1_X64, GetMaskUpToLowestSetBit, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsmsk, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1_X64, ResetLowestSetBit, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_blsr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI1_X64, TrailingZeroCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_tzcnt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+HARDWARE_INTRINSIC(BMI1_X64, BitFieldExtract, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bextr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns|HW_Flag_SpecialImport)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// BMI2 Intrinsics
-HARDWARE_INTRINSIC(BMI2_ParallelBitDeposit, "ParallelBitDeposit", BMI2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pdep, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI2_ParallelBitExtract, "ParallelBitExtract", BMI2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pext, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI2_ZeroHighBits, "ZeroHighBits", BMI2, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bzhi, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_SpecialImport)
-HARDWARE_INTRINSIC(BMI2_MultiplyNoFlags, "MultiplyNoFlags", BMI2, -1, 0, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulx, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_MaybeMemoryStore|HW_Flag_MultiIns|HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI2, ParallelBitDeposit, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pdep, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI2, ParallelBitExtract, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pext, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI2, ZeroHighBits, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bzhi, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_SpecialImport)
+HARDWARE_INTRINSIC(BMI2, MultiplyNoFlags, 0, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulx, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_MaybeMemoryStore|HW_Flag_MultiIns|HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// BMI2 Intrinsics
-HARDWARE_INTRINSIC(BMI2_X64_ParallelBitDeposit, "ParallelBitDeposit", BMI2_X64, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pdep, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI2_X64_ParallelBitExtract, "ParallelBitExtract", BMI2_X64, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pext, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(BMI2_X64_ZeroHighBits, "ZeroHighBits", BMI2_X64, -1, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bzhi, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_SpecialImport)
-HARDWARE_INTRINSIC(BMI2_X64_MultiplyNoFlags, "MultiplyNoFlags", BMI2_X64, -1, 0, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulx, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_MaybeMemoryStore|HW_Flag_MultiIns|HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI2_X64, ParallelBitDeposit, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pdep, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI2_X64, ParallelBitExtract, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pext, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(BMI2_X64, ZeroHighBits, 0, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_bzhi, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_SpecialImport)
+HARDWARE_INTRINSIC(BMI2_X64, MultiplyNoFlags, 0, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_mulx, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoContainment|HW_Flag_MaybeMemoryStore|HW_Flag_MultiIns|HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// FMA Intrinsics
-HARDWARE_INTRINSIC(FMA_MultiplyAdd, "MultiplyAdd", FMA, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmadd213ps, INS_vfmadd213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(FMA_MultiplyAddNegated, "MultiplyAddNegated", FMA, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmadd213ps, INS_vfnmadd213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(FMA_MultiplyAddNegatedScalar, "MultiplyAddNegatedScalar", FMA, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmadd213ss, INS_vfnmadd213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(FMA_MultiplyAddScalar, "MultiplyAddScalar", FMA, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmadd213ss, INS_vfmadd213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(FMA_MultiplyAddSubtract, "MultiplyAddSubtract", FMA, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmaddsub213ps, INS_vfmaddsub213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(FMA_MultiplySubtract, "MultiplySubtract", FMA, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmsub213ps, INS_vfmsub213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(FMA_MultiplySubtractAdd, "MultiplySubtractAdd", FMA, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmsubadd213ps, INS_vfmsubadd213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(FMA_MultiplySubtractNegated, "MultiplySubtractNegated", FMA, -1, 0, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmsub213ps, INS_vfnmsub213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen|HW_Flag_UnfixedSIMDSize)
-HARDWARE_INTRINSIC(FMA_MultiplySubtractScalar, "MultiplySubtractScalar", FMA, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmsub213ss, INS_vfmsub213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
-HARDWARE_INTRINSIC(FMA_MultiplySubtractNegatedScalar, "MultiplySubtractNegatedScalar", FMA, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmsub213ss, INS_vfnmsub213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(FMA, MultiplyAdd, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmadd213ps, INS_vfmadd213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(FMA, MultiplyAddNegated, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmadd213ps, INS_vfnmadd213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(FMA, MultiplyAddNegatedScalar, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmadd213ss, INS_vfnmadd213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(FMA, MultiplyAddScalar, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmadd213ss, INS_vfmadd213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(FMA, MultiplyAddSubtract, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmaddsub213ps, INS_vfmaddsub213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(FMA, MultiplySubtract, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmsub213ps, INS_vfmsub213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(FMA, MultiplySubtractAdd, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmsubadd213ps, INS_vfmsubadd213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(FMA, MultiplySubtractNegated, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmsub213ps, INS_vfnmsub213pd}, HW_Category_SimpleSIMD, HW_Flag_SpecialCodeGen)
+HARDWARE_INTRINSIC(FMA, MultiplySubtractScalar, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfmsub213ss, INS_vfmsub213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(FMA, MultiplySubtractNegatedScalar, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vfnmsub213ss, INS_vfnmsub213sd}, HW_Category_SIMDScalar, HW_Flag_SpecialCodeGen|HW_Flag_CopyUpperBits)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// LZCNT Intrinsics
-HARDWARE_INTRINSIC(LZCNT_LeadingZeroCount, "LeadingZeroCount", LZCNT, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_lzcnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+HARDWARE_INTRINSIC(LZCNT, LeadingZeroCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_lzcnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// LZCNT Intrinsics
-HARDWARE_INTRINSIC(LZCNT_X64_LeadingZeroCount, "LeadingZeroCount", LZCNT_X64, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_lzcnt, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+HARDWARE_INTRINSIC(LZCNT_X64, LeadingZeroCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_lzcnt, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// PCLMULQDQ Intrinsics
-HARDWARE_INTRINSIC(PCLMULQDQ_CarrylessMultiply, "CarrylessMultiply", PCLMULQDQ, -1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pclmulqdq, INS_pclmulqdq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
+HARDWARE_INTRINSIC(PCLMULQDQ, CarrylessMultiply, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_pclmulqdq, INS_pclmulqdq, INS_invalid, INS_invalid}, HW_Category_IMM, HW_Flag_FullRangeIMM)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// POPCNT Intrinsics
-HARDWARE_INTRINSIC(POPCNT_PopCount, "PopCount", POPCNT, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_popcnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+HARDWARE_INTRINSIC(POPCNT, PopCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_popcnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
-// Intrinsic ID Function name ISA ival SIMD size NumArg instructions Category Flags
-// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// POPCNT Intrinsics
-HARDWARE_INTRINSIC(POPCNT_X64_PopCount, "PopCount", POPCNT_X64, -1, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_popcnt, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+HARDWARE_INTRINSIC(POPCNT_X64, PopCount, 0, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_popcnt, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_NoFloatingPointUsed|HW_Flag_NoRMWSemantics|HW_Flag_MultiIns)
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
+// ISA Function name SIMD size NumArg Instructions Category Flags
+// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
+// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
// Special intrinsics that are generated during lowering
-HARDWARE_INTRINSIC(SSE_COMISS, "COMISS", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE_UCOMISS, "UCOMISS", SSE, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_COMISD, "COMISD", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE2_UCOMISD, "UCOMISD", SSE2, -1, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(SSE41_PTEST, "PTEST", SSE41, -1, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
-HARDWARE_INTRINSIC(AVX_PTEST, "PTEST", AVX, -1, 0, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, COMISS, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE, UCOMISS, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomiss, INS_invalid}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, COMISD, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_comisd}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE2, UCOMISD, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_ucomisd}, HW_Category_SIMDScalar, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(SSE41, PTEST, 16, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_invalid, INS_invalid}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
+HARDWARE_INTRINSIC(AVX, PTEST, 0, 2, {INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_ptest, INS_vtestps, INS_vtestpd}, HW_Category_SimpleSIMD, HW_Flag_NoRMWSemantics)
#endif // FEATURE_HW_INTRINSIC
diff --git a/src/coreclr/src/jit/hwintrinsicxarch.cpp b/src/coreclr/src/jit/hwintrinsicxarch.cpp
index c4f3748af47b29..214ce21496f5a7 100644
--- a/src/coreclr/src/jit/hwintrinsicxarch.cpp
+++ b/src/coreclr/src/jit/hwintrinsicxarch.cpp
@@ -19,6 +19,8 @@ static CORINFO_InstructionSet X64VersionOfIsa(CORINFO_InstructionSet isa)
{
switch (isa)
{
+ case InstructionSet_X86Base:
+ return InstructionSet_X86Base_X64;
case InstructionSet_SSE:
return InstructionSet_SSE_X64;
case InstructionSet_SSE2:
@@ -134,12 +136,16 @@ static CORINFO_InstructionSet lookupInstructionSet(const char* className)
{
return InstructionSet_LZCNT;
}
+ else if (strcmp(className, "X86Base") == 0)
+ {
+ return InstructionSet_X86Base;
+ }
return InstructionSet_ILLEGAL;
}
//------------------------------------------------------------------------
-// lookupIsa: Gets the InstructionSet for a given class name and enclsoing class name
+// lookupIsa: Gets the InstructionSet for a given class name and enclosing class name
//
// Arguments:
// className -- The name of the class associated with the InstructionSet to lookup
@@ -202,13 +208,15 @@ int HWIntrinsicInfo::lookupImmUpperBound(NamedIntrinsic id)
// isInImmRange: Check if ival is valid for the intrinsic
//
// Arguments:
-// id -- The NamedIntrinsic associated with the HWIntrinsic to lookup
-// ival -- the imm value to be checked
+// id -- the NamedIntrinsic associated with the HWIntrinsic to lookup
+// ival -- the imm value to be checked
+// simdType -- vector size
+// baseType -- base type of the Vector64/128
//
// Return Value:
// true if ival is valid for the intrinsic
//
-bool HWIntrinsicInfo::isInImmRange(NamedIntrinsic id, int ival)
+bool HWIntrinsicInfo::isInImmRange(NamedIntrinsic id, int ival, int simdSize, var_types baseType)
{
assert(HWIntrinsicInfo::lookupCategory(id) == HW_Category_IMM);
@@ -245,6 +253,95 @@ bool HWIntrinsicInfo::isAVX2GatherIntrinsic(NamedIntrinsic id)
}
}
+//------------------------------------------------------------------------
+// lookupFloatComparisonModeForSwappedArgs: Get the floating-point comparison
+// mode to use when the operands are swapped.
+//
+// Arguments:
+// comparison -- The comparison mode used for (op1, op2)
+//
+// Return Value:
+// The comparison mode to use for (op2, op1)
+//
+FloatComparisonMode HWIntrinsicInfo::lookupFloatComparisonModeForSwappedArgs(FloatComparisonMode comparison)
+{
+ switch (comparison)
+ {
+ // These comparison modes are the same even if the operands are swapped
+
+ case FloatComparisonMode::OrderedEqualNonSignaling:
+ return FloatComparisonMode::OrderedEqualNonSignaling;
+ case FloatComparisonMode::UnorderedNonSignaling:
+ return FloatComparisonMode::UnorderedNonSignaling;
+ case FloatComparisonMode::UnorderedNotEqualNonSignaling:
+ return FloatComparisonMode::UnorderedNotEqualNonSignaling;
+ case FloatComparisonMode::OrderedNonSignaling:
+ return FloatComparisonMode::OrderedNonSignaling;
+ case FloatComparisonMode::UnorderedEqualNonSignaling:
+ return FloatComparisonMode::UnorderedEqualNonSignaling;
+ case FloatComparisonMode::OrderedFalseNonSignaling:
+ return FloatComparisonMode::OrderedFalseNonSignaling;
+ case FloatComparisonMode::OrderedNotEqualNonSignaling:
+ return FloatComparisonMode::OrderedNotEqualNonSignaling;
+ case FloatComparisonMode::UnorderedTrueNonSignaling:
+ return FloatComparisonMode::UnorderedTrueNonSignaling;
+ case FloatComparisonMode::OrderedEqualSignaling:
+ return FloatComparisonMode::OrderedEqualSignaling;
+ case FloatComparisonMode::UnorderedSignaling:
+ return FloatComparisonMode::UnorderedSignaling;
+ case FloatComparisonMode::UnorderedNotEqualSignaling:
+ return FloatComparisonMode::UnorderedNotEqualSignaling;
+ case FloatComparisonMode::OrderedSignaling:
+ return FloatComparisonMode::OrderedSignaling;
+ case FloatComparisonMode::UnorderedEqualSignaling:
+ return FloatComparisonMode::UnorderedEqualSignaling;
+ case FloatComparisonMode::OrderedFalseSignaling:
+ return FloatComparisonMode::OrderedFalseSignaling;
+ case FloatComparisonMode::OrderedNotEqualSignaling:
+ return FloatComparisonMode::OrderedNotEqualSignaling;
+ case FloatComparisonMode::UnorderedTrueSignaling:
+ return FloatComparisonMode::UnorderedTrueSignaling;
+
+ // These comparison modes need a different mode if the operands are swapped
+
+ case FloatComparisonMode::OrderedLessThanSignaling:
+ return FloatComparisonMode::OrderedGreaterThanSignaling;
+ case FloatComparisonMode::OrderedLessThanOrEqualSignaling:
+ return FloatComparisonMode::OrderedGreaterThanOrEqualSignaling;
+ case FloatComparisonMode::UnorderedNotLessThanSignaling:
+ return FloatComparisonMode::UnorderedNotGreaterThanSignaling;
+ case FloatComparisonMode::UnorderedNotLessThanOrEqualSignaling:
+ return FloatComparisonMode::UnorderedNotGreaterThanOrEqualSignaling;
+ case FloatComparisonMode::UnorderedNotGreaterThanOrEqualSignaling:
+ return FloatComparisonMode::UnorderedNotLessThanOrEqualSignaling;
+ case FloatComparisonMode::UnorderedNotGreaterThanSignaling:
+ return FloatComparisonMode::UnorderedNotLessThanSignaling;
+ case FloatComparisonMode::OrderedGreaterThanOrEqualSignaling:
+ return FloatComparisonMode::OrderedLessThanOrEqualSignaling;
+ case FloatComparisonMode::OrderedGreaterThanSignaling:
+ return FloatComparisonMode::OrderedLessThanSignaling;
+ case FloatComparisonMode::OrderedLessThanNonSignaling:
+ return FloatComparisonMode::OrderedGreaterThanNonSignaling;
+ case FloatComparisonMode::OrderedLessThanOrEqualNonSignaling:
+ return FloatComparisonMode::OrderedGreaterThanOrEqualNonSignaling;
+ case FloatComparisonMode::UnorderedNotLessThanNonSignaling:
+ return FloatComparisonMode::UnorderedNotGreaterThanNonSignaling;
+ case FloatComparisonMode::UnorderedNotLessThanOrEqualNonSignaling:
+ return FloatComparisonMode::UnorderedNotGreaterThanOrEqualNonSignaling;
+ case FloatComparisonMode::UnorderedNotGreaterThanOrEqualNonSignaling:
+ return FloatComparisonMode::UnorderedNotLessThanOrEqualNonSignaling;
+ case FloatComparisonMode::UnorderedNotGreaterThanNonSignaling:
+ return FloatComparisonMode::UnorderedNotLessThanNonSignaling;
+ case FloatComparisonMode::OrderedGreaterThanOrEqualNonSignaling:
+ return FloatComparisonMode::OrderedLessThanOrEqualNonSignaling;
+ case FloatComparisonMode::OrderedGreaterThanNonSignaling:
+ return FloatComparisonMode::OrderedLessThanNonSignaling;
+
+ default:
+ unreached();
+ }
+}
+
//------------------------------------------------------------------------
// isFullyImplementedIsa: Gets a value that indicates whether the InstructionSet is fully implemented
//
@@ -283,6 +380,8 @@ bool HWIntrinsicInfo::isFullyImplementedIsa(CORINFO_InstructionSet isa)
case InstructionSet_SSE42_X64:
case InstructionSet_Vector128:
case InstructionSet_Vector256:
+ case InstructionSet_X86Base:
+ case InstructionSet_X86Base_X64:
{
return true;
}
@@ -314,6 +413,8 @@ bool HWIntrinsicInfo::isScalarIsa(CORINFO_InstructionSet isa)
case InstructionSet_LZCNT_X64:
case InstructionSet_POPCNT:
case InstructionSet_POPCNT_X64:
+ case InstructionSet_X86Base:
+ case InstructionSet_X86Base_X64:
{
return true;
}
@@ -368,22 +469,26 @@ GenTree* Compiler::impNonConstFallback(NamedIntrinsic intrinsic, var_types simdT
// intrinsic -- id of the intrinsic function.
// clsHnd -- class handle containing the intrinsic function.
// method -- method handle of the intrinsic function.
-// sig -- signature of the intrinsic call
-//
+// sig -- signature of the intrinsic call.
+// baseType -- generic argument of the intrinsic.
+// retType -- return type of the intrinsic.
// Return Value:
// the expanded intrinsic.
//
GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig)
+ CORINFO_SIG_INFO* sig,
+ var_types baseType,
+ var_types retType,
+ unsigned simdSize)
{
// other intrinsics need special importation
switch (HWIntrinsicInfo::lookupIsa(intrinsic))
{
case InstructionSet_Vector128:
case InstructionSet_Vector256:
- return impBaseIntrinsic(intrinsic, clsHnd, method, sig);
+ return impBaseIntrinsic(intrinsic, clsHnd, method, sig, baseType, retType, simdSize);
case InstructionSet_SSE:
return impSSEIntrinsic(intrinsic, method, sig);
case InstructionSet_SSE2:
@@ -408,60 +513,29 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
// Arguments:
// intrinsic -- id of the intrinsic function.
// method -- method handle of the intrinsic function.
-// sig -- signature of the intrinsic call
-//
+// sig -- signature of the intrinsic call.
+// baseType -- generic argument of the intrinsic.
+// retType -- return type of the intrinsic.
// Return Value:
// the expanded intrinsic.
//
GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
CORINFO_METHOD_HANDLE method,
- CORINFO_SIG_INFO* sig)
+ CORINFO_SIG_INFO* sig,
+ var_types baseType,
+ var_types retType,
+ unsigned simdSize)
{
GenTree* retNode = nullptr;
GenTree* op1 = nullptr;
+ GenTree* op2 = nullptr;
if (!featureSIMD)
{
return nullptr;
}
- unsigned simdSize = 0;
- var_types baseType = TYP_UNKNOWN;
- var_types retType = JITtype2varType(sig->retType);
-
- assert(!sig->hasThis());
-
- if (HWIntrinsicInfo::BaseTypeFromFirstArg(intrinsic))
- {
- baseType = getBaseTypeAndSizeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args), &simdSize);
-
- if (retType == TYP_STRUCT)
- {
- unsigned retSimdSize = 0;
- var_types retBasetype = getBaseTypeAndSizeOfSIMDType(sig->retTypeClass, &retSimdSize);
- if (!varTypeIsArithmetic(retBasetype))
- {
- return nullptr;
- }
- retType = getSIMDTypeForSize(retSimdSize);
- }
- }
- else if (retType == TYP_STRUCT)
- {
- baseType = getBaseTypeAndSizeOfSIMDType(sig->retTypeClass, &simdSize);
- retType = getSIMDTypeForSize(simdSize);
- }
- else
- {
- baseType = getBaseTypeAndSizeOfSIMDType(clsHnd, &simdSize);
- }
-
- if (!varTypeIsArithmetic(baseType))
- {
- return nullptr;
- }
-
switch (intrinsic)
{
case NI_Vector256_As:
@@ -516,7 +590,7 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
if (getSIMDVectorRegisterByteLength() == YMM_REGSIZE_BYTES)
{
// Vector is TYP_SIMD32, so we should treat this as a call to Vector128.ToVector256
- return impBaseIntrinsic(NI_Vector128_ToVector256, clsHnd, method, sig);
+ return impBaseIntrinsic(NI_Vector128_ToVector256, clsHnd, method, sig, baseType, retType, simdSize);
}
assert(getSIMDVectorRegisterByteLength() == XMM_REGSIZE_BYTES);
@@ -557,6 +631,11 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
case NI_Vector128_AsVector128:
{
assert(sig->numArgs == 1);
+ assert(HWIntrinsicInfo::BaseTypeFromFirstArg(intrinsic));
+
+ var_types baseTypeOfIntrinsic =
+ getBaseTypeAndSizeOfSIMDType(info.compCompHnd->getArgClass(sig, sig->args), &simdSize);
+ assert(baseType == baseTypeOfIntrinsic);
switch (getSIMDTypeForSize(simdSize))
{
@@ -584,7 +663,7 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
case TYP_SIMD32:
{
// Vector is TYP_SIMD32, so we should treat this as a call to Vector256.GetLower
- return impBaseIntrinsic(NI_Vector256_GetLower, clsHnd, method, sig);
+ return impBaseIntrinsic(NI_Vector256_GetLower, clsHnd, method, sig, baseType, retType, simdSize);
}
default:
@@ -623,20 +702,20 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
if (intrinsic == NI_Vector256_AsVector)
{
- return impBaseIntrinsic(NI_Vector256_GetLower, clsHnd, method, sig);
+ return impBaseIntrinsic(NI_Vector256_GetLower, clsHnd, method, sig, baseType, retType, simdSize);
}
else
{
assert(intrinsic == NI_Vector256_AsVector256);
- return impBaseIntrinsic(NI_Vector128_ToVector256, clsHnd, method, sig);
+ return impBaseIntrinsic(NI_Vector128_ToVector256, clsHnd, method, sig, baseType, retType, simdSize);
}
}
break;
}
- case NI_Vector128_Count:
- case NI_Vector256_Count:
+ case NI_Vector128_get_Count:
+ case NI_Vector256_get_Count:
{
assert(sig->numArgs == 0);
@@ -646,6 +725,70 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
break;
}
+ case NI_Vector128_Create:
+ case NI_Vector256_Create:
+ {
+#if defined(TARGET_X86)
+ if (varTypeIsLong(baseType))
+ {
+ // TODO-XARCH-CQ: It may be beneficial to emit the movq
+ // instruction, which takes a 64-bit memory address and
+ // works on 32-bit x86 systems.
+ break;
+ }
+#endif // TARGET_X86
+
+ // We shouldn't handle this as an intrinsic if the
+ // respective ISAs have been disabled by the user.
+
+ if (intrinsic == NI_Vector256_Create)
+ {
+ if (!compExactlyDependsOn(InstructionSet_AVX))
+ {
+ break;
+ }
+ }
+ else if (baseType == TYP_FLOAT)
+ {
+ if (!compExactlyDependsOn(InstructionSet_SSE))
+ {
+ break;
+ }
+ }
+ else if (!compExactlyDependsOn(InstructionSet_SSE2))
+ {
+ break;
+ }
+
+ if (sig->numArgs == 1)
+ {
+ op1 = impPopStack().val;
+ retNode = gtNewSimdHWIntrinsicNode(retType, op1, intrinsic, baseType, simdSize);
+ }
+ else if (sig->numArgs == 2)
+ {
+ op2 = impPopStack().val;
+ op1 = impPopStack().val;
+ retNode = gtNewSimdHWIntrinsicNode(retType, op1, op2, intrinsic, baseType, simdSize);
+ }
+ else
+ {
+ assert(sig->numArgs >= 3);
+
+ GenTreeArgList* tmp = nullptr;
+
+ for (unsigned i = 0; i < sig->numArgs; i++)
+ {
+ tmp = gtNewArgList(impPopStack().val);
+ tmp->gtOp2 = op1;
+ op1 = tmp;
+ }
+
+ retNode = gtNewSimdHWIntrinsicNode(retType, op1, intrinsic, baseType, simdSize);
+ }
+ break;
+ }
+
case NI_Vector128_CreateScalarUnsafe:
{
assert(sig->numArgs == 1);
@@ -695,7 +838,8 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
break;
}
- case NI_Vector128_Zero:
+ case NI_Vector128_get_Zero:
+ case NI_Vector128_get_AllBitsSet:
{
assert(sig->numArgs == 0);
@@ -740,7 +884,8 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
break;
}
- case NI_Vector256_Zero:
+ case NI_Vector256_get_Zero:
+ case NI_Vector256_get_AllBitsSet:
{
assert(sig->numArgs == 0);
@@ -1173,12 +1318,11 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic intrinsic,
GenTree* Compiler::impSSEIntrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HANDLE method, CORINFO_SIG_INFO* sig)
{
- GenTree* retNode = nullptr;
- GenTree* op1 = nullptr;
- GenTree* op2 = nullptr;
- GenTree* op3 = nullptr;
- GenTree* op4 = nullptr;
- int simdSize = HWIntrinsicInfo::lookupSimdSize(this, intrinsic, sig);
+ GenTree* retNode = nullptr;
+ GenTree* op1 = nullptr;
+ GenTree* op2 = nullptr;
+ int simdSize = HWIntrinsicInfo::lookupSimdSize(this, intrinsic, sig);
+ var_types baseType = TYP_UNKNOWN;
// The Prefetch and StoreFence intrinsics don't take any SIMD operands
// and have a simdSize of 0
@@ -1186,6 +1330,40 @@ GenTree* Compiler::impSSEIntrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HAND
switch (intrinsic)
{
+ case NI_SSE_CompareScalarGreaterThan:
+ case NI_SSE_CompareScalarGreaterThanOrEqual:
+ case NI_SSE_CompareScalarNotGreaterThan:
+ case NI_SSE_CompareScalarNotGreaterThanOrEqual:
+ {
+ assert(sig->numArgs == 2);
+ op2 = impSIMDPopStack(TYP_SIMD16);
+ op1 = impSIMDPopStack(TYP_SIMD16);
+ baseType = getBaseTypeOfSIMDType(sig->retTypeSigClass);
+ assert(baseType == TYP_FLOAT);
+
+ if (compOpportunisticallyDependsOn(InstructionSet_AVX))
+ {
+ // These intrinsics are "special import" because the non-AVX path isn't directly
+ // hardware supported. Instead, they start with "swapped operands" and we fix that here.
+
+ FloatComparisonMode comparison =
+ static_cast(HWIntrinsicInfo::lookupIval(intrinsic, true));
+ retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, op1, op2, gtNewIconNode(static_cast(comparison)),
+ NI_AVX_CompareScalar, baseType, simdSize);
+ }
+ else
+ {
+ GenTree* clonedOp1 = nullptr;
+ op1 = impCloneExpr(op1, &clonedOp1, NO_CLASS_HANDLE, (unsigned)CHECK_SPILL_ALL,
+ nullptr DEBUGARG("Clone op1 for Sse.CompareScalarGreaterThan"));
+
+ retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, op2, op1, intrinsic, baseType, simdSize);
+ retNode =
+ gtNewSimdHWIntrinsicNode(TYP_SIMD16, clonedOp1, retNode, NI_SSE_MoveScalar, baseType, simdSize);
+ }
+ break;
+ }
+
case NI_SSE_Prefetch0:
case NI_SSE_Prefetch1:
case NI_SSE_Prefetch2:
@@ -1218,7 +1396,7 @@ GenTree* Compiler::impSSE2Intrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HAN
GenTree* op2 = nullptr;
int ival = -1;
int simdSize = HWIntrinsicInfo::lookupSimdSize(this, intrinsic, sig);
- var_types baseType = TYP_UNKNOWN;
+ var_types baseType = getBaseTypeOfSIMDType(sig->retTypeSigClass);
var_types retType = TYP_UNKNOWN;
// The fencing intrinsics don't take any operands and simdSize is 0
@@ -1229,20 +1407,35 @@ GenTree* Compiler::impSSE2Intrinsic(NamedIntrinsic intrinsic, CORINFO_METHOD_HAN
switch (intrinsic)
{
- case NI_SSE2_CompareLessThan:
+ case NI_SSE2_CompareScalarGreaterThan:
+ case NI_SSE2_CompareScalarGreaterThanOrEqual:
+ case NI_SSE2_CompareScalarNotGreaterThan:
+ case NI_SSE2_CompareScalarNotGreaterThanOrEqual:
{
assert(sig->numArgs == 2);
- op2 = impSIMDPopStack(TYP_SIMD16);
- op1 = impSIMDPopStack(TYP_SIMD16);
- baseType = getBaseTypeOfSIMDType(sig->retTypeSigClass);
- if (baseType == TYP_DOUBLE)
+ op2 = impSIMDPopStack(TYP_SIMD16);
+ op1 = impSIMDPopStack(TYP_SIMD16);
+ assert(baseType == TYP_DOUBLE);
+
+ if (compOpportunisticallyDependsOn(InstructionSet_AVX))
{
- retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, op1, op2, intrinsic, baseType, simdSize);
+ // These intrinsics are "special import" because the non-AVX path isn't directly
+ // hardware supported. Instead, they start with "swapped operands" and we fix that here.
+
+ FloatComparisonMode comparison =
+ static_cast(HWIntrinsicInfo::lookupIval(intrinsic, true));
+ retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, op1, op2, gtNewIconNode(static_cast(comparison)),
+ NI_AVX_CompareScalar, baseType, simdSize);
}
else
{
+ GenTree* clonedOp1 = nullptr;
+ op1 = impCloneExpr(op1, &clonedOp1, NO_CLASS_HANDLE, (unsigned)CHECK_SPILL_ALL,
+ nullptr DEBUGARG("Clone op1 for Sse2.CompareScalarGreaterThan"));
+
+ retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, op2, op1, intrinsic, baseType, simdSize);
retNode =
- gtNewSimdHWIntrinsicNode(TYP_SIMD16, op2, op1, NI_SSE2_CompareGreaterThan, baseType, simdSize);
+ gtNewSimdHWIntrinsicNode(TYP_SIMD16, clonedOp1, retNode, NI_SSE2_MoveScalar, baseType, simdSize);
}
break;
}
@@ -1335,7 +1528,7 @@ GenTree* Compiler::impAvxOrAvx2Intrinsic(NamedIntrinsic intrinsic, CORINFO_METHO
GenTree* opList = new (this, GT_LIST) GenTreeArgList(op1, gtNewArgList(op2, op3, op4, op5));
retNode = new (this, GT_HWINTRINSIC) GenTreeHWIntrinsic(retType, opList, intrinsic, baseType, simdSize);
- retNode->AsHWIntrinsic()->gtIndexBaseType = indexbaseType;
+ retNode->AsHWIntrinsic()->SetOtherBaseType(indexbaseType);
break;
}
diff --git a/src/coreclr/src/jit/importer.cpp b/src/coreclr/src/jit/importer.cpp
index 76b4dd9a706ab4..d5bf9bf745541d 100644
--- a/src/coreclr/src/jit/importer.cpp
+++ b/src/coreclr/src/jit/importer.cpp
@@ -1173,8 +1173,8 @@ GenTree* Compiler::impAssignStructPtr(GenTree* destAddr,
ilOffset = impCurStmtOffs;
}
- assert(src->OperIs(GT_LCL_VAR, GT_FIELD, GT_IND, GT_OBJ, GT_CALL, GT_MKREFANY, GT_RET_EXPR, GT_COMMA) ||
- (src->TypeGet() != TYP_STRUCT && (src->OperIsSimdOrHWintrinsic() || src->OperIs(GT_LCL_FLD))));
+ assert(src->OperIs(GT_LCL_VAR, GT_LCL_FLD, GT_FIELD, GT_IND, GT_OBJ, GT_CALL, GT_MKREFANY, GT_RET_EXPR, GT_COMMA) ||
+ (src->TypeGet() != TYP_STRUCT && src->OperIsSimdOrHWintrinsic()));
var_types asgType = src->TypeGet();
@@ -1199,8 +1199,11 @@ GenTree* Compiler::impAssignStructPtr(GenTree* destAddr,
var_types returnType = (var_types)src->AsCall()->gtReturnType;
- // We won't use a return buffer, so change the type of src->gtType to 'returnType'
- src->gtType = genActualType(returnType);
+ if (compDoOldStructRetyping())
+ {
+ // We're not using a return buffer, so if we're retyping we'll change the type of 'src' to 'returnTYpe'.
+ src->gtType = genActualType(returnType);
+ }
// First we try to change this to "LclVar/LclFld = call"
//
@@ -1280,17 +1283,25 @@ GenTree* Compiler::impAssignStructPtr(GenTree* destAddr,
else
{
// Case of inline method returning a struct in one or more registers.
- //
- var_types returnType = (var_types)call->gtReturnType;
-
// We won't need a return buffer
- asgType = returnType;
- src->gtType = genActualType(returnType);
- call->gtType = src->gtType;
+ if (compDoOldStructRetyping())
+ {
+ var_types returnType = (var_types)call->gtReturnType;
+ asgType = returnType;
+ src->gtType = genActualType(returnType);
+ call->gtType = src->gtType;
+ }
+ else
+ {
+ asgType = src->gtType;
+ }
- // !!! The destination could be on stack. !!!
- // This flag will let us choose the correct write barrier.
- destFlags = GTF_IND_TGTANYWHERE;
+ if ((destAddr->gtOper != GT_ADDR) || (destAddr->AsOp()->gtOp1->gtOper != GT_LCL_VAR))
+ {
+ // !!! The destination could be on stack. !!!
+ // This flag will let us choose the correct write barrier.
+ destFlags = GTF_IND_TGTANYWHERE;
+ }
}
}
else if (src->OperIsBlk())
@@ -1933,11 +1944,6 @@ GenTree* Compiler::impMethodPointer(CORINFO_RESOLVED_TOKEN* pResolvedToken, CORI
{
op1->AsFptrVal()->gtEntryPoint = pCallInfo->codePointerLookup.constLookup;
}
- else
- {
- op1->AsFptrVal()->gtEntryPoint.addr = nullptr;
- op1->AsFptrVal()->gtEntryPoint.accessType = IAT_VALUE;
- }
#endif
break;
@@ -1980,12 +1986,13 @@ GenTree* Compiler::getRuntimeContextTree(CORINFO_RUNTIME_LOOKUP_KIND kind)
// Collectible types requires that for shared generic code, if we use the generic context parameter
// that we report it. (This is a conservative approach, we could detect some cases particularly when the
// context parameter is this that we don't need the eager reporting logic.)
- lvaGenericsContextUseCount++;
+ lvaGenericsContextInUse = true;
if (kind == CORINFO_LOOKUP_THISOBJ)
{
// this Object
ctxTree = gtNewLclvNode(info.compThisArg, TYP_REF);
+ ctxTree->gtFlags |= GTF_VAR_CONTEXT;
// Vtable pointer of this object
ctxTree = gtNewOperNode(GT_IND, TYP_I_IMPL, ctxTree);
@@ -1997,6 +2004,7 @@ GenTree* Compiler::getRuntimeContextTree(CORINFO_RUNTIME_LOOKUP_KIND kind)
assert(kind == CORINFO_LOOKUP_METHODPARAM || kind == CORINFO_LOOKUP_CLASSPARAM);
ctxTree = gtNewLclvNode(info.compTypeCtxtArg, TYP_I_IMPL); // Exact method descriptor as passed in as last arg
+ ctxTree->gtFlags |= GTF_VAR_CONTEXT;
}
return ctxTree;
}
@@ -2041,11 +2049,7 @@ GenTree* Compiler::impRuntimeLookupToTree(CORINFO_RESOLVED_TOKEN* pResolvedToken
gtNewCallArgs(ctxTree), &pLookup->lookupKind);
}
#endif
- GenTree* argNode =
- gtNewIconEmbHndNode(pRuntimeLookup->signature, nullptr, GTF_ICON_TOKEN_HDL, compileTimeHandle);
- GenTreeCall::Use* helperArgs = gtNewCallArgs(ctxTree, argNode);
-
- return gtNewHelperCallNode(pRuntimeLookup->helper, TYP_I_IMPL, helperArgs);
+ return gtNewRuntimeLookupHelperCallNode(pRuntimeLookup, ctxTree, compileTimeHandle);
}
// Slot pointer
@@ -3474,33 +3478,43 @@ GenTree* Compiler::impIntrinsic(GenTree* newobjThis,
{
ni = lookupNamedIntrinsic(method);
-#ifdef FEATURE_HW_INTRINSICS
+ // We specially support the following on all platforms to allow for dead
+ // code optimization and to more generally support recursive intrinsics.
+
if (ni == NI_IsSupported_True)
{
+ assert(sig->numArgs == 0);
return gtNewIconNode(true);
}
if (ni == NI_IsSupported_False)
{
+ assert(sig->numArgs == 0);
return gtNewIconNode(false);
}
if (ni == NI_Throw_PlatformNotSupportedException)
{
- return impUnsupportedHWIntrinsic(CORINFO_HELP_THROW_PLATFORM_NOT_SUPPORTED, method, sig, mustExpand);
+ return impUnsupportedNamedIntrinsic(CORINFO_HELP_THROW_PLATFORM_NOT_SUPPORTED, method, sig, mustExpand);
}
+#ifdef FEATURE_HW_INTRINSICS
if ((ni > NI_HW_INTRINSIC_START) && (ni < NI_HW_INTRINSIC_END))
{
GenTree* hwintrinsic = impHWIntrinsic(ni, clsHnd, method, sig, mustExpand);
if (mustExpand && (hwintrinsic == nullptr))
{
- return impUnsupportedHWIntrinsic(CORINFO_HELP_THROW_NOT_IMPLEMENTED, method, sig, mustExpand);
+ return impUnsupportedNamedIntrinsic(CORINFO_HELP_THROW_NOT_IMPLEMENTED, method, sig, mustExpand);
}
return hwintrinsic;
}
+
+ if ((ni > NI_SIMD_AS_HWINTRINSIC_START) && (ni < NI_SIMD_AS_HWINTRINSIC_END))
+ {
+ return impSimdAsHWIntrinsic(ni, clsHnd, method, sig, mustExpand);
+ }
#endif // FEATURE_HW_INTRINSICS
}
}
@@ -3526,10 +3540,24 @@ GenTree* Compiler::impIntrinsic(GenTree* newobjThis,
assert(intrinsicID != CORINFO_INTRINSIC_StubHelpers_GetStubContextAddr);
#endif
+ if (intrinsicID == CORINFO_INTRINSIC_StubHelpers_NextCallReturnAddress)
+ {
+ // For now we just avoid inlining anything into these methods since
+ // this intrinsic is only rarely used. We could do this better if we
+ // wanted to by trying to match which call is the one we need to get
+ // the return address of.
+ info.compHasNextCallRetAddr = true;
+ return new (this, GT_LABEL) GenTree(GT_LABEL, TYP_I_IMPL);
+ }
+
GenTree* retNode = nullptr;
// Under debug and minopts, only expand what is required.
- if (!mustExpand && opts.OptimizationDisabled())
+ // NextCallReturnAddress intrinsic returns the return address of the next call.
+ // If that call is an intrinsic and is expanded, codegen for NextCallReturnAddress will fail.
+ // To avoid that we conservatively expand only required intrinsics in methods that call
+ // the NextCallReturnAddress intrinsic.
+ if (!mustExpand && (opts.OptimizationDisabled() || info.compHasNextCallRetAddr))
{
*pIntrinsicID = CORINFO_INTRINSIC_Illegal;
return retNode;
@@ -3617,11 +3645,20 @@ GenTree* Compiler::impIntrinsic(GenTree* newobjThis,
#endif // defined(TARGET_XARCH) || defined(TARGET_ARM64)
case CORINFO_INTRINSIC_MemoryBarrier:
+ case CORINFO_INTRINSIC_MemoryBarrierLoad:
assert(sig->numArgs == 0);
op1 = new (this, GT_MEMORYBARRIER) GenTree(GT_MEMORYBARRIER, TYP_VOID);
op1->gtFlags |= GTF_GLOB_REF | GTF_ASG;
+
+ // On XARCH `CORINFO_INTRINSIC_MemoryBarrierLoad` fences need not be emitted.
+ // However, we still need to capture the effect on reordering.
+ if (intrinsicID == CORINFO_INTRINSIC_MemoryBarrierLoad)
+ {
+ op1->gtFlags |= GTF_MEMORYBARRIER_LOAD;
+ }
+
retNode = op1;
break;
@@ -4133,7 +4170,7 @@ GenTree* Compiler::impIntrinsic(GenTree* newobjThis,
case NI_System_MathF_FusedMultiplyAdd:
{
#ifdef TARGET_XARCH
- if (compExactlyDependsOn(InstructionSet_FMA))
+ if (compExactlyDependsOn(InstructionSet_FMA) && supportSIMDTypes())
{
assert(varTypeIsFloating(callType));
@@ -4240,7 +4277,8 @@ GenTree* Compiler::impIntrinsic(GenTree* newobjThis,
if (mustExpand && (retNode == nullptr))
{
- NO_WAY("JIT must expand the intrinsic!");
+ assert(!"Unhandled must expand intrinsic, throwing PlatformNotSupportedException");
+ return impUnsupportedNamedIntrinsic(CORINFO_HELP_THROW_PLATFORM_NOT_SUPPORTED, method, sig, mustExpand);
}
// Optionally report if this intrinsic is special
@@ -4363,7 +4401,7 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method)
}
if (className != nullptr)
{
- JITDUMP("%s", className);
+ JITDUMP("%s.", className);
}
if (methodName != nullptr)
{
@@ -4431,7 +4469,7 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method)
}
}
}
-#if defined(TARGET_XARCH) // We currently only support BSWAP on x86
+#if defined(TARGET_XARCH) || defined(TARGET_ARM64)
else if (strcmp(namespaceName, "System.Buffers.Binary") == 0)
{
if ((strcmp(className, "BinaryPrimitives") == 0) && (strcmp(methodName, "ReverseEndianness") == 0))
@@ -4439,7 +4477,7 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method)
result = NI_System_Buffers_Binary_BinaryPrimitives_ReverseEndianness;
}
}
-#endif // !defined(TARGET_XARCH)
+#endif // defined(TARGET_XARCH) || defined(TARGET_ARM64)
else if (strcmp(namespaceName, "System.Collections.Generic") == 0)
{
if ((strcmp(className, "EqualityComparer`1") == 0) && (strcmp(methodName, "get_Default") == 0))
@@ -4448,8 +4486,39 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method)
}
}
#ifdef FEATURE_HW_INTRINSICS
+ else if (strcmp(namespaceName, "System.Numerics") == 0)
+ {
+ CORINFO_SIG_INFO sig;
+ info.compCompHnd->getMethodSig(method, &sig);
+
+ int sizeOfVectorT = getSIMDVectorRegisterByteLength();
+
+ result = SimdAsHWIntrinsicInfo::lookupId(&sig, className, methodName, enclosingClassName, sizeOfVectorT);
+ }
+#endif // FEATURE_HW_INTRINSICS
else if (strncmp(namespaceName, "System.Runtime.Intrinsics", 25) == 0)
{
+ // We go down this path even when FEATURE_HW_INTRINSICS isn't enabled
+ // so we can specially handle IsSupported and recursive calls.
+
+ // This is required to appropriately handle the intrinsics on platforms
+ // which don't support them. On such a platform methods like Vector64.Create
+ // will be seen as `Intrinsic` and `mustExpand` due to having a code path
+ // which is recursive. When such a path is hit we expect it to be handled by
+ // the importer and we fire an assert if it wasn't and in previous versions
+ // of the JIT would fail fast. This was changed to throw a PNSE instead but
+ // we still assert as most intrinsics should have been recognized/handled.
+
+ // In order to avoid the assert, we specially handle the IsSupported checks
+ // (to better allow dead-code optimizations) and we explicitly throw a PNSE
+ // as we know that is the desired behavior for the HWIntrinsics when not
+ // supported. For cases like Vector64.Create, this is fine because it will
+ // be behind a relevant IsSupported check and will never be hit and the
+ // software fallback will be executed instead.
+
+ CLANG_FORMAT_COMMENT_ANCHOR;
+
+#ifdef FEATURE_HW_INTRINSICS
namespaceName += 25;
const char* platformNamespaceName;
@@ -4463,23 +4532,45 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method)
if ((namespaceName[0] == '\0') || (strcmp(namespaceName, platformNamespaceName) == 0))
{
- result = HWIntrinsicInfo::lookupId(this, className, methodName, enclosingClassName);
- }
- else if (strcmp(methodName, "get_IsSupported") == 0)
- {
- return NI_IsSupported_False;
+ CORINFO_SIG_INFO sig;
+ info.compCompHnd->getMethodSig(method, &sig);
+
+ result = HWIntrinsicInfo::lookupId(this, &sig, className, methodName, enclosingClassName);
}
- else
+#endif // FEATURE_HW_INTRINSICS
+
+ if (result == NI_Illegal)
{
- return gtIsRecursiveCall(method) ? NI_Throw_PlatformNotSupportedException : NI_Illegal;
+ if (strcmp(methodName, "get_IsSupported") == 0)
+ {
+ // This allows the relevant code paths to be dropped as dead code even
+ // on platforms where FEATURE_HW_INTRINSICS is not supported.
+
+ result = NI_IsSupported_False;
+ }
+ else if (gtIsRecursiveCall(method))
+ {
+ // For the framework itself, any recursive intrinsics will either be
+ // only supported on a single platform or will be guarded by a relevant
+ // IsSupported check so the throw PNSE will be valid or dropped.
+
+ result = NI_Throw_PlatformNotSupportedException;
+ }
}
}
-#endif // FEATURE_HW_INTRINSICS
if (result == NI_Illegal)
{
JITDUMP("Not recognized\n");
}
+ else if (result == NI_IsSupported_False)
+ {
+ JITDUMP("Unsupported - return false");
+ }
+ else if (result == NI_Throw_PlatformNotSupportedException)
+ {
+ JITDUMP("Unsupported - throw PlatformNotSupportedException");
+ }
else
{
JITDUMP("Recognized\n");
@@ -4487,6 +4578,50 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method)
return result;
}
+//------------------------------------------------------------------------
+// impUnsupportedNamedIntrinsic: Throws an exception for an unsupported named intrinsic
+//
+// Arguments:
+// helper - JIT helper ID for the exception to be thrown
+// method - method handle of the intrinsic function.
+// sig - signature of the intrinsic call
+// mustExpand - true if the intrinsic must return a GenTree*; otherwise, false
+//
+// Return Value:
+// a gtNewMustThrowException if mustExpand is true; otherwise, nullptr
+//
+GenTree* Compiler::impUnsupportedNamedIntrinsic(unsigned helper,
+ CORINFO_METHOD_HANDLE method,
+ CORINFO_SIG_INFO* sig,
+ bool mustExpand)
+{
+ // We've hit some error case and may need to return a node for the given error.
+ //
+ // When `mustExpand=false`, we are attempting to inline the intrinsic directly into another method. In this
+ // scenario, we need to return `nullptr` so that a GT_CALL to the intrinsic is emitted instead. This is to
+ // ensure that everything continues to behave correctly when optimizations are enabled (e.g. things like the
+ // inliner may expect the node we return to have a certain signature, and the `MustThrowException` node won't
+ // match that).
+ //
+ // When `mustExpand=true`, we are in a GT_CALL to the intrinsic and are attempting to JIT it. This will generally
+ // be in response to an indirect call (e.g. done via reflection) or in response to an earlier attempt returning
+ // `nullptr` (under `mustExpand=false`). In that scenario, we are safe to return the `MustThrowException` node.
+
+ if (mustExpand)
+ {
+ for (unsigned i = 0; i < sig->numArgs; i++)
+ {
+ impPopStack();
+ }
+
+ return gtNewMustThrowException(helper, JITtype2varType(sig->retType), sig->retTypeClass);
+ }
+ else
+ {
+ return nullptr;
+ }
+}
+
/*****************************************************************************/
GenTree* Compiler::impArrayAccessIntrinsic(
@@ -6738,9 +6873,16 @@ void Compiler::impPopArgsForUnmanagedCall(GenTree* call, CORINFO_SIG_INFO* sig)
assert(thisPtr->TypeGet() == TYP_I_IMPL || thisPtr->TypeGet() == TYP_BYREF);
}
- for (GenTreeCall::Use& use : GenTreeCall::UseList(args))
+ for (GenTreeCall::Use& argUse : GenTreeCall::UseList(args))
{
- call->gtFlags |= use.GetNode()->gtFlags & GTF_GLOB_EFFECT;
+ // We should not be passing gc typed args to an unmanaged call.
+ GenTree* arg = argUse.GetNode();
+ if (varTypeIsGC(arg->TypeGet()))
+ {
+ assert(!"*** invalid IL: gc type passed to unmanaged call");
+ }
+
+ call->gtFlags |= arg->gtFlags & GTF_GLOB_EFFECT;
}
}
@@ -7423,14 +7565,6 @@ var_types Compiler::impImportCall(OPCODE opcode,
sig = &calliSig;
-#ifdef DEBUG
- // We cannot lazily obtain the signature of a CALLI call because it has no method
- // handle that we can use, so we need to save its full call signature here.
- assert(call->AsCall()->callSig == nullptr);
- call->AsCall()->callSig = new (this, CMK_CorSig) CORINFO_SIG_INFO;
- *call->AsCall()->callSig = calliSig;
-#endif // DEBUG
-
if ((sig->flags & CORINFO_SIGFLAG_FAT_CALL) != 0)
{
addFatPointerCandidate(call->AsCall());
@@ -7893,11 +8027,9 @@ var_types Compiler::impImportCall(OPCODE opcode,
#endif // !FEATURE_VARARG
#ifdef UNIX_X86_ABI
- if (call->AsCall()->callSig == nullptr)
- {
- call->AsCall()->callSig = new (this, CMK_CorSig) CORINFO_SIG_INFO;
- *call->AsCall()->callSig = *sig;
- }
+ // On Unix x86 we usually use caller-cleaned convention.
+ if (!call->AsCall()->IsUnmanaged() && IsCallerPop(sig->callConv))
+ call->gtFlags |= GTF_CALL_POP_ARGS;
#endif // UNIX_X86_ABI
if ((sig->callConv & CORINFO_CALLCONV_MASK) == CORINFO_CALLCONV_VARARG ||
@@ -7935,14 +8067,6 @@ var_types Compiler::impImportCall(OPCODE opcode,
#endif
eeGetCallSiteSig(pResolvedToken->token, pResolvedToken->tokenScope, pResolvedToken->tokenContext, sig);
-#ifdef DEBUG
- // We cannot lazily obtain the signature of a vararg call because using its method
- // handle will give us only the declared argument list, not the full argument list.
- assert(call->AsCall()->callSig == nullptr);
- call->AsCall()->callSig = new (this, CMK_CorSig) CORINFO_SIG_INFO;
- *call->AsCall()->callSig = *sig;
-#endif
-
// For vararg calls we must be sure to load the return type of the
// method actually being called, as well as the return types of the
// specified in the vararg signature. With type equivalency, these types
@@ -8249,7 +8373,8 @@ var_types Compiler::impImportCall(OPCODE opcode,
//-------------------------------------------------------------------------
// The "this" pointer
- if (!(mflags & CORINFO_FLG_STATIC) && !((opcode == CEE_NEWOBJ) && (newobjThis == nullptr)))
+ if (((mflags & CORINFO_FLG_STATIC) == 0) && ((sig->callConv & CORINFO_CALLCONV_EXPLICITTHIS) == 0) &&
+ !((opcode == CEE_NEWOBJ) && (newobjThis == nullptr)))
{
GenTree* obj;
@@ -8371,6 +8496,13 @@ var_types Compiler::impImportCall(OPCODE opcode,
DONE:
+#ifdef DEBUG
+ // In debug we want to be able to register callsites with the EE.
+ assert(call->AsCall()->callSig == nullptr);
+ call->AsCall()->callSig = new (this, CMK_Generic) CORINFO_SIG_INFO;
+ *call->AsCall()->callSig = *sig;
+#endif
+
// Final importer checks for calls flagged as tail calls.
//
if (tailCallFlags != 0)
@@ -8465,7 +8597,27 @@ var_types Compiler::impImportCall(OPCODE opcode,
#endif // FEATURE_TAILCALL_OPT
}
- // we can't report success just yet...
+ // This might or might not turn into a tailcall. We do more
+ // checks in morph. For explicit tailcalls we need more
+ // information in morph in case it turns out to be a
+ // helper-based tailcall.
+ if (isExplicitTailCall)
+ {
+ assert(call->AsCall()->tailCallInfo == nullptr);
+ call->AsCall()->tailCallInfo = new (this, CMK_CorTailCallInfo) TailCallSiteInfo;
+ switch (opcode)
+ {
+ case CEE_CALLI:
+ call->AsCall()->tailCallInfo->SetCalli(sig);
+ break;
+ case CEE_CALLVIRT:
+ call->AsCall()->tailCallInfo->SetCallvirt(sig, pResolvedToken);
+ break;
+ default:
+ call->AsCall()->tailCallInfo->SetCall(sig, pResolvedToken);
+ break;
+ }
+ }
}
else
{
@@ -8532,15 +8684,7 @@ var_types Compiler::impImportCall(OPCODE opcode,
//
assert(call->gtOper == GT_CALL);
- assert(sig != nullptr);
-
- // Tail calls require us to save the call site's sig info so we can obtain an argument
- // copying thunk from the EE later on.
- if (call->AsCall()->callSig == nullptr)
- {
- call->AsCall()->callSig = new (this, CMK_CorSig) CORINFO_SIG_INFO;
- *call->AsCall()->callSig = *sig;
- }
+ assert(callInfo != nullptr);
if (compIsForInlining() && opcode == CEE_CALLVIRT)
{
@@ -8838,9 +8982,7 @@ GenTree* Compiler::impFixupCallStructReturn(GenTreeCall* call, CORINFO_CLASS_HAN
call->gtRetClsHnd = retClsHnd;
#if FEATURE_MULTIREG_RET
- // Initialize Return type descriptor of call node
- ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
- retTypeDesc->InitializeStructReturnType(this, retClsHnd);
+ call->InitializeStructReturnType(this, retClsHnd);
#endif // FEATURE_MULTIREG_RET
#ifdef UNIX_AMD64_ABI
@@ -8848,55 +8990,57 @@ GenTree* Compiler::impFixupCallStructReturn(GenTreeCall* call, CORINFO_CLASS_HAN
// Not allowed for FEATURE_CORCLR which is the only SKU available for System V OSs.
assert(!call->IsVarargs() && "varargs not allowed for System V OSs.");
- // The return type will remain as the incoming struct type unless normalized to a
- // single eightbyte return type below.
- call->gtReturnType = call->gtType;
-
- unsigned retRegCount = retTypeDesc->GetReturnRegCount();
- if (retRegCount != 0)
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ const unsigned retRegCount = retTypeDesc->GetReturnRegCount();
+ if (retRegCount == 0)
+ {
+ // struct not returned in registers i.e returned via hiddden retbuf arg.
+ call->gtCallMoreFlags |= GTF_CALL_M_RETBUFFARG;
+ }
+ else if (retRegCount == 1)
{
- if (retRegCount == 1)
+ if (!compDoOldStructRetyping())
+ {
+ return call;
+ }
+ // See if the struct size is smaller than the return
+ // type size...
+ if (retTypeDesc->IsEnclosingType())
{
- // See if the struct size is smaller than the return
- // type size...
- if (retTypeDesc->IsEnclosingType())
+ // If we know for sure this call will remain a call,
+ // retype and return value via a suitable temp.
+ if ((!call->CanTailCall()) && (!call->IsInlineCandidate()))
{
- // If we know for sure this call will remain a call,
- // retype and return value via a suitable temp.
- if ((!call->CanTailCall()) && (!call->IsInlineCandidate()))
- {
- call->gtReturnType = retTypeDesc->GetReturnRegType(0);
- return impAssignSmallStructTypeToVar(call, retClsHnd);
- }
+ call->gtReturnType = retTypeDesc->GetReturnRegType(0);
+ return impAssignSmallStructTypeToVar(call, retClsHnd);
}
else
{
- // Return type is same size as struct, so we can
- // simply retype the call.
- call->gtReturnType = retTypeDesc->GetReturnRegType(0);
+ call->gtReturnType = call->gtType;
}
}
else
{
- // must be a struct returned in two registers
- assert(retRegCount == 2);
-
- if ((!call->CanTailCall()) && (!call->IsInlineCandidate()))
- {
- // Force a call returning multi-reg struct to be always of the IR form
- // tmp = call
- //
- // No need to assign a multi-reg struct to a local var if:
- // - It is a tail call or
- // - The call is marked for in-lining later
- return impAssignMultiRegTypeToVar(call, retClsHnd);
- }
+ // Return type is same size as struct, so we can
+ // simply retype the call.
+ call->gtReturnType = retTypeDesc->GetReturnRegType(0);
}
}
else
{
- // struct not returned in registers i.e returned via hiddden retbuf arg.
- call->gtCallMoreFlags |= GTF_CALL_M_RETBUFFARG;
+ // must be a struct returned in two registers
+ assert(retRegCount == 2);
+
+ if ((!call->CanTailCall()) && (!call->IsInlineCandidate()))
+ {
+ // Force a call returning multi-reg struct to be always of the IR form
+ // tmp = call
+ //
+ // No need to assign a multi-reg struct to a local var if:
+ // - It is a tail call or
+ // - The call is marked for in-lining later
+ return impAssignMultiRegTypeToVar(call, retClsHnd);
+ }
}
#else // not UNIX_AMD64_ABI
@@ -8915,6 +9059,21 @@ GenTree* Compiler::impFixupCallStructReturn(GenTreeCall* call, CORINFO_CLASS_HAN
}
else
{
+
+#if FEATURE_MULTIREG_RET
+ const ReturnTypeDesc* retTypeDesc = call->GetReturnTypeDesc();
+ const unsigned retRegCount = retTypeDesc->GetReturnRegCount();
+ assert(retRegCount != 0);
+ if (!compDoOldStructRetyping() && retRegCount == 1)
+ {
+ return call;
+ }
+#else // !FEATURE_MULTIREG_RET
+ if (!compDoOldStructRetyping())
+ {
+ return call;
+ }
+#endif // !FEATURE_MULTIREG_RET
assert(returnType != TYP_UNKNOWN);
// See if the struct size is smaller than the return
@@ -8947,9 +9106,6 @@ GenTree* Compiler::impFixupCallStructReturn(GenTreeCall* call, CORINFO_CLASS_HAN
}
#if FEATURE_MULTIREG_RET
- unsigned retRegCount = retTypeDesc->GetReturnRegCount();
- assert(retRegCount != 0);
-
if (retRegCount >= 2)
{
if ((!call->CanTailCall()) && (!call->IsInlineCandidate()))
@@ -9096,6 +9252,12 @@ GenTree* Compiler::impFixupStructReturnType(GenTree* op, CORINFO_CLASS_HANDLE re
#endif // FEATURE_MULTIREG_RET && FEATURE_HFA
+ if (!compDoOldStructRetyping() && (!op->IsCall() || !op->AsCall()->TreatAsHasRetBufArg(this)))
+ {
+ // Don't retype `struct` as a primitive type in `ret` instruction.
+ return op;
+ }
+
REDO_RETURN_NODE:
// adjust the type away from struct to integral
// and no normalizing
@@ -9147,10 +9309,20 @@ GenTree* Compiler::impFixupStructReturnType(GenTree* op, CORINFO_CLASS_HANDLE re
// No need to spill anything as we're about to return.
impAssignTempGen(tmpNum, op, info.compMethodInfo->args.retTypeClass, (unsigned)CHECK_SPILL_NONE);
- // Don't create both a GT_ADDR & GT_OBJ just to undo all of that; instead,
- // jump directly to a GT_LCL_FLD.
- op = gtNewLclvNode(tmpNum, info.compRetNativeType);
- op->ChangeOper(GT_LCL_FLD);
+ if (compDoOldStructRetyping())
+ {
+ // Don't create both a GT_ADDR & GT_OBJ just to undo all of that; instead,
+ // jump directly to a GT_LCL_FLD.
+ op = gtNewLclvNode(tmpNum, info.compRetNativeType);
+ op->ChangeOper(GT_LCL_FLD);
+ }
+ else
+ {
+ op = gtNewLclvNode(tmpNum, info.compRetType);
+ JITDUMP("\nimpFixupStructReturnType: created a pseudo-return buffer for a special helper\n");
+ DISPTREE(op);
+ return op;
+ }
}
else
{
@@ -13710,7 +13882,8 @@ void Compiler::impImportBlockCode(BasicBlock* block)
((block->bbFlags & BBF_BACKWARD_JUMP) != 0);
bool bbIsReturn = (block->bbJumpKind == BBJ_RETURN) &&
(!compIsForInlining() || (impInlineInfo->iciBlock->bbJumpKind == BBJ_RETURN));
- if (fgVarNeedsExplicitZeroInit(lvaGetDesc(lclNum), bbInALoop, bbIsReturn))
+ LclVarDsc* const lclDsc = lvaGetDesc(lclNum);
+ if (fgVarNeedsExplicitZeroInit(lclNum, bbInALoop, bbIsReturn))
{
// Append a tree to zero-out the temp
newObjThisPtr = gtNewLclvNode(lclNum, lvaTable[lclNum].TypeGet());
@@ -13721,6 +13894,12 @@ void Compiler::impImportBlockCode(BasicBlock* block)
false); // not copyBlock
impAppendTree(newObjThisPtr, (unsigned)CHECK_SPILL_NONE, impCurStmtOffs);
}
+ else
+ {
+ JITDUMP("\nSuppressing zero-init for V%02u -- expect to zero in prolog\n", lclNum);
+ lclDsc->lvSuppressedZeroInit = 1;
+ compSuppressedZeroInit = true;
+ }
// Obtain the address of the temp
newObjThisPtr =
@@ -14231,6 +14410,12 @@ void Compiler::impImportBlockCode(BasicBlock* block)
assert(pFldAddr == nullptr);
op1 = impImportStaticReadOnlyField(fldAddr, lclTyp);
+
+ // Widen small types since we're propagating the value
+ // instead of producing an indir.
+ //
+ op1->gtType = genActualType(lclTyp);
+
goto FIELD_DONE;
}
}
@@ -14248,7 +14433,9 @@ void Compiler::impImportBlockCode(BasicBlock* block)
case CORINFO_FIELD_INTRINSIC_ZERO:
{
assert(aflags & CORINFO_ACCESS_GET);
- op1 = gtNewIconNode(0, lclTyp);
+ // Widen to stack type
+ lclTyp = genActualType(lclTyp);
+ op1 = gtNewIconNode(0, lclTyp);
goto FIELD_DONE;
}
break;
@@ -14267,6 +14454,8 @@ void Compiler::impImportBlockCode(BasicBlock* block)
case CORINFO_FIELD_INTRINSIC_ISLITTLEENDIAN:
{
assert(aflags & CORINFO_ACCESS_GET);
+ // Widen to stack type
+ lclTyp = genActualType(lclTyp);
#if BIGENDIAN
op1 = gtNewIconNode(0, lclTyp);
#else
@@ -15036,10 +15225,19 @@ void Compiler::impImportBlockCode(BasicBlock* block)
op1 = gtNewHelperCallNode(CORINFO_HELP_TYPEHANDLE_TO_RUNTIMETYPEHANDLE_MAYBENULL, TYP_STRUCT,
helperArgs);
+ CORINFO_CLASS_HANDLE classHandle = impGetTypeHandleClass();
+
// The handle struct is returned in register
op1->AsCall()->gtReturnType = GetRuntimeHandleUnderlyingType();
+ if (!compDoOldStructRetyping())
+ {
+ op1->AsCall()->gtRetClsHnd = classHandle;
+#if FEATURE_MULTIREG_RET
+ op1->AsCall()->InitializeStructReturnType(this, classHandle);
+#endif
+ }
- tiRetVal = typeInfo(TI_STRUCT, impGetTypeHandleClass());
+ tiRetVal = typeInfo(TI_STRUCT, classHandle);
}
impPushOnStack(op1, tiRetVal);
@@ -15076,8 +15274,16 @@ void Compiler::impImportBlockCode(BasicBlock* block)
op1 = gtNewHelperCallNode(helper, TYP_STRUCT, helperArgs);
- // The handle struct is returned in register
+ // The handle struct is returned in register and
+ // it could be consumed both as `TYP_STRUCT` and `TYP_REF`.
op1->AsCall()->gtReturnType = GetRuntimeHandleUnderlyingType();
+ if (!compDoOldStructRetyping())
+ {
+#if FEATURE_MULTIREG_RET
+ op1->AsCall()->InitializeStructReturnType(this, tokenType);
+#endif
+ op1->AsCall()->gtRetClsHnd = tokenType;
+ }
tiRetVal = verMakeTypeInfo(tokenType);
impPushOnStack(op1, tiRetVal);
@@ -15254,6 +15460,13 @@ void Compiler::impImportBlockCode(BasicBlock* block)
op1 = gtNewHelperCallNode(helper,
(var_types)((helper == CORINFO_HELP_UNBOX) ? TYP_BYREF : TYP_STRUCT),
gtNewCallArgs(op2, op1));
+ if (!compDoOldStructRetyping())
+ {
+ if (op1->gtType == TYP_STRUCT)
+ {
+ op1->AsCall()->gtRetClsHnd = resolvedToken.hClass;
+ }
+ }
}
assert(helper == CORINFO_HELP_UNBOX && op1->gtType == TYP_BYREF || // Unbox helper returns a byref.
@@ -16172,7 +16385,7 @@ void Compiler::impMarkLclDstNotPromotable(unsigned tmpNum, GenTree* src, CORINFO
GenTree* Compiler::impAssignSmallStructTypeToVar(GenTree* op, CORINFO_CLASS_HANDLE hClass)
{
- unsigned tmpNum = lvaGrabTemp(true DEBUGARG("Return value temp for small struct return."));
+ unsigned tmpNum = lvaGrabTemp(true DEBUGARG("Return value temp for small struct return"));
impAssignTempGen(tmpNum, op, hClass, (unsigned)CHECK_SPILL_ALL);
GenTree* ret = gtNewLclvNode(tmpNum, lvaTable[tmpNum].lvType);
return ret;
@@ -16192,7 +16405,7 @@ GenTree* Compiler::impAssignSmallStructTypeToVar(GenTree* op, CORINFO_CLASS_HAND
GenTree* Compiler::impAssignMultiRegTypeToVar(GenTree* op, CORINFO_CLASS_HANDLE hClass)
{
- unsigned tmpNum = lvaGrabTemp(true DEBUGARG("Return value temp for multireg return."));
+ unsigned tmpNum = lvaGrabTemp(true DEBUGARG("Return value temp for multireg return"));
impAssignTempGen(tmpNum, op, hClass, (unsigned)CHECK_SPILL_ALL);
GenTree* ret = gtNewLclvNode(tmpNum, lvaTable[tmpNum].lvType);
@@ -16430,11 +16643,14 @@ bool Compiler::impReturnInstruction(int prefixFlags, OPCODE& opcode)
// node type. During morphing, the GT_CALL will get the correct, final, native return type.
bool restoreType = false;
- if ((op2->OperGet() == GT_CALL) && (info.compRetType == TYP_STRUCT))
+ if (compDoOldStructRetyping())
{
- noway_assert(op2->TypeGet() == TYP_STRUCT);
- op2->gtType = info.compRetNativeType;
- restoreType = true;
+ if ((op2->OperGet() == GT_CALL) && (info.compRetType == TYP_STRUCT))
+ {
+ noway_assert(op2->TypeGet() == TYP_STRUCT);
+ op2->gtType = info.compRetNativeType;
+ restoreType = true;
+ }
}
impAssignTempGen(lvaInlineeReturnSpillTemp, op2, se.seTypeInfo.GetClassHandle(),
@@ -16442,9 +16658,12 @@ bool Compiler::impReturnInstruction(int prefixFlags, OPCODE& opcode)
GenTree* tmpOp2 = gtNewLclvNode(lvaInlineeReturnSpillTemp, op2->TypeGet());
- if (restoreType)
+ if (compDoOldStructRetyping())
{
- op2->gtType = TYP_STRUCT; // restore it to what it was
+ if (restoreType)
+ {
+ op2->gtType = TYP_STRUCT; // restore it to what it was
+ }
}
op2 = tmpOp2;
@@ -16671,7 +16890,16 @@ bool Compiler::impReturnInstruction(int prefixFlags, OPCODE& opcode)
#endif
op2 = impFixupStructReturnType(op2, retClsHnd);
// return op2
- op1 = gtNewOperNode(GT_RETURN, genActualType(info.compRetNativeType), op2);
+ var_types returnType;
+ if (compDoOldStructRetyping())
+ {
+ returnType = info.compRetNativeType;
+ }
+ else
+ {
+ returnType = info.compRetType;
+ }
+ op1 = gtNewOperNode(GT_RETURN, genActualType(returnType), op2);
}
else
{
@@ -17384,7 +17612,7 @@ void Compiler::impImportBlockPending(BasicBlock* block)
#ifdef DEBUG
char buffer[400];
sprintf_s(buffer, sizeof(buffer),
- "Block at offset %4.4x to %4.4x in %s entered with different stack depths.\n"
+ "Block at offset %4.4x to %4.4x in %0.200s entered with different stack depths.\n"
"Previous depth was %d, current depth is %d",
block->bbCodeOffs, block->bbCodeOffsEnd, info.compFullName, block->bbStkDepth,
verCurrentState.esStackDepth);
@@ -18596,7 +18824,7 @@ void Compiler::impCheckCanInline(GenTreeCall* call,
//
// Checks for various inline blocking conditions and makes notes in
// the inline info arg table about the properties of the actual. These
-// properties are used later by impFetchArg to determine how best to
+// properties are used later by impInlineFetchArg to determine how best to
// pass the argument into the inlinee.
void Compiler::impInlineRecordArgInfo(InlineInfo* pInlineInfo,
@@ -19611,6 +19839,13 @@ void Compiler::impMarkInlineCandidateHelper(GenTreeCall* call,
return;
}
+ // Don't inline into callers that use the NextCallReturnAddress intrinsic.
+ if (info.compHasNextCallRetAddr)
+ {
+ inlineResult.NoteFatal(InlineObservation::CALLER_USES_NEXT_CALL_RET_ADDR);
+ return;
+ }
+
// Inlining candidate determination needs to honor only IL tail prefix.
// Inlining takes precedence over implicit tail call optimization (if the call is not directly recursive).
if (call->IsTailPrefixedCall())
diff --git a/src/coreclr/src/jit/inline.cpp b/src/coreclr/src/jit/inline.cpp
index fca4fb50d62aef..5223376edce5bc 100644
--- a/src/coreclr/src/jit/inline.cpp
+++ b/src/coreclr/src/jit/inline.cpp
@@ -1171,6 +1171,7 @@ InlineContext* InlineStrategy::NewRoot()
InlineContext* rootContext = new (m_Compiler, CMK_Inlining) InlineContext(this);
rootContext->m_ILSize = m_Compiler->info.compILCodeSize;
+ rootContext->m_Code = m_Compiler->info.compCode;
#if defined(DEBUG) || defined(INLINE_DATA)
diff --git a/src/coreclr/src/jit/inline.def b/src/coreclr/src/jit/inline.def
index b35464e3a2a4cc..886572094c0cfb 100644
--- a/src/coreclr/src/jit/inline.def
+++ b/src/coreclr/src/jit/inline.def
@@ -22,161 +22,162 @@
// ------ Initial Sentinel -------
-INLINE_OBSERVATION(UNUSED_INITIAL, bool, "unused initial observation", FATAL, CALLEE)
+INLINE_OBSERVATION(UNUSED_INITIAL, bool, "unused initial observation", FATAL, CALLEE)
// ------ Callee Fatal -------
-INLINE_OBSERVATION(BAD_ARGUMENT_NUMBER, bool, "invalid argument number", FATAL, CALLEE)
-INLINE_OBSERVATION(BAD_LOCAL_NUMBER, bool, "invalid local number", FATAL, CALLEE)
-INLINE_OBSERVATION(CLASS_INIT_FAILURE, bool, "class init failed", FATAL, CALLEE)
-INLINE_OBSERVATION(COMPILATION_ERROR, bool, "compilation error", FATAL, CALLEE)
-INLINE_OBSERVATION(EXCEEDS_THRESHOLD, bool, "exceeds profit threshold", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_DELEGATE_INVOKE, bool, "delegate invoke", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_EH, bool, "has exception handling", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_ENDFILTER, bool, "has endfilter", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_ENDFINALLY, bool, "has endfinally", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_LEAVE, bool, "has leave", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_MANAGED_VARARGS, bool, "managed varargs", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_NATIVE_VARARGS, bool, "native varargs", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_NO_BODY, bool, "has no body", FATAL, CALLEE)
-INLINE_OBSERVATION(HAS_NULL_FOR_LDELEM, bool, "has null pointer for ldelem", FATAL, CALLEE)
-INLINE_OBSERVATION(IS_ARRAY_METHOD, bool, "is array method", FATAL, CALLEE)
-INLINE_OBSERVATION(IS_GENERIC_VIRTUAL, bool, "generic virtual", FATAL, CALLEE)
-INLINE_OBSERVATION(IS_JIT_NOINLINE, bool, "noinline per JitNoinline", FATAL, CALLEE)
-INLINE_OBSERVATION(IS_NOINLINE, bool, "noinline per IL/cached result", FATAL, CALLEE)
-INLINE_OBSERVATION(IS_SYNCHRONIZED, bool, "is synchronized", FATAL, CALLEE)
-INLINE_OBSERVATION(IS_VM_NOINLINE, bool, "noinline per VM", FATAL, CALLEE)
-INLINE_OBSERVATION(LACKS_RETURN, bool, "no return opcode", FATAL, CALLEE)
-INLINE_OBSERVATION(LDFLD_NEEDS_HELPER, bool, "ldfld needs helper", FATAL, CALLEE)
-INLINE_OBSERVATION(LOCALLOC_TOO_LARGE, bool, "localloc size too large", FATAL, CALLEE)
-INLINE_OBSERVATION(LOG_REPLAY_REJECT, bool, "rejected by log replay", FATAL, CALLEE)
-INLINE_OBSERVATION(MARKED_AS_SKIPPED, bool, "skipped by complus request", FATAL, CALLEE)
-INLINE_OBSERVATION(MAXSTACK_TOO_BIG, bool, "maxstack too big" , FATAL, CALLEE)
-INLINE_OBSERVATION(NO_METHOD_INFO, bool, "cannot get method info", FATAL, CALLEE)
-INLINE_OBSERVATION(NOT_PROFITABLE_INLINE, bool, "unprofitable inline", FATAL, CALLEE)
-INLINE_OBSERVATION(RANDOM_REJECT, bool, "random reject", FATAL, CALLEE)
-INLINE_OBSERVATION(STACK_CRAWL_MARK, bool, "uses stack crawl mark", FATAL, CALLEE)
-INLINE_OBSERVATION(STFLD_NEEDS_HELPER, bool, "stfld needs helper", FATAL, CALLEE)
-INLINE_OBSERVATION(TOO_MANY_ARGUMENTS, bool, "too many arguments", FATAL, CALLEE)
-INLINE_OBSERVATION(TOO_MANY_LOCALS, bool, "too many locals", FATAL, CALLEE)
-INLINE_OBSERVATION(EXPLICIT_TAIL_PREFIX, bool, "explicit tail prefix in callee",FATAL, CALLEE)
+INLINE_OBSERVATION(BAD_ARGUMENT_NUMBER, bool, "invalid argument number", FATAL, CALLEE)
+INLINE_OBSERVATION(BAD_LOCAL_NUMBER, bool, "invalid local number", FATAL, CALLEE)
+INLINE_OBSERVATION(CLASS_INIT_FAILURE, bool, "class init failed", FATAL, CALLEE)
+INLINE_OBSERVATION(COMPILATION_ERROR, bool, "compilation error", FATAL, CALLEE)
+INLINE_OBSERVATION(EXCEEDS_THRESHOLD, bool, "exceeds profit threshold", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_DELEGATE_INVOKE, bool, "delegate invoke", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_EH, bool, "has exception handling", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_ENDFILTER, bool, "has endfilter", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_ENDFINALLY, bool, "has endfinally", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_LEAVE, bool, "has leave", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_MANAGED_VARARGS, bool, "managed varargs", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_NATIVE_VARARGS, bool, "native varargs", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_NO_BODY, bool, "has no body", FATAL, CALLEE)
+INLINE_OBSERVATION(HAS_NULL_FOR_LDELEM, bool, "has null pointer for ldelem", FATAL, CALLEE)
+INLINE_OBSERVATION(IS_ARRAY_METHOD, bool, "is array method", FATAL, CALLEE)
+INLINE_OBSERVATION(IS_GENERIC_VIRTUAL, bool, "generic virtual", FATAL, CALLEE)
+INLINE_OBSERVATION(IS_JIT_NOINLINE, bool, "noinline per JitNoinline", FATAL, CALLEE)
+INLINE_OBSERVATION(IS_NOINLINE, bool, "noinline per IL/cached result", FATAL, CALLEE)
+INLINE_OBSERVATION(IS_SYNCHRONIZED, bool, "is synchronized", FATAL, CALLEE)
+INLINE_OBSERVATION(IS_VM_NOINLINE, bool, "noinline per VM", FATAL, CALLEE)
+INLINE_OBSERVATION(LACKS_RETURN, bool, "no return opcode", FATAL, CALLEE)
+INLINE_OBSERVATION(LDFLD_NEEDS_HELPER, bool, "ldfld needs helper", FATAL, CALLEE)
+INLINE_OBSERVATION(LOCALLOC_TOO_LARGE, bool, "localloc size too large", FATAL, CALLEE)
+INLINE_OBSERVATION(LOG_REPLAY_REJECT, bool, "rejected by log replay", FATAL, CALLEE)
+INLINE_OBSERVATION(MARKED_AS_SKIPPED, bool, "skipped by complus request", FATAL, CALLEE)
+INLINE_OBSERVATION(MAXSTACK_TOO_BIG, bool, "maxstack too big" , FATAL, CALLEE)
+INLINE_OBSERVATION(NO_METHOD_INFO, bool, "cannot get method info", FATAL, CALLEE)
+INLINE_OBSERVATION(NOT_PROFITABLE_INLINE, bool, "unprofitable inline", FATAL, CALLEE)
+INLINE_OBSERVATION(RANDOM_REJECT, bool, "random reject", FATAL, CALLEE)
+INLINE_OBSERVATION(STACK_CRAWL_MARK, bool, "uses stack crawl mark", FATAL, CALLEE)
+INLINE_OBSERVATION(STFLD_NEEDS_HELPER, bool, "stfld needs helper", FATAL, CALLEE)
+INLINE_OBSERVATION(TOO_MANY_ARGUMENTS, bool, "too many arguments", FATAL, CALLEE)
+INLINE_OBSERVATION(TOO_MANY_LOCALS, bool, "too many locals", FATAL, CALLEE)
+INLINE_OBSERVATION(EXPLICIT_TAIL_PREFIX, bool, "explicit tail prefix in callee", FATAL, CALLEE)
// ------ Callee Performance -------
-INLINE_OBSERVATION(LDFLD_STATIC_VALUECLASS, bool, "ldsfld of value class", PERFORMANCE, CALLEE)
-INLINE_OBSERVATION(TOO_MANY_BASIC_BLOCKS, bool, "too many basic blocks", PERFORMANCE, CALLEE)
-INLINE_OBSERVATION(TOO_MUCH_IL, bool, "too many il bytes", PERFORMANCE, CALLEE)
+INLINE_OBSERVATION(LDFLD_STATIC_VALUECLASS, bool, "ldsfld of value class", PERFORMANCE, CALLEE)
+INLINE_OBSERVATION(TOO_MANY_BASIC_BLOCKS, bool, "too many basic blocks", PERFORMANCE, CALLEE)
+INLINE_OBSERVATION(TOO_MUCH_IL, bool, "too many il bytes", PERFORMANCE, CALLEE)
// ------ Callee Information -------
-INLINE_OBSERVATION(ARG_FEEDS_CONSTANT_TEST, bool, "argument feeds constant test", INFORMATION, CALLEE)
-INLINE_OBSERVATION(ARG_FEEDS_TEST, bool, "argument feeds test", INFORMATION, CALLEE)
-INLINE_OBSERVATION(ARG_FEEDS_RANGE_CHECK, bool, "argument feeds range check", INFORMATION, CALLEE)
-INLINE_OBSERVATION(BEGIN_OPCODE_SCAN, bool, "prepare to look at opcodes", INFORMATION, CALLEE)
-INLINE_OBSERVATION(BELOW_ALWAYS_INLINE_SIZE, bool, "below ALWAYS_INLINE size", INFORMATION, CALLEE)
-INLINE_OBSERVATION(CLASS_PROMOTABLE, bool, "promotable value class", INFORMATION, CALLEE)
-INLINE_OBSERVATION(DOES_NOT_RETURN, bool, "does not return", INFORMATION, CALLEE)
-INLINE_OBSERVATION(END_OPCODE_SCAN, bool, "done looking at opcodes", INFORMATION, CALLEE)
-INLINE_OBSERVATION(HAS_GC_STRUCT, bool, "has gc field in struct local", INFORMATION, CALLEE)
-INLINE_OBSERVATION(HAS_LOCALLOC, bool, "has localloc", INFORMATION, CALLEE)
-INLINE_OBSERVATION(HAS_PINNED_LOCALS, bool, "has pinned locals", INFORMATION, CALLEE)
-INLINE_OBSERVATION(HAS_SIMD, bool, "has SIMD arg, local, or ret", INFORMATION, CALLEE)
-INLINE_OBSERVATION(HAS_SWITCH, bool, "has switch", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IL_CODE_SIZE, int, "number of bytes of IL", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IS_CLASS_CTOR, bool, "class constructor", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IS_DISCRETIONARY_INLINE, bool, "can inline, check heuristics", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IS_FORCE_INLINE, bool, "aggressive inline attribute", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IS_INSTANCE_CTOR, bool, "instance constructor", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IS_PROFITABLE_INLINE, bool, "profitable inline", INFORMATION, CALLEE)
-INLINE_OBSERVATION(IS_SIZE_DECREASING_INLINE, bool, "size decreasing inline", INFORMATION, CALLEE)
-INLINE_OBSERVATION(LOG_REPLAY_ACCEPT, bool, "accepted by log replay", INFORMATION, CALLEE)
-INLINE_OBSERVATION(LOOKS_LIKE_WRAPPER, bool, "thin wrapper around a call", INFORMATION, CALLEE)
-INLINE_OBSERVATION(MAXSTACK, int, "maxstack", INFORMATION, CALLEE)
-INLINE_OBSERVATION(OPCODE, int, "next opcode in IL stream", INFORMATION, CALLEE)
-INLINE_OBSERVATION(OPCODE_NORMED, int, "next opcode in IL stream", INFORMATION, CALLEE)
-INLINE_OBSERVATION(NUMBER_OF_ARGUMENTS, int, "number of arguments", INFORMATION, CALLEE)
-INLINE_OBSERVATION(NUMBER_OF_BASIC_BLOCKS, int, "number of basic blocks", INFORMATION, CALLEE)
-INLINE_OBSERVATION(NUMBER_OF_LOCALS, int, "number of locals", INFORMATION, CALLEE)
-INLINE_OBSERVATION(RANDOM_ACCEPT, bool, "random accept", INFORMATION, CALLEE)
-INLINE_OBSERVATION(UNSUPPORTED_OPCODE, bool, "unsupported opcode", INFORMATION, CALLEE)
+INLINE_OBSERVATION(ARG_FEEDS_CONSTANT_TEST, bool, "argument feeds constant test", INFORMATION, CALLEE)
+INLINE_OBSERVATION(ARG_FEEDS_TEST, bool, "argument feeds test", INFORMATION, CALLEE)
+INLINE_OBSERVATION(ARG_FEEDS_RANGE_CHECK, bool, "argument feeds range check", INFORMATION, CALLEE)
+INLINE_OBSERVATION(BEGIN_OPCODE_SCAN, bool, "prepare to look at opcodes", INFORMATION, CALLEE)
+INLINE_OBSERVATION(BELOW_ALWAYS_INLINE_SIZE, bool, "below ALWAYS_INLINE size", INFORMATION, CALLEE)
+INLINE_OBSERVATION(CLASS_PROMOTABLE, bool, "promotable value class", INFORMATION, CALLEE)
+INLINE_OBSERVATION(DOES_NOT_RETURN, bool, "does not return", INFORMATION, CALLEE)
+INLINE_OBSERVATION(END_OPCODE_SCAN, bool, "done looking at opcodes", INFORMATION, CALLEE)
+INLINE_OBSERVATION(HAS_GC_STRUCT, bool, "has gc field in struct local", INFORMATION, CALLEE)
+INLINE_OBSERVATION(HAS_LOCALLOC, bool, "has localloc", INFORMATION, CALLEE)
+INLINE_OBSERVATION(HAS_PINNED_LOCALS, bool, "has pinned locals", INFORMATION, CALLEE)
+INLINE_OBSERVATION(HAS_SIMD, bool, "has SIMD arg, local, or ret", INFORMATION, CALLEE)
+INLINE_OBSERVATION(HAS_SWITCH, bool, "has switch", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IL_CODE_SIZE, int, "number of bytes of IL", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IS_CLASS_CTOR, bool, "class constructor", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IS_DISCRETIONARY_INLINE, bool, "can inline, check heuristics", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IS_FORCE_INLINE, bool, "aggressive inline attribute", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IS_INSTANCE_CTOR, bool, "instance constructor", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IS_PROFITABLE_INLINE, bool, "profitable inline", INFORMATION, CALLEE)
+INLINE_OBSERVATION(IS_SIZE_DECREASING_INLINE, bool, "size decreasing inline", INFORMATION, CALLEE)
+INLINE_OBSERVATION(LOG_REPLAY_ACCEPT, bool, "accepted by log replay", INFORMATION, CALLEE)
+INLINE_OBSERVATION(LOOKS_LIKE_WRAPPER, bool, "thin wrapper around a call", INFORMATION, CALLEE)
+INLINE_OBSERVATION(MAXSTACK, int, "maxstack", INFORMATION, CALLEE)
+INLINE_OBSERVATION(OPCODE, int, "next opcode in IL stream", INFORMATION, CALLEE)
+INLINE_OBSERVATION(OPCODE_NORMED, int, "next opcode in IL stream", INFORMATION, CALLEE)
+INLINE_OBSERVATION(NUMBER_OF_ARGUMENTS, int, "number of arguments", INFORMATION, CALLEE)
+INLINE_OBSERVATION(NUMBER_OF_BASIC_BLOCKS, int, "number of basic blocks", INFORMATION, CALLEE)
+INLINE_OBSERVATION(NUMBER_OF_LOCALS, int, "number of locals", INFORMATION, CALLEE)
+INLINE_OBSERVATION(RANDOM_ACCEPT, bool, "random accept", INFORMATION, CALLEE)
+INLINE_OBSERVATION(UNSUPPORTED_OPCODE, bool, "unsupported opcode", INFORMATION, CALLEE)
// ------ Caller Correctness -------
-INLINE_OBSERVATION(DEBUG_CODEGEN, bool, "debug codegen", FATAL, CALLER)
-INLINE_OBSERVATION(IS_JIT_NOINLINE, bool, "noinline per JitNoInlineRange", FATAL, CALLER)
+INLINE_OBSERVATION(DEBUG_CODEGEN, bool, "debug codegen", FATAL, CALLER)
+INLINE_OBSERVATION(IS_JIT_NOINLINE, bool, "noinline per JitNoInlineRange", FATAL, CALLER)
+INLINE_OBSERVATION(USES_NEXT_CALL_RET_ADDR, bool, "uses NextCallReturnAddress intrinsic", FATAL, CALLER)
// ------ Caller Information -------
-INLINE_OBSERVATION(HAS_NEWARRAY, bool, "has newarray", INFORMATION, CALLER)
-INLINE_OBSERVATION(HAS_NEWOBJ, bool, "has newobj", INFORMATION, CALLER)
+INLINE_OBSERVATION(HAS_NEWARRAY, bool, "has newarray", INFORMATION, CALLER)
+INLINE_OBSERVATION(HAS_NEWOBJ, bool, "has newobj", INFORMATION, CALLER)
// ------ Call Site Correctness -------
-INLINE_OBSERVATION(ARG_HAS_NULL_THIS, bool, "this pointer argument is null", FATAL, CALLSITE)
-INLINE_OBSERVATION(ARG_IS_MKREFANY, bool, "argument is mkrefany", FATAL, CALLSITE)
-INLINE_OBSERVATION(ARG_NO_BASH_TO_INT, bool, "argument can't bash to int", FATAL, CALLSITE)
-INLINE_OBSERVATION(ARG_NO_BASH_TO_REF, bool, "argument can't bash to ref", FATAL, CALLSITE)
-INLINE_OBSERVATION(ARG_TYPES_INCOMPATIBLE, bool, "argument types incompatible", FATAL, CALLSITE)
-INLINE_OBSERVATION(CANT_EMBED_PINVOKE_COOKIE, bool, "can't embed pinvoke cookie", FATAL, CALLSITE)
-INLINE_OBSERVATION(CANT_EMBED_VARARGS_COOKIE, bool, "can't embed varargs cookie", FATAL, CALLSITE)
-INLINE_OBSERVATION(CLASS_INIT_FAILURE_SPEC, bool, "speculative class init failed", FATAL, CALLSITE)
-INLINE_OBSERVATION(COMPILATION_ERROR, bool, "compilation error", FATAL, CALLSITE)
-INLINE_OBSERVATION(COMPILATION_FAILURE, bool, "failed to compile", FATAL, CALLSITE)
-INLINE_OBSERVATION(CROSS_BOUNDARY_CALLI, bool, "cross-boundary calli", FATAL, CALLSITE)
-INLINE_OBSERVATION(CROSS_BOUNDARY_SECURITY, bool, "cross-boundary security check", FATAL, CALLSITE)
-INLINE_OBSERVATION(EXCEEDS_THRESHOLD, bool, "exceeds profit threshold", FATAL, CALLSITE)
-INLINE_OBSERVATION(EXPLICIT_TAIL_PREFIX, bool, "explicit tail prefix", FATAL, CALLSITE)
-INLINE_OBSERVATION(GENERIC_DICTIONARY_LOOKUP, bool, "runtime dictionary lookup", FATAL, CALLSITE)
-INLINE_OBSERVATION(HAS_CALL_VIA_LDVIRTFTN, bool, "call via ldvirtftn", FATAL, CALLSITE)
-INLINE_OBSERVATION(HAS_COMPLEX_HANDLE, bool, "complex handle access", FATAL, CALLSITE)
-INLINE_OBSERVATION(HAS_LDSTR_RESTRICTION, bool, "has ldstr VM restriction", FATAL, CALLSITE)
-INLINE_OBSERVATION(IMPLICIT_REC_TAIL_CALL, bool, "implicit recursive tail call", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_CALL_TO_HELPER, bool, "target is helper", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_NOT_DIRECT, bool, "target not direct", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_NOT_DIRECT_MANAGED, bool, "target not direct managed", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_RECURSIVE, bool, "recursive", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_TOO_DEEP, bool, "too deep", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_VIRTUAL, bool, "virtual", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_VM_NOINLINE, bool, "noinline per VM", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_WITHIN_CATCH, bool, "within catch region", FATAL, CALLSITE)
-INLINE_OBSERVATION(IS_WITHIN_FILTER, bool, "within filter region", FATAL, CALLSITE)
-INLINE_OBSERVATION(LDARGA_NOT_LOCAL_VAR, bool, "ldarga not on local var", FATAL, CALLSITE)
-INLINE_OBSERVATION(LDFLD_NEEDS_HELPER, bool, "ldfld needs helper", FATAL, CALLSITE)
-INLINE_OBSERVATION(LDVIRTFN_ON_NON_VIRTUAL, bool, "ldvirtfn on non-virtual", FATAL, CALLSITE)
-INLINE_OBSERVATION(LOCALLOC_IN_LOOP, bool, "within loop, has localloc", FATAL, CALLSITE)
-INLINE_OBSERVATION(LOCALLOC_SIZE_UNKNOWN, bool, "localloc size unknown", FATAL, CALLSITE)
-INLINE_OBSERVATION(LOG_REPLAY_REJECT, bool, "rejected by log replay", FATAL, CALLSITE)
-INLINE_OBSERVATION(NOT_CANDIDATE, bool, "not inline candidate", FATAL, CALLSITE)
-INLINE_OBSERVATION(NOT_PROFITABLE_INLINE, bool, "unprofitable inline", FATAL, CALLSITE)
-INLINE_OBSERVATION(OVER_BUDGET, bool, "inline exceeds budget", FATAL, CALLSITE)
-INLINE_OBSERVATION(OVER_INLINE_LIMIT, bool, "limited by JitInlineLimit", FATAL, CALLSITE)
-INLINE_OBSERVATION(PIN_IN_TRY_REGION, bool, "within try region, pinned", FATAL, CALLSITE)
-INLINE_OBSERVATION(RANDOM_REJECT, bool, "random reject", FATAL, CALLSITE)
-INLINE_OBSERVATION(REQUIRES_SAME_THIS, bool, "requires same this", FATAL, CALLSITE)
-INLINE_OBSERVATION(RETURN_TYPE_MISMATCH, bool, "return type mismatch", FATAL, CALLSITE)
-INLINE_OBSERVATION(STFLD_NEEDS_HELPER, bool, "stfld needs helper", FATAL, CALLSITE)
-INLINE_OBSERVATION(TOO_MANY_LOCALS, bool, "too many locals", FATAL, CALLSITE)
-INLINE_OBSERVATION(PINVOKE_EH, bool, "PInvoke call site with EH", FATAL, CALLSITE)
+INLINE_OBSERVATION(ARG_HAS_NULL_THIS, bool, "this pointer argument is null", FATAL, CALLSITE)
+INLINE_OBSERVATION(ARG_IS_MKREFANY, bool, "argument is mkrefany", FATAL, CALLSITE)
+INLINE_OBSERVATION(ARG_NO_BASH_TO_INT, bool, "argument can't bash to int", FATAL, CALLSITE)
+INLINE_OBSERVATION(ARG_NO_BASH_TO_REF, bool, "argument can't bash to ref", FATAL, CALLSITE)
+INLINE_OBSERVATION(ARG_TYPES_INCOMPATIBLE, bool, "argument types incompatible", FATAL, CALLSITE)
+INLINE_OBSERVATION(CANT_EMBED_PINVOKE_COOKIE, bool, "can't embed pinvoke cookie", FATAL, CALLSITE)
+INLINE_OBSERVATION(CANT_EMBED_VARARGS_COOKIE, bool, "can't embed varargs cookie", FATAL, CALLSITE)
+INLINE_OBSERVATION(CLASS_INIT_FAILURE_SPEC, bool, "speculative class init failed", FATAL, CALLSITE)
+INLINE_OBSERVATION(COMPILATION_ERROR, bool, "compilation error", FATAL, CALLSITE)
+INLINE_OBSERVATION(COMPILATION_FAILURE, bool, "failed to compile", FATAL, CALLSITE)
+INLINE_OBSERVATION(CROSS_BOUNDARY_CALLI, bool, "cross-boundary calli", FATAL, CALLSITE)
+INLINE_OBSERVATION(CROSS_BOUNDARY_SECURITY, bool, "cross-boundary security check", FATAL, CALLSITE)
+INLINE_OBSERVATION(EXCEEDS_THRESHOLD, bool, "exceeds profit threshold", FATAL, CALLSITE)
+INLINE_OBSERVATION(EXPLICIT_TAIL_PREFIX, bool, "explicit tail prefix", FATAL, CALLSITE)
+INLINE_OBSERVATION(GENERIC_DICTIONARY_LOOKUP, bool, "runtime dictionary lookup", FATAL, CALLSITE)
+INLINE_OBSERVATION(HAS_CALL_VIA_LDVIRTFTN, bool, "call via ldvirtftn", FATAL, CALLSITE)
+INLINE_OBSERVATION(HAS_COMPLEX_HANDLE, bool, "complex handle access", FATAL, CALLSITE)
+INLINE_OBSERVATION(HAS_LDSTR_RESTRICTION, bool, "has ldstr VM restriction", FATAL, CALLSITE)
+INLINE_OBSERVATION(IMPLICIT_REC_TAIL_CALL, bool, "implicit recursive tail call", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_CALL_TO_HELPER, bool, "target is helper", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_NOT_DIRECT, bool, "target not direct", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_NOT_DIRECT_MANAGED, bool, "target not direct managed", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_RECURSIVE, bool, "recursive", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_TOO_DEEP, bool, "too deep", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_VIRTUAL, bool, "virtual", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_VM_NOINLINE, bool, "noinline per VM", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_WITHIN_CATCH, bool, "within catch region", FATAL, CALLSITE)
+INLINE_OBSERVATION(IS_WITHIN_FILTER, bool, "within filter region", FATAL, CALLSITE)
+INLINE_OBSERVATION(LDARGA_NOT_LOCAL_VAR, bool, "ldarga not on local var", FATAL, CALLSITE)
+INLINE_OBSERVATION(LDFLD_NEEDS_HELPER, bool, "ldfld needs helper", FATAL, CALLSITE)
+INLINE_OBSERVATION(LDVIRTFN_ON_NON_VIRTUAL, bool, "ldvirtfn on non-virtual", FATAL, CALLSITE)
+INLINE_OBSERVATION(LOCALLOC_IN_LOOP, bool, "within loop, has localloc", FATAL, CALLSITE)
+INLINE_OBSERVATION(LOCALLOC_SIZE_UNKNOWN, bool, "localloc size unknown", FATAL, CALLSITE)
+INLINE_OBSERVATION(LOG_REPLAY_REJECT, bool, "rejected by log replay", FATAL, CALLSITE)
+INLINE_OBSERVATION(NOT_CANDIDATE, bool, "not inline candidate", FATAL, CALLSITE)
+INLINE_OBSERVATION(NOT_PROFITABLE_INLINE, bool, "unprofitable inline", FATAL, CALLSITE)
+INLINE_OBSERVATION(OVER_BUDGET, bool, "inline exceeds budget", FATAL, CALLSITE)
+INLINE_OBSERVATION(OVER_INLINE_LIMIT, bool, "limited by JitInlineLimit", FATAL, CALLSITE)
+INLINE_OBSERVATION(PIN_IN_TRY_REGION, bool, "within try region, pinned", FATAL, CALLSITE)
+INLINE_OBSERVATION(RANDOM_REJECT, bool, "random reject", FATAL, CALLSITE)
+INLINE_OBSERVATION(REQUIRES_SAME_THIS, bool, "requires same this", FATAL, CALLSITE)
+INLINE_OBSERVATION(RETURN_TYPE_MISMATCH, bool, "return type mismatch", FATAL, CALLSITE)
+INLINE_OBSERVATION(STFLD_NEEDS_HELPER, bool, "stfld needs helper", FATAL, CALLSITE)
+INLINE_OBSERVATION(TOO_MANY_LOCALS, bool, "too many locals", FATAL, CALLSITE)
+INLINE_OBSERVATION(PINVOKE_EH, bool, "PInvoke call site with EH", FATAL, CALLSITE)
// ------ Call Site Performance -------
-INLINE_OBSERVATION(RARE_GC_STRUCT, bool, "rarely called, has gc struct", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(RARE_GC_STRUCT, bool, "rarely called, has gc struct", INFORMATION, CALLSITE)
// ------ Call Site Information -------
-INLINE_OBSERVATION(CONSTANT_ARG_FEEDS_TEST, bool, "constant argument feeds test", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(DEPTH, int, "depth", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(FREQUENCY, int, "rough call site frequency", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(IN_LOOP, bool, "call site is in a loop", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(IN_TRY_REGION, bool, "call site is in a try region", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(IS_PROFITABLE_INLINE, bool, "profitable inline", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(IS_SAME_THIS, bool, "same this as root caller", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(IS_SIZE_DECREASING_INLINE, bool, "size decreasing inline", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(LOG_REPLAY_ACCEPT, bool, "accepted by log replay", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(RANDOM_ACCEPT, bool, "random accept", INFORMATION, CALLSITE)
-INLINE_OBSERVATION(WEIGHT, int, "call site frequency", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(CONSTANT_ARG_FEEDS_TEST, bool, "constant argument feeds test", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(DEPTH, int, "depth", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(FREQUENCY, int, "rough call site frequency", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(IN_LOOP, bool, "call site is in a loop", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(IN_TRY_REGION, bool, "call site is in a try region", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(IS_PROFITABLE_INLINE, bool, "profitable inline", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(IS_SAME_THIS, bool, "same this as root caller", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(IS_SIZE_DECREASING_INLINE, bool, "size decreasing inline", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(LOG_REPLAY_ACCEPT, bool, "accepted by log replay", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(RANDOM_ACCEPT, bool, "random accept", INFORMATION, CALLSITE)
+INLINE_OBSERVATION(WEIGHT, int, "call site frequency", INFORMATION, CALLSITE)
// ------ Final Sentinel -------
-INLINE_OBSERVATION(UNUSED_FINAL, bool, "unused final observation", FATAL, CALLEE)
+INLINE_OBSERVATION(UNUSED_FINAL, bool, "unused final observation", FATAL, CALLEE)
diff --git a/src/coreclr/src/jit/inline.h b/src/coreclr/src/jit/inline.h
index 01c523dc9891a8..76011c10028b40 100644
--- a/src/coreclr/src/jit/inline.h
+++ b/src/coreclr/src/jit/inline.h
@@ -662,7 +662,7 @@ class InlineContext
}
// Get the code pointer for this context.
- BYTE* GetCode() const
+ const BYTE* GetCode() const
{
return m_Code;
}
@@ -731,7 +731,7 @@ class InlineContext
InlineContext* m_Parent; // logical caller (parent)
InlineContext* m_Child; // first child
InlineContext* m_Sibling; // next child of the parent
- BYTE* m_Code; // address of IL buffer for the method
+ const BYTE* m_Code; // address of IL buffer for the method
unsigned m_ILSize; // size of IL buffer for the method
unsigned m_ImportedILSize; // estimated size of imported IL
IL_OFFSETX m_Offset; // call site location within parent
diff --git a/src/coreclr/src/jit/instr.cpp b/src/coreclr/src/jit/instr.cpp
index 2ee631fceeff82..ec776cbea9a911 100644
--- a/src/coreclr/src/jit/instr.cpp
+++ b/src/coreclr/src/jit/instr.cpp
@@ -57,13 +57,13 @@ const char* CodeGen::genInsName(instruction ins)
#include "instrs.h"
#elif defined(TARGET_ARM64)
- #define INST1(id, nm, fp, ldst, fmt, e1 ) nm,
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 ) nm,
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) nm,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) nm,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) nm,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) nm,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9 ) nm,
+ #define INST1(id, nm, ldst, fmt, e1 ) nm,
+ #define INST2(id, nm, ldst, fmt, e1, e2 ) nm,
+ #define INST3(id, nm, ldst, fmt, e1, e2, e3 ) nm,
+ #define INST4(id, nm, ldst, fmt, e1, e2, e3, e4 ) nm,
+ #define INST5(id, nm, ldst, fmt, e1, e2, e3, e4, e5 ) nm,
+ #define INST6(id, nm, ldst, fmt, e1, e2, e3, e4, e5, e6 ) nm,
+ #define INST9(id, nm, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9 ) nm,
#include "instrs.h"
#else
@@ -2364,11 +2364,7 @@ void CodeGen::instGen_Return(unsigned stkArgSize)
* Note: all MemoryBarriers instructions can be removed by
* SET COMPlus_JitNoMemoryBarriers=1
*/
-#ifdef TARGET_ARM64
-void CodeGen::instGen_MemoryBarrier(insBarrier barrierType)
-#else
-void CodeGen::instGen_MemoryBarrier()
-#endif
+void CodeGen::instGen_MemoryBarrier(BarrierKind barrierKind)
{
#ifdef DEBUG
if (JitConfig.JitNoMemoryBarriers() == 1)
@@ -2378,12 +2374,19 @@ void CodeGen::instGen_MemoryBarrier()
#endif // DEBUG
#if defined(TARGET_XARCH)
+ // only full barrier needs to be emitted on Xarch
+ if (barrierKind != BARRIER_FULL)
+ {
+ return;
+ }
+
instGen(INS_lock);
GetEmitter()->emitIns_I_AR(INS_or, EA_4BYTE, 0, REG_SPBASE, 0);
#elif defined(TARGET_ARM)
+ // ARM has only full barriers, so all barriers need to be emitted as full.
GetEmitter()->emitIns_I(INS_dmb, EA_4BYTE, 0xf);
#elif defined(TARGET_ARM64)
- GetEmitter()->emitIns_BARR(INS_dmb, barrierType);
+ GetEmitter()->emitIns_BARR(INS_dmb, barrierKind == BARRIER_LOAD_ONLY ? INS_BARRIER_ISHLD : INS_BARRIER_ISH);
#else
#error "Unknown TARGET"
#endif
diff --git a/src/coreclr/src/jit/instr.h b/src/coreclr/src/jit/instr.h
index 26ba6eec4ac016..3c0404c6079e95 100644
--- a/src/coreclr/src/jit/instr.h
+++ b/src/coreclr/src/jit/instr.h
@@ -37,13 +37,13 @@ enum instruction : unsigned
INS_lea, // Not a real instruction. It is used for load the address of stack locals
#elif defined(TARGET_ARM64)
- #define INST1(id, nm, fp, ldst, fmt, e1 ) INS_##id,
- #define INST2(id, nm, fp, ldst, fmt, e1, e2 ) INS_##id,
- #define INST3(id, nm, fp, ldst, fmt, e1, e2, e3 ) INS_##id,
- #define INST4(id, nm, fp, ldst, fmt, e1, e2, e3, e4 ) INS_##id,
- #define INST5(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5 ) INS_##id,
- #define INST6(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6 ) INS_##id,
- #define INST9(id, nm, fp, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) INS_##id,
+ #define INST1(id, nm, ldst, fmt, e1 ) INS_##id,
+ #define INST2(id, nm, ldst, fmt, e1, e2 ) INS_##id,
+ #define INST3(id, nm, ldst, fmt, e1, e2, e3 ) INS_##id,
+ #define INST4(id, nm, ldst, fmt, e1, e2, e3, e4 ) INS_##id,
+ #define INST5(id, nm, ldst, fmt, e1, e2, e3, e4, e5 ) INS_##id,
+ #define INST6(id, nm, ldst, fmt, e1, e2, e3, e4, e5, e6 ) INS_##id,
+ #define INST9(id, nm, ldst, fmt, e1, e2, e3, e4, e5, e6, e7, e8, e9) INS_##id,
#include "instrs.h"
INS_lea, // Not a real instruction. It is used for load the address of stack locals
diff --git a/src/coreclr/src/jit/instrsarm64.h b/src/coreclr/src/jit/instrsarm64.h
index c65ecdf9248043..41d33443c68d3a 100644
--- a/src/coreclr/src/jit/instrsarm64.h
+++ b/src/coreclr/src/jit/instrsarm64.h
@@ -7,14 +7,17 @@
*
* id -- the enum name for the instruction
* nm -- textual name (for assembly dipslay)
- * fp -- floating point instruction
- * ld/st/cmp -- load/store/compare instruction
+ * info -- miscellaneous instruction info (load/store/compare/ASIMD right shift)
* fmt -- encoding format used by this instruction
* e1 -- encoding 1
* e2 -- encoding 2
* e3 -- encoding 3
* e4 -- encoding 4
* e5 -- encoding 5
+ * e6 -- encoding 6
+ * e7 -- encoding 7
+ * e8 -- encoding 8
+ * e9 -- encoding 9
*
******************************************************************************/
@@ -45,7 +48,7 @@
#endif
/*****************************************************************************/
-/* The following is ARM64-specific */
+/* The following is ARM64-specific */
/*****************************************************************************/
// If you're adding a new instruction:
@@ -54,10 +57,10 @@
// emitInsMayWriteMultipleRegs in emitArm64.cpp.
// clang-format off
-INST9(invalid, "INVALID", 0, 0, IF_NONE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE)
+INST9(invalid, "INVALID", 0, IF_NONE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE, BAD_CODE)
-// enum name FP LD/ST DR_2E DR_2G DI_1B DI_1D DV_3C DV_2B DV_2C DV_2E DV_2F
-INST9(mov, "mov", 0, 0, IF_EN9, 0x2A0003E0, 0x11000000, 0x52800000, 0x320003E0, 0x0EA01C00, 0x0E003C00, 0x4E001C00, 0x5E000400, 0x6E000400)
+// enum name info DR_2E DR_2G DI_1B DI_1D DV_3C DV_2B DV_2C DV_2E DV_2F
+INST9(mov, "mov", 0, IF_EN9, 0x2A0003E0, 0x11000000, 0x52800000, 0x320003E0, 0x0EA01C00, 0x0E003C00, 0x4E001C00, 0x5E000400, 0x6E000400)
// mov Rd,Rm DR_2E X0101010000mmmmm 00000011111ddddd 2A00 03E0
// mov Rd,Rn DR_2G X001000100000000 000000nnnnnddddd 1100 0000 mov to/from SP only
// mov Rd,imm(i16,hw) DI_1B X10100101hwiiiii iiiiiiiiiiiddddd 5280 0000 imm(i16,hw)
@@ -68,8 +71,8 @@ INST9(mov, "mov", 0, 0, IF_EN9, 0x2A0003E0, 0x11000000, 0x52800000,
// mov Vd,Vn[] DV_2E 01011110000iiiii 000001nnnnnddddd 5E00 0400 Vd,Vn[] (scalar by elem)
// mov Vd[],Vn[] DV_2F 01101110000iiiii 0jjjj1nnnnnddddd 6E00 0400 Vd[],Vn[] (from/to elem)
-// enum name FP LD/ST DR_3A DR_3B DR_3C DI_2A DV_3A DV_3E
-INST6(add, "add", 0, 0, IF_EN6A, 0x0B000000, 0x0B000000, 0x0B200000, 0x11000000, 0x0E208400, 0x5EE08400)
+// enum name info DR_3A DR_3B DR_3C DI_2A DV_3A DV_3E
+INST6(add, "add", 0, IF_EN6A, 0x0B000000, 0x0B000000, 0x0B200000, 0x11000000, 0x0E208400, 0x5EE08400)
// add Rd,Rn,Rm DR_3A X0001011000mmmmm 000000nnnnnddddd 0B00 0000 Rd,Rn,Rm
// add Rd,Rn,(Rm,shk,imm) DR_3B X0001011sh0mmmmm ssssssnnnnnddddd 0B00 0000 Rm {LSL,LSR,ASR} imm(0-63)
// add Rd,Rn,(Rm,ext,shl) DR_3C X0001011001mmmmm ooosssnnnnnddddd 0B20 0000 ext(Rm) LSL imm(0-4)
@@ -77,7 +80,7 @@ INST6(add, "add", 0, 0, IF_EN6A, 0x0B000000, 0x0B000000, 0x0B200000,
// add Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 100001nnnnnddddd 0E20 8400 Vd,Vn,Vm (vector)
// add Vd,Vn,Vm DV_3E 01011110111mmmmm 100001nnnnnddddd 5EE0 8400 Vd,Vn,Vm (scalar)
-INST6(sub, "sub", 0, 0, IF_EN6A, 0x4B000000, 0x4B000000, 0x4B200000, 0x51000000, 0x2E208400, 0x7EE08400)
+INST6(sub, "sub", 0, IF_EN6A, 0x4B000000, 0x4B000000, 0x4B200000, 0x51000000, 0x2E208400, 0x7EE08400)
// sub Rd,Rn,Rm DR_3A X1001011000mmmmm 000000nnnnnddddd 4B00 0000 Rd,Rn,Rm
// sub Rd,Rn,(Rm,shk,imm) DR_3B X1001011sh0mmmmm ssssssnnnnnddddd 4B00 0000 Rm {LSL,LSR,ASR} imm(0-63)
// sub Rd,Rn,(Rm,ext,shl) DR_3C X1001011001mmmmm ooosssnnnnnddddd 4B20 0000 ext(Rm) LSL imm(0-4)
@@ -85,1483 +88,1774 @@ INST6(sub, "sub", 0, 0, IF_EN6A, 0x4B000000, 0x4B000000, 0x4B200000,
// sub Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 100001nnnnnddddd 2E20 8400 Vd,Vn,Vm (vector)
// sub Vd,Vn,Vm DV_3E 01111110111mmmmm 100001nnnnnddddd 7EE0 8400 Vd,Vn,Vm (scalar)
-// enum name FP LD/ST LS_2D LS_3F LS_2E LS_2F LS_3G LS_2G
-INST6(ld1, "ld1", 0, LD, IF_EN6B, 0x0C407000, 0x0CC07000, 0x0CDF7000, 0x0D400000, 0x0DC00000, 0x0DDF0000)
- // C7.2.170 LD1 (multiple structures, one register variant)
+// enum name info LS_2D LS_3F LS_2E LS_2F LS_3G LS_2G
+INST6(ld1, "ld1", LD, IF_EN6B, 0x0C407000, 0x0CC07000, 0x0CDF7000, 0x0D400000, 0x0DC00000, 0x0DDF0000)
+ // LD1 (multiple structures, one register variant)
// ld1 {Vt},[Xn] LS_2D 0Q00110001000000 0111ssnnnnnttttt 0C40 7000 base register
// ld1 {Vt},[Xn],Xm LS_3F 0Q001100110mmmmm 0111ssnnnnnttttt 0CC0 7000 post-indexed by a register
// ld1 {Vt},[Xn],#imm LS_2E 0Q00110011011111 0111ssnnnnnttttt 0CDF 7000 post-indexed by an immediate
- // C7.2.171 LD1 (single structure)
+ // LD1 (single structure)
// ld1 {Vt}[],[Xn] LS_2F 0Q00110101000000 xx0Sssnnnnnttttt 0D40 0000 base register
// ld1 {Vt}[],[Xn],Xm LS_3G 0Q001101110mmmmm xx0Sssnnnnnttttt 0DC0 0000 post-indexed by a register
// ld1 {Vt}[],[Xn],#imm LS_2G 0Q00110111011111 xx0Sssnnnnnttttt 0DDF 0000 post-indexed by an immediate
-INST6(ld2, "ld2", 0, LD, IF_EN6B, 0x0C408000, 0x0CC08000, 0x0CDF8000, 0x0D600000, 0x0DE00000, 0x0DFF0000)
- // C7.2.173 LD2 (multiple structures)
+INST6(ld2, "ld2", LD, IF_EN6B, 0x0C408000, 0x0CC08000, 0x0CDF8000, 0x0D600000, 0x0DE00000, 0x0DFF0000)
+ // LD2 (multiple structures)
// ld2 {Vt,Vt2},[Xn] LS_2D 0Q00110001000000 1000ssnnnnnttttt 0C40 8000 base register
// ld2 {Vt,Vt2},[Xn],Xm LS_3F 0Q001100110mmmmm 1000ssnnnnnttttt 0CC0 8000 post-indexed by a register
// ld2 {Vt,Vt2},[Xn],#imm LS_2E 0Q001100110mmmmm 1000ssnnnnnttttt 0CDF 8000 post-indexed by an immediate
- // C7.2.174 LD2 (single structure)
+ // LD2 (single structure)
// ld2 {Vt,Vt2}[],[Xn] LS_2F 0Q00110101100000 xx0Sssnnnnnttttt 0D60 0000 base register
// ld2 {Vt,Vt2}[],[Xn],Xm LS_3G 0Q001101111mmmmm xx0Sssnnnnnttttt 0DE0 0000 post-indexed by a register
// ld2 {Vt,Vt2}[],[Xn],#imm LS_2G 0Q00110111111111 xx0Sssnnnnnttttt 0DFF 0000 post-indexed by an immediate
-INST6(ld3, "ld3", 0, LD, IF_EN6B, 0x0C404000, 0x0CC04000, 0x0CDF4000, 0x0D402000, 0x0DC02000, 0x0DDF2000)
- // C7.2.176 LD3 (multiple structures)
+INST6(ld3, "ld3", LD, IF_EN6B, 0x0C404000, 0x0CC04000, 0x0CDF4000, 0x0D402000, 0x0DC02000, 0x0DDF2000)
+ // LD3 (multiple structures)
// ld3 {Vt-Vt3},[Xn] LS_2D 0Q00110001000000 0100ssnnnnnttttt 0C40 4000 base register
// ld3 {Vt-Vt3},[Xn],Xm LS_3F 0Q001100110mmmmm 0100ssnnnnnttttt 0CC0 4000 post-indexed by a register
// ld3 {Vt-Vt3},[Xn],#imm LS_2E 0Q001100110mmmmm 0100ssnnnnnttttt 0CDF 4000 post-indexed by an immediate
- // C7.2.177 LD3 (single structure)
+ // LD3 (single structure)
// ld3 {Vt-Vt3}[],[Xn] LS_2F 0Q00110101000000 xx1Sssnnnnnttttt 0D40 2000 base register
// ld3 {Vt-Vt3}[],[Xn],Xm LS_3G 0Q001101110mmmmm xx1Sssnnnnnttttt 0DC0 2000 post-indexed by a register
// ld3 {Vt-Vt3}[],[Xn],#imm LS_2G 0Q00110111011111 xx1Sssnnnnnttttt 0DDF 2000 post-indexed by an immediate
-INST6(ld4, "ld4", 0, LD, IF_EN6B, 0x0C400000, 0x0CC00000, 0x0CDF0000, 0x0D602000, 0x0DE02000, 0x0DFF2000)
- // C7.2.179 LD4 (multiple structures)
+INST6(ld4, "ld4", LD, IF_EN6B, 0x0C400000, 0x0CC00000, 0x0CDF0000, 0x0D602000, 0x0DE02000, 0x0DFF2000)
+ // LD4 (multiple structures)
// ld4 {Vt-Vt4},[Xn] LS_2D 0Q00110001000000 0000ssnnnnnttttt 0C40 0000 base register
// ld4 {Vt-Vt4},[Xn],Xm LS_3F 0Q001100110mmmmm 0000ssnnnnnttttt 0CC0 0000 post-indexed by a register
// ld4 {Vt-Vt4},[Xn],#imm LS_2E 0Q00110011011111 0000ssnnnnnttttt 0CDF 0000 post-indexed by an immediate
- // C7.2.180 LD4 (single structure)
+ // LD4 (single structure)
// ld4 {Vt-Vt4}[],[Xn] LS_2F 0Q00110101100000 xx1Sssnnnnnttttt 0D60 2000 base register
// ld4 {Vt-Vt4}[],[Xn],Xm LS_3G 0Q001101111mmmmm xx1Sssnnnnnttttt 0DE0 2000 post-indexed by a register
// ld4 {Vt-Vt4}[],[Xn],#imm LS_2G 0Q00110111111111 xx1Sssnnnnnttttt 0DFF 2000 post-indexed by an immediate
-INST6(st1, "st1", 0, LD, IF_EN6B, 0x0C007000, 0x0C807000, 0x0C9F7000, 0x0D000000, 0x0D800000, 0x0D9F0000)
- // C7.2.313 ST1 (multiple structures, one register variant)
+INST6(st1, "st1", LD, IF_EN6B, 0x0C007000, 0x0C807000, 0x0C9F7000, 0x0D000000, 0x0D800000, 0x0D9F0000)
+ // ST1 (multiple structures, one register variant)
// st1 {Vt},[Xn] LS_2D 0Q00110000000000 0111ssnnnnnttttt 0C00 7000 base register
// st1 {Vt},[Xn],Xm LS_3F 0Q001100100mmmmm 0111ssnnnnnttttt 0C80 7000 post-indexed by a register
// st1 {Vt},[Xn],#imm LS_2E 0Q00110010011111 0111ssnnnnnttttt 0C9F 7000 post-indexed by an immediate
- // C7.2.314 ST1 (single structure)
+ // ST1 (single structure)
// st1 {Vt}[],[Xn] LS_2F 0Q00110100000000 xx0Sssnnnnnttttt 0D00 0000 base register
// st1 {Vt}[],[Xn],Xm LS_3G 0Q001101100mmmmm xx0Sssnnnnnttttt 0D80 0000 post-indexed by a register
// st1 {Vt}[],[Xn],#imm LS_2G 0Q00110110011111 xx0Sssnnnnnttttt 0D9F 0000 post-indexed by an immediate
-INST6(st2, "st2", 0, ST, IF_EN6B, 0x0C008000, 0x0C808000, 0x0C9F8000, 0x0D200000, 0x0DA00000, 0x0DBF0000)
- // C7.2.315 ST2 (multiple structures)
+INST6(st2, "st2", ST, IF_EN6B, 0x0C008000, 0x0C808000, 0x0C9F8000, 0x0D200000, 0x0DA00000, 0x0DBF0000)
+ // ST2 (multiple structures)
// st2 {Vt,Vt2},[Xn] LS_2D 0Q00110000000000 1000ssnnnnnttttt 0C00 8000 base register
// st2 {Vt,Vt2},[Xn],Xm LS_3F 0Q001100100mmmmm 1000ssnnnnnttttt 0C80 8000 post-indexed by a register
// st2 {Vt,Vt2},[Xn],#imm LS_2E 0Q00110010011111 1000ssnnnnnttttt 0C9F 8000 post-indexed by an immediate
- // C7.2.316 ST2 (single structure)
+ // ST2 (single structure)
// st2 {Vt,Vt2}[],[Xn] LS_2F 0Q00110100100000 xx0Sssnnnnnttttt 0D20 0000 base register
// st2 {Vt,Vt2}[],[Xn],Xm LS_3G 0Q001101101mmmmm xx0Sssnnnnnttttt 0DA0 0000 post-indexed by a register
// st2 {Vt,Vt2}[],[Xn],#imm LS_2G 0Q00110110111111 xx0Sssnnnnnttttt 0DBF 0000 post-indexed by an immediate
-INST6(st3, "st3", 0, ST, IF_EN6B, 0x0C004000, 0x0C804000, 0x0C9F4000, 0x0D002000, 0x0D802000, 0x0D9F2000)
- // C7.2.317 ST3 (multiple structures)
+INST6(st3, "st3", ST, IF_EN6B, 0x0C004000, 0x0C804000, 0x0C9F4000, 0x0D002000, 0x0D802000, 0x0D9F2000)
+ // ST3 (multiple structures)
// st3 {Vt-Vt3},[Xn] LS_2D 0Q00110000000000 0100ssnnnnnttttt 0C00 4000 base register
// st3 {Vt-Vt3},[Xn],Xm LS_3F 0Q001100100mmmmm 0100ssnnnnnttttt 0C80 4000 post-indexed by a register
// st3 {Vt-Vt3},[Xn],#imm LS_2E 0Q00110010011111 0100ssnnnnnttttt 0C9F 4000 post-indexed by an immediate
- // C7.2.318 ST3 (single structure)
+ // ST3 (single structure)
// st3 {Vt-Vt3}[],[Xn] LS_2F 0Q00110100000000 xx1Sssnnnnnttttt 0D00 2000 base register
// st3 {Vt-Vt3}[],[Xn],Xm LS_3G 0Q001101100mmmmm xx1Sssnnnnnttttt 0D80 2000 post-indexed by a register
// st3 {Vt-Vt3}[],[Xn],#imm LS_2G 0Q00110110011111 xx1Sssnnnnnttttt 0D9F 2000 post-indexed by an immediate
-INST6(st4, "st4", 0, ST, IF_EN6B, 0x0C000000, 0x0C800000, 0x0C9F0000, 0x0D202000, 0x0DA02000, 0x0DBF2000)
- // C7.2.319 ST4 (multiple structures)
+INST6(st4, "st4", ST, IF_EN6B, 0x0C000000, 0x0C800000, 0x0C9F0000, 0x0D202000, 0x0DA02000, 0x0DBF2000)
+ // ST4 (multiple structures)
// st4 {Vt-Vt4},[Xn] LS_2D 0Q00110000000000 0000ssnnnnnttttt 0C00 0000 base register
// st4 {Vt-Vt4},[Xn],Xm LS_3F 0Q001100100mmmmm 0000ssnnnnnttttt 0C80 0000 post-indexed by a register
// st4 {Vt-Vt4},[Xn],#imm LS_2E 0Q00110010011111 0000ssnnnnnttttt 0C9F 0000 post-indexed by an immediate
- // C7.2.320 ST4 (single structure)
+ // ST4 (single structure)
// st4 {Vt-Vt4}[],[Xn] LS_2F 0Q00110100100000 xx1Sssnnnnnttttt 0D20 2000 base register
// st4 {Vt-Vt4}[],[Xn],Xm LS_3G 0Q001101101mmmmm xx1Sssnnnnnttttt 0DA0 2000 post-indexed by a register
// st4 {Vt-Vt4}[],[Xn],#imm LS_2G 0Q00110110111111 xx1Sssnnnnnttttt 0DBF 2000 post-indexed by an immediate
-// enum name FP LD/ST LS_2A LS_2B LS_2C LS_3A LS_1A
-INST5(ldr, "ldr", 0,LD, IF_EN5A, 0xB9400000, 0xB9400000, 0xB8400000, 0xB8600800, 0x18000000)
+// enum name info LS_2A LS_2B LS_2C LS_3A LS_1A
+INST5(ldr, "ldr", LD, IF_EN5A, 0xB9400000, 0xB9400000, 0xB8400000, 0xB8600800, 0x18000000)
// ldr Rt,[Xn] LS_2A 1X11100101000000 000000nnnnnttttt B940 0000
// ldr Rt,[Xn+pimm12] LS_2B 1X11100101iiiiii iiiiiinnnnnttttt B940 0000 imm(0-4095<<{2,3})
// ldr Rt,[Xn+simm9] LS_2C 1X111000010iiiii iiiiPPnnnnnttttt B840 0000 [Xn imm(-256..+255) pre/post/no inc]
// ldr Rt,[Xn,(Rm,ext,shl)] LS_3A 1X111000011mmmmm oooS10nnnnnttttt B860 0800 [Xn, ext(Rm) LSL {0,2,3}]
// ldr Vt/Rt,[PC+simm19<<2] LS_1A XX011V00iiiiiiii iiiiiiiiiiittttt 1800 0000 [PC +- imm(1MB)]
-INST5(ldrsw, "ldrsw", 0,LD, IF_EN5A, 0xB9800000, 0xB9800000, 0xB8800000, 0xB8A00800, 0x98000000)
+INST5(ldrsw, "ldrsw", LD, IF_EN5A, 0xB9800000, 0xB9800000, 0xB8800000, 0xB8A00800, 0x98000000)
// ldrsw Rt,[Xn] LS_2A 1011100110000000 000000nnnnnttttt B980 0000
// ldrsw Rt,[Xn+pimm12] LS_2B 1011100110iiiiii iiiiiinnnnnttttt B980 0000 imm(0-4095<<2)
// ldrsw Rt,[Xn+simm9] LS_2C 10111000100iiiii iiiiPPnnnnnttttt B880 0000 [Xn imm(-256..+255) pre/post/no inc]
// ldrsw Rt,[Xn,(Rm,ext,shl)] LS_3A 10111000101mmmmm oooS10nnnnnttttt B8A0 0800 [Xn, ext(Rm) LSL {0,2}]
// ldrsw Rt,[PC+simm19<<2] LS_1A 10011000iiiiiiii iiiiiiiiiiittttt 9800 0000 [PC +- imm(1MB)]
-// enum name FP LD/ST DV_2G DV_2H DV_2I DV_1A DV_1B
-INST5(fmov, "fmov", 0, 0, IF_EN5B, 0x1E204000, 0x1E260000, 0x1E270000, 0x1E201000, 0x0F00F400)
+// enum name info DV_2G DV_2H DV_2I DV_1A DV_1B
+INST5(fmov, "fmov", 0, IF_EN5B, 0x1E204000, 0x1E260000, 0x1E270000, 0x1E201000, 0x0F00F400)
// fmov Vd,Vn DV_2G 000111100X100000 010000nnnnnddddd 1E20 4000 Vd,Vn (scalar)
// fmov Rd,Vn DV_2H X00111100X100110 000000nnnnnddddd 1E26 0000 Rd,Vn (scalar, to general)
// fmov Vd,Rn DV_2I X00111100X100111 000000nnnnnddddd 1E27 0000 Vd,Rn (scalar, from general)
// fmov Vd,immfp DV_1A 000111100X1iiiii iii10000000ddddd 1E20 1000 Vd,immfp (scalar)
// fmov Vd,immfp DV_1B 0QX0111100000iii 111101iiiiiddddd 0F00 F400 Vd,immfp (immediate vector)
-// enum name FP LD/ST DR_3A DR_3B DI_2C DV_3C DV_1B
-INST5(orr, "orr", 0, 0, IF_EN5C, 0x2A000000, 0x2A000000, 0x32000000, 0x0EA01C00, 0x0F001400)
+// enum name info DR_3A DR_3B DI_2C DV_3C DV_1B
+INST5(orr, "orr", 0, IF_EN5C, 0x2A000000, 0x2A000000, 0x32000000, 0x0EA01C00, 0x0F001400)
// orr Rd,Rn,Rm DR_3A X0101010000mmmmm 000000nnnnnddddd 2A00 0000
// orr Rd,Rn,(Rm,shk,imm) DR_3B X0101010sh0mmmmm iiiiiinnnnnddddd 2A00 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
// orr Rd,Rn,imm(N,r,s) DI_2C X01100100Nrrrrrr ssssssnnnnnddddd 3200 0000 imm(N,r,s)
// orr Vd,Vn,Vm DV_3C 0Q001110101mmmmm 000111nnnnnddddd 0EA0 1C00 Vd,Vn,Vm
// orr Vd,imm8 DV_1B 0Q00111100000iii ---101iiiiiddddd 0F00 1400 Vd imm8 (immediate vector)
-// enum name FP LD/ST LS_2A LS_2B LS_2C LS_3A
-INST4(ldrb, "ldrb", 0,LD, IF_EN4A, 0x39400000, 0x39400000, 0x38400000, 0x38600800)
+// enum name info LS_2A LS_2B LS_2C LS_3A
+INST4(ldrb, "ldrb", LD, IF_EN4A, 0x39400000, 0x39400000, 0x38400000, 0x38600800)
// ldrb Rt,[Xn] LS_2A 0011100101000000 000000nnnnnttttt 3940 0000
// ldrb Rt,[Xn+pimm12] LS_2B 0011100101iiiiii iiiiiinnnnnttttt 3940 0000 imm(0-4095)
// ldrb Rt,[Xn+simm9] LS_2C 00111000010iiiii iiiiPPnnnnnttttt 3840 0000 [Xn imm(-256..+255) pre/post/no inc]
// ldrb Rt,[Xn,(Rm,ext,shl)] LS_3A 00111000011mmmmm oooS10nnnnnttttt 3860 0800 [Xn, ext(Rm)]
-INST4(ldrh, "ldrh", 0,LD, IF_EN4A, 0x79400000, 0x79400000, 0x78400000, 0x78600800)
+INST4(ldrh, "ldrh", LD, IF_EN4A, 0x79400000, 0x79400000, 0x78400000, 0x78600800)
// ldrh Rt,[Xn] LS_2A 0111100101000000 000000nnnnnttttt 7940 0000
// ldrh Rt,[Xn+pimm12] LS_2B 0111100101iiiiii iiiiiinnnnnttttt 7940 0000 imm(0-4095<<1)
// ldrh Rt,[Xn+simm9] LS_2C 01111000010iiiii iiiiPPnnnnnttttt 7840 0000 [Xn imm(-256..+255) pre/post/no inc]
// ldrh Rt,[Xn,(Rm,ext,shl)] LS_3A 01111000011mmmmm oooS10nnnnnttttt 7860 0800 [Xn, ext(Rm) LSL {0,1}]
-INST4(ldrsb, "ldrsb", 0,LD, IF_EN4A, 0x39800000, 0x39800000, 0x38800000, 0x38A00800)
+INST4(ldrsb, "ldrsb", LD, IF_EN4A, 0x39800000, 0x39800000, 0x38800000, 0x38A00800)
// ldrsb Rt,[Xn] LS_2A 001110011X000000 000000nnnnnttttt 3980 0000
// ldrsb Rt,[Xn+pimm12] LS_2B 001110011Xiiiiii iiiiiinnnnnttttt 3980 0000 imm(0-4095)
// ldrsb Rt,[Xn+simm9] LS_2C 001110001X0iiiii iiii01nnnnnttttt 3880 0000 [Xn imm(-256..+255) pre/post/no inc]
// ldrsb Rt,[Xn,(Rm,ext,shl)] LS_3A 001110001X1mmmmm oooS10nnnnnttttt 38A0 0800 [Xn, ext(Rm)]
-INST4(ldrsh, "ldrsh", 0,LD, IF_EN4A, 0x79800000, 0x79800000, 0x78800000, 0x78A00800)
+INST4(ldrsh, "ldrsh", LD, IF_EN4A, 0x79800000, 0x79800000, 0x78800000, 0x78A00800)
// ldrsh Rt,[Xn] LS_2A 011110011X000000 000000nnnnnttttt 7980 0000
// ldrsh Rt,[Xn+pimm12] LS_2B 011110011Xiiiiii iiiiiinnnnnttttt 7980 0000 imm(0-4095<<1)
// ldrsh Rt,[Xn+simm9] LS_2C 011110001X0iiiii iiiiPPnnnnnttttt 7880 0000 [Xn imm(-256..+255) pre/post/no inc]
// ldrsh Rt,[Xn,(Rm,ext,shl)] LS_3A 011110001X1mmmmm oooS10nnnnnttttt 78A0 0800 [Xn, ext(Rm) LSL {0,1}]
-INST4(str, "str", 0,ST, IF_EN4A, 0xB9000000, 0xB9000000, 0xB8000000, 0xB8200800)
+INST4(str, "str", ST, IF_EN4A, 0xB9000000, 0xB9000000, 0xB8000000, 0xB8200800)
// str Rt,[Xn] LS_2A 1X11100100000000 000000nnnnnttttt B900 0000
// str Rt,[Xn+pimm12] LS_2B 1X11100100iiiiii iiiiiinnnnnttttt B900 0000 imm(0-4095<<{2,3})
// str Rt,[Xn+simm9] LS_2C 1X111000000iiiii iiiiPPnnnnnttttt B800 0000 [Xn imm(-256..+255) pre/post/no inc]
// str Rt,[Xn,(Rm,ext,shl)] LS_3A 1X111000001mmmmm oooS10nnnnnttttt B820 0800 [Xn, ext(Rm)]
-INST4(strb, "strb", 0,ST, IF_EN4A, 0x39000000, 0x39000000, 0x38000000, 0x38200800)
+INST4(strb, "strb", ST, IF_EN4A, 0x39000000, 0x39000000, 0x38000000, 0x38200800)
// strb Rt,[Xn] LS_2A 0011100100000000 000000nnnnnttttt 3900 0000
// strb Rt,[Xn+pimm12] LS_2B 0011100100iiiiii iiiiiinnnnnttttt 3900 0000 imm(0-4095)
// strb Rt,[Xn+simm9] LS_2C 00111000000iiiii iiiiPPnnnnnttttt 3800 0000 [Xn imm(-256..+255) pre/post/no inc]
// strb Rt,[Xn,(Rm,ext,shl)] LS_3A 00111000001mmmmm oooS10nnnnnttttt 3820 0800 [Xn, ext(Rm)]
-INST4(strh, "strh", 0,ST, IF_EN4A, 0x79000000, 0x79000000, 0x78000000, 0x78200800)
+INST4(strh, "strh", ST, IF_EN4A, 0x79000000, 0x79000000, 0x78000000, 0x78200800)
// strh Rt,[Xn] LS_2A 0111100100000000 000000nnnnnttttt 7900 0000
// strh Rt,[Xn+pimm12] LS_2B 0111100100iiiiii iiiiiinnnnnttttt 7900 0000 imm(0-4095<<1)
// strh Rt,[Xn+simm9] LS_2C 01111000000iiiii iiiiPPnnnnnttttt 7800 0000 [Xn imm(-256..+255) pre/post/no inc]
// strh Rt,[Xn,(Rm,ext,shl)] LS_3A 01111000001mmmmm oooS10nnnnnttttt 7820 0800 [Xn, ext(Rm)]
-// enum name FP LD/ST DR_3A DR_3B DR_3C DI_2A
-INST4(adds, "adds", 0, 0, IF_EN4B, 0x2B000000, 0x2B000000, 0x2B200000, 0x31000000)
+// enum name info DR_3A DR_3B DR_3C DI_2A
+INST4(adds, "adds", 0, IF_EN4B, 0x2B000000, 0x2B000000, 0x2B200000, 0x31000000)
// adds Rd,Rn,Rm DR_3A X0101011000mmmmm 000000nnnnnddddd 2B00 0000
// adds Rd,Rn,(Rm,shk,imm) DR_3B X0101011sh0mmmmm ssssssnnnnnddddd 2B00 0000 Rm {LSL,LSR,ASR} imm(0-63)
// adds Rd,Rn,(Rm,ext,shl) DR_3C X0101011001mmmmm ooosssnnnnnddddd 2B20 0000 ext(Rm) LSL imm(0-4)
// adds Rd,Rn,i12 DI_2A X0110001shiiiiii iiiiiinnnnnddddd 3100 0000 imm(i12,sh)
-INST4(subs, "subs", 0, 0, IF_EN4B, 0x6B000000, 0x6B000000, 0x6B200000, 0x71000000)
+INST4(subs, "subs", 0, IF_EN4B, 0x6B000000, 0x6B000000, 0x6B200000, 0x71000000)
// subs Rd,Rn,Rm DR_3A X1101011000mmmmm 000000nnnnnddddd 6B00 0000
// subs Rd,Rn,(Rm,shk,imm) DR_3B X1101011sh0mmmmm ssssssnnnnnddddd 6B00 0000 Rm {LSL,LSR,ASR} imm(0-63)
// subs Rd,Rn,(Rm,ext,shl) DR_3C X1101011001mmmmm ooosssnnnnnddddd 6B20 0000 ext(Rm) LSL imm(0-4)
// subs Rd,Rn,i12 DI_2A X1110001shiiiiii iiiiiinnnnnddddd 7100 0000 imm(i12,sh)
-// enum name FP LD/ST DR_2A DR_2B DR_2C DI_1A
-INST4(cmp, "cmp", 0,CMP,IF_EN4C, 0x6B00001F, 0x6B00001F, 0x6B20001F, 0x7100001F)
+// enum name info DR_2A DR_2B DR_2C DI_1A
+INST4(cmp, "cmp", CMP, IF_EN4C, 0x6B00001F, 0x6B00001F, 0x6B20001F, 0x7100001F)
// cmp Rn,Rm DR_2A X1101011000mmmmm 000000nnnnn11111 6B00 001F
// cmp Rn,(Rm,shk,imm) DR_2B X1101011sh0mmmmm ssssssnnnnn11111 6B00 001F Rm {LSL,LSR,ASR} imm(0-63)
// cmp Rn,(Rm,ext,shl) DR_2C X1101011001mmmmm ooosssnnnnn11111 6B20 001F ext(Rm) LSL imm(0-4)
// cmp Rn,i12 DI_1A X111000100iiiiii iiiiiinnnnn11111 7100 001F imm(i12,sh)
-INST4(cmn, "cmn", 0,CMP,IF_EN4C, 0x2B00001F, 0x2B00001F, 0x2B20001F, 0x3100001F)
+INST4(cmn, "cmn", CMP, IF_EN4C, 0x2B00001F, 0x2B00001F, 0x2B20001F, 0x3100001F)
// cmn Rn,Rm DR_2A X0101011000mmmmm 000000nnnnn11111 2B00 001F
// cmn Rn,(Rm,shk,imm) DR_2B X0101011sh0mmmmm ssssssnnnnn11111 2B00 001F Rm {LSL,LSR,ASR} imm(0-63)
// cmn Rn,(Rm,ext,shl) DR_2C X0101011001mmmmm ooosssnnnnn11111 2B20 001F ext(Rm) LSL imm(0-4)
// cmn Rn,i12 DI_1A X0110001shiiiiii iiiiiinnnnn11111 3100 001F imm(0-4095)
-// enum name FP LD/ST DV_3B DV_3D DV_3BI DV_3DI
-INST4(fmul, "fmul", 0, 0, IF_EN4D, 0x2E20DC00, 0x1E200800, 0x0F809000, 0x5F809000)
+// enum name info DV_3B DV_3D DV_3BI DV_3DI
+INST4(fmul, "fmul", 0, IF_EN4D, 0x2E20DC00, 0x1E200800, 0x0F809000, 0x5F809000)
// fmul Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 110111nnnnnddddd 2E20 DC00 Vd,Vn,Vm (vector)
// fmul Vd,Vn,Vm DV_3D 000111100X1mmmmm 000010nnnnnddddd 1E20 0800 Vd,Vn,Vm (scalar)
// fmul Vd,Vn,Vm[] DV_3BI 0Q0011111XLmmmmm 1001H0nnnnnddddd 0F80 9000 Vd,Vn,Vm[] (vector by elem)
// fmul Vd,Vn,Vm[] DV_3DI 010111111XLmmmmm 1001H0nnnnnddddd 5F80 9000 Vd,Vn,Vm[] (scalar by elem)
-INST4(fmulx, "fmulx", 0, 0, IF_EN4D, 0x0E20DC00, 0x5E20DC00, 0x2F809000, 0x7F809000)
+INST4(fmulx, "fmulx", 0, IF_EN4D, 0x0E20DC00, 0x5E20DC00, 0x2F809000, 0x7F809000)
// fmulx Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 110111nnnnnddddd 0E20 DC00 Vd,Vn,Vm (vector)
// fmulx Vd,Vn,Vm DV_3D 010111100X1mmmmm 110111nnnnnddddd 5E20 DC00 Vd,Vn,Vm (scalar)
// fmulx Vd,Vn,Vm[] DV_3BI 0Q1011111XLmmmmm 1001H0nnnnnddddd 2F80 9000 Vd,Vn,Vm[] (vector by elem)
// fmulx Vd,Vn,Vm[] DV_3DI 011111111XLmmmmm 1001H0nnnnnddddd 7F80 9000 Vd,Vn,Vm[] (scalar by elem)
-// enum name FP LD/ST DR_3A DR_3B DI_2C DV_3C
-INST4(and, "and", 0, 0, IF_EN4E, 0x0A000000, 0x0A000000, 0x12000000, 0x0E201C00)
+// enum name info DR_3A DR_3B DI_2C DV_3C
+INST4(and, "and", 0, IF_EN4E, 0x0A000000, 0x0A000000, 0x12000000, 0x0E201C00)
// and Rd,Rn,Rm DR_3A X0001010000mmmmm 000000nnnnnddddd 0A00 0000
// and Rd,Rn,(Rm,shk,imm) DR_3B X0001010sh0mmmmm iiiiiinnnnnddddd 0A00 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
// and Rd,Rn,imm(N,r,s) DI_2C X00100100Nrrrrrr ssssssnnnnnddddd 1200 0000 imm(N,r,s)
// and Vd,Vn,Vm DV_3C 0Q001110001mmmmm 000111nnnnnddddd 0E20 1C00 Vd,Vn,Vm
-INST4(eor, "eor", 0, 0, IF_EN4E, 0x4A000000, 0x4A000000, 0x52000000, 0x2E201C00)
+INST4(eor, "eor", 0, IF_EN4E, 0x4A000000, 0x4A000000, 0x52000000, 0x2E201C00)
// eor Rd,Rn,Rm DR_3A X1001010000mmmmm 000000nnnnnddddd 4A00 0000
// eor Rd,Rn,(Rm,shk,imm) DR_3B X1001010sh0mmmmm iiiiiinnnnnddddd 4A00 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
// eor Rd,Rn,imm(N,r,s) DI_2C X10100100Nrrrrrr ssssssnnnnnddddd 5200 0000 imm(N,r,s)
// eor Vd,Vn,Vm DV_3C 0Q101110001mmmmm 000111nnnnnddddd 2E20 1C00 Vd,Vn,Vm
-// enum name FP LD/ST DR_3A DR_3B DV_3C DV_1B
-INST4(bic, "bic", 0, 0, IF_EN4F, 0x0A200000, 0x0A200000, 0x0E601C00, 0x2F001400)
+// enum name info DR_3A DR_3B DV_3C DV_1B
+INST4(bic, "bic", 0, IF_EN4F, 0x0A200000, 0x0A200000, 0x0E601C00, 0x2F001400)
// bic Rd,Rn,Rm DR_3A X0001010001mmmmm 000000nnnnnddddd 0A20 0000
// bic Rd,Rn,(Rm,shk,imm) DR_3B X0001010sh1mmmmm iiiiiinnnnnddddd 0A20 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
// bic Vd,Vn,Vm DV_3C 0Q001110011mmmmm 000111nnnnnddddd 0E60 1C00 Vd,Vn,Vm
// bic Vd,imm8 DV_1B 0Q10111100000iii ---101iiiiiddddd 2F00 1400 Vd imm8 (immediate vector)
-// enum name FP LD/ST DR_2E DR_2F DV_2M DV_2L
-INST4(neg, "neg", 0, 0, IF_EN4G, 0x4B0003E0, 0x4B0003E0, 0x2E20B800, 0x7E20B800)
+// enum name info DR_2E DR_2F DV_2M DV_2L
+INST4(neg, "neg", 0, IF_EN4G, 0x4B0003E0, 0x4B0003E0, 0x2E20B800, 0x7E20B800)
// neg Rd,Rm DR_2E X1001011000mmmmm 00000011111ddddd 4B00 03E0
// neg Rd,(Rm,shk,imm) DR_2F X1001011sh0mmmmm ssssss11111ddddd 4B00 03E0 Rm {LSL,LSR,ASR} imm(0-63)
// neg Vd,Vn DV_2M 0Q101110XX100000 101110nnnnnddddd 2E20 B800 Vd,Vn (vector)
// neg Vd,Vn DV_2L 01111110XX100000 101110nnnnnddddd 7E20 B800 Vd,Vn (scalar)
-// enum name FP LD/ST DV_3E DV_3A DV_2L DV_2M
-INST4(cmeq, "cmeq", 0, 0, IF_EN4H, 0x7EE08C00, 0x2E208C00, 0x5E209800, 0x0E209800)
+// enum name info DV_3E DV_3A DV_2L DV_2M
+INST4(cmeq, "cmeq", 0, IF_EN4H, 0x7EE08C00, 0x2E208C00, 0x5E209800, 0x0E209800)
// cmeq Vd,Vn,Vm DV_3E 01111110111mmmmm 100011nnnnnddddd 7EE0 8C00 Vd,Vn,Vm (scalar)
// cmeq Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 100011nnnnnddddd 2E20 8C00 Vd,Vn,Vm (vector)
// cmeq Vd,Vn DV_2L 01011110XX100000 100110nnnnnddddd 5E20 9800 Vd,Vn (scalar)
// cmeq Vd,Vn DV_2M 0Q001110XX100000 100110nnnnnddddd 0E20 9800 Vd,Vn (vector)
-INST4(cmge, "cmge", 0, 0, IF_EN4H, 0x5EE03C00, 0x0E203C00, 0x7E208800, 0x2E208800)
+INST4(cmge, "cmge", 0, IF_EN4H, 0x5EE03C00, 0x0E203C00, 0x7E208800, 0x2E208800)
// cmge Vd,Vn,Vm DV_3E 01011110111mmmmm 001111nnnnnddddd 5EE0 3C00 Vd,Vn,Vm (scalar)
// cmge Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 001111nnnnnddddd 0E20 3C00 Vd,Vn,Vm (vector)
// cmge Vd,Vn DV_2L 01111110XX100000 100010nnnnnddddd 5E20 8800 Vd,Vn (scalar)
// cmge Vd,Vn DV_2M 0Q101110XX100000 100010nnnnnddddd 2E20 8800 Vd,Vn (vector)
-INST4(cmgt, "cmgt", 0, 0, IF_EN4H, 0x5EE03400, 0x0E203400, 0x5E208800, 0x0E208800)
+INST4(cmgt, "cmgt", 0, IF_EN4H, 0x5EE03400, 0x0E203400, 0x5E208800, 0x0E208800)
// cmgt Vd,Vn,Vm DV_3E 01011110111mmmmm 001101nnnnnddddd 5EE0 3400 Vd,Vn,Vm (scalar)
// cmgt Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 001101nnnnnddddd 0E20 3400 Vd,Vn,Vm (vector)
// cmgt Vd,Vn DV_2L 01011110XX100000 100010nnnnnddddd 5E20 8800 Vd,Vn (scalar)
// cmgt Vd,Vn DV_2M 0Q001110XX100000 101110nnnnnddddd 0E20 8800 Vd,Vn (vector)
-// enum name FP LD/ST DV_3D DV_3B DV_2G DV_2A
-INST4(fcmeq, "fcmeq", 0, 0, IF_EN4I, 0x5E20E400, 0x0E20E400, 0x5EA0D800, 0x0EA0D800)
+// enum name info DV_3D DV_3B DV_2G DV_2A
+INST4(fcmeq, "fcmeq", 0, IF_EN4I, 0x5E20E400, 0x0E20E400, 0x5EA0D800, 0x0EA0D800)
// fcmeq Vd,Vn,Vm DV_3D 010111100X1mmmmm 111001nnnnnddddd 5E20 E400 Vd Vn Vm (scalar)
// fcmeq Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 111001nnnnnddddd 0E20 E400 Vd,Vn,Vm (vector)
// fcmeq Vd,Vn DV_2G 010111101X100000 110110nnnnnddddd 5EA0 D800 Vd Vn (scalar)
// fcmeq Vd,Vn DV_2A 0Q0011101X100000 110110nnnnnddddd 0EA0 D800 Vd Vn (vector)
-INST4(fcmge, "fcmge", 0, 0, IF_EN4I, 0x7E20E400, 0x2E20E400, 0x7EA0C800, 0x2EA0C800)
+INST4(fcmge, "fcmge", 0, IF_EN4I, 0x7E20E400, 0x2E20E400, 0x7EA0C800, 0x2EA0C800)
// fcmge Vd,Vn,Vm DV_3D 011111100X1mmmmm 111001nnnnnddddd 7E20 E400 Vd Vn Vm (scalar)
// fcmge Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 111001nnnnnddddd 2E20 E400 Vd,Vn,Vm (vector)
// fcmge Vd,Vn DV_2G 011111101X100000 110010nnnnnddddd 7EA0 E800 Vd Vn (scalar)
// fcmge Vd,Vn DV_2A 0Q1011101X100000 110010nnnnnddddd 2EA0 C800 Vd Vn (vector)
-INST4(fcmgt, "fcmgt", 0, 0, IF_EN4I, 0x7EA0E400, 0x2EA0E400, 0x5EA0C800, 0x0EA0C800)
+INST4(fcmgt, "fcmgt", 0, IF_EN4I, 0x7EA0E400, 0x2EA0E400, 0x5EA0C800, 0x0EA0C800)
// fcmgt Vd,Vn,Vm DV_3D 011111101X1mmmmm 111001nnnnnddddd 7EA0 E400 Vd Vn Vm (scalar)
// fcmgt Vd,Vn,Vm DV_3B 0Q1011101X1mmmmm 111001nnnnnddddd 2EA0 E400 Vd,Vn,Vm (vector)
// fcmgt Vd,Vn DV_2G 010111101X100000 110010nnnnnddddd 5EA0 E800 Vd Vn (scalar)
// fcmgt Vd,Vn DV_2A 0Q0011101X100000 110010nnnnnddddd 0EA0 C800 Vd Vn (vector)
-// enum name FP LD/ST DR_3A DR_3B DI_2C
-INST3(ands, "ands", 0, 0, IF_EN3A, 0x6A000000, 0x6A000000, 0x72000000)
+// enum name info DV_2N DV_2O DV_3E DV_3A
+INST4(sqshl, "sqshl", 0, IF_EN4J, 0x5F007400, 0x0F007400, 0x5E204C00, 0x0E204C00)
+ // sqshl Vd,Vn,imm DV_2N 010111110iiiiiii 011101nnnnnddddd 5F00 7400 Vd Vn imm (left shift - scalar)
+ // sqshl Vd,Vn,imm DV_2O 0Q0011110iiiiiii 011101nnnnnddddd 0F00 7400 Vd Vn imm (left shift - vector)
+ // sqshl Vd,Vn,Vm DV_3E 01011110XX1mmmmm 010011nnnnnddddd 5E20 4C00 Vd Vn Vm (scalar)
+ // sqshl Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 010011nnnnnddddd 0E20 4C00 Vd Vn Vm (vector)
+
+INST4(uqshl, "uqshl", 0, IF_EN4J, 0x7F007400, 0x2F007400, 0x7E204C00, 0x2E204C00)
+ // uqshl Vd,Vn,imm DV_2N 011111110iiiiiii 011101nnnnnddddd 7F00 7400 Vd Vn imm (left shift - scalar)
+ // uqshl Vd,Vn,imm DV_2O 0Q1011110iiiiiii 011101nnnnnddddd 2F00 7400 Vd Vn imm (left shift - vector)
+ // uqshl Vd,Vn,Vm DV_3E 01111110XX1mmmmm 010011nnnnnddddd 7E20 4C00 Vd Vn Vm (scalar)
+ // uqshl Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 010011nnnnnddddd 2E20 4C00 Vd Vn Vm (vector)
+
+// enum name info DR_3A DR_3B DI_2C
+INST3(ands, "ands", 0, IF_EN3A, 0x6A000000, 0x6A000000, 0x72000000)
// ands Rd,Rn,Rm DR_3A X1101010000mmmmm 000000nnnnnddddd 6A00 0000
// ands Rd,Rn,(Rm,shk,imm) DR_3B X1101010sh0mmmmm iiiiiinnnnnddddd 6A00 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
// ands Rd,Rn,imm(N,r,s) DI_2C X11100100Nrrrrrr ssssssnnnnnddddd 7200 0000 imm(N,r,s)
-// enum name FP LD/ST DR_2A DR_2B DI_1C
-INST3(tst, "tst", 0, 0, IF_EN3B, 0x6A00001F, 0x6A00001F, 0x7200001F)
+// enum name info DR_2A DR_2B DI_1C
+INST3(tst, "tst", 0, IF_EN3B, 0x6A00001F, 0x6A00001F, 0x7200001F)
// tst Rn,Rm DR_2A X1101010000mmmmm 000000nnnnn11111 6A00 001F
// tst Rn,(Rm,shk,imm) DR_2B X1101010sh0mmmmm iiiiiinnnnn11111 6A00 001F Rm {LSL,LSR,ASR,ROR} imm(0-63)
// tst Rn,imm(N,r,s) DI_1C X11100100Nrrrrrr ssssssnnnnn11111 7200 001F imm(N,r,s)
-// enum name FP LD/ST DR_3A DR_3B DV_3C
-INST3(orn, "orn", 0, 0, IF_EN3C, 0x2A200000, 0x2A200000, 0x0EE01C00)
+// enum name info DR_3A DR_3B DV_3C
+INST3(orn, "orn", 0, IF_EN3C, 0x2A200000, 0x2A200000, 0x0EE01C00)
// orn Rd,Rn,Rm DR_3A X0101010001mmmmm 000000nnnnnddddd 2A20 0000
// orn Rd,Rn,(Rm,shk,imm) DR_3B X0101010sh1mmmmm iiiiiinnnnnddddd 2A20 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
// orn Vd,Vn,Vm DV_3C 0Q001110111mmmmm 000111nnnnnddddd 0EE0 1C00 Vd,Vn,Vm
-// enum name FP LD/ST DV_2C DV_2D DV_2E
-INST3(dup, "dup", 0, 0, IF_EN3D, 0x0E000C00, 0x0E000400, 0x5E000400)
+// enum name info DV_2C DV_2D DV_2E
+INST3(dup, "dup", 0, IF_EN3D, 0x0E000C00, 0x0E000400, 0x5E000400)
// dup Vd,Rn DV_2C 0Q001110000iiiii 000011nnnnnddddd 0E00 0C00 Vd,Rn (vector from general)
// dup Vd,Vn[] DV_2D 0Q001110000iiiii 000001nnnnnddddd 0E00 0400 Vd,Vn[] (vector by elem)
// dup Vd,Vn[] DV_2E 01011110000iiiii 000001nnnnnddddd 5E00 0400 Vd,Vn[] (scalar by elem)
-// enum name FP LD/ST DV_3B DV_3BI DV_3DI
-INST3(fmla, "fmla", 0, 0, IF_EN3E, 0x0E20CC00, 0x0F801000, 0x5F801000)
+// enum name info DV_3B DV_3BI DV_3DI
+INST3(fmla, "fmla", 0, IF_EN3E, 0x0E20CC00, 0x0F801000, 0x5F801000)
// fmla Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 110011nnnnnddddd 0E20 CC00 Vd,Vn,Vm (vector)
// fmla Vd,Vn,Vm[] DV_3BI 0Q0011111XLmmmmm 0001H0nnnnnddddd 0F80 1000 Vd,Vn,Vm[] (vector by elem)
// fmla Vd,Vn,Vm[] DV_3DI 010111111XLmmmmm 0001H0nnnnnddddd 5F80 1000 Vd,Vn,Vm[] (scalar by elem)
-INST3(fmls, "fmls", 0, 0, IF_EN3E, 0x0EA0CC00, 0x0F805000, 0x5F805000)
+INST3(fmls, "fmls", 0, IF_EN3E, 0x0EA0CC00, 0x0F805000, 0x5F805000)
// fmls Vd,Vn,Vm DV_3B 0Q0011101X1mmmmm 110011nnnnnddddd 0EA0 CC00 Vd,Vn,Vm (vector)
// fmls Vd,Vn,Vm[] DV_3BI 0Q0011111XLmmmmm 0101H0nnnnnddddd 0F80 5000 Vd,Vn,Vm[] (vector by elem)
// fmls Vd,Vn,Vm[] DV_3DI 010111111XLmmmmm 0101H0nnnnnddddd 5F80 5000 Vd,Vn,Vm[] (scalar by elem)
-// enum name FP LD/ST DV_2A DV_2G DV_2H
-INST3(fcvtas, "fcvtas", 0, 0, IF_EN3F, 0x0E21C800, 0x5E21C800, 0x1E240000)
+// enum name info DV_2A DV_2G DV_2H
+INST3(fcvtas, "fcvtas", 0, IF_EN3F, 0x0E21C800, 0x5E21C800, 0x1E240000)
// fcvtas Vd,Vn DV_2A 0Q0011100X100001 110010nnnnnddddd 0E21 C800 Vd,Vn (vector)
// fcvtas Vd,Vn DV_2G 010111100X100001 110010nnnnnddddd 5E21 C800 Vd,Vn (scalar)
// fcvtas Rd,Vn DV_2H X00111100X100100 000000nnnnnddddd 1E24 0000 Rd,Vn (scalar, to general)
-INST3(fcvtau, "fcvtau", 0, 0, IF_EN3F, 0x2E21C800, 0x7E21C800, 0x1E250000)
+INST3(fcvtau, "fcvtau", 0, IF_EN3F, 0x2E21C800, 0x7E21C800, 0x1E250000)
// fcvtau Vd,Vn DV_2A 0Q1011100X100001 111010nnnnnddddd 2E21 C800 Vd,Vn (vector)
// fcvtau Vd,Vn DV_2G 011111100X100001 111010nnnnnddddd 7E21 C800 Vd,Vn (scalar)
// fcvtau Rd,Vn DV_2H X00111100X100101 000000nnnnnddddd 1E25 0000 Rd,Vn (scalar, to general)
-INST3(fcvtms, "fcvtms", 0, 0, IF_EN3F, 0x0E21B800, 0x5E21B800, 0x1E300000)
+INST3(fcvtms, "fcvtms", 0, IF_EN3F, 0x0E21B800, 0x5E21B800, 0x1E300000)
// fcvtms Vd,Vn DV_2A 0Q0011100X100001 101110nnnnnddddd 0E21 B800 Vd,Vn (vector)
// fcvtms Vd,Vn DV_2G 010111100X100001 101110nnnnnddddd 5E21 B800 Vd,Vn (scalar)
// fcvtms Rd,Vn DV_2H X00111100X110000 000000nnnnnddddd 1E30 0000 Rd,Vn (scalar, to general)
-INST3(fcvtmu, "fcvtmu", 0, 0, IF_EN3F, 0x2E21B800, 0x7E21B800, 0x1E310000)
+INST3(fcvtmu, "fcvtmu", 0, IF_EN3F, 0x2E21B800, 0x7E21B800, 0x1E310000)
// fcvtmu Vd,Vn DV_2A 0Q1011100X100001 101110nnnnnddddd 2E21 B800 Vd,Vn (vector)
// fcvtmu Vd,Vn DV_2G 011111100X100001 101110nnnnnddddd 7E21 B800 Vd,Vn (scalar)
// fcvtmu Rd,Vn DV_2H X00111100X110001 000000nnnnnddddd 1E31 0000 Rd,Vn (scalar, to general)
-INST3(fcvtns, "fcvtns", 0, 0, IF_EN3F, 0x0E21A800, 0x5E21A800, 0x1E200000)
+INST3(fcvtns, "fcvtns", 0, IF_EN3F, 0x0E21A800, 0x5E21A800, 0x1E200000)
// fcvtns Vd,Vn DV_2A 0Q0011100X100001 101010nnnnnddddd 0E21 A800 Vd,Vn (vector)
// fcvtns Vd,Vn DV_2G 010111100X100001 101010nnnnnddddd 5E21 A800 Vd,Vn (scalar)
// fcvtns Rd,Vn DV_2H X00111100X100000 000000nnnnnddddd 1E20 0000 Rd,Vn (scalar, to general)
-INST3(fcvtnu, "fcvtnu", 0, 0, IF_EN3F, 0x2E21A800, 0x7E21A800, 0x1E210000)
+INST3(fcvtnu, "fcvtnu", 0, IF_EN3F, 0x2E21A800, 0x7E21A800, 0x1E210000)
// fcvtnu Vd,Vn DV_2A 0Q1011100X100001 101010nnnnnddddd 2E21 A800 Vd,Vn (vector)
// fcvtnu Vd,Vn DV_2G 011111100X100001 101010nnnnnddddd 7E21 A800 Vd,Vn (scalar)
// fcvtnu Rd,Vn DV_2H X00111100X100001 000000nnnnnddddd 1E21 0000 Rd,Vn (scalar, to general)
-INST3(fcvtps, "fcvtps", 0, 0, IF_EN3F, 0x0EA1A800, 0x5EA1A800, 0x1E280000)
+INST3(fcvtps, "fcvtps", 0, IF_EN3F, 0x0EA1A800, 0x5EA1A800, 0x1E280000)
// fcvtps Vd,Vn DV_2A 0Q0011101X100001 101010nnnnnddddd 0EA1 A800 Vd,Vn (vector)
// fcvtps Vd,Vn DV_2G 010111101X100001 101010nnnnnddddd 5EA1 A800 Vd,Vn (scalar)
// fcvtps Rd,Vn DV_2H X00111100X101000 000000nnnnnddddd 1E28 0000 Rd,Vn (scalar, to general)
-INST3(fcvtpu, "fcvtpu", 0, 0, IF_EN3F, 0x2EA1A800, 0x7EA1A800, 0x1E290000)
+INST3(fcvtpu, "fcvtpu", 0, IF_EN3F, 0x2EA1A800, 0x7EA1A800, 0x1E290000)
// fcvtpu Vd,Vn DV_2A 0Q1011101X100001 101010nnnnnddddd 2EA1 A800 Vd,Vn (vector)
// fcvtpu Vd,Vn DV_2G 011111101X100001 101010nnnnnddddd 7EA1 A800 Vd,Vn (scalar)
// fcvtpu Rd,Vn DV_2H X00111100X101001 000000nnnnnddddd 1E29 0000 Rd,Vn (scalar, to general)
-INST3(fcvtzs, "fcvtzs", 0, 0, IF_EN3F, 0x0EA1B800, 0x5EA1B800, 0x1E380000)
+INST3(fcvtzs, "fcvtzs", 0, IF_EN3F, 0x0EA1B800, 0x5EA1B800, 0x1E380000)
// fcvtzs Vd,Vn DV_2A 0Q0011101X100001 101110nnnnnddddd 0EA1 B800 Vd,Vn (vector)
// fcvtzs Vd,Vn DV_2G 010111101X100001 101110nnnnnddddd 5EA1 B800 Vd,Vn (scalar)
// fcvtzs Rd,Vn DV_2H X00111100X111000 000000nnnnnddddd 1E38 0000 Rd,Vn (scalar, to general)
-INST3(fcvtzu, "fcvtzu", 0, 0, IF_EN3F, 0x2EA1B800, 0x7EA1B800, 0x1E390000)
+INST3(fcvtzu, "fcvtzu", 0, IF_EN3F, 0x2EA1B800, 0x7EA1B800, 0x1E390000)
// fcvtzu Vd,Vn DV_2A 0Q1011101X100001 101110nnnnnddddd 2EA1 B800 Vd,Vn (vector)
// fcvtzu Vd,Vn DV_2G 011111101X100001 101110nnnnnddddd 7EA1 B800 Vd,Vn (scalar)
// fcvtzu Rd,Vn DV_2H X00111100X111001 000000nnnnnddddd 1E39 0000 Rd,Vn (scalar, to general)
-// enum name FP LD/ST DV_2A DV_2G DV_2I
-INST3(scvtf, "scvtf", 0, 0, IF_EN3G, 0x0E21D800, 0x5E21D800, 0x1E220000)
+// enum name info DV_2A DV_2G DV_2I
+INST3(scvtf, "scvtf", 0, IF_EN3G, 0x0E21D800, 0x5E21D800, 0x1E220000)
// scvtf Vd,Vn DV_2A 0Q0011100X100001 110110nnnnnddddd 0E21 D800 Vd,Vn (vector)
// scvtf Vd,Vn DV_2G 010111100X100001 110110nnnnnddddd 7E21 D800 Vd,Vn (scalar)
// scvtf Rd,Vn DV_2I X00111100X100010 000000nnnnnddddd 1E22 0000 Vd,Rn (scalar, from general)
-INST3(ucvtf, "ucvtf", 0, 0, IF_EN3G, 0x2E21D800, 0x7E21D800, 0x1E230000)
+INST3(ucvtf, "ucvtf", 0, IF_EN3G, 0x2E21D800, 0x7E21D800, 0x1E230000)
// ucvtf Vd,Vn DV_2A 0Q1011100X100001 110110nnnnnddddd 2E21 D800 Vd,Vn (vector)
// ucvtf Vd,Vn DV_2G 011111100X100001 110110nnnnnddddd 7E21 D800 Vd,Vn (scalar)
// ucvtf Rd,Vn DV_2I X00111100X100011 000000nnnnnddddd 1E23 0000 Vd,Rn (scalar, from general)
-INST3(mul, "mul", 0, 0, IF_EN3H, 0x1B007C00, 0x0E209C00, 0x0F008000)
+INST3(mul, "mul", 0, IF_EN3H, 0x1B007C00, 0x0E209C00, 0x0F008000)
// mul Rd,Rn,Rm DR_3A X0011011000mmmmm 011111nnnnnddddd 1B00 7C00
// mul Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 100111nnnnnddddd 0E20 9C00 Vd,Vn,Vm (vector)
// mul Vd,Vn,Vm[] DV_3AI 0Q001111XXLMmmmm 1000H0nnnnnddddd 0F00 8000 Vd,Vn,Vm[] (vector by elem)
-// enum name FP LD/ST DR_2E DR_2F DV_2M
-INST3(mvn, "mvn", 0, 0, IF_EN3I, 0x2A2003E0, 0x2A2003E0, 0x2E205800)
+// enum name info DR_2E DR_2F DV_2M
+INST3(mvn, "mvn", 0, IF_EN3I, 0x2A2003E0, 0x2A2003E0, 0x2E205800)
// mvn Rd,Rm DR_2E X0101010001mmmmm 00000011111ddddd 2A20 03E0
// mvn Rd,(Rm,shk,imm) DR_2F X0101010sh1mmmmm iiiiii11111ddddd 2A20 03E0 Rm {LSL,LSR,ASR} imm(0-63)
// mvn Vd,Vn DV_2M 0Q10111000100000 010110nnnnnddddd 2E20 5800 Vd,Vn (vector)
-// enum name FP LD/ST LS_2D LS_3F LS_2E
-INST3(ld1_2regs,"ld1", 0,LD, IF_EN3J, 0x0C40A000, 0x0CC0A000, 0x0CDFA000)
- // C7.2.170 LD1 (multiple structures, two registers variant)
+// enum name info LS_2D LS_3F LS_2E
+INST3(ld1_2regs, "ld1", LD, IF_EN3J, 0x0C40A000, 0x0CC0A000, 0x0CDFA000)
+ // LD1 (multiple structures, two registers variant)
// ld1 {Vt,Vt2},[Xn] LS_2D 0Q00110001000000 1010ssnnnnnttttt 0C40 A000 base register
// ld1 {Vt,Vt2},[Xn],Xm LS_3F 0Q001100110mmmmm 1010ssnnnnnttttt 0CC0 A000 post-indexed by a register
// ld1 {Vt,Vt2},[Xn],#imm LS_2E 0Q00110011011111 1010ssnnnnnttttt 0CDF A000 post-indexed by an immediate
-INST3(ld1_3regs,"ld1", 0,LD, IF_EN3J, 0x0C406000, 0x0CC06000, 0x0CDF6000)
- // C7.2.170 LD1 (multiple structures, three registers variant)
+INST3(ld1_3regs, "ld1", LD, IF_EN3J, 0x0C406000, 0x0CC06000, 0x0CDF6000)
+ // LD1 (multiple structures, three registers variant)
// ld1 {Vt-Vt3},[Xn] LS_2D 0Q00110001000000 0110ssnnnnnttttt 0C40 6000 base register
// ld1 {Vt-Vt3},[Xn],Xm LS_3F 0Q001100110mmmmm 0110ssnnnnnttttt 0CC0 6000 post-indexed by a register
// ld1 {Vt-Vt3},[Xn],#imm LS_2E 0Q00110011011111 0110ssnnnnnttttt 0CDF 6000 post-indexed by an immediate
-INST3(ld1_4regs,"ld1", 0,LD, IF_EN3J, 0x0C402000, 0x0CC02000, 0x0CDF2000)
- // C7.2.170 LD1 (multiple structures, four registers variant)
+INST3(ld1_4regs, "ld1", LD, IF_EN3J, 0x0C402000, 0x0CC02000, 0x0CDF2000)
+ // LD1 (multiple structures, four registers variant)
// ld1 {Vt-Vt4},[Xn] LS_2D 0Q00110001000000 0010ssnnnnnttttt 0C40 2000 base register
// ld1 {Vt-Vt4},[Xn],Xm LS_3F 0Q001100110mmmmm 0010ssnnnnnttttt 0CC0 2000 post-indexed by a register
// ld1 {Vt-Vt4},[Xn],#imm LS_2E 0Q00110011011111 0010ssnnnnnttttt 0CDF 2000 post-indexed by an immediate
-INST3(st1_2regs,"st1", 0,ST, IF_EN3J, 0x0C00A000, 0x0C80A000, 0x0C9FA000)
- // C7.2.313 ST1 (multiple structures, two registers variant)
+INST3(st1_2regs, "st1", ST, IF_EN3J, 0x0C00A000, 0x0C80A000, 0x0C9FA000)
+ // ST1 (multiple structures, two registers variant)
// st1 {Vt,Vt2},[Xn] LS_2D 0Q00110000000000 1010ssnnnnnttttt 0C00 A000 base register
// st1 {Vt,Vt2},[Xn],Xm LS_3F 0Q001100100mmmmm 1010ssnnnnnttttt 0C80 A000 post-indexed by a register
// st1 {Vt,Vt2},[Xn],#imm LS_2E 0Q00110010011111 1010ssnnnnnttttt 0C9F A000 post-indexed by an immediate
-INST3(st1_3regs,"st1", 0,ST, IF_EN3J, 0x0C006000, 0x0C806000, 0x0C9F6000)
- // C7.2.313 ST1 (multiple structures, three registers variant)
+INST3(st1_3regs, "st1", ST, IF_EN3J, 0x0C006000, 0x0C806000, 0x0C9F6000)
+ // ST1 (multiple structures, three registers variant)
// st1 {Vt-Vt3},[Xn] LS_2D 0Q00110000000000 0110ssnnnnnttttt 0C00 6000 base register
// st1 {Vt-Vt3},[Xn],Xm LS_3F 0Q001100100mmmmm 0110XXnnnnnttttt 0C80 6000 post-indexed by a register
// st1 {Vt-Vt3},[Xn],#imm LS_2E 0Q00110010011111 0110XXnnnnnttttt 0C9F 6000 post-indexed by an immediate
-INST3(st1_4regs,"st1", 0,ST, IF_EN3J, 0x0C002000, 0x0C802000, 0x0C9F2000)
- // C7.2.313 ST1 (multiple structures, four registers variant)
+INST3(st1_4regs, "st1", ST, IF_EN3J, 0x0C002000, 0x0C802000, 0x0C9F2000)
+ // ST1 (multiple structures, four registers variant)
// st1 {Vt-Vt4},[Xn] LS_2D 0Q00110000000000 0010XXnnnnnttttt 0C00 2000 base register
// st1 {Vt-Vt4},[Xn],Xm LS_3F 0Q001100100mmmmm 0010XXnnnnnttttt 0C80 2000 post-indexed by a register
// st1 {Vt-Vt4},[Xn],#imm LS_2E 0Q00110010011111 0010XXnnnnnttttt 0C9F 2000 post-indexed by an immediate
-INST3(ld1r, "ld1r", 0,LD, IF_EN3J, 0x0D40C000, 0x0DC0C000, 0x0DDFC000)
- // C7.2.172 LD1R
+INST3(ld1r, "ld1r", LD, IF_EN3J, 0x0D40C000, 0x0DC0C000, 0x0DDFC000)
// ld1r {Vt},[Xn] LS_2D 0Q00110101000000 1100ssnnnnnttttt 0D40 C000 base register
// ld1r {Vt},[Xn],Xm LS_3F 0Q001101110mmmmm 1100ssnnnnnttttt 0DC0 C000 post-indexed by a register
// ld1r {Vt},[Xn],#1 LS_2E 0Q00110111011111 1100ssnnnnnttttt 0DDF C000 post-indexed by an immediate
-INST3(ld2r, "ld2r", 0,LD, IF_EN3J, 0x0D60C000, 0x0DE0C000, 0x0DFFC000)
- // C7.2.175 LD2R
+INST3(ld2r, "ld2r", LD, IF_EN3J, 0x0D60C000, 0x0DE0C000, 0x0DFFC000)
// ld2r {Vt,Vt2},[Xn] LS_2D 0Q00110101100000 1100ssnnnnnttttt 0D60 C000 base register
// ld2r {Vt,Vt2},[Xn],Xm LS_3F 0Q001101111mmmmm 1100ssnnnnnttttt 0DE0 C000 post-indexed by a register
// ld2r {Vt,Vt2},[Xn],#2 LS_2E 0Q00110111111111 1100ssnnnnnttttt 0DFF C000 post-indexed by an immediate
-INST3(ld3r, "ld3r", 0,LD, IF_EN3J, 0x0D40E000, 0x0DC0E000, 0x0DDFE000)
- // C7.2.178 LD3R
+INST3(ld3r, "ld3r", LD, IF_EN3J, 0x0D40E000, 0x0DC0E000, 0x0DDFE000)
// ld3r {Vt-Vt3},[Xn] LS_2D 0Q00110101000000 1110ssnnnnnttttt 0D40 E000 base register
// ld3r {Vt-Vt3},[Xn],Xm LS_3F 0Q001101110mmmmm 1110ssnnnnnttttt 0DC0 E000 post-indexed by a register
// ld3r {Vt-Vt3},[Xn],#4 LS_2E 0Q00110111011111 1110ssnnnnnttttt 0DDF E000 post-indexed by an immediate
-INST3(ld4r, "ld4r", 0,LD, IF_EN3J, 0x0D60E000, 0x0DE0E000, 0x0DFFE000)
- // C7.2.181 LD4R
+INST3(ld4r, "ld4r", LD, IF_EN3J, 0x0D60E000, 0x0DE0E000, 0x0DFFE000)
// ld4r {Vt-Vt4},[Xn] LS_2D 0Q00110101100000 1110ssnnnnnttttt 0D60 E000 base register
// ld4r {Vt-Vt4},[Xn],Xm LS_3F 0Q001101111mmmmm 1110ssnnnnnttttt 0DE0 E000 post-indexed by a register
// ld4r {Vt-Vt4},[Xn],#8 LS_2E 0Q00110111111111 1110ssnnnnnttttt 0DFF E000 post-indexed by an immediate
-// enum name FP LD/ST DR_2E DR_2F
-INST2(negs, "negs", 0, 0, IF_EN2A, 0x6B0003E0, 0x6B0003E0)
+INST3(smull, "smull", 0, IF_EN3K, 0x9B207C00, 0x0E20C000, 0x0F00A000)
+ // smull Rd,Rn,Rm DR_3A 10011011001mmmmm 011111nnnnnddddd 9B20 7C00
+ // smull Vd,Vn,Vm DV_3H 0000111000100000 1100000000000000 0E20 C000 Vd,Vn,Vm (vector)
+ // smull Vd,Vn,Vm[] DV_3HI 00001111XXLMmmmm 1010H0nnnnnddddd 0F00 A000 Vd,Vn,Vm[] (vector by elem)
+
+INST3(umull, "umull", 0, IF_EN3K, 0x9BA07C00, 0x2E20C000, 0x2F00A000)
+ // umull Rd,Rn,Rm DR_3A 10011011101mmmmm 011111nnnnnddddd 9BA0 7C00
+ // umull Vd,Vn,Vm DV_3H 00101110XX1mmmmm 110000nnnnnddddd 2E20 C000 Vd,Vn,Vm (vector)
+ // umull Vd,Vn,Vm[] DV_3HI 00101111XXLMmmmm 1010H0nnnnnddddd 2F00 A000 Vd,Vn,Vm[] (vector by elem)
+
+// enum name info DR_2E DR_2F
+INST2(negs, "negs", 0, IF_EN2A, 0x6B0003E0, 0x6B0003E0)
// negs Rd,Rm DR_2E X1101011000mmmmm 00000011111ddddd 6B00 03E0
// negs Rd,(Rm,shk,imm) DR_2F X1101011sh0mmmmm ssssss11111ddddd 6B00 03E0 Rm {LSL,LSR,ASR} imm(0-63)
-// enum name FP LD/ST DR_3A DR_3B
-INST2(bics, "bics", 0, 0, IF_EN2B, 0x6A200000, 0x6A200000)
+// enum name info DR_3A DR_3B
+INST2(bics, "bics", 0, IF_EN2B, 0x6A200000, 0x6A200000)
// bics Rd,Rn,Rm DR_3A X1101010001mmmmm 000000nnnnnddddd 6A20 0000
// bics Rd,Rn,(Rm,shk,imm) DR_3B X1101010sh1mmmmm iiiiiinnnnnddddd 6A20 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
-INST2(eon, "eon", 0, 0, IF_EN2B, 0x4A200000, 0x4A200000)
+INST2(eon, "eon", 0, IF_EN2B, 0x4A200000, 0x4A200000)
// eon Rd,Rn,Rm DR_3A X1001010001mmmmm 000000nnnnnddddd 4A20 0000
// eon Rd,Rn,(Rm,shk,imm) DR_3B X1001010sh1mmmmm iiiiiinnnnnddddd 4A20 0000 Rm {LSL,LSR,ASR,ROR} imm(0-63)
-// enum name FP LD/ST DR_3A DI_2C
-INST2(lsl, "lsl", 0, 0, IF_EN2C, 0x1AC02000, 0x53000000)
+// enum name info DR_3A DI_2C
+INST2(lsl, "lsl", 0, IF_EN2C, 0x1AC02000, 0x53000000)
// lsl Rd,Rn,Rm DR_3A X0011010110mmmmm 001000nnnnnddddd 1AC0 2000
// lsl Rd,Rn,imm6 DI_2D X10100110Xrrrrrr ssssssnnnnnddddd 5300 0000 imm(N,r,s)
-INST2(lsr, "lsr", 0, 0, IF_EN2C, 0x1AC02400, 0x53000000)
+INST2(lsr, "lsr", 0, IF_EN2C, 0x1AC02400, 0x53000000)
// lsr Rd,Rn,Rm DR_3A X0011010110mmmmm 001001nnnnnddddd 1AC0 2400
// lsr Rd,Rn,imm6 DI_2D X10100110Xrrrrrr ssssssnnnnnddddd 5300 0000 imm(N,r,s)
-INST2(asr, "asr", 0, 0, IF_EN2C, 0x1AC02800, 0x13000000)
+INST2(asr, "asr", 0, IF_EN2C, 0x1AC02800, 0x13000000)
// asr Rd,Rn,Rm DR_3A X0011010110mmmmm 001010nnnnnddddd 1AC0 2800
// asr Rd,Rn,imm6 DI_2D X00100110Xrrrrrr ssssssnnnnnddddd 1300 0000 imm(N,r,s)
-// enum name FP LD/ST DR_3A DI_2B
-INST2(ror, "ror", 0, 0, IF_EN2D, 0x1AC02C00, 0x13800000)
+// enum name info DR_3A DI_2B
+INST2(ror, "ror", 0, IF_EN2D, 0x1AC02C00, 0x13800000)
// ror Rd,Rn,Rm DR_3A X0011010110mmmmm 001011nnnnnddddd 1AC0 2C00
// ror Rd,Rn,imm6 DI_2B X00100111X0nnnnn ssssssnnnnnddddd 1380 0000 imm(0-63)
-// enum name FP LD/ST LS_3B LS_3C
-INST2(ldp, "ldp", 0,LD, IF_EN2E, 0x29400000, 0x28400000)
+// enum name info LS_3B LS_3C
+INST2(ldp, "ldp", LD, IF_EN2E, 0x29400000, 0x28400000)
// ldp Rt,Ra,[Xn] LS_3B X010100101000000 0aaaaannnnnttttt 2940 0000 [Xn imm7]
// ldp Rt,Ra,[Xn+simm7] LS_3C X010100PP1iiiiii iaaaaannnnnttttt 2840 0000 [Xn imm7 LSL {} pre/post/no inc]
-INST2(ldpsw, "ldpsw", 0,LD, IF_EN2E, 0x69400000, 0x68400000)
+INST2(ldpsw, "ldpsw", LD, IF_EN2E, 0x69400000, 0x68400000)
// ldpsw Rt,Ra,[Xn] LS_3B 0110100101000000 0aaaaannnnnttttt 6940 0000 [Xn imm7]
// ldpsw Rt,Ra,[Xn+simm7] LS_3C 0110100PP1iiiiii iaaaaannnnnttttt 6840 0000 [Xn imm7 LSL {} pre/post/no inc]
-INST2(stp, "stp", 0,ST, IF_EN2E, 0x29000000, 0x28000000)
+INST2(stp, "stp", ST, IF_EN2E, 0x29000000, 0x28000000)
// stp Rt,Ra,[Xn] LS_3B X010100100000000 0aaaaannnnnttttt 2900 0000 [Xn imm7]
// stp Rt,Ra,[Xn+simm7] LS_3C X010100PP0iiiiii iaaaaannnnnttttt 2800 0000 [Xn imm7 LSL {} pre/post/no inc]
-INST2(ldnp, "ldnp", 0,LD, IF_EN2E, 0x28400000, 0x28400000)
+INST2(ldnp, "ldnp", LD, IF_EN2E, 0x28400000, 0x28400000)
// ldnp Rt,Ra,[Xn] LS_3B X010100001000000 0aaaaannnnnttttt 2840 0000 [Xn imm7]
// ldnp Rt,Ra,[Xn+simm7] LS_3C X010100001iiiiii iaaaaannnnnttttt 2840 0000 [Xn imm7 LSL {}]
-INST2(stnp, "stnp", 0,ST, IF_EN2E, 0x28000000, 0x28000000)
+INST2(stnp, "stnp", ST, IF_EN2E, 0x28000000, 0x28000000)
// stnp Rt,Ra,[Xn] LS_3B X010100000000000 0aaaaannnnnttttt 2800 0000 [Xn imm7]
// stnp Rt,Ra,[Xn+simm7] LS_3C X010100000iiiiii iaaaaannnnnttttt 2800 0000 [Xn imm7 LSL {}]
-INST2(ccmp, "ccmp", 0,CMP,IF_EN2F, 0x7A400000, 0x7A400800)
+INST2(ccmp, "ccmp", CMP, IF_EN2F, 0x7A400000, 0x7A400800)
// ccmp Rn,Rm, nzcv,cond DR_2I X1111010010mmmmm cccc00nnnnn0nzcv 7A40 0000 nzcv, cond
// ccmp Rn,imm5,nzcv,cond DI_1F X1111010010iiiii cccc10nnnnn0nzcv 7A40 0800 imm5, nzcv, cond
-INST2(ccmn, "ccmn", 0,CMP,IF_EN2F, 0x3A400000, 0x3A400800)
+INST2(ccmn, "ccmn", CMP, IF_EN2F, 0x3A400000, 0x3A400800)
// ccmn Rn,Rm, nzcv,cond DR_2I X0111010010mmmmm cccc00nnnnn0nzcv 3A40 0000 nzcv, cond
// ccmn Rn,imm5,nzcv,cond DI_1F X0111010910iiiii cccc10nnnnn0nzcv 3A40 0800 imm5, nzcv, cond
-// enum name FP LD/ST DV_2C DV_2F
-INST2(ins, "ins", 0, 0, IF_EN2H, 0x4E001C00, 0x6E000400)
+// enum name info DV_2C DV_2F
+INST2(ins, "ins", 0, IF_EN2H, 0x4E001C00, 0x6E000400)
// ins Vd[],Rn DV_2C 01001110000iiiii 000111nnnnnddddd 4E00 1C00 Vd[],Rn (from general)
// ins Vd[],Vn[] DV_2F 01101110000iiiii 0jjjj1nnnnnddddd 6E00 0400 Vd[],Vn[] (from/to elem)
-// enum name FP LD/ST DV_3B DV_3D
-INST2(fadd, "fadd", 0, 0, IF_EN2G, 0x0E20D400, 0x1E202800)
+// enum name info DV_3B DV_3D
+INST2(fadd, "fadd", 0, IF_EN2G, 0x0E20D400, 0x1E202800)
// fadd Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 110101nnnnnddddd 0E20 D400 Vd,Vn,Vm (vector)
// fadd Vd,Vn,Vm DV_3D 000111100X1mmmmm 001010nnnnnddddd 1E20 2800 Vd,Vn,Vm (scalar)
-INST2(fsub, "fsub", 0, 0, IF_EN2G, 0x0EA0D400, 0x1E203800)
+INST2(fsub, "fsub", 0, IF_EN2G, 0x0EA0D400, 0x1E203800)
// fsub Vd,Vn,Vm DV_3B 0Q0011101X1mmmmm 110101nnnnnddddd 0EA0 D400 Vd,Vn,Vm (vector)
// fsub Vd,Vn,Vm DV_3D 000111100X1mmmmm 001110nnnnnddddd 1E20 3800 Vd,Vn,Vm (scalar)
-INST2(fdiv, "fdiv", 0, 0, IF_EN2G, 0x2E20FC00, 0x1E201800)
+INST2(fdiv, "fdiv", 0, IF_EN2G, 0x2E20FC00, 0x1E201800)
// fdiv Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 111111nnnnnddddd 2E20 FC00 Vd,Vn,Vm (vector)
// fdiv Vd,Vn,Vm DV_3D 000111100X1mmmmm 000110nnnnnddddd 1E20 1800 Vd,Vn,Vm (scalar)
-INST2(fmax, "fmax", 0, 0, IF_EN2G, 0x0E20F400, 0x1E204800)
+INST2(fmax, "fmax", 0, IF_EN2G, 0x0E20F400, 0x1E204800)
// fmax Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 111101nnnnnddddd 0E20 F400 Vd,Vn,Vm (vector)
// fmax Vd,Vn,Vm DV_3D 000111100X1mmmmm 010010nnnnnddddd 1E20 4800 Vd,Vn,Vm (scalar)
-INST2(fmaxnm, "fmaxnm", 0, 0, IF_EN2G, 0x0E20C400, 0x1E206800)
+INST2(fmaxnm, "fmaxnm", 0, IF_EN2G, 0x0E20C400, 0x1E206800)
// fmaxnm Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 110001nnnnnddddd 0E20 C400 Vd,Vn,Vm (vector)
// fmaxnm Vd,Vn,Vm DV_3D 000111100X1mmmmm 011010nnnnnddddd 1E20 6800 Vd,Vn,Vm (scalar)
-INST2(fmin, "fmin", 0, 0, IF_EN2G, 0x0EA0F400, 0x1E205800)
+INST2(fmin, "fmin", 0, IF_EN2G, 0x0EA0F400, 0x1E205800)
// fmin Vd,Vn,Vm DV_3B 0Q0011101X1mmmmm 111101nnnnnddddd 0EA0 F400 Vd,Vn,Vm (vector)
// fmin Vd,Vn,Vm DV_3D 000111100X1mmmmm 010110nnnnnddddd 1E20 5800 Vd,Vn,Vm (scalar)
-INST2(fminnm, "fminnm", 0, 0, IF_EN2G, 0x0EA0C400, 0x1E207800)
+INST2(fminnm, "fminnm", 0, IF_EN2G, 0x0EA0C400, 0x1E207800)
// fminnm Vd,Vn,Vm DV_3B 0Q0011101X1mmmmm 110001nnnnnddddd 0EA0 C400 Vd,Vn,Vm (vector)
// fminnm Vd,Vn,Vm DV_3D 000111100X1mmmmm 011110nnnnnddddd 1E20 7800 Vd,Vn,Vm (scalar)
-INST2(fabd, "fabd", 0, 0, IF_EN2G, 0x2EA0D400, 0x7EA0D400)
+INST2(fabd, "fabd", 0, IF_EN2G, 0x2EA0D400, 0x7EA0D400)
// fabd Vd,Vn,Vm DV_3B 0Q1011101X1mmmmm 110101nnnnnddddd 2EA0 D400 Vd,Vn,Vm (vector)
// fabd Vd,Vn,Vm DV_3D 011111101X1mmmmm 110101nnnnnddddd 7EA0 D400 Vd,Vn,Vm (scalar)
-INST2(facge, "facge", 0, 0, IF_EN2G, 0x2E20EC00, 0x7E20EC00)
+INST2(facge, "facge", 0, IF_EN2G, 0x2E20EC00, 0x7E20EC00)
// facge Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 111011nnnnnddddd 2E20 EC00 Vd,Vn,Vm (vector)
// facge Vd,Vn,Vm DV_3D 011111100X1mmmmm 111011nnnnnddddd 7E20 EC00 Vd,Vn,Vm (scalar)
-INST2(facgt, "facgt", 0, 0, IF_EN2G, 0x2EA0EC00, 0x7EA0EC00)
+INST2(facgt, "facgt", 0, IF_EN2G, 0x2EA0EC00, 0x7EA0EC00)
// facgt Vd,Vn,Vm DV_3B 0Q1011101X1mmmmm 111011nnnnnddddd 2EA0 EC00 Vd,Vn,Vm (vector)
// facgt Vd,Vn,Vm DV_3D 011111101X1mmmmm 111011nnnnnddddd 7EA0 EC00 Vd,Vn,Vm (scalar)
-INST2(frecps, "frecps", 0, 0, IF_EN2G, 0x0E20FC00, 0x5E20FC00)
- // C7.2.138 FRECPS
+INST2(frecps, "frecps", 0, IF_EN2G, 0x0E20FC00, 0x5E20FC00)
// frecps Vd,Vn,Vm DV_3B 0Q0011100X1mmmmm 111111nnnnnddddd 0E20 FC00 Vd,Vn,Vm (vector)
// frecps Vd,Vn,Vm DV_3D 010111100X1mmmmm 111111nnnnnddddd 5E20 FC00 Vd,Vn,Vm (scalar)
-INST2(frsqrts, "frsqrts",0, 0, IF_EN2G, 0x0EA0FC00, 0x5EA0FC00)
- // C7.2.163 FRSQRTS
+INST2(frsqrts, "frsqrts", 0, IF_EN2G, 0x0EA0FC00, 0x5EA0FC00)
// frsqrts Vd,Vn,Vm DV_3B 0Q0011101X1mmmmm 111111nnnnnddddd 0EA0 FC00 Vd,Vn,Vm (vector)
// frsqrts Vd,Vn,Vm DV_3D 010111101X1mmmmm 111111nnnnnddddd 5EA0 FC00 Vd,Vn,Vm (scalar)
-// enum name FP LD/ST DV_2K DV_1C
-INST2(fcmp, "fcmp", 0, 0, IF_EN2I, 0x1E202000, 0x1E202008)
+// enum name info DV_2K DV_1C
+INST2(fcmp, "fcmp", 0, IF_EN2I, 0x1E202000, 0x1E202008)
// fcmp Vn,Vm DV_2K 000111100X1mmmmm 001000nnnnn00000 1E20 2000 Vn Vm
// fcmp Vn,#0.0 DV_1C 000111100X100000 001000nnnnn01000 1E20 2008 Vn #0.0
-INST2(fcmpe, "fcmpe", 0, 0, IF_EN2I, 0x1E202010, 0x1E202018)
+INST2(fcmpe, "fcmpe", 0, IF_EN2I, 0x1E202010, 0x1E202018)
// fcmpe Vn,Vm DV_2K 000111100X1mmmmm 001000nnnnn10000 1E20 2010 Vn Vm
// fcmpe Vn,#0.0 DV_1C 000111100X100000 001000nnnnn11000 1E20 2018 Vn #0.0
-// enum name FP LD/ST DV_2A DV_2G
-INST2(fabs, "fabs", 0, 0, IF_EN2J, 0x0EA0F800, 0x1E20C000)
+// enum name info DV_2A DV_2G
+INST2(fabs, "fabs", 0, IF_EN2J, 0x0EA0F800, 0x1E20C000)
// fabs Vd,Vn DV_2A 0Q0011101X100000 111110nnnnnddddd 0EA0 F800 Vd,Vn (vector)
// fabs Vd,Vn DV_2G 000111100X100000 110000nnnnnddddd 1E20 C000 Vd,Vn (scalar)
-INST2(fcmle, "fcmle", 0, 0, IF_EN2J, 0x2EA0D800, 0x7EA0D800)
+INST2(fcmle, "fcmle", 0, IF_EN2J, 0x2EA0D800, 0x7EA0D800)
// fcmle Vd,Vn DV_2A 0Q1011101X100000 111110nnnnnddddd 2EA0 D800 Vd,Vn (vector)
// fcmle Vd,Vn DV_2G 011111101X100000 110110nnnnnddddd 7EA0 D800 Vd,Vn (scalar)
-INST2(fcmlt, "fcmlt", 0, 0, IF_EN2J, 0x0EA0E800, 0x5EA0E800)
+INST2(fcmlt, "fcmlt", 0, IF_EN2J, 0x0EA0E800, 0x5EA0E800)
// fcmlt Vd,Vn DV_2A 0Q0011101X100000 111110nnnnnddddd 0EA0 E800 Vd,Vn (vector)
// fcmlt Vd,Vn DV_2G 010111101X100000 111010nnnnnddddd 5EA0 E800 Vd,Vn (scalar)
-INST2(fneg, "fneg", 0, 0, IF_EN2J, 0x2EA0F800, 0x1E214000)
+INST2(fneg, "fneg", 0, IF_EN2J, 0x2EA0F800, 0x1E214000)
// fneg Vd,Vn DV_2A 0Q1011101X100000 111110nnnnnddddd 2EA0 F800 Vd,Vn (vector)
// fneg Vd,Vn DV_2G 000111100X100001 010000nnnnnddddd 1E21 4000 Vd,Vn (scalar)
-INST2(frecpe, "frecpe", 0, 0, IF_EN2J, 0x0EA1D800, 0x5EA1D800)
+INST2(frecpe, "frecpe", 0, IF_EN2J, 0x0EA1D800, 0x5EA1D800)
// frecpe Vd,Vn DV_2A 0Q0011101X100001 110110nnnnnddddd 0EA1 D800 Vd,Vn (vector)
// frecpe Vd,Vn DV_2G 010111101X100001 110110nnnnnddddd 5EA1 D800 Vd,Vn (scalar)
-INST2(frintn, "frintn", 0, 0, IF_EN2J, 0x0E218800, 0x1E244000)
+INST2(frintn, "frintn", 0, IF_EN2J, 0x0E218800, 0x1E244000)
// frintn Vd,Vn DV_2A 0Q0011100X100001 100010nnnnnddddd 0E21 8800 Vd,Vn (vector)
// frintn Vd,Vn DV_2G 000111100X100100 010000nnnnnddddd 1E24 4000 Vd,Vn (scalar)
-INST2(frintp, "frintp", 0, 0, IF_EN2J, 0x0EA18800, 0x1E24C000)
+INST2(frintp, "frintp", 0, IF_EN2J, 0x0EA18800, 0x1E24C000)
// frintp Vd,Vn DV_2A 0Q0011101X100001 100010nnnnnddddd 0EA1 8800 Vd,Vn (vector)
// frintp Vd,Vn DV_2G 000111100X100100 110000nnnnnddddd 1E24 C000 Vd,Vn (scalar)
-INST2(frintm, "frintm", 0, 0, IF_EN2J, 0x0E219800, 0x1E254000)
+INST2(frintm, "frintm", 0, IF_EN2J, 0x0E219800, 0x1E254000)
// frintm Vd,Vn DV_2A 0Q0011100X100001 100110nnnnnddddd 0E21 9800 Vd,Vn (vector)
// frintm Vd,Vn DV_2G 000111100X100101 010000nnnnnddddd 1E25 4000 Vd,Vn (scalar)
-INST2(frintz, "frintz", 0, 0, IF_EN2J, 0x0EA19800, 0x1E25C000)
+INST2(frintz, "frintz", 0, IF_EN2J, 0x0EA19800, 0x1E25C000)
// frintz Vd,Vn DV_2A 0Q0011101X100001 100110nnnnnddddd 0EA1 9800 Vd,Vn (vector)
// frintz Vd,Vn DV_2G 000111100X100101 110000nnnnnddddd 1E25 C000 Vd,Vn (scalar)
-INST2(frinta, "frinta", 0, 0, IF_EN2J, 0x2E218800, 0x1E264000)
+INST2(frinta, "frinta", 0, IF_EN2J, 0x2E218800, 0x1E264000)
// frinta Vd,Vn DV_2A 0Q1011100X100001 100010nnnnnddddd 2E21 8800 Vd,Vn (vector)
// frinta Vd,Vn DV_2G 000111100X100110 010000nnnnnddddd 1E26 4000 Vd,Vn (scalar)
-INST2(frintx, "frintx", 0, 0, IF_EN2J, 0x2E219800, 0x1E274000)
+INST2(frintx, "frintx", 0, IF_EN2J, 0x2E219800, 0x1E274000)
// frintx Vd,Vn DV_2A 0Q1011100X100001 100110nnnnnddddd 2E21 9800 Vd,Vn (vector)
// frintx Vd,Vn DV_2G 000111100X100111 010000nnnnnddddd 1E27 4000 Vd,Vn (scalar)
-INST2(frinti, "frinti", 0, 0, IF_EN2J, 0x2EA19800, 0x1E27C000)
+INST2(frinti, "frinti", 0, IF_EN2J, 0x2EA19800, 0x1E27C000)
// frinti Vd,Vn DV_2A 0Q1011101X100001 100110nnnnnddddd 2EA1 9800 Vd,Vn (vector)
// frinti Vd,Vn DV_2G 000111100X100111 110000nnnnnddddd 1E27 C000 Vd,Vn (scalar)
-INST2(frsqrte, "frsqrte",0, 0, IF_EN2J, 0x2EA1D800, 0x7EA1D800)
- // C7.2.162 FRSQRTE
+INST2(frsqrte, "frsqrte", 0, IF_EN2J, 0x2EA1D800, 0x7EA1D800)
// frsqrte Vd,Vn DV_2A 0Q1011101X100001 110110nnnnnddddd 2EA1 D800 Vd,Vn (vector)
// frsqrte Vd,Vn DV_2G 011111101X100001 110110nnnnnddddd 7EA1 D800 Vd,Vn (scalar)
-INST2(fsqrt, "fsqrt", 0, 0, IF_EN2J, 0x2EA1F800, 0x1E21C000)
- // C7.2.164 FSQRT (vector)
+INST2(fsqrt, "fsqrt", 0, IF_EN2J, 0x2EA1F800, 0x1E21C000)
// fsqrt Vd,Vn DV_2A 0Q1011101X100001 111110nnnnnddddd 2EA1 F800 Vd,Vn (vector)
- // C7.2.165 FSQRT (scalar)
// fsqrt Vd,Vn DV_2G 000111100X100001 110000nnnnnddddd 1E21 C000 Vd,Vn (scalar)
-// enum name FP LD/ST DV_2M DV_2L
-INST2(abs, "abs", 0, 0, IF_EN2K, 0x0E20B800, 0x5E20B800)
+// enum name info DV_2M DV_2L
+INST2(abs, "abs", 0, IF_EN2K, 0x0E20B800, 0x5E20B800)
// abs Vd,Vn DV_2M 0Q001110XX100000 101110nnnnnddddd 0E20 B800 Vd,Vn (vector)
// abs Vd,Vn DV_2L 01011110XX100000 101110nnnnnddddd 5E20 B800 Vd,Vn (scalar)
-INST2(cmle, "cmle", 0, 0, IF_EN2K, 0x2E209800, 0x7E209800)
+INST2(cmle, "cmle", 0, IF_EN2K, 0x2E209800, 0x7E209800)
// cmle Vd,Vn DV_2M 0Q101110XX100000 100110nnnnnddddd 2E20 9800 Vd,Vn (vector)
// cmle Vd,Vn DV_2L 01111110XX100000 100110nnnnnddddd 7E20 9800 Vd,Vn (scalar)
-INST2(cmlt, "cmlt", 0, 0, IF_EN2K, 0x0E20A800, 0x5E20A800)
+INST2(cmlt, "cmlt", 0, IF_EN2K, 0x0E20A800, 0x5E20A800)
// cmlt Vd,Vn DV_2M 0Q101110XX100000 101010nnnnnddddd 0E20 A800 Vd,Vn (vector)
// cmlt Vd,Vn DV_2L 01011110XX100000 101010nnnnnddddd 5E20 A800 Vd,Vn (scalar)
-// enum name FP LD/ST DR_2G DV_2M
-INST2(cls, "cls", 0, 0, IF_EN2L, 0x5AC01400, 0x0E204800)
+// enum name info DR_2G DV_2M
+INST2(cls, "cls", 0, IF_EN2L, 0x5AC01400, 0x0E204800)
// cls Rd,Rm DR_2G X101101011000000 000101nnnnnddddd 5AC0 1400 Rd Rn (general)
// cls Vd,Vn DV_2M 0Q00111000100000 010010nnnnnddddd 0E20 4800 Vd,Vn (vector)
-INST2(clz, "clz", 0, 0, IF_EN2L, 0x5AC01000, 0x2E204800)
+INST2(clz, "clz", 0, IF_EN2L, 0x5AC01000, 0x2E204800)
// clz Rd,Rm DR_2G X101101011000000 000100nnnnnddddd 5AC0 1000 Rd Rn (general)
// clz Vd,Vn DV_2M 0Q10111000100000 010010nnnnnddddd 2E20 4800 Vd,Vn (vector)
-INST2(rbit, "rbit", 0, 0, IF_EN2L, 0x5AC00000, 0x2E605800)
+INST2(rbit, "rbit", 0, IF_EN2L, 0x5AC00000, 0x2E605800)
// rbit Rd,Rm DR_2G X101101011000000 000000nnnnnddddd 5AC0 0000 Rd Rn (general)
// rbit Vd,Vn DV_2M 0Q10111001100000 010110nnnnnddddd 2E60 5800 Vd,Vn (vector)
-INST2(rev16, "rev16", 0, 0, IF_EN2L, 0x5AC00400, 0x0E201800)
+INST2(rev16, "rev16", 0, IF_EN2L, 0x5AC00400, 0x0E201800)
// rev16 Rd,Rm DR_2G X101101011000000 000001nnnnnddddd 5AC0 0400 Rd Rn (general)
// rev16 Vd,Vn DV_2M 0Q001110XX100000 000110nnnnnddddd 0E20 1800 Vd,Vn (vector)
-INST2(rev32, "rev32", 0, 0, IF_EN2L, 0xDAC00800, 0x2E200800)
+INST2(rev32, "rev32", 0, IF_EN2L, 0xDAC00800, 0x2E200800)
// rev32 Rd,Rm DR_2G 1101101011000000 000010nnnnnddddd DAC0 0800 Rd Rn (general)
// rev32 Vd,Vn DV_2M 0Q101110XX100000 000010nnnnnddddd 2E20 0800 Vd,Vn (vector)
-// enum name FP LD/ST DV_3A DV_3AI
-INST2(mla, "mla", 0, 0, IF_EN2M, 0x0E209400, 0x2F000000)
+// enum name info DV_3A DV_3AI
+INST2(mla, "mla", 0, IF_EN2M, 0x0E209400, 0x2F000000)
// mla Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 100101nnnnnddddd 0E20 9400 Vd,Vn,Vm (vector)
// mla Vd,Vn,Vm[] DV_3AI 0Q101111XXLMmmmm 0000H0nnnnnddddd 2F00 0000 Vd,Vn,Vm[] (vector by elem)
-INST2(mls, "mls", 0, 0, IF_EN2M, 0x2E209400, 0x2F004000)
+INST2(mls, "mls", 0, IF_EN2M, 0x2E209400, 0x2F004000)
// mls Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 100101nnnnnddddd 2E20 9400 Vd,Vn,Vm (vector)
// mls Vd,Vn,Vm[] DV_3AI 0Q101111XXLMmmmm 0100H0nnnnnddddd 2F00 4000 Vd,Vn,Vm[] (vector by elem)
-// enum name FP LD/ST DV_2N DV_2O
-INST2(sshr, "sshr", 0, 0, IF_EN2N, 0x5F000400, 0x0F000400)
- // sshr Vd,Vn,imm DV_2N 010111110iiiiiii 000001nnnnnddddd 5F00 0400 Vd Vn imm (shift - scalar)
- // sshr Vd,Vn,imm DV_2O 0Q0011110iiiiiii 000001nnnnnddddd 0F00 0400 Vd,Vn imm (shift - vector)
+INST2(smlal, "smlal", 0, IF_EN2R, 0x0E208000, 0x0F002000)
+ // smlal Vd,Vn,Vm DV_3H 00001110XX1mmmmm 100000nnnnnddddd 0E20 8000 Vd,Vn,Vm (vector)
+ // smlal Vd,Vn,Vm[] DV_3HI 00001111XXLMmmmm 0010H0nnnnnddddd 0F00 2000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(smlal2, "smlal2", 0, IF_EN2R, 0x4E208000, 0x4F002000)
+ // smlal2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 100000nnnnnddddd 4E20 8000 Vd,Vn,Vm (vector)
+ // smlal2 Vd,Vn,Vm[] DV_3HI 01001111XXLMmmmm 0010H0nnnnnddddd 4F00 2000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(smlsl, "smlsl", 0, IF_EN2R, 0x0E20A000, 0x0F006000)
+ // smlsl Vd,Vn,Vm DV_3H 00001110XX1mmmmm 101000nnnnnddddd 0E20 A000 Vd,Vn,Vm (vector)
+ // smlsl Vd,Vn,Vm[] DV_3HI 00001111XXLMmmmm 0110H0nnnnnddddd 0F00 6000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(smlsl2, "smlsl2", 0, IF_EN2R, 0x4E20A000, 0x4F006000)
+ // smlsl2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 101000nnnnnddddd 4E20 A000 Vd,Vn,Vm (vector)
+ // smlsl2 Vd,Vn,Vm[] DV_3HI 01001111XXLMmmmm 0110H0nnnnnddddd 4F00 6000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(smull2, "smull2", 0, IF_EN2R, 0x4E20C000, 0x4F00A000)
+ // smull2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 110000nnnnnddddd 4E20 C000 Vd,Vn,Vm (vector)
+ // smull2 Vd,Vn,Vm[] DV_3HI 01001111XXLMmmmm 1010H0nnnnnddddd 4F00 A000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(umlal, "umlal", 0, IF_EN2R, 0x2E208000, 0x2F002000)
+ // umlal Vd,Vn,Vm DV_3H 00101110XX1mmmmm 100000nnnnnddddd 2E20 8000 Vd,Vn,Vm (vector)
+ // umlal Vd,Vn,Vm[] DV_3HI 00101111XXLMmmmm 0010H0nnnnnddddd 2F00 2000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(umlal2, "umlal2", 0, IF_EN2R, 0x6E208000, 0x6F002000)
+ // umlal2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 100000nnnnnddddd 6E20 8000 Vd,Vn,Vm (vector)
+ // umlal2 Vd,Vn,Vm[] DV_3HI 01101111XXLMmmmm 0010H0nnnnnddddd 6F00 2000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(umlsl, "umlsl", 0, IF_EN2R, 0x2E20A000, 0x2F006000)
+ // umlsl Vd,Vn,Vm DV_3H 00101110XX1mmmmm 101000nnnnnddddd 2E20 A000 Vd,Vn,Vm (vector)
+ // umlsl Vd,Vn,Vm[] DV_3HI 00101111XXLMmmmm 0110H0nnnnnddddd 2F00 6000 Vd,Vn,Vm[] (vector by elem)
+
+INST2(umlsl2, "umlsl2", 0, IF_EN2R, 0x6E20A000, 0x6F006000)
+ // umlsl2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 101000nnnnnddddd 6E20 A000 Vd,Vn,Vm (vector)
+ // umlsl2 Vd,Vn,Vm[] DV_3HI 01101111XXLMmmmm 0110H0nnnnnddddd 6F00 6000 Vd,Vn,Vm[] (vector by elem)
-INST2(ssra, "ssra", 0, 0, IF_EN2N, 0x5F001400, 0x0F001400)
- // ssra Vd,Vn,imm DV_2N 010111110iiiiiii 000101nnnnnddddd 5F00 1400 Vd Vn imm (shift - scalar)
- // ssra Vd,Vn,imm DV_2O 0Q0011110iiiiiii 000101nnnnnddddd 0F00 1400 Vd,Vn imm (shift - vector)
+INST2(umull2, "umull2", 0, IF_EN2R, 0x6E20C000, 0x6F00A000)
+ // umull2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 110000nnnnnddddd 6E20 C000 Vd,Vn,Vm (vector)
+ // umull2 Vd,Vn,Vm[] DV_3HI 01101111XXLMmmmm 1010H0nnnnnddddd 6F00 A000 Vd,Vn,Vm[] (vector by elem)
-INST2(srshr, "srshr", 0, 0, IF_EN2N, 0x5F002400, 0x0F002400)
- // srshr Vd,Vn,imm DV_2N 010111110iiiiiii 001001nnnnnddddd 5F00 0400 Vd Vn imm (shift - scalar)
- // srshr Vd,Vn,imm DV_2O 0Q0011110iiiiiii 001001nnnnnddddd 0F00 0400 Vd,Vn imm (shift - vector)
+// enum name info DV_2N DV_2O
+INST2(sshr, "sshr", RSH, IF_EN2N, 0x5F000400, 0x0F000400)
+ // sshr Vd,Vn,imm DV_2N 010111110iiiiiii 000001nnnnnddddd 5F00 0400 Vd Vn imm (right shift - scalar)
+ // sshr Vd,Vn,imm DV_2O 0Q0011110iiiiiii 000001nnnnnddddd 0F00 0400 Vd,Vn imm (right shift - vector)
-INST2(srsra, "srsra", 0, 0, IF_EN2N, 0x5F003400, 0x0F003400)
- // srsra Vd,Vn,imm DV_2N 010111110iiiiiii 001101nnnnnddddd 5F00 1400 Vd Vn imm (shift - scalar)
- // srsra Vd,Vn,imm DV_2O 0Q0011110iiiiiii 001101nnnnnddddd 0F00 1400 Vd,Vn imm (shift - vector)
+INST2(ssra, "ssra", RSH, IF_EN2N, 0x5F001400, 0x0F001400)
+ // ssra Vd,Vn,imm DV_2N 010111110iiiiiii 000101nnnnnddddd 5F00 1400 Vd Vn imm (right shift - scalar)
+ // ssra Vd,Vn,imm DV_2O 0Q0011110iiiiiii 000101nnnnnddddd 0F00 1400 Vd,Vn imm (right shift - vector)
-INST2(shl, "shl", 0, 0, IF_EN2N, 0x5F005400, 0x0F005400)
- // shl Vd,Vn,imm DV_2N 010111110iiiiiii 010101nnnnnddddd 5F00 5400 Vd Vn imm (shift - scalar)
- // shl Vd,Vn,imm DV_2O 0Q0011110iiiiiii 010101nnnnnddddd 0F00 5400 Vd,Vn imm (shift - vector)
+INST2(srshr, "srshr", RSH, IF_EN2N, 0x5F002400, 0x0F002400)
+ // srshr Vd,Vn,imm DV_2N 010111110iiiiiii 001001nnnnnddddd 5F00 0400 Vd Vn imm (right shift - scalar)
+ // srshr Vd,Vn,imm DV_2O 0Q0011110iiiiiii 001001nnnnnddddd 0F00 0400 Vd,Vn imm (right shift - vector)
-INST2(ushr, "ushr", 0, 0, IF_EN2N, 0x7F000400, 0x2F000400)
- // ushr Vd,Vn,imm DV_2N 011111110iiiiiii 000001nnnnnddddd 7F00 0400 Vd Vn imm (shift - scalar)
- // ushr Vd,Vn,imm DV_2O 0Q1011110iiiiiii 000001nnnnnddddd 2F00 0400 Vd,Vn imm (shift - vector)
+INST2(srsra, "srsra", RSH, IF_EN2N, 0x5F003400, 0x0F003400)
+ // srsra Vd,Vn,imm DV_2N 010111110iiiiiii 001101nnnnnddddd 5F00 1400 Vd Vn imm (right shift - scalar)
+ // srsra Vd,Vn,imm DV_2O 0Q0011110iiiiiii 001101nnnnnddddd 0F00 1400 Vd,Vn imm (right shift - vector)
-INST2(usra, "usra", 0, 0, IF_EN2N, 0x7F001400, 0x2F001400)
- // usra Vd,Vn,imm DV_2N 011111110iiiiiii 000101nnnnnddddd 7F00 1400 Vd Vn imm (shift - scalar)
- // usra Vd,Vn,imm DV_2O 0Q1011110iiiiiii 000101nnnnnddddd 2F00 1400 Vd,Vn imm (shift - vector)
+INST2(shl, "shl", 0, IF_EN2N, 0x5F005400, 0x0F005400)
+ // shl Vd,Vn,imm DV_2N 010111110iiiiiii 010101nnnnnddddd 5F00 5400 Vd Vn imm (left shift - scalar)
+ // shl Vd,Vn,imm DV_2O 0Q0011110iiiiiii 010101nnnnnddddd 0F00 5400 Vd,Vn imm (left shift - vector)
-INST2(urshr, "urshr", 0, 0, IF_EN2N, 0x7F002400, 0x2F002400)
- // urshr Vd,Vn,imm DV_2N 011111110iiiiiii 001001nnnnnddddd 7F00 2400 Vd Vn imm (shift - scalar)
- // urshr Vd,Vn,imm DV_2O 0Q1011110iiiiiii 001001nnnnnddddd 2F00 2400 Vd,Vn imm (shift - vector)
+INST2(ushr, "ushr", RSH, IF_EN2N, 0x7F000400, 0x2F000400)
+ // ushr Vd,Vn,imm DV_2N 011111110iiiiiii 000001nnnnnddddd 7F00 0400 Vd Vn imm (right shift - scalar)
+ // ushr Vd,Vn,imm DV_2O 0Q1011110iiiiiii 000001nnnnnddddd 2F00 0400 Vd,Vn imm (right shift - vector)
-INST2(ursra, "ursra", 0, 0, IF_EN2N, 0x7F003400, 0x2F003400)
- // ursra Vd,Vn,imm DV_2N 011111110iiiiiii 001101nnnnnddddd 7F00 3400 Vd Vn imm (shift - scalar)
- // ursra Vd,Vn,imm DV_2O 0Q1011110iiiiiii 001101nnnnnddddd 2F00 3400 Vd,Vn imm (shift - vector)
+INST2(usra, "usra", RSH, IF_EN2N, 0x7F001400, 0x2F001400)
+ // usra Vd,Vn,imm DV_2N 011111110iiiiiii 000101nnnnnddddd 7F00 1400 Vd Vn imm (right shift - scalar)
+ // usra Vd,Vn,imm DV_2O 0Q1011110iiiiiii 000101nnnnnddddd 2F00 1400 Vd,Vn imm (right shift - vector)
-INST2(sri, "sri", 0, 0, IF_EN2N, 0x7F004400, 0x2F004400)
- // sri Vd,Vn,imm DV_2N 011111110iiiiiii 010001nnnnnddddd 7F00 4400 Vd Vn imm (shift - scalar)
- // sri Vd,Vn,imm DV_2O 0Q1011110iiiiiii 010001nnnnnddddd 2F00 4400 Vd,Vn imm (shift - vector)
+INST2(urshr, "urshr", RSH, IF_EN2N, 0x7F002400, 0x2F002400)
+ // urshr Vd,Vn,imm DV_2N 011111110iiiiiii 001001nnnnnddddd 7F00 2400 Vd Vn imm (right shift - scalar)
+ // urshr Vd,Vn,imm DV_2O 0Q1011110iiiiiii 001001nnnnnddddd 2F00 2400 Vd,Vn imm (right shift - vector)
-INST2(sli, "sli", 0, 0, IF_EN2N, 0x7F005400, 0x2F005400)
- // sli Vd,Vn,imm DV_2N 011111110iiiiiii 010101nnnnnddddd 7F00 5400 Vd Vn imm (shift - scalar)
- // sli Vd,Vn,imm DV_2O 0Q1011110iiiiiii 010101nnnnnddddd 2F00 5400 Vd,Vn imm (shift - vector)
+INST2(ursra, "ursra", RSH, IF_EN2N, 0x7F003400, 0x2F003400)
+ // ursra Vd,Vn,imm DV_2N 011111110iiiiiii 001101nnnnnddddd 7F00 3400 Vd Vn imm (right shift - scalar)
+ // ursra Vd,Vn,imm DV_2O 0Q1011110iiiiiii 001101nnnnnddddd 2F00 3400 Vd,Vn imm (right shift - vector)
-// enum name FP LD/ST DV_3E DV_3A
-INST2(cmhi, "cmhi", 0, 0, IF_EN2O, 0x7EE03400, 0x2E203400)
+INST2(sri, "sri", RSH, IF_EN2N, 0x7F004400, 0x2F004400)
+ // sri Vd,Vn,imm DV_2N 011111110iiiiiii 010001nnnnnddddd 7F00 4400 Vd Vn imm (right shift - scalar)
+ // sri Vd,Vn,imm DV_2O 0Q1011110iiiiiii 010001nnnnnddddd 2F00 4400 Vd,Vn imm (right shift - vector)
+
+INST2(sli, "sli", 0, IF_EN2N, 0x7F005400, 0x2F005400)
+ // sli Vd,Vn,imm DV_2N 011111110iiiiiii 010101nnnnnddddd 7F00 5400 Vd Vn imm (left shift - scalar)
+ // sli Vd,Vn,imm DV_2O 0Q1011110iiiiiii 010101nnnnnddddd 2F00 5400 Vd,Vn imm (left shift - vector)
+
+INST2(sqshlu, "sqshlu", 0, IF_EN2N, 0x7F006400, 0x2F006400)
+ // sqshlu Vd,Vn,imm DV_2N 011111110iiiiiii 011001nnnnnddddd 7F00 6400 Vd Vn imm (left shift - scalar)
+ // sqshlu Vd,Vn,imm DV_2O 0Q1011110iiiiiii 011001nnnnnddddd 2F00 6400 Vd Vn imm (left shift - vector)
+
+INST2(sqrshrn, "sqrshrn", RSH, IF_EN2N, 0x5F009C00, 0x0F009C00)
+ // sqrshrn Vd,Vn,imm DV_2N 010111110iiiiiii 100111nnnnnddddd 5F00 9C00 Vd Vn imm (right shift - scalar)
+ // sqrshrn Vd,Vn,imm DV_2O 0Q0011110iiiiiii 100111nnnnnddddd 0F00 9C00 Vd Vn imm (right shift - vector)
+
+INST2(sqrshrun, "sqrshrun", RSH, IF_EN2N, 0x7F008C00, 0x2F008C00)
+ // sqrshrun Vd,Vn,imm DV_2N 011111110iiiiiii 100011nnnnnddddd 7F00 8C00 Vd Vn imm (right shift - scalar)
+ // sqrshrun Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100011nnnnnddddd 2F00 8C00 Vd Vn imm (right shift - vector)
+
+INST2(sqshrn, "sqshrn", RSH, IF_EN2N, 0x5F009400, 0x0F009400)
+ // sqshrn Vd,Vn,imm DV_2N 010111110iiiiiii 100101nnnnnddddd 5F00 9400 Vd Vn imm (right shift - scalar)
+ // sqshrn Vd,Vn,imm DV_2O 0Q0011110iiiiiii 100101nnnnnddddd 0F00 9400 Vd Vn imm (right shift - vector)
+
+INST2(sqshrun, "sqshrun", RSH, IF_EN2N, 0x7F008400, 0x2F008400)
+ // sqshrun Vd,Vn,imm DV_2N 011111110iiiiiii 100001nnnnnddddd 7F00 8400 Vd Vn imm (right shift - scalar)
+ // sqshrun Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100001nnnnnddddd 2F00 8400 Vd Vn imm (right shift - vector)
+
+INST2(uqrshrn, "uqrshrn", RSH, IF_EN2N, 0x7F009C00, 0x2F009C00)
+ // uqrshrn Vd,Vn,imm DV_2N 011111110iiiiiii 100111nnnnnddddd 7F00 9C00 Vd Vn imm (right shift - scalar)
+ // uqrshrn Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100111nnnnnddddd 2F00 9C00 Vd Vn imm (right shift - vector)
+
+INST2(uqshrn, "uqshrn", RSH, IF_EN2N, 0x7F009400, 0x2F009400)
+ // usqhrn Vd,Vn,imm DV_2N 011111110iiiiiii 100101nnnnnddddd 7F00 9400 Vd Vn imm (right shift - scalar)
+ // usqhrn Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100101nnnnnddddd 2F00 9400 Vd Vn imm (right shift - vector)
+
+// enum name info DV_3E DV_3A
+INST2(cmhi, "cmhi", 0, IF_EN2O, 0x7EE03400, 0x2E203400)
// cmhi Vd,Vn,Vm DV_3E 01111110111mmmmm 001101nnnnnddddd 7EE0 3400 Vd,Vn,Vm (scalar)
// cmhi Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 001101nnnnnddddd 2E20 3400 Vd,Vn,Vm (vector)
-INST2(cmhs, "cmhs", 0, 0, IF_EN2O, 0x7EE03C00, 0x2E203C00)
+INST2(cmhs, "cmhs", 0, IF_EN2O, 0x7EE03C00, 0x2E203C00)
// cmhs Vd,Vn,Vm DV_3E 01111110111mmmmm 001111nnnnnddddd 7EE0 3C00 Vd,Vn,Vm (scalar)
// cmhs Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 001111nnnnnddddd 2E20 3C00 Vd,Vn,Vm (vector)
-INST2(cmtst, "cmtst", 0, 0, IF_EN2O, 0x5EE08C00, 0x0E208C00)
+INST2(cmtst, "cmtst", 0, IF_EN2O, 0x5EE08C00, 0x0E208C00)
// cmtst Vd,Vn,Vm DV_3E 01011110111mmmmm 100011nnnnnddddd 5EE0 8C00 Vd,Vn,Vm (scalar)
// cmtst Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 100011nnnnnddddd 0E20 8C00 Vd,Vn,Vm (vector)
-// enum name FP LD/ST DV_2Q DV_3B
-INST2(faddp, "faddp", 0, 0, IF_EN2P, 0x7E30D800, 0x2E20D400)
+INST2(sqadd, "sqadd", 0, IF_EN2O, 0x5E200C00, 0x0E200C00)
+ // sqadd Vd,Vn,Vm DV_3E 01011110XX1mmmmm 000011nnnnnddddd 5E20 0C00 Vd,Vn,Vm (scalar)
+ // sqadd Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 000011nnnnnddddd 0E20 0C00 Vd,Vn,Vm (vector)
+
+INST2(sqrshl, "sqrshl", 0, IF_EN2O, 0x5E205C00, 0x0E205C00)
+ // sqrshl Vd,Vn,Vm DV_3E 01011110XX1mmmmm 010111nnnnnddddd 5E20 5C00 Vd,Vn,Vm (scalar)
+ // sqrshl Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 010111nnnnnddddd 0E20 5C00 Vd,Vn,Vm (vector)
+
+INST2(sqsub, "sqsub", 0, IF_EN2O, 0x5E202C00, 0x0E202C00)
+ // sqsub Vd,Vn,Vm DV_3E 01011110XX1mmmmm 001011nnnnnddddd 5E20 2C00 Vd,Vn,Vm (scalar)
+ // sqsub Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 001011nnnnnddddd 0E20 2C00 Vd,Vn,Vm (vector)
+
+INST2(srshl, "srshl", 0, IF_EN2O, 0x5E205400, 0x0E205400)
+ // srshl Vd,Vn,Vm DV_3E 01011110XX1mmmmm 010101nnnnnddddd 5E20 5400 Vd,Vn,Vm (scalar)
+ // srshl Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 010101nnnnnddddd 0E20 5400 Vd,Vn,Vm (vector)
+
+INST2(sshl, "sshl", 0, IF_EN2O, 0x5E204400, 0x0E204400)
+ // sshl Vd,Vn,Vm DV_3E 01011110XX1mmmmm 010001nnnnnddddd 5E20 4400 Vd,Vn,Vm (scalar)
+ // sshl Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 010001nnnnnddddd 0E20 4400 Vd,Vn,Vm (vector)
+
+INST2(uqadd, "uqadd", 0, IF_EN2O, 0x7E200C00, 0x2E200C00)
+ // uqadd Vd,Vn,Vm DV_3E 01111110XX1mmmmm 000011nnnnnddddd 7E20 0C00 Vd,Vn,Vm (scalar)
+ // uqadd Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 000011nnnnnddddd 2E20 0C00 Vd,Vn,Vm (vector)
+
+INST2(uqrshl, "uqrshl", 0, IF_EN2O, 0x7E205C00, 0x2E205C00)
+ // uqrshl Vd,Vn,Vm DV_3E 01111110XX1mmmmm 010111nnnnnddddd 7E20 5C00 Vd,Vn,Vm (scalar)
+ // uqrshl Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 010111nnnnnddddd 2E20 5C00 Vd,Vn,Vm (vector)
+
+INST2(uqsub, "uqsub", 0, IF_EN2O, 0x7E202C00, 0x2E202C00)
+ // uqsub Vd,Vn,Vm DV_3E 01111110XX1mmmmm 001011nnnnnddddd 7E20 2C00 Vd,Vn,Vm (scalar)
+ // uqsub Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 001011nnnnnddddd 2E20 2C00 Vd,Vn,Vm (vector)
+
+INST2(urshl, "urshl", 0, IF_EN2O, 0x7E205400, 0x2E205400)
+ // urshl Vd,Vn,Vm DV_3E 01111110XX1mmmmm 010101nnnnnddddd 7E20 5400 Vd,Vn,Vm (scalar)
+ // urshl Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 010101nnnnnddddd 2E20 5400 Vd,Vn,Vm (vector)
+
+INST2(ushl, "ushl", 0, IF_EN2O, 0x7E204400, 0x2E204400)
+ // ushl Vd,Vn,Vm DV_3E 01111110XX1mmmmm 010001nnnnnddddd 7E20 4400 Vd,Vn,Vm (scalar)
+ // ushl Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 010001nnnnnddddd 2E20 4400 Vd,Vn,Vm (vector)
+
+// enum name info DV_2Q DV_3B
+INST2(faddp, "faddp", 0, IF_EN2P, 0x7E30D800, 0x2E20D400)
// faddp Vd,Vn DV_2Q 011111100X110000 110110nnnnnddddd 7E30 D800 Vd,Vn (scalar)
// faddp Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 110101nnnnnddddd 2E20 D400 Vd,Vn,Vm (vector)
-INST2(fmaxnmp, "fmaxnmp",0, 0, IF_EN2P, 0x7E30C800, 0x2E20C400)
+INST2(fmaxnmp, "fmaxnmp", 0, IF_EN2P, 0x7E30C800, 0x2E20C400)
// fmaxnmp Vd,Vn DV_2Q 011111100X110000 110010nnnnnddddd 7E30 C800 Vd,Vn (scalar)
// fmaxnmp Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 110001nnnnnddddd 2E20 C400 Vd,Vn,Vm (vector)
-INST2(fmaxp, "fmaxp", 0, 0, IF_EN2P, 0x7E30F800, 0x2E20F400)
+INST2(fmaxp, "fmaxp", 0, IF_EN2P, 0x7E30F800, 0x2E20F400)
// fmaxp Vd,Vn DV_2Q 011111100X110000 111110nnnnnddddd 7E30 F800 Vd,Vn (scalar)
// fmaxp Vd,Vn,Vm DV_3B 0Q1011100X1mmmmm 111101nnnnnddddd 2E20 F400 Vd,Vn,Vm (vector)
-INST2(fminnmp, "fminnmp",0, 0, IF_EN2P, 0x7EB0C800, 0x2EA0C400)
+INST2(fminnmp, "fminnmp", 0, IF_EN2P, 0x7EB0C800, 0x2EA0C400)
// fminnmp Vd,Vn DV_2Q 011111101X110000 110010nnnnnddddd 7EB0 C800 Vd,Vn (scalar)
// fminnmp Vd,Vn,Vm DV_3B 0Q1011101X1mmmmm 110001nnnnnddddd 2EA0 C400 Vd,Vn,Vm (vector)
-INST2(fminp, "fminp", 0, 0, IF_EN2P, 0x7EB0F800, 0x2EA0F400)
+INST2(fminp, "fminp", 0, IF_EN2P, 0x7EB0F800, 0x2EA0F400)
// fminp Vd,Vn DV_2Q 011111101X110000 111110nnnnnddddd 7EB0 F800 Vd,Vn (scalar)
// fminp Vd,Vn,Vm DV_3B 0Q1011101X1mmmmm 111101nnnnnddddd 2EA0 F400 Vd,Vn,Vm (vector)
-INST2(addp, "addp", 0, 0, IF_EN2Q, 0x5E31B800, 0x0E20BC00)
+INST2(addp, "addp", 0, IF_EN2Q, 0x5E31B800, 0x0E20BC00)
// addp Vd,Vn DV_2S 01011110XX110001 101110nnnnnddddd 5E31 B800 Vd,Vn (scalar)
// addp Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 101111nnnnnddddd 0E20 BC00 Vd,Vn,Vm (vector)
-INST1(ldar, "ldar", 0,LD, IF_LS_2A, 0x88DFFC00)
+INST1(ldar, "ldar", LD, IF_LS_2A, 0x88DFFC00)
// ldar Rt,[Xn] LS_2A 1X00100011011111 111111nnnnnttttt 88DF FC00
-INST1(ldarb, "ldarb", 0,LD, IF_LS_2A, 0x08DFFC00)
+INST1(ldarb, "ldarb", LD, IF_LS_2A, 0x08DFFC00)
// ldarb Rt,[Xn] LS_2A 0000100011011111 111111nnnnnttttt 08DF FC00
-INST1(ldarh, "ldarh", 0,LD, IF_LS_2A, 0x48DFFC00)
+INST1(ldarh, "ldarh", LD, IF_LS_2A, 0x48DFFC00)
// ldarh Rt,[Xn] LS_2A 0100100011011111 111111nnnnnttttt 48DF FC00
-INST1(ldxr, "ldxr", 0,LD, IF_LS_2A, 0x885F7C00)
+INST1(ldxr, "ldxr", LD, IF_LS_2A, 0x885F7C00)
// ldxr Rt,[Xn] LS_2A 1X00100001011111 011111nnnnnttttt 885F 7C00
-INST1(ldxrb, "ldxrb", 0,LD, IF_LS_2A, 0x085F7C00)
+INST1(ldxrb, "ldxrb", LD, IF_LS_2A, 0x085F7C00)
// ldxrb Rt,[Xn] LS_2A 0000100001011111 011111nnnnnttttt 085F 7C00
-INST1(ldxrh, "ldxrh", 0,LD, IF_LS_2A, 0x485F7C00)
+INST1(ldxrh, "ldxrh", LD, IF_LS_2A, 0x485F7C00)
// ldxrh Rt,[Xn] LS_2A 0100100001011111 011111nnnnnttttt 485F 7C00
-INST1(ldaxr, "ldaxr", 0,LD, IF_LS_2A, 0x885FFC00)
+INST1(ldaxr, "ldaxr", LD, IF_LS_2A, 0x885FFC00)
// ldaxr Rt,[Xn] LS_2A 1X00100001011111 111111nnnnnttttt 885F FC00
-INST1(ldaxrb, "ldaxrb", 0,LD, IF_LS_2A, 0x085FFC00)
+INST1(ldaxrb, "ldaxrb", LD, IF_LS_2A, 0x085FFC00)
// ldaxrb Rt,[Xn] LS_2A 0000100001011111 111111nnnnnttttt 085F FC00
-INST1(ldaxrh, "ldaxrh", 0,LD, IF_LS_2A, 0x485FFC00)
+INST1(ldaxrh, "ldaxrh", LD, IF_LS_2A, 0x485FFC00)
// ldaxrh Rt,[Xn] LS_2A 0100100001011111 111111nnnnnttttt 485F FC00
-INST1(ldur, "ldur", 0,LD, IF_LS_2C, 0xB8400000)
+INST1(ldur, "ldur", LD, IF_LS_2C, 0xB8400000)
// ldur Rt,[Xn+simm9] LS_2C 1X111000010iiiii iiii00nnnnnttttt B840 0000 [Xn imm(-256..+255)]
-INST1(ldurb, "ldurb", 0,LD, IF_LS_2C, 0x38400000)
+INST1(ldurb, "ldurb", LD, IF_LS_2C, 0x38400000)
// ldurb Rt,[Xn+simm9] LS_2C 00111000010iiiii iiii00nnnnnttttt 3840 0000 [Xn imm(-256..+255)]
-INST1(ldurh, "ldurh", 0,LD, IF_LS_2C, 0x78400000)
+INST1(ldurh, "ldurh", LD, IF_LS_2C, 0x78400000)
// ldurh Rt,[Xn+simm9] LS_2C 01111000010iiiii iiii00nnnnnttttt 7840 0000 [Xn imm(-256..+255)]
-INST1(ldursb, "ldursb", 0,LD, IF_LS_2C, 0x38800000)
+INST1(ldursb, "ldursb", LD, IF_LS_2C, 0x38800000)
// ldursb Rt,[Xn+simm9] LS_2C 001110001X0iiiii iiii00nnnnnttttt 3880 0000 [Xn imm(-256..+255)]
-INST1(ldursh, "ldursh", 0,LD, IF_LS_2C, 0x78800000)
+INST1(ldursh, "ldursh", LD, IF_LS_2C, 0x78800000)
// ldursh Rt,[Xn+simm9] LS_2C 011110001X0iiiii iiii00nnnnnttttt 7880 0000 [Xn imm(-256..+255)]
-INST1(ldursw, "ldursw", 0,LD, IF_LS_2C, 0xB8800000)
+INST1(ldursw, "ldursw", LD, IF_LS_2C, 0xB8800000)
// ldursw Rt,[Xn+simm9] LS_2C 10111000100iiiii iiii00nnnnnttttt B880 0000 [Xn imm(-256..+255)]
-INST1(stlr, "stlr", 0,ST, IF_LS_2A, 0x889FFC00)
+INST1(stlr, "stlr", ST, IF_LS_2A, 0x889FFC00)
// stlr Rt,[Xn] LS_2A 1X00100010011111 111111nnnnnttttt 889F FC00
-INST1(stlrb, "stlrb", 0,ST, IF_LS_2A, 0x089FFC00)
+INST1(stlrb, "stlrb", ST, IF_LS_2A, 0x089FFC00)
// stlrb Rt,[Xn] LS_2A 0000100010011111 111111nnnnnttttt 089F FC00
-INST1(stlrh, "stlrh", 0,ST, IF_LS_2A, 0x489FFC00)
+INST1(stlrh, "stlrh", ST, IF_LS_2A, 0x489FFC00)
// stlrh Rt,[Xn] LS_2A 0100100010011111 111111nnnnnttttt 489F FC00
-INST1(stxr, "stxr", 0,ST, IF_LS_3D, 0x88007C00)
+INST1(stxr, "stxr", ST, IF_LS_3D, 0x88007C00)
// stxr Ws, Rt,[Xn] LS_3D 1X001000000sssss 011111nnnnnttttt 8800 7C00
-INST1(stxrb, "stxrb", 0,ST, IF_LS_3D, 0x08007C00)
+INST1(stxrb, "stxrb", ST, IF_LS_3D, 0x08007C00)
// stxrb Ws, Rt,[Xn] LS_3D 00001000000sssss 011111nnnnnttttt 0800 7C00
-INST1(stxrh, "stxrh", 0,ST, IF_LS_3D, 0x48007C00)
+INST1(stxrh, "stxrh", ST, IF_LS_3D, 0x48007C00)
// stxrh Ws, Rt,[Xn] LS_3D 01001000000sssss 011111nnnnnttttt 4800 7C00
-INST1(stlxr, "stlxr", 0,ST, IF_LS_3D, 0x8800FC00)
+INST1(stlxr, "stlxr", ST, IF_LS_3D, 0x8800FC00)
// stlxr Ws, Rt,[Xn] LS_3D 1X001000000sssss 111111nnnnnttttt 8800 FC00
-INST1(stlxrb, "stlxrb", 0,ST, IF_LS_3D, 0x0800FC00)
+INST1(stlxrb, "stlxrb", ST, IF_LS_3D, 0x0800FC00)
// stlxrb Ws, Rt,[Xn] LS_3D 00001000000sssss 111111nnnnnttttt 0800 FC00
-INST1(stlxrh, "stlxrh", 0,ST, IF_LS_3D, 0x4800FC00)
+INST1(stlxrh, "stlxrh", ST, IF_LS_3D, 0x4800FC00)
// stlxrh Ws, Rt,[Xn] LS_3D 01001000000sssss 111111nnnnnttttt 4800 FC00
-INST1(stur, "stur", 0,ST, IF_LS_2C, 0xB8000000)
+INST1(stur, "stur", ST, IF_LS_2C, 0xB8000000)
// stur Rt,[Xn+simm9] LS_2C 1X111000000iiiii iiii00nnnnnttttt B800 0000 [Xn imm(-256..+255)]
-INST1(sturb, "sturb", 0,ST, IF_LS_2C, 0x38000000)
+INST1(sturb, "sturb", ST, IF_LS_2C, 0x38000000)
// sturb Rt,[Xn+simm9] LS_2C 00111000000iiiii iiii00nnnnnttttt 3800 0000 [Xn imm(-256..+255)]
-INST1(sturh, "sturh", 0,ST, IF_LS_2C, 0x78000000)
+INST1(sturh, "sturh", ST, IF_LS_2C, 0x78000000)
// sturh Rt,[Xn+simm9] LS_2C 01111000000iiiii iiii00nnnnnttttt 7800 0000 [Xn imm(-256..+255)]
-INST1(casb, "casb", 0, LD|ST, IF_LS_3E, 0x08A07C00)
+INST1(casb, "casb", LD|ST, IF_LS_3E, 0x08A07C00)
// casb Wm, Wt, [Xn] LS_3E 00001000101mmmmm 011111nnnnnttttt 08A0 7C00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casab, "casab", 0, LD|ST, IF_LS_3E, 0x08E07C00)
+INST1(casab, "casab", LD|ST, IF_LS_3E, 0x08E07C00)
// casab Wm, Wt, [Xn] LS_3E 00001000111mmmmm 011111nnnnnttttt 08E0 7C00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casalb, "casalb", 0, LD|ST, IF_LS_3E, 0x08E0FC00)
+INST1(casalb, "casalb", LD|ST, IF_LS_3E, 0x08E0FC00)
// casalb Wm, Wt, [Xn] LS_3E 00001000111mmmmm 111111nnnnnttttt 08E0 FC00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(caslb, "caslb", 0, LD|ST, IF_LS_3E, 0x08A0FC00)
+INST1(caslb, "caslb", LD|ST, IF_LS_3E, 0x08A0FC00)
// caslb Wm, Wt, [Xn] LS_3E 00001000101mmmmm 111111nnnnnttttt 08A0 FC00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(cash, "cash", 0, LD|ST, IF_LS_3E, 0x48A07C00)
+INST1(cash, "cash", LD|ST, IF_LS_3E, 0x48A07C00)
// cash Wm, Wt, [Xn] LS_3E 01001000101mmmmm 011111nnnnnttttt 48A0 7C00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casah, "casah", 0, LD|ST, IF_LS_3E, 0x48E07C00)
+INST1(casah, "casah", LD|ST, IF_LS_3E, 0x48E07C00)
// casah Wm, Wt, [Xn] LS_3E 01001000111mmmmm 011111nnnnnttttt 48E0 7C00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casalh, "casalh", 0, LD|ST, IF_LS_3E, 0x48E0FC00)
+INST1(casalh, "casalh", LD|ST, IF_LS_3E, 0x48E0FC00)
// casalh Wm, Wt, [Xn] LS_3E 01001000111mmmmm 111111nnnnnttttt 48E0 FC00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(caslh, "caslh", 0, LD|ST, IF_LS_3E, 0x48A0FC00)
+INST1(caslh, "caslh", LD|ST, IF_LS_3E, 0x48A0FC00)
// caslh Wm, Wt, [Xn] LS_3E 01001000101mmmmm 111111nnnnnttttt 48A0 FC00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(cas, "cas", 0, LD|ST, IF_LS_3E, 0x88A07C00)
+INST1(cas, "cas", LD|ST, IF_LS_3E, 0x88A07C00)
// cas Rm, Rt, [Xn] LS_3E 1X001000101mmmmm 011111nnnnnttttt 88A0 7C00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casa, "casa", 0, LD|ST, IF_LS_3E, 0x88E07C00)
+INST1(casa, "casa", LD|ST, IF_LS_3E, 0x88E07C00)
// casa Rm, Rt, [Xn] LS_3E 1X001000111mmmmm 011111nnnnnttttt 88E0 7C00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casal, "casal", 0, LD|ST, IF_LS_3E, 0x88E0FC00)
+INST1(casal, "casal", LD|ST, IF_LS_3E, 0x88E0FC00)
// casal Rm, Rt, [Xn] LS_3E 1X001000111mmmmm 111111nnnnnttttt 88E0 FC00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(casl, "casl", 0, LD|ST, IF_LS_3E, 0x88A0FC00)
+INST1(casl, "casl", LD|ST, IF_LS_3E, 0x88A0FC00)
// casl Rm, Rt, [Xn] LS_3E 1X001000101mmmmm 111111nnnnnttttt 88A0 FC00 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddb, "ldaddb", 0, LD|ST, IF_LS_3E, 0x38200000)
+INST1(ldaddb, "ldaddb", LD|ST, IF_LS_3E, 0x38200000)
// ldaddb Wm, Wt, [Xn] LS_3E 00111000001mmmmm 000000nnnnnttttt 3820 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddab, "ldaddab", 0, LD|ST, IF_LS_3E, 0x38A00000)
+INST1(ldaddab, "ldaddab", LD|ST, IF_LS_3E, 0x38A00000)
// ldaddab Wm, Wt, [Xn] LS_3E 00111000101mmmmm 000000nnnnnttttt 38A0 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddalb,"ldaddalb",0, LD|ST, IF_LS_3E, 0x38E00000)
+INST1(ldaddalb, "ldaddalb", LD|ST, IF_LS_3E, 0x38E00000)
// ldaddalb Wm, Wt, [Xn] LS_3E 00111000111mmmmm 000000nnnnnttttt 38E0 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddlb, "ldaddlb", 0, LD|ST, IF_LS_3E, 0x38600000)
+INST1(ldaddlb, "ldaddlb", LD|ST, IF_LS_3E, 0x38600000)
// ldaddlb Wm, Wt, [Xn] LS_3E 00111000011mmmmm 000000nnnnnttttt 3860 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddh, "ldaddh", 0, LD|ST, IF_LS_3E, 0x78200000)
+INST1(ldaddh, "ldaddh", LD|ST, IF_LS_3E, 0x78200000)
// ldaddh Wm, Wt, [Xn] LS_3E 01111000001mmmmm 000000nnnnnttttt 7820 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddah, "ldaddah", 0, LD|ST, IF_LS_3E, 0x78A00000)
+INST1(ldaddah, "ldaddah", LD|ST, IF_LS_3E, 0x78A00000)
// ldaddah Wm, Wt, [Xn] LS_3E 01111000101mmmmm 000000nnnnnttttt 78A0 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddalh,"ldaddalh",0, LD|ST, IF_LS_3E, 0x78E00000)
+INST1(ldaddalh, "ldaddalh", LD|ST, IF_LS_3E, 0x78E00000)
// ldaddalh Wm, Wt, [Xn] LS_3E 01111000111mmmmm 000000nnnnnttttt 78E0 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddlh, "ldaddlh", 0, LD|ST, IF_LS_3E, 0x78600000)
+INST1(ldaddlh, "ldaddlh", LD|ST, IF_LS_3E, 0x78600000)
// ldaddlh Wm, Wt, [Xn] LS_3E 01111000011mmmmm 000000nnnnnttttt 7860 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldadd, "ldadd", 0, LD|ST, IF_LS_3E, 0xB8200000)
+INST1(ldadd, "ldadd", LD|ST, IF_LS_3E, 0xB8200000)
// ldadd Rm, Rt, [Xn] LS_3E 1X111000001mmmmm 000000nnnnnttttt B820 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldadda, "ldadda", 0, LD|ST, IF_LS_3E, 0xB8A00000)
+INST1(ldadda, "ldadda", LD|ST, IF_LS_3E, 0xB8A00000)
// ldadda Rm, Rt, [Xn] LS_3E 1X111000101mmmmm 000000nnnnnttttt B8A0 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddal, "ldaddal", 0, LD|ST, IF_LS_3E, 0xB8E00000)
+INST1(ldaddal, "ldaddal", LD|ST, IF_LS_3E, 0xB8E00000)
// ldaddal Rm, Rt, [Xn] LS_3E 1X111000111mmmmm 000000nnnnnttttt B8E0 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(ldaddl, "ldaddl", 0, LD|ST, IF_LS_3E, 0xB8600000)
+INST1(ldaddl, "ldaddl", LD|ST, IF_LS_3E, 0xB8600000)
// ldaddl Rm, Rt, [Xn] LS_3E 1X111000011mmmmm 000000nnnnnttttt B860 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(staddb, "staddb", 0, ST, IF_LS_3E, 0x38200000)
+INST1(staddb, "staddb", ST, IF_LS_3E, 0x38200000)
// staddb Wm, [Xn] LS_3E 00111000001mmmmm 000000nnnnnttttt 3820 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(staddlb, "staddlb", 0, ST, IF_LS_3E, 0x38600000)
+INST1(staddlb, "staddlb", ST, IF_LS_3E, 0x38600000)
// staddlb Wm, [Xn] LS_3E 00111000011mmmmm 000000nnnnnttttt 3860 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(staddh, "staddh", 0, ST, IF_LS_3E, 0x78200000)
+INST1(staddh, "staddh", ST, IF_LS_3E, 0x78200000)
// staddh Wm, [Xn] LS_3E 01111000001mmmmm 000000nnnnnttttt 7820 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(staddlh, "staddlh", 0, ST, IF_LS_3E, 0x78600000)
+INST1(staddlh, "staddlh", ST, IF_LS_3E, 0x78600000)
// staddlh Wm, [Xn] LS_3E 01111000011mmmmm 000000nnnnnttttt 7860 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(stadd, "stadd", 0, ST, IF_LS_3E, 0xB8200000)
+INST1(stadd, "stadd", ST, IF_LS_3E, 0xB8200000)
// stadd Rm, [Xn] LS_3E 1X111000001mmmmm 000000nnnnnttttt B820 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(staddl, "staddl", 0, ST, IF_LS_3E, 0xB8600000)
+INST1(staddl, "staddl", ST, IF_LS_3E, 0xB8600000)
// staddl Rm, [Xn] LS_3E 1X111000011mmmmm 000000nnnnnttttt B860 0000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpb, "swpb", 0, LD|ST, IF_LS_3E, 0x38208000)
+INST1(swpb, "swpb", LD|ST, IF_LS_3E, 0x38208000)
// swpb Wm, Wt, [Xn] LS_3E 00111000001mmmmm 100000nnnnnttttt 3820 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpab, "swpab", 0, LD|ST, IF_LS_3E, 0x38A08000)
+INST1(swpab, "swpab", LD|ST, IF_LS_3E, 0x38A08000)
// swpab Wm, Wt, [Xn] LS_3E 00111000101mmmmm 100000nnnnnttttt 38A0 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpalb, "swpalb", 0, LD|ST, IF_LS_3E, 0x38E08000)
+INST1(swpalb, "swpalb", LD|ST, IF_LS_3E, 0x38E08000)
// swpalb Wm, Wt, [Xn] LS_3E 00111000111mmmmm 100000nnnnnttttt 38E0 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swplb, "swplb", 0, LD|ST, IF_LS_3E, 0x38608000)
+INST1(swplb, "swplb", LD|ST, IF_LS_3E, 0x38608000)
// swplb Wm, Wt, [Xn] LS_3E 00111000011mmmmm 100000nnnnnttttt 3860 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swph, "swph", 0, LD|ST, IF_LS_3E, 0x78208000)
+INST1(swph, "swph", LD|ST, IF_LS_3E, 0x78208000)
// swph Wm, Wt, [Xn] LS_3E 01111000001mmmmm 100000nnnnnttttt 7820 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpah, "swpah", 0, LD|ST, IF_LS_3E, 0x78A08000)
+INST1(swpah, "swpah", LD|ST, IF_LS_3E, 0x78A08000)
// swpah Wm, Wt, [Xn] LS_3E 01111000101mmmmm 100000nnnnnttttt 78A0 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpalh, "swpalh", 0, LD|ST, IF_LS_3E, 0x78E08000)
+INST1(swpalh, "swpalh", LD|ST, IF_LS_3E, 0x78E08000)
// swpalh Wm, Wt, [Xn] LS_3E 01111000111mmmmm 100000nnnnnttttt 78E0 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swplh, "swplh", 0, LD|ST, IF_LS_3E, 0x78608000)
+INST1(swplh, "swplh", LD|ST, IF_LS_3E, 0x78608000)
// swplh Wm, Wt, [Xn] LS_3E 01111000011mmmmm 100000nnnnnttttt 7860 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swp, "swp", 0, LD|ST, IF_LS_3E, 0xB8208000)
+INST1(swp, "swp", LD|ST, IF_LS_3E, 0xB8208000)
// swp Rm, Rt, [Xn] LS_3E 1X111000001mmmmm 100000nnnnnttttt B820 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpa, "swpa", 0, LD|ST, IF_LS_3E, 0xB8A08000)
+INST1(swpa, "swpa", LD|ST, IF_LS_3E, 0xB8A08000)
// swpa Rm, Rt, [Xn] LS_3E 1X111000101mmmmm 100000nnnnnttttt B8A0 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpal, "swpal", 0, LD|ST, IF_LS_3E, 0xB8E08000)
+INST1(swpal, "swpal", LD|ST, IF_LS_3E, 0xB8E08000)
// swpal Rm, Rt, [Xn] LS_3E 1X111000111mmmmm 100000nnnnnttttt B8E0 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(swpl, "swpl", 0, LD|ST, IF_LS_3E, 0xB8608000)
+INST1(swpl, "swpl", LD|ST, IF_LS_3E, 0xB8608000)
// swpl Rm, Rt, [Xn] LS_3E 1X111000011mmmmm 100000nnnnnttttt B860 8000 Rm Rt Rn ARMv8.1 LSE Atomics
-INST1(adr, "adr", 0, 0, IF_DI_1E, 0x10000000)
+INST1(adr, "adr", 0, IF_DI_1E, 0x10000000)
// adr Rd, simm21 DI_1E 0ii10000iiiiiiii iiiiiiiiiiiddddd 1000 0000 Rd simm21
-INST1(adrp, "adrp", 0, 0, IF_DI_1E, 0x90000000)
+INST1(adrp, "adrp", 0, IF_DI_1E, 0x90000000)
// adrp Rd, simm21 DI_1E 1ii10000iiiiiiii iiiiiiiiiiiddddd 9000 0000 Rd simm21
-INST1(b, "b", 0, 0, IF_BI_0A, 0x14000000)
+INST1(b, "b", 0, IF_BI_0A, 0x14000000)
// b simm26 BI_0A 000101iiiiiiiiii iiiiiiiiiiiiiiii 1400 0000 simm26:00
-INST1(b_tail, "b", 0, 0, IF_BI_0C, 0x14000000)
+INST1(b_tail, "b", 0, IF_BI_0C, 0x14000000)
// b simm26 BI_0A 000101iiiiiiiiii iiiiiiiiiiiiiiii 1400 0000 simm26:00, same as b representing a tail call of bl.
-INST1(bl_local,"bl", 0, 0, IF_BI_0A, 0x94000000)
+INST1(bl_local, "bl", 0, IF_BI_0A, 0x94000000)
// bl simm26 BI_0A 100101iiiiiiiiii iiiiiiiiiiiiiiii 9400 0000 simm26:00, same as bl, but with a BasicBlock target.
-INST1(bl, "bl", 0, 0, IF_BI_0C, 0x94000000)
+INST1(bl, "bl", 0, IF_BI_0C, 0x94000000)
// bl simm26 BI_0C 100101iiiiiiiiii iiiiiiiiiiiiiiii 9400 0000 simm26:00
-INST1(br, "br", 0, 0, IF_BR_1A, 0xD61F0000)
+INST1(br, "br", 0, IF_BR_1A, 0xD61F0000)
// br Rn BR_1A 1101011000011111 000000nnnnn00000 D61F 0000, an indirect branch like switch expansion
-INST1(br_tail, "br", 0, 0, IF_BR_1B, 0xD61F0000)
+INST1(br_tail, "br", 0, IF_BR_1B, 0xD61F0000)
// br Rn BR_1B 1101011000011111 000000nnnnn00000 D61F 0000, same as br representing a tail call of blr. Encode target with Reg3.
-INST1(blr, "blr", 0, 0, IF_BR_1B, 0xD63F0000)
+INST1(blr, "blr", 0, IF_BR_1B, 0xD63F0000)
// blr Rn BR_1B 1101011000111111 000000nnnnn00000 D63F 0000, Encode target with Reg3.
-INST1(ret, "ret", 0, 0, IF_BR_1A, 0xD65F0000)
+INST1(ret, "ret", 0, IF_BR_1A, 0xD65F0000)
// ret Rn BR_1A 1101011001011111 000000nnnnn00000 D65F 0000
-INST1(beq, "beq", 0, 0, IF_BI_0B, 0x54000000)
+INST1(beq, "beq", 0, IF_BI_0B, 0x54000000)
// beq simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00000 5400 0000 simm19:00
-INST1(bne, "bne", 0, 0, IF_BI_0B, 0x54000001)
+INST1(bne, "bne", 0, IF_BI_0B, 0x54000001)
// bne simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00001 5400 0001 simm19:00
-INST1(bhs, "bhs", 0, 0, IF_BI_0B, 0x54000002)
+INST1(bhs, "bhs", 0, IF_BI_0B, 0x54000002)
// bhs simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00010 5400 0002 simm19:00
-INST1(blo, "blo", 0, 0, IF_BI_0B, 0x54000003)
+INST1(blo, "blo", 0, IF_BI_0B, 0x54000003)
// blo simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00011 5400 0003 simm19:00
-INST1(bmi, "bmi", 0, 0, IF_BI_0B, 0x54000004)
+INST1(bmi, "bmi", 0, IF_BI_0B, 0x54000004)
// bmi simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00100 5400 0004 simm19:00
-INST1(bpl, "bpl", 0, 0, IF_BI_0B, 0x54000005)
+INST1(bpl, "bpl", 0, IF_BI_0B, 0x54000005)
// bpl simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00101 5400 0005 simm19:00
-INST1(bvs, "bvs", 0, 0, IF_BI_0B, 0x54000006)
+INST1(bvs, "bvs", 0, IF_BI_0B, 0x54000006)
// bvs simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00110 5400 0006 simm19:00
-INST1(bvc, "bvc", 0, 0, IF_BI_0B, 0x54000007)
+INST1(bvc, "bvc", 0, IF_BI_0B, 0x54000007)
// bvc simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00111 5400 0007 simm19:00
-INST1(bhi, "bhi", 0, 0, IF_BI_0B, 0x54000008)
+INST1(bhi, "bhi", 0, IF_BI_0B, 0x54000008)
// bhi simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii01000 5400 0008 simm19:00
-INST1(bls, "bls", 0, 0, IF_BI_0B, 0x54000009)
+INST1(bls, "bls", 0, IF_BI_0B, 0x54000009)
// bls simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii01001 5400 0009 simm19:00
-INST1(bge, "bge", 0, 0, IF_BI_0B, 0x5400000A)
+INST1(bge, "bge", 0, IF_BI_0B, 0x5400000A)
// bge simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii01010 5400 000A simm19:00
-INST1(blt, "blt", 0, 0, IF_BI_0B, 0x5400000B)
+INST1(blt, "blt", 0, IF_BI_0B, 0x5400000B)
// blt simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii01011 5400 000B simm19:00
-INST1(bgt, "bgt", 0, 0, IF_BI_0B, 0x5400000C)
+INST1(bgt, "bgt", 0, IF_BI_0B, 0x5400000C)
// bgt simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii01100 5400 000C simm19:00
-INST1(ble, "ble", 0, 0, IF_BI_0B, 0x5400000D)
+INST1(ble, "ble", 0, IF_BI_0B, 0x5400000D)
// ble simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii01101 5400 000D simm19:00
-INST1(cbz, "cbz", 0, 0, IF_BI_1A, 0x34000000)
+INST1(cbz, "cbz", 0, IF_BI_1A, 0x34000000)
// cbz Rt, simm19 BI_1A X0110100iiiiiiii iiiiiiiiiiittttt 3400 0000 Rt simm19:00
-INST1(cbnz, "cbnz", 0, 0, IF_BI_1A, 0x35000000)
+INST1(cbnz, "cbnz", 0, IF_BI_1A, 0x35000000)
// cbnz Rt, simm19 BI_1A X0110101iiiiiiii iiiiiiiiiiittttt 3500 0000 Rt simm19:00
-INST1(tbz, "tbz", 0, 0, IF_BI_1B, 0x36000000)
+INST1(tbz, "tbz", 0, IF_BI_1B, 0x36000000)
// tbz Rt, imm6, simm14 BI_1B B0110110bbbbbiii iiiiiiiiiiittttt 3600 0000 Rt imm6, simm14:00
-INST1(tbnz, "tbnz", 0, 0, IF_BI_1B, 0x37000000)
+INST1(tbnz, "tbnz", 0, IF_BI_1B, 0x37000000)
// tbnz Rt, imm6, simm14 BI_1B B0110111bbbbbiii iiiiiiiiiiittttt 3700 0000 Rt imm6, simm14:00
-INST1(movk, "movk", 0, 0, IF_DI_1B, 0x72800000)
+INST1(movk, "movk", 0, IF_DI_1B, 0x72800000)
// movk Rd,imm(i16,hw) DI_1B X11100101hwiiiii iiiiiiiiiiiddddd 7280 0000 imm(i16,hw)
-INST1(movn, "movn", 0, 0, IF_DI_1B, 0x12800000)
+INST1(movn, "movn", 0, IF_DI_1B, 0x12800000)
// movn Rd,imm(i16,hw) DI_1B X00100101hwiiiii iiiiiiiiiiiddddd 1280 0000 imm(i16,hw)
-INST1(movz, "movz", 0, 0, IF_DI_1B, 0x52800000)
+INST1(movz, "movz", 0, IF_DI_1B, 0x52800000)
// movz Rd,imm(i16,hw) DI_1B X10100101hwiiiii iiiiiiiiiiiddddd 5280 0000 imm(i16,hw)
-INST1(csel, "csel", 0, 0, IF_DR_3D, 0x1A800000)
+INST1(csel, "csel", 0, IF_DR_3D, 0x1A800000)
// csel Rd,Rn,Rm,cond DR_3D X0011010100mmmmm cccc00nnnnnddddd 1A80 0000 cond
-INST1(csinc, "csinc", 0, 0, IF_DR_3D, 0x1A800400)
+INST1(csinc, "csinc", 0, IF_DR_3D, 0x1A800400)
// csinc Rd,Rn,Rm,cond DR_3D X0011010100mmmmm cccc01nnnnnddddd 1A80 0400 cond
-INST1(csinv, "csinv", 0, 0, IF_DR_3D, 0x5A800000)
+INST1(csinv, "csinv", 0, IF_DR_3D, 0x5A800000)
// csinv Rd,Rn,Rm,cond DR_3D X1011010100mmmmm cccc00nnnnnddddd 5A80 0000 cond
-INST1(csneg, "csneg", 0, 0, IF_DR_3D, 0x5A800400)
+INST1(csneg, "csneg", 0, IF_DR_3D, 0x5A800400)
// csneg Rd,Rn,Rm,cond DR_3D X1011010100mmmmm cccc01nnnnnddddd 5A80 0400 cond
-INST1(cinc, "cinc", 0, 0, IF_DR_2D, 0x1A800400)
+INST1(cinc, "cinc", 0, IF_DR_2D, 0x1A800400)
// cinc Rd,Rn,cond DR_2D X0011010100nnnnn cccc01nnnnnddddd 1A80 0400 cond
-INST1(cinv, "cinv", 0, 0, IF_DR_2D, 0x5A800000)
+INST1(cinv, "cinv", 0, IF_DR_2D, 0x5A800000)
// cinv Rd,Rn,cond DR_2D X1011010100nnnnn cccc00nnnnnddddd 5A80 0000 cond
-INST1(cneg, "cneg", 0, 0, IF_DR_2D, 0x5A800400)
+INST1(cneg, "cneg", 0, IF_DR_2D, 0x5A800400)
// cneg Rd,Rn,cond DR_2D X1011010100nnnnn cccc01nnnnnddddd 5A80 0400 cond
-INST1(cset, "cset", 0, 0, IF_DR_1D, 0x1A9F07E0)
+INST1(cset, "cset", 0, IF_DR_1D, 0x1A9F07E0)
// cset Rd,cond DR_1D X001101010011111 cccc0111111ddddd 1A9F 07E0 Rd cond
-INST1(csetm, "csetm", 0, 0, IF_DR_1D, 0x5A9F03E0)
+INST1(csetm, "csetm", 0, IF_DR_1D, 0x5A9F03E0)
// csetm Rd,cond DR_1D X101101010011111 cccc0011111ddddd 5A9F 03E0 Rd cond
-INST1(aese, "aese", 0, 0, IF_DV_2P, 0x4E284800)
+INST1(aese, "aese", 0, IF_DV_2P, 0x4E284800)
// aese Vd.16B,Vn.16B DV_2P 0100111000101000 010010nnnnnddddd 4E28 4800 Vd.16B Vn.16B (vector)
-INST1(aesd, "aesd", 0, 0, IF_DV_2P, 0x4E285800)
+INST1(aesd, "aesd", 0, IF_DV_2P, 0x4E285800)
// aesd Vd.16B,Vn.16B DV_2P 0100111000101000 010110nnnnnddddd 4E28 5800 Vd.16B Vn.16B (vector)
-INST1(aesmc, "aesmc", 0, 0, IF_DV_2P, 0x4E286800)
+INST1(aesmc, "aesmc", 0, IF_DV_2P, 0x4E286800)
// aesmc Vd.16B,Vn.16B DV_2P 0100111000101000 011010nnnnnddddd 4E28 6800 Vd.16B Vn.16B (vector)
-INST1(aesimc, "aesimc", 0, 0, IF_DV_2P, 0x4E287800)
+INST1(aesimc, "aesimc", 0, IF_DV_2P, 0x4E287800)
// aesimc Vd.16B,Vn.16B DV_2P 0100111000101000 011110nnnnnddddd 4E28 7800 Vd.16B Vn.16B (vector)
-INST1(rev, "rev", 0, 0, IF_DR_2G, 0x5AC00800)
+INST1(rev, "rev", 0, IF_DR_2G, 0x5AC00800)
// rev Rd,Rm DR_2G X101101011000000 00001Xnnnnnddddd 5AC0 0800 Rd Rn
-INST1(rev64, "rev64", 0, 0, IF_DV_2M, 0x0E200800)
+INST1(rev64, "rev64", 0, IF_DV_2M, 0x0E200800)
// rev64 Vd,Vn DV_2M 0Q001110XX100000 000010nnnnnddddd 0E20 0800 Vd,Vn (vector)
-INST1(adc, "adc", 0, 0, IF_DR_3A, 0x1A000000)
+INST1(adc, "adc", 0, IF_DR_3A, 0x1A000000)
// adc Rd,Rn,Rm DR_3A X0011010000mmmmm 000000nnnnnddddd 1A00 0000
-INST1(adcs, "adcs", 0, 0, IF_DR_3A, 0x3A000000)
+INST1(adcs, "adcs", 0, IF_DR_3A, 0x3A000000)
// adcs Rd,Rn,Rm DR_3A X0111010000mmmmm 000000nnnnnddddd 3A00 0000
-INST1(sbc, "sbc", 0, 0, IF_DR_3A, 0x5A000000)
+INST1(sbc, "sbc", 0, IF_DR_3A, 0x5A000000)
// sdc Rd,Rn,Rm DR_3A X1011010000mmmmm 000000nnnnnddddd 5A00 0000
-INST1(sbcs, "sbcs", 0, 0, IF_DR_3A, 0x7A000000)
+INST1(sbcs, "sbcs", 0, IF_DR_3A, 0x7A000000)
// sdcs Rd,Rn,Rm DR_3A X1111010000mmmmm 000000nnnnnddddd 7A00 0000
-INST1(udiv, "udiv", 0, 0, IF_DR_3A, 0x1AC00800)
+INST1(udiv, "udiv", 0, IF_DR_3A, 0x1AC00800)
// udiv Rd,Rn,Rm DR_3A X0011010110mmmmm 000010nnnnnddddd 1AC0 0800
-INST1(sdiv, "sdiv", 0, 0, IF_DR_3A, 0x1AC00C00)
+INST1(sdiv, "sdiv", 0, IF_DR_3A, 0x1AC00C00)
// sdiv Rd,Rn,Rm DR_3A X0011010110mmmmm 000011nnnnnddddd 1AC0 0C00
-INST1(mneg, "mneg", 0, 0, IF_DR_3A, 0x1B00FC00)
+INST1(mneg, "mneg", 0, IF_DR_3A, 0x1B00FC00)
// mneg Rd,Rn,Rm DR_3A X0011011000mmmmm 111111nnnnnddddd 1B00 FC00
-INST1(madd, "madd", 0, 0, IF_DR_4A, 0x1B000000)
+INST1(madd, "madd", 0, IF_DR_4A, 0x1B000000)
// madd Rd,Rn,Rm,Ra DR_4A X0011011000mmmmm 0aaaaannnnnddddd 1B00 0000
-INST1(msub, "msub", 0, 0, IF_DR_4A, 0x1B008000)
+INST1(msub, "msub", 0, IF_DR_4A, 0x1B008000)
// msub Rd,Rn,Rm,Ra DR_4A X0011011000mmmmm 1aaaaannnnnddddd 1B00 8000
-INST1(smull, "smull", 0, 0, IF_DR_3A, 0x9B207C00)
- // smull Rd,Rn,Rm DR_3A 10011011001mmmmm 011111nnnnnddddd 9B20 7C00
-
-INST1(smaddl, "smaddl", 0, 0, IF_DR_4A, 0x9B200000)
+INST1(smaddl, "smaddl", 0, IF_DR_4A, 0x9B200000)
// smaddl Rd,Rn,Rm,Ra DR_4A 10011011001mmmmm 0aaaaannnnnddddd 9B20 0000
-INST1(smnegl, "smnegl", 0, 0, IF_DR_3A, 0x9B20FC00)
+INST1(smnegl, "smnegl", 0, IF_DR_3A, 0x9B20FC00)
// smnegl Rd,Rn,Rm DR_3A 10011011001mmmmm 111111nnnnnddddd 9B20 FC00
-INST1(smsubl, "smsubl", 0, 0, IF_DR_4A, 0x9B208000)
+INST1(smsubl, "smsubl", 0, IF_DR_4A, 0x9B208000)
// smsubl Rd,Rn,Rm,Ra DR_4A 10011011001mmmmm 1aaaaannnnnddddd 9B20 8000
-INST1(smulh, "smulh", 0, 0, IF_DR_3A, 0x9B407C00)
+INST1(smulh, "smulh", 0, IF_DR_3A, 0x9B407C00)
// smulh Rd,Rn,Rm DR_3A 10011011010mmmmm 011111nnnnnddddd 9B40 7C00
-INST1(umull, "umull", 0, 0, IF_DR_3A, 0x9BA07C00)
- // umull Rd,Rn,Rm DR_3A 10011011101mmmmm 011111nnnnnddddd 9BA0 7C00
-
-INST1(umaddl, "umaddl", 0, 0, IF_DR_4A, 0x9BA00000)
+INST1(umaddl, "umaddl", 0, IF_DR_4A, 0x9BA00000)
// umaddl Rd,Rn,Rm,Ra DR_4A 10011011101mmmmm 0aaaaannnnnddddd 9BA0 0000
-INST1(umnegl, "umnegl", 0, 0, IF_DR_3A, 0x9BA0FC00)
+INST1(umnegl, "umnegl", 0, IF_DR_3A, 0x9BA0FC00)
// umnegl Rd,Rn,Rm DR_3A 10011011101mmmmm 111111nnnnnddddd 9BA0 FC00
-INST1(umsubl, "umsubl", 0, 0, IF_DR_4A, 0x9BA08000)
+INST1(umsubl, "umsubl", 0, IF_DR_4A, 0x9BA08000)
// umsubl Rd,Rn,Rm,Ra DR_4A 10011011101mmmmm 1aaaaannnnnddddd 9BA0 8000
-INST1(umulh, "umulh", 0, 0, IF_DR_3A, 0x9BC07C00)
+INST1(umulh, "umulh", 0, IF_DR_3A, 0x9BC07C00)
// umulh Rd,Rn,Rm DR_3A 10011011110mmmmm 011111nnnnnddddd 9BC0 7C00
-INST1(extr, "extr", 0, 0, IF_DR_3E, 0x13800000)
+INST1(extr, "extr", 0, IF_DR_3E, 0x13800000)
// extr Rd,Rn,Rm,imm6 DR_3E X00100111X0mmmmm ssssssnnnnnddddd 1380 0000 imm(0-63)
-INST1(lslv, "lslv", 0, 0, IF_DR_3A, 0x1AC02000)
+INST1(lslv, "lslv", 0, IF_DR_3A, 0x1AC02000)
// lslv Rd,Rn,Rm DR_3A X0011010110mmmmm 001000nnnnnddddd 1AC0 2000
-INST1(lsrv, "lsrv", 0, 0, IF_DR_3A, 0x1AC02400)
+INST1(lsrv, "lsrv", 0, IF_DR_3A, 0x1AC02400)
// lsrv Rd,Rn,Rm DR_3A X0011010110mmmmm 001001nnnnnddddd 1AC0 2400
-INST1(asrv, "asrv", 0, 0, IF_DR_3A, 0x1AC02800)
+INST1(asrv, "asrv", 0, IF_DR_3A, 0x1AC02800)
// asrv Rd,Rn,Rm DR_3A X0011010110mmmmm 001010nnnnnddddd 1AC0 2800
-INST1(rorv, "rorv", 0, 0, IF_DR_3A, 0x1AC02C00)
+INST1(rorv, "rorv", 0, IF_DR_3A, 0x1AC02C00)
// rorv Rd,Rn,Rm DR_3A X0011010110mmmmm 001011nnnnnddddd 1AC0 2C00
-INST1(crc32b, "crc32b", 0, 0, IF_DR_3A, 0x1AC04000)
+INST1(crc32b, "crc32b", 0, IF_DR_3A, 0x1AC04000)
// crc32b Rd,Rn,Rm DR_3A 00011010110mmmmm 010000nnnnnddddd 1AC0 4000
-INST1(crc32h, "crc32h", 0, 0, IF_DR_3A, 0x1AC04400)
+INST1(crc32h, "crc32h", 0, IF_DR_3A, 0x1AC04400)
// crc32h Rd,Rn,Rm DR_3A 00011010110mmmmm 010001nnnnnddddd 1AC0 4400
-INST1(crc32w, "crc32w", 0, 0, IF_DR_3A, 0x1AC04800)
+INST1(crc32w, "crc32w", 0, IF_DR_3A, 0x1AC04800)
// crc32w Rd,Rn,Rm DR_3A 00011010110mmmmm 010010nnnnnddddd 1AC0 4800
-INST1(crc32x, "crc32x", 0, 0, IF_DR_3A, 0x9AC04C00)
+INST1(crc32x, "crc32x", 0, IF_DR_3A, 0x9AC04C00)
// crc32x Rd,Rn,Xm DR_3A 10011010110mmmmm 010011nnnnnddddd 9AC0 4C00
-INST1(crc32cb, "crc32cb",0, 0, IF_DR_3A, 0x1AC05000)
+INST1(crc32cb, "crc32cb", 0, IF_DR_3A, 0x1AC05000)
// crc32cb Rd,Rn,Rm DR_3A 00011010110mmmmm 010100nnnnnddddd 1AC0 5000
-INST1(crc32ch, "crc32ch",0, 0, IF_DR_3A, 0x1AC05400)
+INST1(crc32ch, "crc32ch", 0, IF_DR_3A, 0x1AC05400)
// crc32ch Rd,Rn,Rm DR_3A 00011010110mmmmm 010101nnnnnddddd 1AC0 5400
-INST1(crc32cw, "crc32cw",0, 0, IF_DR_3A, 0x1AC05800)
+INST1(crc32cw, "crc32cw", 0, IF_DR_3A, 0x1AC05800)
// crc32cw Rd,Rn,Rm DR_3A 00011010110mmmmm 010110nnnnnddddd 1AC0 5800
-INST1(crc32cx, "crc32cx",0, 0, IF_DR_3A, 0x9AC05C00)
+INST1(crc32cx, "crc32cx", 0, IF_DR_3A, 0x9AC05C00)
// crc32cx Rd,Rn,Xm DR_3A 10011010110mmmmm 010111nnnnnddddd 9AC0 5C00
-INST1(sha1c, "sha1c", 0, 0, IF_DV_3F, 0x5E000000)
+INST1(sha1c, "sha1c", 0, IF_DV_3F, 0x5E000000)
// sha1c Qd, Sn Vm.4S DV_3F 01011110000mmmmm 000000nnnnnddddd 5E00 0000 Qd Sn Vm.4S (vector)
-INST1(sha1m, "sha1m", 0, 0, IF_DV_3F, 0x5E002000)
+INST1(sha1m, "sha1m", 0, IF_DV_3F, 0x5E002000)
// sha1m Qd, Sn Vm.4S DV_3F 01011110000mmmmm 001000nnnnnddddd 5E00 0000 Qd Sn Vm.4S (vector)
-INST1(sha1p, "sha1p", 0, 0, IF_DV_3F, 0x5E001000)
+INST1(sha1p, "sha1p", 0, IF_DV_3F, 0x5E001000)
// sha1m Qd, Sn Vm.4S DV_3F 01011110000mmmmm 000100nnnnnddddd 5E00 0000 Qd Sn Vm.4S (vector)
-INST1(sha1h, "sha1h", 0, 0, IF_DV_2U, 0x5E280800)
+INST1(sha1h, "sha1h", 0, IF_DV_2U, 0x5E280800)
// sha1h Sd, Sn DV_2U 0101111000101000 000010nnnnnddddd 5E28 0800 Sn Sn
-INST1(sha1su0, "sha1su0", 0, 0, IF_DV_3F, 0x5E003000)
- // sha1su0 Vd.4S,Vn.4S,Vm.4S DV_3F 01011110000mmmmm 001100nnnnnddddd 5E00 3000 Vd.4S Vn.4S Vm.4S (vector)
+INST1(sha1su0, "sha1su0", 0, IF_DV_3F, 0x5E003000)
+ // sha1su0 Vd.4S,Vn.4S,Vm.4S DV_3F 01011110000mmmmm 001100nnnnnddddd 5E00 3000 Vd.4S Vn.4S Vm.4S (vector)
-INST1(sha1su1, "sha1su1", 0, 0, IF_DV_2P, 0x5E281800)
+INST1(sha1su1, "sha1su1", 0, IF_DV_2P, 0x5E281800)
// sha1su1 Vd.4S, Vn.4S DV_2P 0101111000101000 000110nnnnnddddd 5E28 1800 Vd.4S Vn.4S (vector)
-INST1(sha256h, "sha256h", 0, 0, IF_DV_3F, 0x5E004000)
- // sha256h Qd,Qn,Vm.4S DV_3F 01011110000mmmmm 010000nnnnnddddd 5E00 4000 Qd Qn Vm.4S (vector)
+INST1(sha256h, "sha256h", 0, IF_DV_3F, 0x5E004000)
+ // sha256h Qd,Qn,Vm.4S DV_3F 01011110000mmmmm 010000nnnnnddddd 5E00 4000 Qd Qn Vm.4S (vector)
+
+INST1(sha256h2, "sha256h2", 0, IF_DV_3F, 0x5E005000)
+ // sha256h Qd,Qn,Vm.4S DV_3F 01011110000mmmmm 010100nnnnnddddd 5E00 5000 Qd Qn Vm.4S (vector)
-INST1(sha256h2, "sha256h2", 0, 0, IF_DV_3F, 0x5E005000)
- // sha256h Qd,Qn,Vm.4S DV_3F 01011110000mmmmm 010100nnnnnddddd 5E00 5000 Qd Qn Vm.4S (vector)
+INST1(sha256su0, "sha256su0", 0, IF_DV_2P, 0x5E282800)
+ // sha256su0 Vd.4S,Vn.4S DV_2P 0101111000101000 001010nnnnnddddd 5E28 2800 Vd.4S Vn.4S (vector)
-INST1(sha256su0, "sha256su0", 0, 0, IF_DV_2P, 0x5E282800)
- // sha256su0 Vd.4S,Vn.4S DV_2P 0101111000101000 001010nnnnnddddd 5E28 2800 Vd.4S Vn.4S (vector)
+INST1(sha256su1, "sha256su1", 0, IF_DV_3F, 0x5E006000)
+ // sha256su1 Vd.4S,Vn.4S,Vm.4S DV_3F 01011110000mmmmm 011000nnnnnddddd 5E00 6000 Vd.4S Vn.4S Vm.4S (vector)
-INST1(sha256su1, "sha256su1", 0, 0, IF_DV_3F, 0x5E006000)
- // sha256su1 Vd.4S,Vn.4S,Vm.4S DV_3F 01011110000mmmmm 011000nnnnnddddd 5E00 6000 Vd.4S Vn.4S Vm.4S (vector)
+INST1(ext, "ext", 0, IF_DV_3G, 0x2E000000)
+ // ext Vd,Vn,Vm,index DV_3G 0Q101110000mmmmm 0iiii0nnnnnddddd 2E00 0000 Vd Vn Vm index (vector)
-INST1(sbfm, "sbfm", 0, 0, IF_DI_2D, 0x13000000)
+INST1(sbfm, "sbfm", 0, IF_DI_2D, 0x13000000)
// sbfm Rd,Rn,imr,ims DI_2D X00100110Nrrrrrr ssssssnnnnnddddd 1300 0000 imr, ims
-INST1(bfm, "bfm", 0, 0, IF_DI_2D, 0x33000000)
+INST1(bfm, "bfm", 0, IF_DI_2D, 0x33000000)
// bfm Rd,Rn,imr,ims DI_2D X01100110Nrrrrrr ssssssnnnnnddddd 3300 0000 imr, ims
-INST1(ubfm, "ubfm", 0, 0, IF_DI_2D, 0x53000000)
+INST1(ubfm, "ubfm", 0, IF_DI_2D, 0x53000000)
// ubfm Rd,Rn,imr,ims DI_2D X10100110Nrrrrrr ssssssnnnnnddddd 5300 0000 imr, ims
-INST1(sbfiz, "sbfiz", 0, 0, IF_DI_2D, 0x13000000)
+INST1(sbfiz, "sbfiz", 0, IF_DI_2D, 0x13000000)
// sbfiz Rd,Rn,lsb,width DI_2D X00100110Nrrrrrr ssssssnnnnnddddd 1300 0000 imr, ims
-INST1(bfi, "bfi", 0, 0, IF_DI_2D, 0x33000000)
+INST1(bfi, "bfi", 0, IF_DI_2D, 0x33000000)
// bfi Rd,Rn,lsb,width DI_2D X01100110Nrrrrrr ssssssnnnnnddddd 3300 0000 imr, ims
-INST1(ubfiz, "ubfiz", 0, 0, IF_DI_2D, 0x53000000)
+INST1(ubfiz, "ubfiz", 0, IF_DI_2D, 0x53000000)
// ubfiz Rd,Rn,lsb,width DI_2D X10100110Nrrrrrr ssssssnnnnnddddd 5300 0000 imr, ims
-INST1(sbfx, "sbfx", 0, 0, IF_DI_2D, 0x13000000)
+INST1(sbfx, "sbfx", 0, IF_DI_2D, 0x13000000)
// sbfx Rd,Rn,lsb,width DI_2D X00100110Nrrrrrr ssssssnnnnnddddd 1300 0000 imr, ims
-INST1(bfxil, "bfxil", 0, 0, IF_DI_2D, 0x33000000)
+INST1(bfxil, "bfxil", 0, IF_DI_2D, 0x33000000)
// bfxil Rd,Rn,lsb,width DI_2D X01100110Nrrrrrr ssssssnnnnnddddd 3300 0000 imr, ims
-INST1(ubfx, "ubfx", 0, 0, IF_DI_2D, 0x53000000)
+INST1(ubfx, "ubfx", 0, IF_DI_2D, 0x53000000)
// ubfx Rd,Rn,lsb,width DI_2D X10100110Nrrrrrr ssssssnnnnnddddd 5300 0000 imr, ims
-INST1(sxtb, "sxtb", 0, 0, IF_DR_2H, 0x13001C00)
+INST1(sxtb, "sxtb", 0, IF_DR_2H, 0x13001C00)
// sxtb Rd,Rn DR_2H X00100110X000000 000111nnnnnddddd 1300 1C00
-INST1(sxth, "sxth", 0, 0, IF_DR_2H, 0x13003C00)
+INST1(sxth, "sxth", 0, IF_DR_2H, 0x13003C00)
// sxth Rd,Rn DR_2H X00100110X000000 001111nnnnnddddd 1300 3C00
-INST1(sxtw, "sxtw", 0, 0, IF_DR_2H, 0x13007C00)
+INST1(sxtw, "sxtw", 0, IF_DR_2H, 0x13007C00)
// sxtw Rd,Rn DR_2H X00100110X000000 011111nnnnnddddd 1300 7C00
-INST1(uxtb, "uxtb", 0, 0, IF_DR_2H, 0x53001C00)
+INST1(uxtb, "uxtb", 0, IF_DR_2H, 0x53001C00)
// uxtb Rd,Rn DR_2H 0101001100000000 000111nnnnnddddd 5300 1C00
-INST1(uxth, "uxth", 0, 0, IF_DR_2H, 0x53003C00)
+INST1(uxth, "uxth", 0, IF_DR_2H, 0x53003C00)
// uxth Rd,Rn DR_2H 0101001100000000 001111nnnnnddddd 5300 3C00
-INST1(nop, "nop", 0, 0, IF_SN_0A, 0xD503201F)
+INST1(nop, "nop", 0, IF_SN_0A, 0xD503201F)
// nop SN_0A 1101010100000011 0010000000011111 D503 201F
-INST1(bkpt, "bkpt", 0, 0, IF_SN_0A, 0xD43E0000)
+INST1(bkpt, "bkpt", 0, IF_SN_0A, 0xD43E0000)
// brpt SN_0A 1101010000111110 0000000000000000 D43E 0000 0xF000
-INST1(brk, "brk", 0, 0, IF_SI_0A, 0xD4200000)
+INST1(brk, "brk", 0, IF_SI_0A, 0xD4200000)
// brk imm16 SI_0A 11010100001iiiii iiiiiiiiiii00000 D420 0000 imm16
-INST1(dsb, "dsb", 0, 0, IF_SI_0B, 0xD503309F)
+INST1(dsb, "dsb", 0, IF_SI_0B, 0xD503309F)
// dsb barrierKind SI_0B 1101010100000011 0011bbbb10011111 D503 309F imm4 - barrier kind
-INST1(dmb, "dmb", 0, 0, IF_SI_0B, 0xD50330BF)
+INST1(dmb, "dmb", 0, IF_SI_0B, 0xD50330BF)
// dmb barrierKind SI_0B 1101010100000011 0011bbbb10111111 D503 30BF imm4 - barrier kind
-INST1(isb, "isb", 0, 0, IF_SI_0B, 0xD50330DF)
+INST1(isb, "isb", 0, IF_SI_0B, 0xD50330DF)
// isb barrierKind SI_0B 1101010100000011 0011bbbb11011111 D503 30DF imm4 - barrier kind
-INST1(umov, "umov", 0, 0, IF_DV_2B, 0x0E003C00)
+INST1(umov, "umov", 0, IF_DV_2B, 0x0E003C00)
// umov Rd,Vn[] DV_2B 0Q001110000iiiii 001111nnnnnddddd 0E00 3C00 Rd,Vn[]
-INST1(smov, "smov", 0, 0, IF_DV_2B, 0x0E002C00)
+INST1(smov, "smov", 0, IF_DV_2B, 0x0E002C00)
// smov Rd,Vn[] DV_2B 0Q001110000iiiii 001011nnnnnddddd 0E00 3C00 Rd,Vn[]
-INST1(movi, "movi", 0, 0, IF_DV_1B, 0x0F000400)
+INST1(movi, "movi", 0, IF_DV_1B, 0x0F000400)
// movi Vd,imm8 DV_1B 0QX0111100000iii cmod01iiiiiddddd 0F00 0400 Vd imm8 (immediate vector)
-INST1(mvni, "mvni", 0, 0, IF_DV_1B, 0x2F000400)
+INST1(mvni, "mvni", 0, IF_DV_1B, 0x2F000400)
// mvni Vd,imm8 DV_1B 0Q10111100000iii cmod01iiiiiddddd 2F00 0400 Vd imm8 (immediate vector)
-INST1(urecpe, "urecpe", 0, 0, IF_DV_2A, 0x0EA1C800)
- // C7.2.372 URECPE
+INST1(urecpe, "urecpe", 0, IF_DV_2A, 0x0EA1C800)
// urecpe Vd,Vn DV_2A 0Q0011101X100001 110010nnnnnddddd 0EA1 C800 Vd,Vn (vector)
-INST1(ursqrte, "ursqrte",0, 0, IF_DV_2A, 0x2EA1C800)
- // C7.2.376 URSQRTE
+INST1(ursqrte, "ursqrte", 0, IF_DV_2A, 0x2EA1C800)
// ursqrte Vd,Vn DV_2A 0Q1011101X100001 110010nnnnnddddd 2EA1 C800 Vd,Vn (vector)
-INST1(bsl, "bsl", 0, 0, IF_DV_3C, 0x2E601C00)
+INST1(bsl, "bsl", 0, IF_DV_3C, 0x2E601C00)
// bsl Vd,Vn,Vm DV_3C 0Q101110011mmmmm 000111nnnnnddddd 2E60 1C00 Vd,Vn,Vm
-INST1(bit, "bit", 0, 0, IF_DV_3C, 0x2EA01C00)
+INST1(bit, "bit", 0, IF_DV_3C, 0x2EA01C00)
// bit Vd,Vn,Vm DV_3C 0Q101110101mmmmm 000111nnnnnddddd 2EA0 1C00 Vd,Vn,Vm
-INST1(bif, "bif", 0, 0, IF_DV_3C, 0x2EE01C00)
+INST1(bif, "bif", 0, IF_DV_3C, 0x2EE01C00)
// bif Vd,Vn,Vm DV_3C 0Q101110111mmmmm 000111nnnnnddddd 2EE0 1C00 Vd,Vn,Vm
-INST1(addv, "addv", 0, 0, IF_DV_2T, 0x0E31B800)
+INST1(addv, "addv", 0, IF_DV_2T, 0x0E31B800)
// addv Vd,Vn DV_2T 0Q001110XX110001 101110nnnnnddddd 0E31 B800 Vd,Vn (vector)
-INST1(cnt, "cnt", 0, 0, IF_DV_2M, 0x0E205800)
+INST1(cnt, "cnt", 0, IF_DV_2M, 0x0E205800)
// cnt Vd,Vn DV_2M 0Q00111000100000 010110nnnnnddddd 0E20 5800 Vd,Vn (vector)
-INST1(not, "not", 0, 0, IF_DV_2M, 0x2E205800)
+INST1(not, "not", 0, IF_DV_2M, 0x2E205800)
// not Vd,Vn DV_2M 0Q10111000100000 010110nnnnnddddd 2E20 5800 Vd,Vn (vector)
-INST1(saddlv, "saddlv", 0, 0, IF_DV_2T, 0x0E303800)
+INST1(saddlv, "saddlv", 0, IF_DV_2T, 0x0E303800)
// saddlv Vd,Vn DV_2T 0Q001110XX110000 001110nnnnnddddd 0E30 3800 Vd,Vn (vector)
-INST1(smaxv, "smaxv", 0, 0, IF_DV_2T, 0x0E30A800)
+INST1(smaxv, "smaxv", 0, IF_DV_2T, 0x0E30A800)
// smaxv Vd,Vn DV_2T 0Q001110XX110000 101010nnnnnddddd 0E30 A800 Vd,Vn (vector)
-INST1(sminv, "sminv", 0, 0, IF_DV_2T, 0x0E31A800)
+INST1(sminv, "sminv", 0, IF_DV_2T, 0x0E31A800)
// sminv Vd,Vn DV_2T 0Q001110XX110001 101010nnnnnddddd 0E31 A800 Vd,Vn (vector)
-INST1(uaddlv, "uaddlv", 0, 0, IF_DV_2T, 0x2E303800)
+INST1(uaddlv, "uaddlv", 0, IF_DV_2T, 0x2E303800)
// uaddlv Vd,Vn DV_2T 0Q101110XX110000 001110nnnnnddddd 2E30 3800 Vd,Vn (vector)
-INST1(umaxv, "umaxv", 0, 0, IF_DV_2T, 0x2E30A800)
+INST1(umaxv, "umaxv", 0, IF_DV_2T, 0x2E30A800)
// umaxv Vd,Vn DV_2T 0Q101110XX110000 101010nnnnnddddd 2E30 A800 Vd,Vn (vector)
-INST1(uminv, "uminv", 0, 0, IF_DV_2T, 0x2E31A800)
+INST1(uminv, "uminv", 0, IF_DV_2T, 0x2E31A800)
// uminv Vd,Vn DV_2T 0Q101110XX110001 101010nnnnnddddd 2E31 A800 Vd,Vn (vector)
-INST1(fmaxnmv, "fmaxnmv",0, 0, IF_DV_2R, 0x2E30C800)
+INST1(fmaxnmv, "fmaxnmv", 0, IF_DV_2R, 0x2E30C800)
// fmaxnmv Vd,Vn DV_2R 0Q1011100X110000 110010nnnnnddddd 2E30 C800 Vd,Vn (vector)
-INST1(fmaxv, "fmaxv", 0, 0, IF_DV_2R, 0x2E30F800)
+INST1(fmaxv, "fmaxv", 0, IF_DV_2R, 0x2E30F800)
// fmaxv Vd,Vn DV_2R 0Q1011100X110000 111110nnnnnddddd 2E30 F800 Vd,Vn (vector)
-INST1(fminnmv, "fminnmv",0, 0, IF_DV_2R, 0x2EB0C800)
+INST1(fminnmv, "fminnmv", 0, IF_DV_2R, 0x2EB0C800)
// fminnmv Vd,Vn DV_2R 0Q1011101X110000 110010nnnnnddddd 2EB0 C800 Vd,Vn (vector)
-INST1(fminv, "fminv", 0, 0, IF_DV_2R, 0x2EB0F800)
+INST1(fminv, "fminv", 0, IF_DV_2R, 0x2EB0F800)
// fminv Vd,Vn DV_2R 0Q1011101X110000 111110nnnnnddddd 2EB0 F800 Vd,Vn (vector)
-INST1(uzp1, "uzp1", 0, 0, IF_DV_3A, 0x0E001800)
+INST1(uzp1, "uzp1", 0, IF_DV_3A, 0x0E001800)
// uzp1 Vd,Vn,Vm DV_3A 0Q001110XX0mmmmm 000110nnnnnddddd 0E00 1800 Vd,Vn,Vm (vector)
-INST1(uzp2, "uzp2", 0, 0, IF_DV_3A, 0x0E005800)
+INST1(uzp2, "uzp2", 0, IF_DV_3A, 0x0E005800)
// upz2 Vd,Vn,Vm DV_3A 0Q001110XX0mmmmm 010110nnnnnddddd 0E00 5800 Vd,Vn,Vm (vector)
-INST1(zip1, "zip1", 0, 0, IF_DV_3A, 0x0E003800)
+INST1(zip1, "zip1", 0, IF_DV_3A, 0x0E003800)
// zip1 Vd,Vn,Vm DV_3A 0Q001110XX0mmmmm 011110nnnnnddddd 0E00 3800 Vd,Vn,Vm (vector)
-INST1(zip2, "zip2", 0, 0, IF_DV_3A, 0x0E007800)
+INST1(zip2, "zip2", 0, IF_DV_3A, 0x0E007800)
// zip2 Vd,Vn,Vm DV_3A 0Q001110XX0mmmmm 001110nnnnnddddd 0E00 7800 Vd,Vn,Vm (vector)
-INST1(trn1, "trn1", 0, 0, IF_DV_3A, 0x0E002800)
+INST1(trn1, "trn1", 0, IF_DV_3A, 0x0E002800)
// trn1 Vd,Vn,Vm DV_3A 0Q001110XX0mmmmm 001010nnnnnddddd 0E00 2800 Vd,Vn,Vm (vector)
-INST1(trn2, "trn2", 0, 0, IF_DV_3A, 0x0E006800)
+INST1(trn2, "trn2", 0, IF_DV_3A, 0x0E006800)
// trn2 Vd,Vn,Vm DV_3A 0Q001110XX0mmmmm 011010nnnnnddddd 0E00 6800 Vd,Vn,Vm (vector)
-INST1(xtn, "xtn", 0, 0, IF_DV_2M, 0x0E212800)
+INST1(xtn, "xtn", 0, IF_DV_2M, 0x0E212800)
// xtn Vd,Vn DV_2M 00101110XX110000 001110nnnnnddddd 0E21 2800 Vd,Vn (vector)
-INST1(xtn2, "xtn2", 0, 0, IF_DV_2M, 0x4E212800)
+INST1(xtn2, "xtn2", 0, IF_DV_2M, 0x4E212800)
// xtn2 Vd,Vn DV_2M 01101110XX110000 001110nnnnnddddd 4E21 2800 Vd,Vn (vector)
-INST1(fnmul, "fnmul", 0, 0, IF_DV_3D, 0x1E208800)
+INST1(fnmul, "fnmul", 0, IF_DV_3D, 0x1E208800)
// fnmul Vd,Vn,Vm DV_3D 000111100X1mmmmm 100010nnnnnddddd 1E20 8800 Vd,Vn,Vm (scalar)
-INST1(fmadd, "fmadd", 0, 0, IF_DV_4A, 0x1F000000)
+INST1(fmadd, "fmadd", 0, IF_DV_4A, 0x1F000000)
// fmadd Vd,Va,Vn,Vm DV_4A 000111110X0mmmmm 0aaaaannnnnddddd 1F00 0000 Vd Vn Vm Va (scalar)
-INST1(fmsub, "fmsub", 0, 0, IF_DV_4A, 0x1F008000)
+INST1(fmsub, "fmsub", 0, IF_DV_4A, 0x1F008000)
// fmsub Vd,Va,Vn,Vm DV_4A 000111110X0mmmmm 1aaaaannnnnddddd 1F00 8000 Vd Vn Vm Va (scalar)
-INST1(fnmadd, "fnmadd", 0, 0, IF_DV_4A, 0x1F200000)
+INST1(fnmadd, "fnmadd", 0, IF_DV_4A, 0x1F200000)
// fnmadd Vd,Va,Vn,Vm DV_4A 000111110X1mmmmm 0aaaaannnnnddddd 1F20 0000 Vd Vn Vm Va (scalar)
-INST1(fnmsub, "fnmsub", 0, 0, IF_DV_4A, 0x1F208000)
+INST1(fnmsub, "fnmsub", 0, IF_DV_4A, 0x1F208000)
// fnmsub Vd,Va,Vn,Vm DV_4A 000111110X1mmmmm 1aaaaannnnnddddd 1F20 8000 Vd Vn Vm Va (scalar)
-INST1(fcvt, "fcvt", 0, 0, IF_DV_2J, 0x1E224000)
+INST1(fcvt, "fcvt", 0, IF_DV_2J, 0x1E224000)
// fcvt Vd,Vn DV_2J 00011110SS10001D D10000nnnnnddddd 1E22 4000 Vd,Vn
-INST1(pmul, "pmul", 0, 0, IF_DV_3A, 0x2E209C00)
+INST1(pmul, "pmul", 0, IF_DV_3A, 0x2E209C00)
// pmul Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 100111nnnnnddddd 2E20 9C00 Vd,Vn,Vm (vector)
-INST1(saba, "saba", 0, 0, IF_DV_3A, 0x0E207C00)
+INST1(saba, "saba", 0, IF_DV_3A, 0x0E207C00)
// saba Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 011111nnnnnddddd 0E20 7C00 Vd,Vn,Vm (vector)
-INST1(sabd, "sabd", 0, 0, IF_DV_3A, 0x0E207400)
+INST1(sabd, "sabd", 0, IF_DV_3A, 0x0E207400)
// sabd Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 011101nnnnnddddd 0E20 7400 Vd,Vn,Vm (vector)
-INST1(smax, "smax", 0, 0, IF_DV_3A, 0x0E206400)
+INST1(smax, "smax", 0, IF_DV_3A, 0x0E206400)
// smax Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 011001nnnnnddddd 0E20 6400 Vd,Vn,Vm (vector)
-INST1(smaxp, "smaxp", 0, 0, IF_DV_3A, 0x0E20A400)
+INST1(smaxp, "smaxp", 0, IF_DV_3A, 0x0E20A400)
// smaxp Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 101001nnnnnddddd 0E20 A400 Vd,Vn,Vm (vector)
-INST1(smin, "smin", 0, 0, IF_DV_3A, 0x0E206C00)
+INST1(smin, "smin", 0, IF_DV_3A, 0x0E206C00)
// smax Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 011011nnnnnddddd 0E20 6C00 Vd,Vn,Vm (vector)
-INST1(sminp, "sminp", 0, 0, IF_DV_3A, 0x0E20AC00)
+INST1(sminp, "sminp", 0, IF_DV_3A, 0x0E20AC00)
// smax Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 101011nnnnnddddd 0E20 AC00 Vd,Vn,Vm (vector)
-INST1(uaba, "uaba", 0, 0, IF_DV_3A, 0x2E207C00)
+INST1(uaba, "uaba", 0, IF_DV_3A, 0x2E207C00)
// uaba Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 011111nnnnnddddd 2E20 7C00 Vd,Vn,Vm (vector)
-INST1(uabd, "uabd", 0, 0, IF_DV_3A, 0x2E207400)
+INST1(uabd, "uabd", 0, IF_DV_3A, 0x2E207400)
// uabd Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 011101nnnnnddddd 2E20 7400 Vd,Vn,Vm (vector)
-INST1(umax, "umax", 0, 0, IF_DV_3A, 0x2E206400)
+INST1(umax, "umax", 0, IF_DV_3A, 0x2E206400)
// umax Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 011001nnnnnddddd 2E20 6400 Vd,Vn,Vm (vector)
-INST1(umaxp, "umaxp", 0, 0, IF_DV_3A, 0x2E20A400)
+INST1(umaxp, "umaxp", 0, IF_DV_3A, 0x2E20A400)
// umaxp Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 101001nnnnnddddd 2E20 A400 Vd,Vn,Vm (vector)
-INST1(umin, "umin", 0, 0, IF_DV_3A, 0x2E206C00)
+INST1(umin, "umin", 0, IF_DV_3A, 0x2E206C00)
// umin Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 011011nnnnnddddd 2E20 6C00 Vd,Vn,Vm (vector)
-INST1(uminp, "uminp", 0, 0, IF_DV_3A, 0x2E20AC00)
+INST1(uminp, "uminp", 0, IF_DV_3A, 0x2E20AC00)
// umin Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 101011nnnnnddddd 2E20 AC00 Vd,Vn,Vm (vector)
-INST1(fcvtl, "fcvtl", 0, 0, IF_DV_2G, 0x0E217800)
- // fcvtl Vd,Vn DV_2G 000011100X100001 011110nnnnnddddd 0E21 7800 Vd,Vn (scalar)
+INST1(fcvtl, "fcvtl", 0, IF_DV_2A, 0x0E217800)
+ // fcvtl Vd,Vn DV_2A 000011100X100001 011110nnnnnddddd 0E21 7800 Vd,Vn (vector)
-INST1(fcvtl2, "fcvtl2", 0, 0, IF_DV_2G, 0x4E217800)
- // fcvtl2 Vd,Vn DV_2G 040011100X100001 011110nnnnnddddd 4E21 7800 Vd,Vn (scalar)
+INST1(fcvtl2, "fcvtl2", 0, IF_DV_2A, 0x4E217800)
+ // fcvtl2 Vd,Vn DV_2A 040011100X100001 011110nnnnnddddd 4E21 7800 Vd,Vn (vector)
-INST1(fcvtn, "fcvtn", 0, 0, IF_DV_2G, 0x0E216800)
- // fcvtn Vd,Vn DV_2G 000011100X100001 011010nnnnnddddd 0E21 6800 Vd,Vn (scalar)
+INST1(fcvtn, "fcvtn", 0, IF_DV_2A, 0x0E216800)
+ // fcvtn Vd,Vn DV_2A 000011100X100001 011010nnnnnddddd 0E21 6800 Vd,Vn (vector)
-INST1(fcvtn2, "fcvtn2", 0, 0, IF_DV_2G, 0x4E216800)
- // fcvtn2 Vd,Vn DV_2G 040011100X100001 011010nnnnnddddd 4E21 6800 Vd,Vn (scalar)
+INST1(fcvtn2, "fcvtn2", 0, IF_DV_2A, 0x4E216800)
+ // fcvtn2 Vd,Vn DV_2A 040011100X100001 011010nnnnnddddd 4E21 6800 Vd,Vn (vector)
-INST1(frecpx, "frecpx", 0, 0, IF_DV_2G, 0x5EA1F800)
- // C7.2.139 FRECPX
+INST1(frecpx, "frecpx", 0, IF_DV_2G, 0x5EA1F800)
// frecpx Vd,Vn DV_2G 010111101X100001 111110nnnnnddddd 5EA1 F800 Vd,Vn (scalar)
-INST1(shll, "shll", 0, 0, IF_DV_2M, 0x2F00A400)
+INST1(addhn, "addhn", 0, IF_DV_3H, 0x0E204000)
+ // addhn Vd,Vn,Vm DV_3H 00001110XX1mmmmm 010000nnnnnddddd 0E20 4000 Vd,Vn,Vm (vector)
+
+INST1(addhn2, "addhn2", 0, IF_DV_3H, 0x4E204000)
+ // addhn2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 010000nnnnnddddd 4E20 4000 Vd,Vn,Vm (vector)
+
+INST1(pmull, "pmull", 0, IF_DV_3H, 0x0E20E000)
+ // pmull Vd,Vn,Vm DV_3H 00001110XX1mmmmm 111000nnnnnddddd 0E20 E000 Vd,Vn,Vm (vector)
+
+INST1(pmull2, "pmull2", 0, IF_DV_3H, 0x4E20E000)
+ // pmull2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 111000nnnnnddddd 4E20 E000 Vd,Vn,Vm (vector)
+
+INST1(raddhn, "raddhn", 0, IF_DV_3H, 0x2E204000)
+ // raddhn Vd,Vn,Vm DV_3H 00101110XX1mmmmm 010000nnnnnddddd 2E20 4000 Vd,Vn,Vm (vector)
+
+INST1(raddhn2, "raddhn2", 0, IF_DV_3H, 0x6E204000)
+ // raddhn2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 010000nnnnnddddd 6E20 4000 Vd,Vn,Vm (vector)
+
+INST1(rsubhn, "rsubhn", 0, IF_DV_3H, 0x2E206000)
+ // rsubhn Vd,Vn,Vm DV_3H 00101110XX1mmmmm 011000nnnnnddddd 2E20 6000 Vd,Vn,Vm (vector)
+
+INST1(rsubhn2, "rsubhn2", 0, IF_DV_3H, 0x6E206000)
+ // rsubhn2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 011000nnnnnddddd 6E20 6000 Vd,Vn,Vm (vector)
+
+INST1(sabal, "sabal", 0, IF_DV_3H, 0x0E205000)
+ // sabal Vd,Vn,Vm DV_3H 00001110XX1mmmmm 010100nnnnnddddd 0E20 5000 Vd,Vn,Vm (vector)
+
+INST1(sabal2, "sabal2", 0, IF_DV_3H, 0x4E205000)
+ // sabal2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 010100nnnnnddddd 4E20 5000 Vd,Vn,Vm (vector)
+
+INST1(sabdl, "sabdl", 0, IF_DV_3H, 0x0E207000)
+ // sabdl Vd,Vn,Vm DV_3H 00001110XX1mmmmm 011100nnnnnddddd 0E20 7000 Vd,Vn,Vm (vector)
+
+INST1(sabdl2, "sabdl2", 0, IF_DV_3H, 0x4E207000)
+ // sabdl2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 011100nnnnnddddd 4E20 7000 Vd,Vn,Vm (vector)
+
+INST1(sadalp, "sadalp", 0, IF_DV_2T, 0x0E206800)
+ // sadalp Vd,Vn DV_2T 0Q001110XX100000 011010nnnnnddddd 0E20 6800 Vd,Vn (vector)
+
+INST1(saddl, "saddl", 0, IF_DV_3H, 0x0E200000)
+ // saddl Vd,Vn,Vm DV_3H 00001110XX1mmmmm 000000nnnnnddddd 0E20 0000 Vd,Vn,Vm (vector)
+
+INST1(saddl2, "saddl2", 0, IF_DV_3H, 0x4E200000)
+ // saddl2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 000000nnnnnddddd 4E20 0000 Vd,Vn,Vm (vector)
+
+INST1(saddlp, "saddlp", 0, IF_DV_2T, 0x0E202800)
+ // saddlp Vd,Vn DV_2T 0Q001110XX100000 001010nnnnnddddd 0E20 2800 Vd,Vn (vector)
+
+INST1(saddw, "saddw", 0, IF_DV_3H, 0x0E201000)
+ // saddw Vd,Vn,Vm DV_3H 00001110XX1mmmmm 000100nnnnnddddd 0E20 1000 Vd,Vn,Vm (vector)
+
+INST1(saddw2, "saddw2", 0, IF_DV_3H, 0x4E201000)
+ // saddw2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 000100nnnnnddddd 4E20 1000 Vd,Vn,Vm (vector)
+
+INST1(shadd, "shadd", 0, IF_DV_3A, 0x0E200400)
+ // shadd Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 000001nnnnnddddd 0E20 0400 Vd,Vn,Vm (vector)
+
+INST1(shsub, "shsub", 0, IF_DV_3A, 0x0E202400)
+ // shsub Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 001001nnnnnddddd 0E20 2400 Vd,Vn,Vm (vector)
+
+INST1(srhadd, "srhadd", 0, IF_DV_3A, 0x0E201400)
+ // srhadd Vd,Vn,Vm DV_3A 0Q001110XX1mmmmm 000101nnnnnddddd 0E20 1400 Vd,Vn,Vm (vector)
+
+INST1(ssubl, "ssubl", 0, IF_DV_3H, 0x0E202000)
+ // ssubl Vd,Vn,Vm DV_3H 00001110XX1mmmmm 001000nnnnnddddd 0E20 2000 Vd,Vn,Vm (vector)
+
+INST1(ssubl2, "ssubl2", 0, IF_DV_3H, 0x4E202000)
+ // ssubl2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 001000nnnnnddddd 4E20 2000 Vd,Vn,Vm (vector)
+
+INST1(ssubw, "ssubw", 0, IF_DV_3H, 0x0E203000)
+ // ssubw Vd,Vn,Vm DV_3H 00001110XX1mmmmm 001100nnnnnddddd 0E20 3000 Vd,Vn,Vm (vector)
+
+INST1(ssubw2, "ssubw2", 0, IF_DV_3H, 0x4E203000)
+ // ssubw2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 001100nnnnnddddd 4E20 3000 Vd,Vn,Vm (vector)
+
+INST1(subhn, "subhn", 0, IF_DV_3H, 0x0E206000)
+ // subhn Vd,Vn,Vm DV_3H 00001110XX1mmmmm 011000nnnnnddddd 0E20 6000 Vd,Vn,Vm (vector)
+
+INST1(subhn2, "subhn2", 0, IF_DV_3H, 0x4E206000)
+ // subhn2 Vd,Vn,Vm DV_3H 01001110XX1mmmmm 011000nnnnnddddd 4E20 6000 Vd,Vn,Vm (vector)
+
+INST1(uabal, "uabal", 0, IF_DV_3H, 0x2E205000)
+ // uabal Vd,Vn,Vm DV_3H 00101110XX1mmmmm 010100nnnnnddddd 2E20 5000 Vd,Vn,Vm (vector)
+
+INST1(uabal2, "uabal2", 0, IF_DV_3H, 0x6E205000)
+ // uabal2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 010100nnnnnddddd 6E20 5000 Vd,Vn,Vm (vector)
+
+INST1(uabdl, "uabdl", 0, IF_DV_3H, 0x2E207000)
+ // uabdl Vd,Vn,Vm DV_3H 00101110XX1mmmmm 011100nnnnnddddd 2E20 7000 Vd,Vn,Vm (vector)
+
+INST1(uabdl2, "uabdl2", 0, IF_DV_3H, 0x6E207000)
+ // uabdl2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 011100nnnnnddddd 6E20 7000 Vd,Vn,Vm (vector)
+
+INST1(uadalp, "uadalp", 0, IF_DV_2T, 0x2E206800)
+ // uadalp Vd,Vn DV_2T 0Q101110XX100000 011010nnnnnddddd 2E20 6800 Vd,Vn (vector)
+
+INST1(uaddl, "uaddl", 0, IF_DV_3H, 0x2E200000)
+ // uaddl Vd,Vn,Vm DV_3H 00101110XX1mmmmm 000000nnnnnddddd 2E20 0000 Vd,Vn,Vm (vector)
+
+INST1(uaddl2, "uaddl2", 0, IF_DV_3H, 0x6E200000)
+ // uaddl2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 000000nnnnnddddd 6E20 0000 Vd,Vn,Vm (vector)
+
+INST1(uaddlp, "uaddlp", 0, IF_DV_2T, 0x2E202800)
+ // uaddlp Vd,Vn DV_2T 0Q101110XX100000 001010nnnnnddddd 2E20 2800 Vd,Vn (vector)
+
+INST1(uaddw, "uaddw", 0, IF_DV_3H, 0x2E201000)
+ // uaddw Vd,Vn,Vm DV_3H 00101110XX1mmmmm 000100nnnnnddddd 2E20 1000 Vd,Vn,Vm (vector)
+
+INST1(uaddw2, "uaddw2", 0, IF_DV_3H, 0x6E201000)
+ // uaddw2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 000100nnnnnddddd 6E20 1000 Vd,Vn,Vm (vector)
+
+INST1(uhadd, "uhadd", 0, IF_DV_3A, 0x2E200400)
+ // uhadd Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 000001nnnnnddddd 2E20 0400 Vd,Vn,Vm (vector)
+
+INST1(uhsub, "uhsub", 0, IF_DV_3A, 0x2E202400)
+ // uhsub Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 001001nnnnnddddd 2E20 2400 Vd,Vn,Vm (vector)
+
+INST1(urhadd, "urhadd", 0, IF_DV_3A, 0x2E201400)
+ // urhadd Vd,Vn,Vm DV_3A 0Q101110XX1mmmmm 000101nnnnnddddd 2E20 1400 Vd,Vn,Vm (vector)
+
+INST1(usubl, "usubl", 0, IF_DV_3H, 0x2E202000)
+ // usubl Vd,Vn,Vm DV_3H 00101110XX1mmmmm 001000nnnnnddddd 2E20 2000 Vd,Vn,Vm (vector)
+
+INST1(usubl2, "usubl2", 0, IF_DV_3H, 0x6E202000)
+ // usubl2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 001000nnnnnddddd 6E20 2000 Vd,Vn,Vm (vector)
+
+INST1(usubw, "usubw", 0, IF_DV_3H, 0x2E203000)
+ // usubw Vd,Vn,Vm DV_3H 00101110XX1mmmmm 001100nnnnnddddd 2E20 3000 Vd,Vn,Vm (vector)
+
+INST1(usubw2, "usubw2", 0, IF_DV_3H, 0x6E203000)
+ // usubw2 Vd,Vn,Vm DV_3H 01101110XX1mmmmm 001100nnnnnddddd 6E20 3000 Vd,Vn,Vm (vector)
+
+INST1(shll, "shll", 0, IF_DV_2M, 0x2F00A400)
// shll Vd,Vn,imm DV_2M 0Q101110XX100001 001110nnnnnddddd 2E21 3800 Vd,Vn, {8/16/32}
-INST1(shll2, "shll2", 0, 0, IF_DV_2M, 0x6F00A400)
+INST1(shll2, "shll2", 0, IF_DV_2M, 0x6F00A400)
// shll Vd,Vn,imm DV_2M 0Q101110XX100001 001110nnnnnddddd 2E21 3800 Vd,Vn, {8/16/32}
-INST1(sshll, "sshll", 0, 0, IF_DV_2O, 0x0F00A400)
- // sshll Vd,Vn,imm DV_2O 000011110iiiiiii 101001nnnnnddddd 0F00 A400 Vd,Vn imm (shift - vector)
+INST1(sshll, "sshll", 0, IF_DV_2O, 0x0F00A400)
+ // sshll Vd,Vn,imm DV_2O 000011110iiiiiii 101001nnnnnddddd 0F00 A400 Vd,Vn imm (left shift - vector)
+
+INST1(sshll2, "sshll2", 0, IF_DV_2O, 0x4F00A400)
+ // sshll2 Vd,Vn,imm DV_2O 010011110iiiiiii 101001nnnnnddddd 4F00 A400 Vd,Vn imm (left shift - vector)
+
+INST1(ushll, "ushll", 0, IF_DV_2O, 0x2F00A400)
+ // ushll Vd,Vn,imm DV_2O 001011110iiiiiii 101001nnnnnddddd 2F00 A400 Vd,Vn imm (left shift - vector)
+
+INST1(ushll2, "ushll2", 0, IF_DV_2O, 0x6F00A400)
+ // ushll2 Vd,Vn,imm DV_2O 011011110iiiiiii 101001nnnnnddddd 6F00 A400 Vd,Vn imm (left shift - vector)
+
+INST1(shrn, "shrn", RSH, IF_DV_2O, 0x0F008400)
+ // shrn Vd,Vn,imm DV_2O 000011110iiiiiii 100001nnnnnddddd 0F00 8400 Vd,Vn imm (right shift - vector)
+
+INST1(shrn2, "shrn2", RSH, IF_DV_2O, 0x4F008400)
+ // shrn2 Vd,Vn,imm DV_2O 010011110iiiiiii 100001nnnnnddddd 4F00 8400 Vd,Vn imm (right shift - vector)
+
+INST1(rshrn, "rshrn", RSH, IF_DV_2O, 0x0F008C00)
+ // rshrn Vd,Vn,imm DV_2O 000011110iiiiiii 100011nnnnnddddd 0F00 8C00 Vd,Vn imm (right shift - vector)
+
+INST1(rshrn2, "rshrn2", RSH, IF_DV_2O, 0x4F008C00)
+ // rshrn2 Vd,Vn,imm DV_2O 010011110iiiiiii 100011nnnnnddddd 4F00 8C00 Vd,Vn imm (right shift - vector)
+
+INST1(sqrshrn2, "sqrshrn2", RSH, IF_DV_2O, 0x0F009C00)
+ // sqrshrn2 Vd,Vn,imm DV_2O 0Q0011110iiiiiii 100111nnnnnddddd 0F00 9C00 Vd Vn imm (right shift - vector)
+
+INST1(sqrshrun2, "sqrshrun2", RSH, IF_DV_2O, 0x2F008C00)
+ // sqrshrun2 Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100011nnnnnddddd 2F00 8C00 Vd Vn imm (right shift - vector)
+
+INST1(sqshrn2, "sqshrn2", RSH, IF_DV_2O, 0x0F009400)
+ // sqshrn2 Vd,Vn,imm DV_2O 0Q0011110iiiiiii 100101nnnnnddddd 0F00 9400 Vd Vn imm (right shift - vector)
+
+INST1(sqshrun2, "sqshrun2", RSH, IF_DV_2O, 0x2F008400)
+ // sqshrun2 Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100001nnnnnddddd 2F00 8400 Vd Vn imm (right shift - vector)
+
+INST1(uqrshrn2, "uqrshrn2", RSH, IF_DV_2O, 0x2F009C00)
+ // uqrshrn2 Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100111nnnnnddddd 2F00 9C00 Vd Vn imm (right shift - vector)
+
+INST1(uqshrn2, "uqshrn2", RSH, IF_DV_2O, 0x2F009400)
+ // uqshrn2 Vd,Vn,imm DV_2O 0Q1011110iiiiiii 100101nnnnnddddd 2F00 9400 Vd Vn imm (right shift - vector)
+
+INST1(sxtl, "sxtl", 0, IF_DV_2O, 0x0F00A400)
+ // sxtl Vd,Vn DV_2O 000011110iiiiiii 101001nnnnnddddd 0F00 A400 Vd,Vn (left shift - vector)
+
+INST1(sxtl2, "sxtl2", 0, IF_DV_2O, 0x4F00A400)
+ // sxtl2 Vd,Vn DV_2O 010011110iiiiiii 101001nnnnnddddd 4F00 A400 Vd,Vn (left shift - vector)
-INST1(sshll2, "sshll2", 0, 0, IF_DV_2O, 0x4F00A400)
- // sshll2 Vd,Vn,imm DV_2O 010011110iiiiiii 101001nnnnnddddd 4F00 A400 Vd,Vn imm (shift - vector)
+INST1(uxtl, "uxtl", 0, IF_DV_2O, 0x2F00A400)
+ // uxtl Vd,Vn DV_2O 001011110iiiiiii 101001nnnnnddddd 2F00 A400 Vd,Vn (left shift - vector)
-INST1(ushll, "ushll", 0, 0, IF_DV_2O, 0x2F00A400)
- // ushll Vd,Vn,imm DV_2O 001011110iiiiiii 101001nnnnnddddd 2F00 A400 Vd,Vn imm (shift - vector)
+INST1(uxtl2, "uxtl2", 0, IF_DV_2O, 0x6F00A400)
+ // uxtl2 Vd,Vn DV_2O 011011110iiiiiii 101001nnnnnddddd 6F00 A400 Vd,Vn (left shift - vector)
-INST1(ushll2, "ushll2", 0, 0, IF_DV_2O, 0x6F00A400)
- // ushll2 Vd,Vn,imm DV_2O 011011110iiiiiii 101001nnnnnddddd 6F00 A400 Vd,Vn imm (shift - vector)
+INST1(tbl, "tbl", 0, IF_DV_3C, 0x0E000000)
+ // tbl Vd,{Vn},Vm DV_3C 0Q001110000mmmmm 000000nnnnnddddd 0E00 0000 Vd,Vn,Vm (vector)
-INST1(shrn, "shrn", 0, 0, IF_DV_2O, 0x0F008400)
- // shrn Vd,Vn,imm DV_2O 000011110iiiiiii 100001nnnnnddddd 0F00 8400 Vd,Vn imm (shift - vector)
+INST1(tbl_2regs, "tbl", 0, IF_DV_3C, 0x0E002000)
+ // tbl Vd,{Vn,Vn+1},Vm DV_3C 0Q001110000mmmmm 001000nnnnnddddd 0E00 2000 Vd,Vn,Vm (vector)
-INST1(shrn2, "shrn2", 0, 0, IF_DV_2O, 0x4F008400)
- // shrn2 Vd,Vn,imm DV_2O 010011110iiiiiii 100001nnnnnddddd 4F00 8400 Vd,Vn imm (shift - vector)
+INST1(tbl_3regs, "tbl", 0, IF_DV_3C, 0x0E004000)
+ // tbl Vd,{Vn,Vn+1,Vn+2},Vm DV_3C 0Q001110000mmmmm 010000nnnnnddddd 0E00 4000 Vd,Vn,Vm (vector)
-INST1(rshrn, "rshrn", 0, 0, IF_DV_2O, 0x0F008C00)
- // rshrn Vd,Vn,imm DV_2O 000011110iiiiiii 100011nnnnnddddd 0F00 8C00 Vd,Vn imm (shift - vector)
+INST1(tbl_4regs, "tbl", 0, IF_DV_3C, 0x0E006000)
+ // tbl Vd,{Vn,Vn+1,Vn+2,Vn+3},Vm DV_3C 0Q001110000mmmmm 011000nnnnnddddd 0E00 6000 Vd,Vn,Vm (vector)
-INST1(rshrn2, "rshrn2", 0, 0, IF_DV_2O, 0x4F008C00)
- // rshrn2 Vd,Vn,imm DV_2O 010011110iiiiiii 100011nnnnnddddd 4F00 8C00 Vd,Vn imm (shift - vector)
+INST1(tbx, "tbx", 0, IF_DV_3C, 0x0E001000)
+ // tbx Vd,{Vn},Vm DV_3C 0Q001110000mmmmm 000100nnnnnddddd 0E00 1000 Vd,Vn,Vm (vector)
-INST1(sxtl, "sxtl", 0, 0, IF_DV_2O, 0x0F00A400)
- // sxtl Vd,Vn DV_2O 000011110iiiiiii 101001nnnnnddddd 0F00 A400 Vd,Vn (shift - vector)
+INST1(tbx_2regs, "tbx", 0, IF_DV_3C, 0x0E003000)
+ // tbx Vd,{Vn,Vn+1},Vm DV_3C 0Q001110000mmmmm 001100nnnnnddddd 0E00 3000 Vd,Vn,Vm (vector)
-INST1(sxtl2, "sxtl2", 0, 0, IF_DV_2O, 0x4F00A400)
- // sxtl2 Vd,Vn DV_2O 010011110iiiiiii 101001nnnnnddddd 4F00 A400 Vd,Vn (shift - vector)
+INST1(tbx_3regs, "tbx", 0, IF_DV_3C, 0x0E005000)
+ // tbx Vd,{Vn,Vn+1,Vn+2},Vm DV_3C 0Q001110000mmmmm 010100nnnnnddddd 0E00 5000 Vd,Vn,Vm (vector)
-INST1(uxtl, "uxtl", 0, 0, IF_DV_2O, 0x2F00A400)
- // uxtl Vd,Vn DV_2O 001011110iiiiiii 101001nnnnnddddd 2F00 A400 Vd,Vn (shift - vector)
+INST1(tbx_4regs, "tbx", 0, IF_DV_3C, 0x0E007000)
+ // tbx Vd,{Vn,Vn+1,Vn+2,Vn+3},Vm DV_3C 0Q001110000mmmmm 011100nnnnnddddd 0E00 7000 Vd,Vn,Vm (vector)
-INST1(uxtl2, "uxtl2", 0, 0, IF_DV_2O, 0x6F00A400)
- // uxtl2 Vd,Vn DV_2O 011011110iiiiiii 101001nnnnnddddd 6F00 A400 Vd,Vn (shift - vector)
// clang-format on
/*****************************************************************************/
diff --git a/src/coreclr/src/jit/instrsxarch.h b/src/coreclr/src/jit/instrsxarch.h
index 986ce9ab450c13..cbb56aa04c434f 100644
--- a/src/coreclr/src/jit/instrsxarch.h
+++ b/src/coreclr/src/jit/instrsxarch.h
@@ -87,6 +87,9 @@ INST4(lea, "lea", IUM_WR, BAD_CODE, BAD_CODE,
// and the registers need to be reversed to get the correct encoding.
INST3(bt, "bt", IUM_RD, 0x0F00A3, BAD_CODE, 0x0F00A3, INS_FLAGS_WritesFlags)
+INST3(bsf, "bsf", IUM_WR, BAD_CODE, BAD_CODE, 0x0F00BC, INS_FLAGS_WritesFlags)
+INST3(bsr, "bsr", IUM_WR, BAD_CODE, BAD_CODE, 0x0F00BD, INS_FLAGS_WritesFlags)
+
INST3(movsx, "movsx", IUM_WR, BAD_CODE, BAD_CODE, 0x0F00BE, INS_FLAGS_None)
#ifdef TARGET_AMD64
INST3(movsxd, "movsxd", IUM_WR, BAD_CODE, BAD_CODE, 0x4800000063, INS_FLAGS_None)
diff --git a/src/coreclr/src/jit/jitconfigvalues.h b/src/coreclr/src/jit/jitconfigvalues.h
index 65b92b55ba1338..d531362543ebe0 100644
--- a/src/coreclr/src/jit/jitconfigvalues.h
+++ b/src/coreclr/src/jit/jitconfigvalues.h
@@ -352,12 +352,19 @@ CONFIG_STRING(JitFuncInfoFile, W("JitFuncInfoLogFile")) // If set, gather JIT fu
CONFIG_STRING(JitTimeLogCsv, W("JitTimeLogCsv")) // If set, gather JIT throughput data and write to a CSV file. This
// mode must be used in internal retail builds.
CONFIG_STRING(TailCallOpt, W("TailCallOpt"))
+CONFIG_INTEGER(FastTailCalls, W("FastTailCalls"), 1) // If set, allow fast tail calls; otherwise allow only helper-based
+ // calls
+ // for explicit tail calls.
CONFIG_INTEGER(JitMeasureNowayAssert, W("JitMeasureNowayAssert"), 0) // Set to 1 to measure noway_assert usage. Only
// valid if MEASURE_NOWAY is defined.
CONFIG_STRING(JitMeasureNowayAssertFile,
W("JitMeasureNowayAssertFile")) // Set to file to write noway_assert usage to a file (if not
// set: stdout). Only valid if MEASURE_NOWAY is defined.
+#if defined(DEBUG)
+CONFIG_INTEGER(EnableExtraSuperPmiQueries, W("EnableExtraSuperPmiQueries"), 0) // Make extra queries to somewhat
+ // future-proof SuperPmi method contexts.
+#endif // DEBUG
#if defined(DEBUG) || defined(INLINE_DATA)
CONFIG_INTEGER(JitInlineDumpData, W("JitInlineDumpData"), 0)
@@ -430,6 +437,14 @@ CONFIG_INTEGER(JitSaveFpLrWithCalleeSavedRegisters, W("JitSaveFpLrWithCalleeSave
#endif // defined(TARGET_ARM64)
#endif // DEBUG
+#if defined(TARGET_ARMARCH)
+CONFIG_INTEGER(JitDoOldStructRetyping, W("JitDoOldStructRetyping"), 1) // Allow Jit to retype structs as primitive types
+ // when possible.
+#else
+CONFIG_INTEGER(JitDoOldStructRetyping, W("JitDoOldStructRetyping"), 1) // Allow Jit to retype structs as primitive types
+ // when possible.
+#endif
+
#undef CONFIG_INTEGER
#undef CONFIG_STRING
#undef CONFIG_METHODSET
diff --git a/src/coreclr/src/jit/lclvars.cpp b/src/coreclr/src/jit/lclvars.cpp
index 3cd224462f0f41..608b4410cd9421 100644
--- a/src/coreclr/src/jit/lclvars.cpp
+++ b/src/coreclr/src/jit/lclvars.cpp
@@ -39,7 +39,7 @@ void Compiler::lvaInit()
/* We haven't allocated stack variables yet */
lvaRefCountState = RCS_INVALID;
- lvaGenericsContextUseCount = 0;
+ lvaGenericsContextInUse = false;
lvaTrackedToVarNumSize = 0;
lvaTrackedToVarNum = nullptr;
@@ -72,6 +72,7 @@ void Compiler::lvaInit()
lvaStubArgumentVar = BAD_VAR_NUM;
lvaArg0Var = BAD_VAR_NUM;
lvaMonAcquired = BAD_VAR_NUM;
+ lvaRetAddrVar = BAD_VAR_NUM;
lvaInlineeReturnSpillTemp = BAD_VAR_NUM;
@@ -624,7 +625,7 @@ void Compiler::lvaInitUserArgs(InitVarDscInfo* varDscInfo)
// If the argType is a struct, then check if it is an HFA
if (varTypeIsStruct(argType))
{
- // hfaType is set to float, double or SIMD type if it is an HFA, otherwise TYP_UNDEF.
+ // hfaType is set to float, double, or SIMD type if it is an HFA, otherwise TYP_UNDEF
hfaType = GetHfaType(typeHnd);
isHfaArg = varTypeIsValidHfaType(hfaType);
}
@@ -643,9 +644,9 @@ void Compiler::lvaInitUserArgs(InitVarDscInfo* varDscInfo)
if (isHfaArg)
{
- // We have an HFA argument, so from here on out treat the type as a float, double or vector.
- // The orginal struct type is available by using origArgType
- // We also update the cSlots to be the number of float/double fields in the HFA
+ // We have an HFA argument, so from here on out treat the type as a float, double, or vector.
+ // The orginal struct type is available by using origArgType.
+ // We also update the cSlots to be the number of float/double/vector fields in the HFA.
argType = hfaType;
varDsc->SetHfaType(hfaType);
cSlots = varDsc->lvHfaSlots();
@@ -1970,10 +1971,12 @@ bool Compiler::StructPromotionHelper::ShouldPromoteStructVar(unsigned lclNum)
//
void Compiler::StructPromotionHelper::SortStructFields()
{
- assert(!structPromotionInfo.fieldsSorted);
- qsort(structPromotionInfo.fields, structPromotionInfo.fieldCnt, sizeof(*structPromotionInfo.fields),
- lvaFieldOffsetCmp);
- structPromotionInfo.fieldsSorted = true;
+ if (!structPromotionInfo.fieldsSorted)
+ {
+ qsort(structPromotionInfo.fields, structPromotionInfo.fieldCnt, sizeof(*structPromotionInfo.fields),
+ lvaFieldOffsetCmp);
+ structPromotionInfo.fieldsSorted = true;
+ }
}
//--------------------------------------------------------------------------------------------
@@ -2157,10 +2160,7 @@ void Compiler::StructPromotionHelper::PromoteStructVar(unsigned lclNum)
}
#endif
- if (!structPromotionInfo.fieldsSorted)
- {
- SortStructFields();
- }
+ SortStructFields();
for (unsigned index = 0; index < structPromotionInfo.fieldCnt; ++index)
{
@@ -2614,10 +2614,11 @@ void Compiler::lvaSetStruct(unsigned varNum, CORINFO_CLASS_HANDLE typeHnd, bool
}
#endif // FEATURE_SIMD
#ifdef FEATURE_HFA
- // for structs that are small enough, we check and set lvIsHfa and lvHfaTypeIsFloat
+ // For structs that are small enough, we check and set HFA element type
if (varDsc->lvExactSize <= MAX_PASS_MULTIREG_BYTES)
{
- var_types hfaType = GetHfaType(typeHnd); // set to float or double if it is an HFA, otherwise TYP_UNDEF
+ // hfaType is set to float, double or SIMD type if it is an HFA, otherwise TYP_UNDEF
+ var_types hfaType = GetHfaType(typeHnd);
if (varTypeIsValidHfaType(hfaType))
{
varDsc->SetHfaType(hfaType);
@@ -2670,8 +2671,53 @@ void Compiler::lvaSetStruct(unsigned varNum, CORINFO_CLASS_HANDLE typeHnd, bool
compGSReorderStackLayout = true;
varDsc->lvIsUnsafeBuffer = true;
}
+#ifdef DEBUG
+ if (JitConfig.EnableExtraSuperPmiQueries())
+ {
+ makeExtraStructQueries(typeHnd, 2);
+ }
+#endif // DEBUG
}
+#ifdef DEBUG
+//------------------------------------------------------------------------
+// makeExtraStructQueries: Query the information for the given struct handle.
+//
+// Arguments:
+// structHandle -- The handle for the struct type we're querying.
+// level -- How many more levels to recurse.
+//
+void Compiler::makeExtraStructQueries(CORINFO_CLASS_HANDLE structHandle, int level)
+{
+ if (level <= 0)
+ {
+ return;
+ }
+ assert(structHandle != NO_CLASS_HANDLE);
+ (void)typGetObjLayout(structHandle);
+ unsigned fieldCnt = info.compCompHnd->getClassNumInstanceFields(structHandle);
+ impNormStructType(structHandle);
+#ifdef TARGET_ARMARCH
+ GetHfaType(structHandle);
+#endif
+ for (unsigned int i = 0; i < fieldCnt; i++)
+ {
+ CORINFO_FIELD_HANDLE fieldHandle = info.compCompHnd->getFieldInClass(structHandle, i);
+ unsigned fldOffset = info.compCompHnd->getFieldOffset(fieldHandle);
+ CORINFO_CLASS_HANDLE fieldClassHandle = NO_CLASS_HANDLE;
+ CorInfoType fieldCorType = info.compCompHnd->getFieldType(fieldHandle, &fieldClassHandle);
+ var_types fieldVarType = JITtype2varType(fieldCorType);
+ if (fieldClassHandle != NO_CLASS_HANDLE)
+ {
+ if (varTypeIsStruct(fieldVarType))
+ {
+ makeExtraStructQueries(fieldClassHandle, level - 1);
+ }
+ }
+ }
+}
+#endif // DEBUG
+
//------------------------------------------------------------------------
// lvaSetStructUsedAsVarArg: update hfa information for vararg struct args
//
@@ -3606,6 +3652,8 @@ var_types LclVarDsc::lvaArgType()
// eligible for assertion prop, single defs, and tracking which blocks
// hold uses.
//
+// Looks for uses of generic context and sets lvaGenericsContextInUse.
+//
// In checked builds:
//
// Verifies that local accesses are consistenly typed.
@@ -3711,6 +3759,17 @@ void Compiler::lvaMarkLclRefs(GenTree* tree, BasicBlock* block, Statement* stmt,
/* This must be a local variable reference */
+ // See if this is a generics context use.
+ if ((tree->gtFlags & GTF_VAR_CONTEXT) != 0)
+ {
+ assert(tree->OperIs(GT_LCL_VAR));
+ if (!lvaGenericsContextInUse)
+ {
+ JITDUMP("-- generic context in use at [%06u]\n", dspTreeID(tree));
+ lvaGenericsContextInUse = true;
+ }
+ }
+
assert((tree->gtOper == GT_LCL_VAR) || (tree->gtOper == GT_LCL_FLD));
unsigned lclNum = tree->AsLclVarCommon()->GetLclNum();
@@ -3794,7 +3853,8 @@ void Compiler::lvaMarkLclRefs(GenTree* tree, BasicBlock* block, Statement* stmt,
allowStructs || genActualType(varDsc->TypeGet()) == genActualType(tree->gtType) ||
(tree->gtType == TYP_BYREF && varDsc->TypeGet() == TYP_I_IMPL) ||
(tree->gtType == TYP_I_IMPL && varDsc->TypeGet() == TYP_BYREF) || (tree->gtFlags & GTF_VAR_CAST) ||
- varTypeIsFloating(varDsc->TypeGet()) && varTypeIsFloating(tree->gtType));
+ (varTypeIsFloating(varDsc) && varTypeIsFloating(tree)) ||
+ (varTypeIsStruct(varDsc) == varTypeIsStruct(tree)));
/* Remember the type of the reference */
@@ -4008,24 +4068,26 @@ void Compiler::lvaMarkLocalVars()
return;
}
-#if ASSERTION_PROP
- assert(opts.OptimizationEnabled());
-
- // Note: optAddCopies() depends on lvaRefBlks, which is set in lvaMarkLocalVars(BasicBlock*), called above.
- optAddCopies();
-#endif
+ const bool reportParamTypeArg = lvaReportParamTypeArg();
+ // Update bookkeeping on the generic context.
if (lvaKeepAliveAndReportThis())
{
- lvaTable[0].lvImplicitlyReferenced = 1;
- // This isn't strictly needed as we will make a copy of the param-type-arg
- // in the prolog. However, this ensures that the LclVarDsc corresponding to
- // info.compTypeCtxtArg is valid.
+ lvaGetDesc(0u)->lvImplicitlyReferenced = reportParamTypeArg;
}
else if (lvaReportParamTypeArg())
{
- lvaTable[info.compTypeCtxtArg].lvImplicitlyReferenced = 1;
+ // We should have a context arg.
+ assert(info.compTypeCtxtArg != BAD_VAR_NUM);
+ lvaGetDesc(info.compTypeCtxtArg)->lvImplicitlyReferenced = reportParamTypeArg;
}
+
+#if ASSERTION_PROP
+ assert(opts.OptimizationEnabled());
+
+ // Note: optAddCopies() depends on lvaRefBlks, which is set in lvaMarkLocalVars(BasicBlock*), called above.
+ optAddCopies();
+#endif
}
//------------------------------------------------------------------------
@@ -4045,7 +4107,10 @@ void Compiler::lvaMarkLocalVars()
// In fast-jitting modes where we don't ref count locals, this bypasses
// actual counting, and makes all locals implicitly referenced on first
// compute. It asserts all locals are implicitly referenced on recompute.
-
+//
+// When optimizing we also recompute lvaGenericsContextInUse based
+// on specially flagged LCL_VAR appearances.
+//
void Compiler::lvaComputeRefCounts(bool isRecompute, bool setSlotNumbers)
{
JITDUMP("\n*** lvaComputeRefCounts ***\n");
@@ -4140,6 +4205,11 @@ void Compiler::lvaComputeRefCounts(bool isRecompute, bool setSlotNumbers)
varDsc->lvSingleDef = varDsc->lvIsParam;
}
+ // Remember current state of generic context use, and prepare
+ // to compute new state.
+ const bool oldLvaGenericsContextInUse = lvaGenericsContextInUse;
+ lvaGenericsContextInUse = false;
+
JITDUMP("\n*** lvaComputeRefCounts -- explicit counts ***\n");
// Second, account for all explicit local variable references
@@ -4175,6 +4245,12 @@ void Compiler::lvaComputeRefCounts(bool isRecompute, bool setSlotNumbers)
{
varDsc->incRefCnts(weight, this);
}
+
+ if ((node->gtFlags & GTF_VAR_CONTEXT) != 0)
+ {
+ assert(node->OperIs(GT_LCL_VAR));
+ lvaGenericsContextInUse = true;
+ }
break;
}
@@ -4189,6 +4265,21 @@ void Compiler::lvaComputeRefCounts(bool isRecompute, bool setSlotNumbers)
}
}
+ if (oldLvaGenericsContextInUse && !lvaGenericsContextInUse)
+ {
+ // Context was in use but no longer is. This can happen
+ // if we're able to optimize, so just leave a note.
+ JITDUMP("\n** Generics context no longer in use\n");
+ }
+ else if (lvaGenericsContextInUse && !oldLvaGenericsContextInUse)
+ {
+ // Context was not in use but now is.
+ //
+ // Changing from unused->used should never happen; creation of any new IR
+ // for context use should also be settting lvaGenericsContextInUse.
+ assert(!"unexpected new use of generics context");
+ }
+
JITDUMP("\n*** lvaComputeRefCounts -- implicit counts ***\n");
// Third, bump ref counts for some implicit prolog references
@@ -4949,6 +5040,20 @@ void Compiler::lvaFixVirtualFrameOffsets()
}
#endif // FEATURE_FIXED_OUT_ARGS
+
+#ifdef TARGET_ARM64
+ // We normally add alignment below the locals between them and the outgoing
+ // arg space area. When we store fp/lr at the bottom, however, this will be
+ // below the alignment. So we should not apply the alignment adjustment to
+ // them. On ARM64 it turns out we always store these at +0 and +8 of the FP,
+ // so instead of dealing with skipping adjustment just for them we just set
+ // them here always.
+ assert(codeGen->isFramePointerUsed());
+ if (lvaRetAddrVar != BAD_VAR_NUM)
+ {
+ lvaTable[lvaRetAddrVar].lvStkOffs = REGSIZE_BYTES;
+ }
+#endif
}
#ifdef TARGET_ARM
@@ -5664,6 +5769,10 @@ void Compiler::lvaAssignVirtualFrameOffsetsToLocals()
#ifdef TARGET_XARCH
// On x86/amd64, the return address has already been pushed by the call instruction in the caller.
stkOffs -= TARGET_POINTER_SIZE; // return address;
+ if (lvaRetAddrVar != BAD_VAR_NUM)
+ {
+ lvaTable[lvaRetAddrVar].lvStkOffs = stkOffs;
+ }
// If we are an OSR method, we "inherit" the frame of the original method,
// and the stack is already double aligned on entry (since the return adddress push
@@ -5724,7 +5833,16 @@ void Compiler::lvaAssignVirtualFrameOffsetsToLocals()
stkOffs -= (compCalleeRegsPushed - 2) * REGSIZE_BYTES;
}
-#else // !TARGET_ARM64
+#else // !TARGET_ARM64
+#ifdef TARGET_ARM
+ // On ARM32 LR is part of the pushed registers and is always stored at the
+ // top.
+ if (lvaRetAddrVar != BAD_VAR_NUM)
+ {
+ lvaTable[lvaRetAddrVar].lvStkOffs = stkOffs - REGSIZE_BYTES;
+ }
+#endif
+
stkOffs -= compCalleeRegsPushed * REGSIZE_BYTES;
#endif // !TARGET_ARM64
@@ -6085,7 +6203,7 @@ void Compiler::lvaAssignVirtualFrameOffsetsToLocals()
#ifdef JIT32_GCENCODER
lclNum == lvaLocAllocSPvar ||
#endif // JIT32_GCENCODER
- false)
+ lclNum == lvaRetAddrVar)
{
assert(varDsc->lvStkOffs != BAD_STK_OFFS);
continue;
diff --git a/src/coreclr/src/jit/lower.cpp b/src/coreclr/src/jit/lower.cpp
index 3e79393cce1a20..75d63a18661f7d 100644
--- a/src/coreclr/src/jit/lower.cpp
+++ b/src/coreclr/src/jit/lower.cpp
@@ -37,7 +37,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
// Notes:
// If 'childNode' it has any existing sources, they will now be sources for the parent.
//
-void Lowering::MakeSrcContained(GenTree* parentNode, GenTree* childNode)
+void Lowering::MakeSrcContained(GenTree* parentNode, GenTree* childNode) const
{
assert(!parentNode->OperIsLeaf());
assert(childNode->canBeContained());
@@ -112,8 +112,8 @@ GenTree* Lowering::LowerNode(GenTree* node)
switch (node->gtOper)
{
case GT_IND:
- // Leave struct typed indirs alone, they only appear as the source of
- // block copy operations and LowerBlockStore will handle those.
+ // Process struct typed indirs separately, they only appear as the source of
+ // a block copy operation or a return node.
if (node->TypeGet() != TYP_STRUCT)
{
// TODO-Cleanup: We're passing isContainable = true but ContainCheckIndir rejects
@@ -255,6 +255,13 @@ GenTree* Lowering::LowerNode(GenTree* node)
case GT_STORE_BLK:
case GT_STORE_OBJ:
+ if (node->AsBlk()->Data()->IsCall())
+ {
+ assert(!comp->compDoOldStructRetyping());
+ LowerStoreCallStruct(node->AsBlk());
+ break;
+ }
+ __fallthrough;
case GT_STORE_DYN_BLK:
LowerBlockStore(node->AsBlk());
break;
@@ -297,64 +304,8 @@ GenTree* Lowering::LowerNode(GenTree* node)
__fallthrough;
case GT_STORE_LCL_FLD:
- {
- GenTreeLclVarCommon* const store = node->AsLclVarCommon();
- GenTree* src = store->gtGetOp1();
- if ((varTypeUsesFloatReg(store) != varTypeUsesFloatReg(src)) && !store->IsPhiDefn() &&
- (src->TypeGet() != TYP_STRUCT))
- {
- if (m_lsra->isRegCandidate(comp->lvaGetDesc(store->GetLclNum())))
- {
- GenTreeUnOp* bitcast = new (comp, GT_BITCAST) GenTreeOp(GT_BITCAST, store->TypeGet(), src, nullptr);
- store->gtOp1 = bitcast;
- src = store->gtGetOp1();
- BlockRange().InsertBefore(store, bitcast);
- ContainCheckBitCast(bitcast);
- }
- else
- {
- // This is an actual store, we'll just retype it.
- store->gtType = src->TypeGet();
- }
- }
-
- if ((node->TypeGet() == TYP_STRUCT) && (src->OperGet() != GT_PHI))
- {
- LclVarDsc* varDsc = comp->lvaGetDesc(store);
-#if FEATURE_MULTIREG_RET
- if (src->OperGet() == GT_CALL)
- {
- assert(src->AsCall()->HasMultiRegRetVal());
- }
- else
-#endif // FEATURE_MULTIREG_RET
- if (!src->OperIs(GT_LCL_VAR) || varDsc->GetLayout()->GetRegisterType() == TYP_UNDEF)
- {
- GenTreeLclVar* addr = comp->gtNewLclVarAddrNode(store->GetLclNum(), TYP_BYREF);
-
- addr->gtFlags |= GTF_VAR_DEF;
- assert(!addr->IsPartialLclFld(comp));
- addr->gtFlags |= GTF_DONT_CSE;
-
- // Create the assignment node.
- store->ChangeOper(GT_STORE_OBJ);
-
- store->gtFlags = GTF_ASG | GTF_IND_NONFAULTING | GTF_IND_TGT_NOT_HEAP;
-#ifndef JIT32_GCENCODER
- store->AsObj()->gtBlkOpGcUnsafe = false;
-#endif
- store->AsObj()->gtBlkOpKind = GenTreeObj::BlkOpKindInvalid;
- store->AsObj()->SetLayout(varDsc->GetLayout());
- store->AsObj()->SetAddr(addr);
- store->AsObj()->SetData(src);
- BlockRange().InsertBefore(store, addr);
- LowerBlockStore(store->AsObj());
- break;
- }
- }
- LowerStoreLoc(node->AsLclVarCommon());
+ LowerStoreLocCommon(node->AsLclVarCommon());
break;
- }
#if defined(TARGET_ARM64)
case GT_CMPXCHG:
@@ -1331,11 +1282,18 @@ void Lowering::LowerArg(GenTreeCall* call, GenTree** ppArg)
LclVarDsc* varDsc = &comp->lvaTable[varNum];
type = varDsc->lvType;
}
- else if (arg->OperGet() == GT_SIMD)
+ else if (arg->OperIs(GT_SIMD, GT_HWINTRINSIC))
{
- assert((arg->AsSIMD()->gtSIMDSize == 16) || (arg->AsSIMD()->gtSIMDSize == 12));
+ GenTreeJitIntrinsic* jitIntrinsic = reinterpret_cast(arg);
+
+ // For HWIntrinsic, there are some intrinsics like ExtractVector128 which have
+ // a gtType of TYP_SIMD16 but a gtSIMDSize of 32, so we need to include that in
+ // the assert below.
+
+ assert((jitIntrinsic->gtSIMDSize == 12) || (jitIntrinsic->gtSIMDSize == 16) ||
+ (jitIntrinsic->gtSIMDSize == 32));
- if (arg->AsSIMD()->gtSIMDSize == 12)
+ if (jitIntrinsic->gtSIMDSize == 12)
{
type = TYP_SIMD12;
}
@@ -1616,7 +1574,7 @@ void Lowering::LowerCall(GenTree* node)
}
}
- if (call->IsTailCallViaHelper())
+ if (call->IsTailCallViaJitHelper())
{
// Either controlExpr or gtCallAddr must contain real call target.
if (controlExpr == nullptr)
@@ -1626,7 +1584,7 @@ void Lowering::LowerCall(GenTree* node)
controlExpr = call->gtCallAddr;
}
- controlExpr = LowerTailCallViaHelper(call, controlExpr);
+ controlExpr = LowerTailCallViaJitHelper(call, controlExpr);
}
if (controlExpr != nullptr)
@@ -1637,7 +1595,7 @@ void Lowering::LowerCall(GenTree* node)
DISPRANGE(controlExprRange);
GenTree* insertionPoint = call;
- if (!call->IsTailCallViaHelper())
+ if (!call->IsTailCallViaJitHelper())
{
// The controlExpr should go before the gtCallCookie and the gtCallAddr, if they exist
//
@@ -1682,6 +1640,11 @@ void Lowering::LowerCall(GenTree* node)
LowerFastTailCall(call);
}
+ if (varTypeIsStruct(call))
+ {
+ LowerCallStruct(call);
+ }
+
ContainCheckCallOperands(call);
JITDUMP("lowering call (after):\n");
DISPTREERANGE(BlockRange(), call);
@@ -1994,10 +1957,9 @@ void Lowering::LowerFastTailCall(GenTreeCall* call)
#else // !FEATURE_FASTTAILCALL
- // Platform choose not to implement fast tail call mechanism.
- // In such a case we should never be reaching this method as
- // the expectation is that IsTailCallViaHelper() will always
- // be true on such a platform.
+ // Platform does not implement fast tail call mechanism. This cannot be
+ // reached because we always choose to do a tailcall via helper on those
+ // platforms (or no tailcall at all).
unreached();
#endif
}
@@ -2082,16 +2044,11 @@ void Lowering::RehomeArgForFastTailCall(unsigned int lclNum,
}
//------------------------------------------------------------------------
-// LowerTailCallViaHelper: lower a call via the tailcall helper. Morph
-// has already inserted tailcall helper special arguments. This function
-// inserts actual data for some placeholders.
-//
-// For ARM32, AMD64, lower
-// tail.call(void* copyRoutine, void* dummyArg, ...)
-// as
-// Jit_TailCall(void* copyRoutine, void* callTarget, ...)
+// LowerTailCallViaJitHelper: lower a call via the tailcall JIT helper. Morph
+// has already inserted tailcall helper special arguments. This function inserts
+// actual data for some placeholders. This function is only used on x86.
//
-// For x86, lower
+// Lower
// tail.call(, int numberOfOldStackArgs, int dummyNumberOfNewStackArgs, int flags, void* dummyArg)
// as
// JIT_TailCall(, int numberOfOldStackArgsWords, int numberOfNewStackArgsWords, int flags, void*
@@ -2107,7 +2064,7 @@ void Lowering::RehomeArgForFastTailCall(unsigned int lclNum,
// Return Value:
// Returns control expression tree for making a call to helper Jit_TailCall.
//
-GenTree* Lowering::LowerTailCallViaHelper(GenTreeCall* call, GenTree* callTarget)
+GenTree* Lowering::LowerTailCallViaJitHelper(GenTreeCall* call, GenTree* callTarget)
{
// Tail call restrictions i.e. conditions under which tail prefix is ignored.
// Most of these checks are already done by importer or fgMorphTailCall().
@@ -2116,12 +2073,8 @@ GenTree* Lowering::LowerTailCallViaHelper(GenTreeCall* call, GenTree* callTarget
assert(!call->IsUnmanaged()); // tail calls to unamanaged methods
assert(!comp->compLocallocUsed); // tail call from methods that also do localloc
-#ifdef TARGET_AMD64
- assert(!comp->getNeedsGSSecurityCookie()); // jit64 compat: tail calls from methods that need GS check
-#endif // TARGET_AMD64
-
// We expect to see a call that meets the following conditions
- assert(call->IsTailCallViaHelper());
+ assert(call->IsTailCallViaJitHelper());
assert(callTarget != nullptr);
// The TailCall helper call never returns to the caller and is not GC interruptible.
@@ -2152,38 +2105,6 @@ GenTree* Lowering::LowerTailCallViaHelper(GenTreeCall* call, GenTree* callTarget
// The callTarget tree needs to be sequenced.
LIR::Range callTargetRange = LIR::SeqTree(comp, callTarget);
-#if defined(TARGET_AMD64) || defined(TARGET_ARM)
-
- // For ARM32 and AMD64, first argument is CopyRoutine and second argument is a place holder node.
- fgArgTabEntry* argEntry;
-
-#ifdef DEBUG
- argEntry = comp->gtArgEntryByArgNum(call, 0);
- assert(argEntry != nullptr);
- assert(argEntry->GetNode()->OperIs(GT_PUTARG_REG));
- GenTree* firstArg = argEntry->GetNode()->AsUnOp()->gtGetOp1();
- assert(firstArg->gtOper == GT_CNS_INT);
-#endif
-
- // Replace second arg by callTarget.
- argEntry = comp->gtArgEntryByArgNum(call, 1);
- assert(argEntry != nullptr);
- assert(argEntry->GetNode()->OperIs(GT_PUTARG_REG));
- GenTree* secondArg = argEntry->GetNode()->AsUnOp()->gtGetOp1();
-
- ContainCheckRange(callTargetRange);
- BlockRange().InsertAfter(secondArg, std::move(callTargetRange));
-
- bool isClosed;
- LIR::ReadOnlyRange secondArgRange = BlockRange().GetTreeRange(secondArg, &isClosed);
- assert(isClosed);
-
- BlockRange().Remove(std::move(secondArgRange));
-
- argEntry->GetNode()->AsUnOp()->gtOp1 = callTarget;
-
-#elif defined(TARGET_X86)
-
// Verify the special args are what we expect, and replace the dummy args with real values.
// We need to figure out the size of the outgoing stack arguments, not including the special args.
// The number of 4-byte words is passed to the helper for the incoming and outgoing argument sizes.
@@ -2237,21 +2158,17 @@ GenTree* Lowering::LowerTailCallViaHelper(GenTreeCall* call, GenTree* callTarget
assert(arg3->gtOper == GT_CNS_INT);
#endif // DEBUG
-#else
- NYI("LowerTailCallViaHelper");
-#endif // TARGET*
-
// Transform this call node into a call to Jit tail call helper.
call->gtCallType = CT_HELPER;
call->gtCallMethHnd = comp->eeFindHelper(CORINFO_HELP_TAILCALL);
call->gtFlags &= ~GTF_CALL_VIRT_KIND_MASK;
// Lower this as if it were a pure helper call.
- call->gtCallMoreFlags &= ~(GTF_CALL_M_TAILCALL | GTF_CALL_M_TAILCALL_VIA_HELPER);
+ call->gtCallMoreFlags &= ~(GTF_CALL_M_TAILCALL | GTF_CALL_M_TAILCALL_VIA_JIT_HELPER);
GenTree* result = LowerDirectCall(call);
// Now add back tail call flags for identifying this node as tail call dispatched via helper.
- call->gtCallMoreFlags |= GTF_CALL_M_TAILCALL | GTF_CALL_M_TAILCALL_VIA_HELPER;
+ call->gtCallMoreFlags |= GTF_CALL_M_TAILCALL | GTF_CALL_M_TAILCALL_VIA_JIT_HELPER;
#ifdef PROFILING_SUPPORTED
// Insert profiler tail call hook if needed.
@@ -2262,8 +2179,6 @@ GenTree* Lowering::LowerTailCallViaHelper(GenTreeCall* call, GenTree* callTarget
}
#endif // PROFILING_SUPPORTED
- assert(call->IsTailCallViaHelper());
-
return result;
}
@@ -3017,14 +2932,55 @@ void Lowering::LowerRet(GenTreeUnOp* ret)
JITDUMP("============");
GenTree* op1 = ret->gtGetOp1();
- if ((ret->TypeGet() != TYP_VOID) && (ret->TypeGet() != TYP_STRUCT) &&
+ if ((ret->TypeGet() != TYP_VOID) && !varTypeIsStruct(ret) &&
(varTypeUsesFloatReg(ret) != varTypeUsesFloatReg(ret->gtGetOp1())))
{
+ assert(comp->compDoOldStructRetyping());
GenTreeUnOp* bitcast = new (comp, GT_BITCAST) GenTreeOp(GT_BITCAST, ret->TypeGet(), ret->gtGetOp1(), nullptr);
ret->gtOp1 = bitcast;
BlockRange().InsertBefore(ret, bitcast);
ContainCheckBitCast(bitcast);
}
+ else
+ {
+#ifdef DEBUG
+ if (ret->TypeGet() != TYP_VOID)
+ {
+ GenTree* retVal = ret->gtGetOp1();
+ if (varTypeIsStruct(ret->TypeGet()) != varTypeIsStruct(retVal->TypeGet()))
+ {
+ if (varTypeIsStruct(ret->TypeGet()))
+ {
+ assert(!comp->compDoOldStructRetyping());
+ bool actualTypesMatch = false;
+ if (genActualType(comp->info.compRetNativeType) == genActualType(retVal->TypeGet()))
+ {
+ // This could happen if we have retyped op1 as a primitive type during struct promotion,
+ // check `retypedFieldsMap` for details.
+ actualTypesMatch = true;
+ }
+ bool constStructInit = retVal->IsConstInitVal();
+ assert(actualTypesMatch || constStructInit);
+ }
+ else
+ {
+#ifdef FEATURE_SIMD
+ assert(comp->compDoOldStructRetyping());
+ assert(ret->TypeIs(TYP_DOUBLE));
+ assert(retVal->TypeIs(TYP_SIMD8));
+#else // !FEATURE_SIMD
+ unreached();
+#endif // !FEATURE_SIMD
+ }
+ }
+ }
+#endif // DEBUG
+ if (varTypeIsStruct(ret) && !comp->compMethodReturnsMultiRegRetType())
+ {
+ assert(!comp->compDoOldStructRetyping());
+ LowerRetStruct(ret);
+ }
+ }
// Method doing PInvokes has exactly one return block unless it has tail calls.
if (comp->compMethodRequiresPInvokeFrame() && (comp->compCurBB == comp->genReturnBB))
@@ -3034,13 +2990,420 @@ void Lowering::LowerRet(GenTreeUnOp* ret)
ContainCheckRet(ret);
}
+//----------------------------------------------------------------------------------------------
+// LowerStoreLocCommon: platform idependent part of local var or field store lowering.
+//
+// Arguments:
+// lclStore - The store lcl node to lower.
+//
+void Lowering::LowerStoreLocCommon(GenTreeLclVarCommon* lclStore)
+{
+ assert(lclStore->OperIs(GT_STORE_LCL_FLD, GT_STORE_LCL_VAR));
+ GenTree* src = lclStore->gtGetOp1();
+ LclVarDsc* varDsc = comp->lvaGetDesc(lclStore);
+ if ((varTypeUsesFloatReg(lclStore) != varTypeUsesFloatReg(src)) && !lclStore->IsPhiDefn() &&
+ (src->TypeGet() != TYP_STRUCT))
+ {
+ if (m_lsra->isRegCandidate(varDsc))
+ {
+ GenTreeUnOp* bitcast = new (comp, GT_BITCAST) GenTreeOp(GT_BITCAST, lclStore->TypeGet(), src, nullptr);
+ lclStore->gtOp1 = bitcast;
+ src = lclStore->gtGetOp1();
+ BlockRange().InsertBefore(lclStore, bitcast);
+ ContainCheckBitCast(bitcast);
+ }
+ else
+ {
+ // This is an actual store, we'll just retype it.
+ lclStore->gtType = src->TypeGet();
+ }
+ }
+
+ if ((lclStore->TypeGet() == TYP_STRUCT) && (src->OperGet() != GT_PHI))
+ {
+ if (src->OperGet() == GT_CALL)
+ {
+ GenTreeCall* call = src->AsCall();
+ const ClassLayout* layout = varDsc->GetLayout();
+ const var_types regType = layout->GetRegisterType();
+
+#ifdef DEBUG
+ const unsigned slotCount = layout->GetSlotCount();
+#if defined(TARGET_XARCH) && !defined(UNIX_AMD64_ABI)
+ // Windows x64 doesn't have multireg returns,
+ // x86 uses it only for long return type, not for structs.
+ assert(!comp->compDoOldStructRetyping());
+ assert(slotCount == 1);
+ assert(regType != TYP_UNDEF);
+#else // !TARGET_XARCH || UNIX_AMD64_ABI
+ if (!varDsc->lvIsHfa())
+ {
+ if (slotCount > 1)
+ {
+ assert(call->HasMultiRegRetVal());
+ }
+ else
+ {
+ assert(!comp->compDoOldStructRetyping());
+ unsigned size = layout->GetSize();
+ assert((size <= 8) || (size == 16));
+ bool isPowerOf2 = (((size - 1) & size) == 0);
+ bool isTypeDefined = (regType != TYP_UNDEF);
+ assert(isPowerOf2 == isTypeDefined);
+ }
+ }
+#endif // !TARGET_XARCH || UNIX_AMD64_ABI
+#endif // DEBUG
+
+#if !defined(WINDOWS_AMD64_ABI)
+ if (!call->HasMultiRegRetVal() && (regType == TYP_UNDEF))
+ {
+ // If we have a single return register,
+ // but we can't retype it as a primitive type, we must spill it.
+ GenTreeLclVar* spilledCall = SpillStructCallResult(call);
+ lclStore->gtOp1 = spilledCall;
+ src = lclStore->gtOp1;
+ LowerStoreLocCommon(lclStore);
+ return;
+ }
+#endif // !WINDOWS_AMD64_ABI
+ }
+ else if (!src->OperIs(GT_LCL_VAR) || varDsc->GetLayout()->GetRegisterType() == TYP_UNDEF)
+ {
+ GenTreeLclVar* addr = comp->gtNewLclVarAddrNode(lclStore->GetLclNum(), TYP_BYREF);
+
+ addr->gtFlags |= GTF_VAR_DEF;
+ assert(!addr->IsPartialLclFld(comp));
+ addr->gtFlags |= GTF_DONT_CSE;
+
+ // Create the assignment node.
+ lclStore->ChangeOper(GT_STORE_OBJ);
+ GenTreeBlk* objStore = lclStore->AsObj();
+ objStore->gtFlags = GTF_ASG | GTF_IND_NONFAULTING | GTF_IND_TGT_NOT_HEAP;
+#ifndef JIT32_GCENCODER
+ objStore->gtBlkOpGcUnsafe = false;
+#endif
+ objStore->gtBlkOpKind = GenTreeObj::BlkOpKindInvalid;
+ objStore->SetLayout(varDsc->GetLayout());
+ objStore->SetAddr(addr);
+ objStore->SetData(src);
+ BlockRange().InsertBefore(objStore, addr);
+ LowerBlockStore(objStore);
+ return;
+ }
+ }
+ LowerStoreLoc(lclStore);
+}
+
+//----------------------------------------------------------------------------------------------
+// LowerRetStructLclVar: Lowers a struct return node.
+//
+// Arguments:
+// node - The return node to lower.
+//
+void Lowering::LowerRetStruct(GenTreeUnOp* ret)
+{
+ assert(!comp->compMethodReturnsMultiRegRetType());
+ assert(!comp->compDoOldStructRetyping());
+ assert(ret->OperIs(GT_RETURN));
+ assert(varTypeIsStruct(ret));
+
+ GenTree* retVal = ret->gtGetOp1();
+ // Note: small types are returned as INT.
+ var_types nativeReturnType = genActualType(comp->info.compRetNativeType);
+ ret->ChangeType(nativeReturnType);
+
+ switch (retVal->OperGet())
+ {
+ case GT_CALL:
+ assert(retVal->TypeIs(nativeReturnType)); // Type should be changed during call processing.
+ break;
+
+ case GT_CNS_INT:
+ assert(retVal->TypeIs(TYP_INT));
+ assert(retVal->AsIntCon()->IconValue() == 0);
+ if (varTypeUsesFloatReg(nativeReturnType))
+ {
+ retVal->ChangeOperConst(GT_CNS_DBL);
+ retVal->ChangeType(TYP_FLOAT);
+ retVal->AsDblCon()->gtDconVal = 0;
+ }
+ break;
+
+ case GT_OBJ:
+ retVal->ChangeOper(GT_IND);
+ __fallthrough;
+ case GT_IND:
+ retVal->ChangeType(nativeReturnType);
+ break;
+
+ case GT_LCL_VAR:
+ LowerRetStructLclVar(ret);
+ break;
+
+#if defined(FEATURE_SIMD) || defined(FEATURE_HW_INTRINSICS)
+#ifdef FEATURE_SIMD
+ case GT_SIMD:
+#endif // FEATURE_SIMD
+#ifdef FEATURE_HW_INTRINSICS
+ case GT_HWINTRINSIC:
+#endif // FEATURE_HW_INTRINSICS
+ {
+ assert(!retVal->TypeIs(TYP_STRUCT));
+ if (varTypeUsesFloatReg(ret) != varTypeUsesFloatReg(retVal))
+ {
+ GenTreeUnOp* bitcast = new (comp, GT_BITCAST) GenTreeOp(GT_BITCAST, ret->TypeGet(), retVal, nullptr);
+ ret->gtOp1 = bitcast;
+ BlockRange().InsertBefore(ret, bitcast);
+ ContainCheckBitCast(bitcast);
+ }
+ }
+ break;
+#endif // FEATURE_SIMD || FEATURE_HW_INTRINSICS
+
+ case GT_LCL_FLD:
+ {
+#ifdef DEBUG
+ GenTreeLclFld* lclFld = retVal->AsLclFld();
+ unsigned lclNum = lclFld->GetLclNum();
+ LclVarDsc* varDsc = comp->lvaGetDesc(lclNum);
+ assert(varDsc->lvDoNotEnregister);
+#endif
+ retVal->ChangeType(nativeReturnType);
+ }
+ break;
+
+ default:
+ unreached();
+ }
+}
+
+//----------------------------------------------------------------------------------------------
+// LowerRetStructLclVar: Lowers a return node with a struct lclVar as a source.
+//
+// Arguments:
+// node - The return node to lower.
+//
+// Notes:
+// - if LclVar is allocated in memory then read it as return type;
+// - if LclVar can be enregistered read it as register type and add a bitcast if necessary;
+//
+void Lowering::LowerRetStructLclVar(GenTreeUnOp* ret)
+{
+ assert(!comp->compMethodReturnsMultiRegRetType());
+ assert(!comp->compDoOldStructRetyping());
+ assert(ret->OperIs(GT_RETURN));
+ GenTreeLclVarCommon* lclVar = ret->gtGetOp1()->AsLclVar();
+ assert(lclVar->OperIs(GT_LCL_VAR));
+ unsigned lclNum = lclVar->GetLclNum();
+ LclVarDsc* varDsc = comp->lvaGetDesc(lclNum);
+
+#ifdef DEBUG
+ if (comp->gtGetStructHandleIfPresent(lclVar) == NO_CLASS_HANDLE)
+ {
+ // a promoted struct field was retyped as its only field.
+ assert(varDsc->lvIsStructField);
+ }
+#endif
+ if (varDsc->lvPromoted && (comp->lvaGetPromotionType(lclNum) == Compiler::PROMOTION_TYPE_INDEPENDENT))
+ {
+ if (varDsc->lvFieldCnt == 1)
+ {
+ // We can replace the struct with its only field and keep the field on a register.
+ assert(varDsc->lvRefCnt() == 0);
+ unsigned fieldLclNum = varDsc->lvFieldLclStart;
+ LclVarDsc* fieldDsc = comp->lvaGetDesc(fieldLclNum);
+ if (fieldDsc->lvFldOffset == 0)
+ {
+ lclVar->SetLclNum(fieldLclNum);
+ JITDUMP("Replacing an independently promoted local var with its only field for the return %u, %u\n",
+ lclNum, fieldLclNum);
+ lclVar->ChangeType(fieldDsc->lvType);
+ lclNum = fieldLclNum;
+ varDsc = comp->lvaGetDesc(lclNum);
+ }
+ }
+ else
+ {
+ // TODO-1stClassStructs: We can no longer promote or enregister this struct,
+ // since it is referenced as a whole.
+ comp->lvaSetVarDoNotEnregister(lclNum DEBUGARG(Compiler::DNER_VMNeedsStackAddr));
+ }
+ }
+
+ if (varDsc->lvDoNotEnregister)
+ {
+ lclVar->ChangeOper(GT_LCL_FLD);
+ lclVar->AsLclFld()->SetLclOffs(0);
+ lclVar->ChangeType(ret->TypeGet());
+ }
+ else
+ {
+ var_types lclVarType = varDsc->GetRegisterType(lclVar);
+ assert(lclVarType != TYP_UNDEF);
+ lclVar->ChangeType(lclVarType);
+
+ if (varTypeUsesFloatReg(ret) != varTypeUsesFloatReg(lclVarType))
+ {
+ GenTreeUnOp* bitcast = new (comp, GT_BITCAST) GenTreeOp(GT_BITCAST, ret->TypeGet(), lclVar, nullptr);
+ ret->gtOp1 = bitcast;
+ BlockRange().InsertBefore(ret, bitcast);
+ ContainCheckBitCast(bitcast);
+ }
+ }
+}
+
+//----------------------------------------------------------------------------------------------
+// LowerCallStruct: Lowers a call node that returns a stuct.
+//
+// Arguments:
+// call - The call node to lower.
+//
+// Notes:
+// - this handles only single-register returns;
+// - it transforms the call's user for `GT_STOREIND`.
+//
+void Lowering::LowerCallStruct(GenTreeCall* call)
+{
+ assert(varTypeIsStruct(call));
+ if (call->HasMultiRegRetVal())
+ {
+ return;
+ }
+
+#ifdef TARGET_ARMARCH
+ // !compDoOldStructRetyping is not supported on arm yet,
+ // because of HFA.
+ assert(comp->compDoOldStructRetyping());
+ return;
+#else // !TARGET_ARMARCH
+
+ assert(!comp->compDoOldStructRetyping());
+ CORINFO_CLASS_HANDLE retClsHnd = call->gtRetClsHnd;
+ Compiler::structPassingKind howToReturnStruct;
+ var_types returnType = comp->getReturnTypeForStruct(retClsHnd, &howToReturnStruct);
+ assert(!varTypeIsStruct(returnType) && returnType != TYP_UNKNOWN);
+ var_types origType = call->TypeGet();
+ call->gtType = genActualType(returnType);
+
+ LIR::Use callUse;
+ if (BlockRange().TryGetUse(call, &callUse))
+ {
+ GenTree* user = callUse.User();
+ switch (user->OperGet())
+ {
+ case GT_RETURN:
+ case GT_STORE_LCL_VAR:
+ case GT_STORE_BLK:
+ case GT_STORE_OBJ:
+ // Leave as is, the user will handle it.
+ assert(user->TypeIs(origType));
+ break;
+
+ case GT_STOREIND:
+#ifdef FEATURE_SIMD
+ if (user->TypeIs(TYP_SIMD8))
+ {
+ user->ChangeType(returnType);
+ break;
+ }
+#endif // FEATURE_SIMD
+ // importer has a separate mechanism to retype calls to helpers,
+ // keep it for now.
+ assert(user->TypeIs(TYP_REF));
+ assert(call->IsHelperCall());
+ assert(returnType == user->TypeGet());
+ break;
+
+ default:
+ unreached();
+ }
+ }
+#endif // !TARGET_ARMARCH
+}
+
+//----------------------------------------------------------------------------------------------
+// LowerStoreCallStruct: Lowers a store block where source is a struct typed call.
+//
+// Arguments:
+// store - The store node to lower.
+//
+// Notes:
+// - it spills the call's result if it can be retyped as a primitive type.
+//
+void Lowering::LowerStoreCallStruct(GenTreeBlk* store)
+{
+ assert(!comp->compDoOldStructRetyping());
+ assert(varTypeIsStruct(store));
+ assert(store->Data()->IsCall());
+ GenTreeCall* call = store->Data()->AsCall();
+
+ const ClassLayout* layout = store->GetLayout();
+ assert(layout->GetSlotCount() == 1);
+ const var_types regType = layout->GetRegisterType();
+
+ unsigned storeSize = store->GetLayout()->GetSize();
+ if (regType != TYP_UNDEF)
+ {
+ store->ChangeType(regType);
+ store->SetOper(GT_STOREIND);
+ LowerStoreIndir(store->AsIndir());
+ }
+ else
+ {
+#if defined(WINDOWS_AMD64_ABI)
+ // All ABI except Windows x64 supports passing 3 byte structs in registers.
+ // Other 64 bites ABI-s support passing 5, 6, 7 byte structs.
+ unreached();
+#else // !WINDOWS_AMD64_ABI
+ if (store->OperIs(GT_STORE_OBJ))
+ {
+ store->SetOper(GT_STORE_BLK);
+ }
+ store->gtBlkOpKind = GenTreeObj::BlkOpKindUnroll;
+
+ GenTreeLclVar* spilledCall = SpillStructCallResult(call);
+ store->SetData(spilledCall);
+ LowerBlockStore(store);
+#endif // WINDOWS_AMD64_ABI
+ }
+}
+
+#if !defined(WINDOWS_AMD64_ABI)
+//----------------------------------------------------------------------------------------------
+// SpillStructCallResult: Spill call result to memory.
+//
+// Arguments:
+// call - call with 3, 5, 6 or 7 return size that has to be spilled to memory.
+//
+// Return Value:
+// load of the spilled variable.
+//
+GenTreeLclVar* Lowering::SpillStructCallResult(GenTreeCall* call) const
+{
+ // TODO-1stClassStructs: we can support this in codegen for `GT_STORE_BLK` without new temps.
+ const unsigned spillNum = comp->lvaGrabTemp(true DEBUGARG("Return value temp for an odd struct return size"));
+ CORINFO_CLASS_HANDLE retClsHnd = call->gtRetClsHnd;
+ comp->lvaSetStruct(spillNum, retClsHnd, false);
+ GenTreeLclFld* spill = new (comp, GT_STORE_LCL_FLD) GenTreeLclFld(GT_STORE_LCL_FLD, call->gtType, spillNum, 0);
+ spill->gtOp1 = call;
+ spill->gtFlags |= GTF_VAR_DEF;
+
+ BlockRange().InsertAfter(call, spill);
+ ContainCheckStoreLoc(spill);
+ GenTreeLclVar* loadCallResult = comp->gtNewLclvNode(spillNum, TYP_STRUCT)->AsLclVar();
+ BlockRange().InsertAfter(spill, loadCallResult);
+ return loadCallResult;
+}
+#endif // !WINDOWS_AMD64_ABI
+
GenTree* Lowering::LowerDirectCall(GenTreeCall* call)
{
noway_assert(call->gtCallType == CT_USER_FUNC || call->gtCallType == CT_HELPER);
// Don't support tail calling helper methods.
// But we might encounter tail calls dispatched via JIT helper appear as a tail call to helper.
- noway_assert(!call->IsTailCall() || call->IsTailCallViaHelper() || call->gtCallType == CT_USER_FUNC);
+ noway_assert(!call->IsTailCall() || call->IsTailCallViaJitHelper() || call->gtCallType == CT_USER_FUNC);
// Non-virtual direct/indirect calls: Work out if the address of the
// call is known at JIT time. If not it is either an indirect call
@@ -3106,8 +3469,11 @@ GenTree* Lowering::LowerDirectCall(GenTreeCall* call)
switch (accessType)
{
case IAT_VALUE:
- // Non-virtual direct call to known address
- if (!IsCallTargetInRange(addr) || call->IsTailCallViaHelper())
+ // Non-virtual direct call to known address.
+ // For JIT helper based tailcall (only used on x86) the target
+ // address is passed as an arg to the helper so we want a node for
+ // it.
+ if (!IsCallTargetInRange(addr) || call->IsTailCallViaJitHelper())
{
result = AddrGen(addr);
}
@@ -3121,11 +3487,22 @@ GenTree* Lowering::LowerDirectCall(GenTreeCall* call)
case IAT_PVALUE:
{
- // Non-virtual direct calls to addresses accessed by
- // a single indirection.
- GenTree* cellAddr = AddrGen(addr);
- GenTree* indir = Ind(cellAddr);
- result = indir;
+ bool isR2RRelativeIndir = false;
+#if defined(FEATURE_READYTORUN_COMPILER) && defined(TARGET_ARMARCH)
+ // Skip inserting the indirection node to load the address that is already
+ // computed in REG_R2R_INDIRECT_PARAM as a hidden parameter. Instead during the
+ // codegen, just load the call target from REG_R2R_INDIRECT_PARAM.
+ isR2RRelativeIndir = call->IsR2RRelativeIndir();
+#endif // FEATURE_READYTORUN_COMPILER && TARGET_ARMARCH
+
+ if (!isR2RRelativeIndir)
+ {
+ // Non-virtual direct calls to addresses accessed by
+ // a single indirection.
+ GenTree* cellAddr = AddrGen(addr);
+ GenTree* indir = Ind(cellAddr);
+ result = indir;
+ }
break;
}
@@ -3166,16 +3543,9 @@ GenTree* Lowering::LowerDelegateInvoke(GenTreeCall* call)
(CORINFO_FLG_DELEGATE_INVOKE | CORINFO_FLG_FINAL)) == (CORINFO_FLG_DELEGATE_INVOKE | CORINFO_FLG_FINAL));
GenTree* thisArgNode;
- if (call->IsTailCallViaHelper())
+ if (call->IsTailCallViaJitHelper())
{
-#ifdef TARGET_X86 // x86 tailcall via helper follows normal calling convention, but with extra stack args.
- const unsigned argNum = 0;
-#else // !TARGET_X86
- // In case of helper dispatched tail calls, "thisptr" will be the third arg.
- // The first two args are: real call target and addr of args copy routine.
- const unsigned argNum = 2;
-#endif // !TARGET_X86
-
+ const unsigned argNum = 0;
fgArgTabEntry* thisArgTabEntry = comp->gtArgEntryByArgNum(call, argNum);
thisArgNode = thisArgTabEntry->GetNode();
}
@@ -3192,8 +3562,7 @@ GenTree* Lowering::LowerDelegateInvoke(GenTreeCall* call)
unsigned lclNum;
-#ifdef TARGET_X86
- if (call->IsTailCallViaHelper() && originalThisExpr->IsLocal())
+ if (call->IsTailCallViaJitHelper() && originalThisExpr->IsLocal())
{
// For ordering purposes for the special tailcall arguments on x86, we forced the
// 'this' pointer in this case to a local in Compiler::fgMorphTailCall().
@@ -3204,7 +3573,6 @@ GenTree* Lowering::LowerDelegateInvoke(GenTreeCall* call)
lclNum = originalThisExpr->AsLclVarCommon()->GetLclNum();
}
else
-#endif // TARGET_X86
{
unsigned delegateInvokeTmp = comp->lvaGrabTemp(true DEBUGARG("delegate invoke call"));
@@ -3971,25 +4339,10 @@ GenTree* Lowering::LowerVirtualVtableCall(GenTreeCall* call)
{
noway_assert(call->gtCallType == CT_USER_FUNC);
- // If this is a tail call via helper, thisPtr will be the third argument.
- int thisPtrArgNum;
- regNumber thisPtrArgReg;
-
-#ifndef TARGET_X86 // x86 tailcall via helper follows normal calling convention, but with extra stack args.
- if (call->IsTailCallViaHelper())
- {
- thisPtrArgNum = 2;
- thisPtrArgReg = REG_ARG_2;
- }
- else
-#endif // !TARGET_X86
- {
- thisPtrArgNum = 0;
- thisPtrArgReg = comp->codeGen->genGetThisArgReg(call);
- }
+ regNumber thisPtrArgReg = comp->codeGen->genGetThisArgReg(call);
// get a reference to the thisPtr being passed
- fgArgTabEntry* argEntry = comp->gtArgEntryByArgNum(call, thisPtrArgNum);
+ fgArgTabEntry* argEntry = comp->gtArgEntryByArgNum(call, 0);
assert(argEntry->GetRegNum() == thisPtrArgReg);
assert(argEntry->GetNode()->OperIs(GT_PUTARG_REG));
GenTree* thisPtr = argEntry->GetNode()->AsUnOp()->gtGetOp1();
@@ -4132,24 +4485,6 @@ GenTree* Lowering::LowerVirtualStubCall(GenTreeCall* call)
GenTree* result = nullptr;
-#ifdef TARGET_64BIT
- // Non-tail calls: Jump Stubs are not taken into account by VM for mapping an AV into a NullRef
- // exception. Therefore, JIT needs to emit an explicit null check. Note that Jit64 too generates
- // an explicit null check.
- //
- // Tail calls: fgMorphTailCall() materializes null check explicitly and hence no need to emit
- // null check.
-
- // Non-64-bit: No need to null check the this pointer - the dispatch code will deal with this.
- // The VM considers exceptions that occur in stubs on 64-bit to be not managed exceptions and
- // it would be difficult to change this in a way so that it affects only the right stubs.
-
- if (!call->IsTailCallViaHelper())
- {
- call->gtFlags |= GTF_CALL_NULLCHECK;
- }
-#endif
-
// This is code to set up an indirect call to a stub address computed
// via dictionary lookup.
if (call->gtCallType == CT_INDIRECT)
@@ -4188,19 +4523,30 @@ GenTree* Lowering::LowerVirtualStubCall(GenTreeCall* call)
// accessed via an indirection.
GenTree* addr = AddrGen(stubAddr);
-#ifdef TARGET_X86
// On x86, for tailcall via helper, the JIT_TailCall helper takes the stubAddr as
// the target address, and we set a flag that it's a VSD call. The helper then
// handles any necessary indirection.
- if (call->IsTailCallViaHelper())
+ if (call->IsTailCallViaJitHelper())
{
result = addr;
}
-#endif // TARGET_X86
-
- if (result == nullptr)
+ else
{
- result = Ind(addr);
+
+ bool shouldOptimizeVirtualStubCall = false;
+#if defined(FEATURE_READYTORUN_COMPILER) && defined(TARGET_ARMARCH)
+ // Skip inserting the indirection node to load the address that is already
+ // computed in REG_R2R_INDIRECT_PARAM as a hidden parameter. Instead during the
+ // codegen, just load the call target from REG_R2R_INDIRECT_PARAM.
+ // However, for tail calls, the call target is always computed in RBM_FASTTAILCALL_TARGET
+ // and so do not optimize virtual stub calls for such cases.
+ shouldOptimizeVirtualStubCall = !call->IsTailCall();
+#endif // FEATURE_READYTORUN_COMPILER && TARGET_ARMARCH
+
+ if (!shouldOptimizeVirtualStubCall)
+ {
+ result = Ind(addr);
+ }
}
}
@@ -5378,6 +5724,7 @@ void Lowering::CheckNode(Compiler* compiler, GenTree* node)
#ifdef FEATURE_SIMD
case GT_SIMD:
+ case GT_HWINTRINSIC:
assert(node->TypeGet() != TYP_SIMD12);
break;
#ifdef TARGET_64BIT
diff --git a/src/coreclr/src/jit/lower.h b/src/coreclr/src/jit/lower.h
index 838b86e74f4c49..0582cfe61e5d67 100644
--- a/src/coreclr/src/jit/lower.h
+++ b/src/coreclr/src/jit/lower.h
@@ -92,7 +92,7 @@ class Lowering final : public Phase
void ContainCheckStoreIndir(GenTreeIndir* indirNode);
void ContainCheckMul(GenTreeOp* node);
void ContainCheckShiftRotate(GenTreeOp* node);
- void ContainCheckStoreLoc(GenTreeLclVarCommon* storeLoc);
+ void ContainCheckStoreLoc(GenTreeLclVarCommon* storeLoc) const;
void ContainCheckCast(GenTreeCast* node);
void ContainCheckCompare(GenTreeOp* node);
void ContainCheckBinary(GenTreeOp* node);
@@ -132,11 +132,19 @@ class Lowering final : public Phase
GenTreeCC* LowerNodeCC(GenTree* node, GenCondition condition);
void LowerJmpMethod(GenTree* jmp);
void LowerRet(GenTreeUnOp* ret);
+ void LowerStoreLocCommon(GenTreeLclVarCommon* lclVar);
+ void LowerRetStruct(GenTreeUnOp* ret);
+ void LowerRetStructLclVar(GenTreeUnOp* ret);
+ void LowerCallStruct(GenTreeCall* call);
+ void LowerStoreCallStruct(GenTreeBlk* store);
+#if !defined(WINDOWS_AMD64_ABI)
+ GenTreeLclVar* SpillStructCallResult(GenTreeCall* call) const;
+#endif // WINDOWS_AMD64_ABI
GenTree* LowerDelegateInvoke(GenTreeCall* call);
GenTree* LowerIndirectNonvirtCall(GenTreeCall* call);
GenTree* LowerDirectCall(GenTreeCall* call);
GenTree* LowerNonvirtPinvokeCall(GenTreeCall* call);
- GenTree* LowerTailCallViaHelper(GenTreeCall* callNode, GenTree* callTarget);
+ GenTree* LowerTailCallViaJitHelper(GenTreeCall* callNode, GenTree* callTarget);
void LowerFastTailCall(GenTreeCall* callNode);
void RehomeArgForFastTailCall(unsigned int lclNum,
GenTree* insertTempBefore,
@@ -310,9 +318,177 @@ class Lowering final : public Phase
#ifdef FEATURE_HW_INTRINSICS
void LowerHWIntrinsic(GenTreeHWIntrinsic* node);
void LowerHWIntrinsicCC(GenTreeHWIntrinsic* node, NamedIntrinsic newIntrinsicId, GenCondition condition);
+ void LowerHWIntrinsicCmpOp(GenTreeHWIntrinsic* node, genTreeOps cmpOp);
+ void LowerHWIntrinsicCreate(GenTreeHWIntrinsic* node);
void LowerFusedMultiplyAdd(GenTreeHWIntrinsic* node);
+
+#ifdef TARGET_ARM64
+ bool IsValidConstForMovImm(GenTreeHWIntrinsic* node);
+#endif // TARGET_ARM64
+
+ union VectorConstant {
+ int8_t i8[32];
+ uint8_t u8[32];
+ int16_t i16[16];
+ uint16_t u16[16];
+ int32_t i32[8];
+ uint32_t u32[8];
+ int64_t i64[4];
+ uint64_t u64[4];
+ float f32[8];
+ double f64[4];
+ };
+
+ //----------------------------------------------------------------------------------------------
+ // ProcessArgForHWIntrinsicCreate: Processes an argument for the Lowering::LowerHWIntrinsicCreate method
+ //
+ // Arguments:
+ // arg - The argument to process
+ // argIdx - The index of the argument being processed
+ // vecCns - The vector constant being constructed
+ // baseType - The base type of the vector constant
+ //
+ // Returns:
+ // true if arg was a constant; otherwise, false
+ static bool HandleArgForHWIntrinsicCreate(GenTree* arg, int argIdx, VectorConstant& vecCns, var_types baseType)
+ {
+ switch (baseType)
+ {
+ case TYP_BYTE:
+ case TYP_UBYTE:
+ {
+ if (arg->IsCnsIntOrI())
+ {
+ vecCns.i8[argIdx] = static_cast(arg->AsIntCon()->gtIconVal);
+ return true;
+ }
+ else
+ {
+ // We expect the VectorConstant to have been already zeroed
+ assert(vecCns.i8[argIdx] == 0);
+ }
+ break;
+ }
+
+ case TYP_SHORT:
+ case TYP_USHORT:
+ {
+ if (arg->IsCnsIntOrI())
+ {
+ vecCns.i16[argIdx] = static_cast(arg->AsIntCon()->gtIconVal);
+ return true;
+ }
+ else
+ {
+ // We expect the VectorConstant to have been already zeroed
+ assert(vecCns.i16[argIdx] == 0);
+ }
+ break;
+ }
+
+ case TYP_INT:
+ case TYP_UINT:
+ {
+ if (arg->IsCnsIntOrI())
+ {
+ vecCns.i32[argIdx] = static_cast(arg->AsIntCon()->gtIconVal);
+ return true;
+ }
+ else
+ {
+ // We expect the VectorConstant to have been already zeroed
+ assert(vecCns.i32[argIdx] == 0);
+ }
+ break;
+ }
+
+ case TYP_LONG:
+ case TYP_ULONG:
+ {
+ if (arg->OperIs(GT_CNS_LNG))
+ {
+ vecCns.i64[argIdx] = static_cast(arg->AsLngCon()->gtLconVal);
+ return true;
+ }
+ else
+ {
+ // We expect the VectorConstant to have been already zeroed
+ assert(vecCns.i64[argIdx] == 0);
+ }
+ break;
+ }
+
+ case TYP_FLOAT:
+ {
+ if (arg->IsCnsFltOrDbl())
+ {
+ vecCns.f32[argIdx] = static_cast(arg->AsDblCon()->gtDconVal);
+ return true;
+ }
+ else
+ {
+ // We expect the VectorConstant to have been already zeroed
+ // We check against the i32, rather than f32, to account for -0.0
+ assert(vecCns.i32[argIdx] == 0);
+ }
+ break;
+ }
+
+ case TYP_DOUBLE:
+ {
+ if (arg->IsCnsFltOrDbl())
+ {
+ vecCns.f64[argIdx] = static_cast