Merge pull request adafruit#7724 from tannewt/get_perfbench_running

Improve iMX RT performance

Author: tannewt

ports/atmel-samd/Makefile

@@ -366,7 +366,7 @@ all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2
 $(BUILD)/firmware.elf: $(OBJ) $(GENERATED_LD_FILE)
 	$(STEPECHO) "LINK $@"
 	$(Q)echo $(OBJ) > $(BUILD)/firmware.objs
-	$(Q)$(CC) -o $@ $(LDFLAGS) @$(BUILD)/firmware.objs -Wl,--start-group $(LIBS) -Wl,--end-group
+	$(Q)$(CC) -o $@ $(LDFLAGS) @$(BUILD)/firmware.objs -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group
 	$(Q)$(SIZE) $@ | $(PYTHON) $(TOP)/tools/build_memory_info.py $(GENERATED_LD_FILE) $(BUILD)
 
 $(BUILD)/firmware.bin: $(BUILD)/firmware.elf

ports/mimxrt10xx/Makefile

@@ -49,7 +49,12 @@ INC += \
 CFLAGS += -ftree-vrp -DNDEBUG
 
 # TinyUSB defines
-CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=512 -DCFG_TUD_CDC_RX_BUFSIZE=512 -DCFG_TUD_MIDI_TX_BUFSIZE=512 -DCFG_TUD_CDC_TX_BUFSIZE=512 -DCFG_TUD_MSC_BUFSIZE=1024
+CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_CDC_RX_BUFSIZE=512 -DCFG_TUD_CDC_TX_BUFSIZE=512
+ifeq ($(CHIP_FAMILY), MIMXRT1011)
+CFLAGS += -DCFG_TUD_MIDI_RX_BUFSIZE=64 -DCFG_TUD_MIDI_TX_BUFSIZE=64 -DCFG_TUD_MSC_BUFSIZE=512
+else
+CFLAGS += -DCFG_TUD_MIDI_RX_BUFSIZE=512 -DCFG_TUD_MIDI_TX_BUFSIZE=512 -DCFG_TUD_MSC_BUFSIZE=1024
+endif
 
 #Debugging/Optimization
 # Never set -fno-inline because we use inline to move small functions into routines that must be
@@ -76,11 +81,15 @@ CFLAGS += \
 	-g3 -Wno-unused-parameter \
 	-ffunction-sections -fdata-sections -fstack-usage
 
-OPTIMIZATION_FLAGS ?= -O2 -fno-inline-functions
+OPTIMIZATION_FLAGS ?= -O2
 
 # option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
 CFLAGS += $(OPTIMIZATION_FLAGS)
 
+ifeq ($(CIRCUITPY_SWO_TRACE), 1)
+  CFLAGS += -finstrument-functions -finstrument-functions-exclude-file-list=tinyusb -finstrument-functions-exclude-function-list='USB_OTG1_IRQHandler,usb_irq_handler,nlr_push,CLOCK_EnableClock,CLOCK_SetDiv,CLOCK_SetMux,__DMB,__ISB,__DSB,SCB_EnableICache,SCB_EnableDCache,ARM_MPU_Disable,ARM_MPU_Enable,SCB_DisableDCache,SCB_DisableICache,__enable_irq,__disable_irq,__set_MSP,port_get_raw_ticks,supervisor_ticks_ms64'
+endif
+
 LD_FILES = $(wildcard boards/$(BOARD)/*.ld) $(addprefix linking/, flash/$(FLASH).ld chip_family/$(CHIP_FAMILY).ld common.ld)
 
 LD_SCRIPT_FLAG := -Wl,-T,
@@ -171,20 +180,22 @@ all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex
 
 $(BUILD)/firmware.elf: $(OBJ) $(LD_FILES)
 	$(STEPECHO) "LINK $@"
-	$(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out %.ld, $^) -Wl,--start-group $(LIBS) -Wl,--end-group
+	$(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out %.ld, $^) -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group
 
+# -R excludes sections from the output files.
 $(BUILD)/firmware.bin: $(BUILD)/firmware.elf
 	$(STEPECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@
+	$(Q)$(OBJCOPY) -O binary -R .stack -R .dtcm_bss $^ $@
 
 $(BUILD)/firmware.uf2: $(BUILD)/firmware.elf
 	$(STEPECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@-binpart
+	$(Q)$(OBJCOPY) -O binary -R .stack -R .dtcm_bss -R .ivt -R .flash_config $^ $@-binpart
 	$(Q)$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $@-binpart
-	$(Q)rm $@-binpart
+
+# $(Q)rm $@-binpart
 
 $(BUILD)/firmware.hex: $(BUILD)/firmware.elf
-	$(Q)$(OBJCOPY) -O ihex -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@
+	$(Q)$(OBJCOPY) -O ihex -R .stack -R .dtcm_bss $< $@
 
 include $(TOP)/py/mkrules.mk
 

ports/mimxrt10xx/background.c

@@ -27,7 +27,11 @@
 
 #include "supervisor/port.h"
 
-void port_background_task(void) {
+#include "supervisor/linker.h"
+
+#include "fsl_common.h"
+
+void PLACE_IN_ITCM(port_background_task)(void) {
 }
 
 void port_background_tick(void) {
@@ -38,5 +42,6 @@ void port_background_tick(void) {
 
 void port_start_background_task(void) {
 }
+
 void port_finish_background_task(void) {
 }

ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h

@@ -16,3 +16,8 @@
 
 #define DEFAULT_UART_BUS_RX (&pin_GPIO_09)
 #define DEFAULT_UART_BUS_TX (&pin_GPIO_10)
+
+#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO_09)
+#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO_10)
+
+#define MICROPY_HW_LED_STATUS (&pin_GPIO_11)

ports/mimxrt10xx/boards/metro_m7_1011/board.c

@@ -47,3 +47,18 @@ const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
 };
 
 // Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
+
+bool mimxrt10xx_board_reset_pin_number(const mcu_pin_obj_t *pin) {
+    #if CIRCUITPY_SWO_TRACE
+    if (pin == &pin_GPIO_AD_09) {
+        IOMUXC_SetPinMux( /* Add these lines*/
+            IOMUXC_GPIO_AD_09_ARM_TRACE_SWO,
+            0U);
+        IOMUXC_SetPinConfig( /* Add these lines*/
+            IOMUXC_GPIO_AD_09_ARM_TRACE_SWO,
+            0x00F9U);
+        return true;
+    }
+    #endif
+    return false;
+}

ports/mimxrt10xx/boards/metro_m7_1011/flash_config.c

@@ -10,7 +10,7 @@
 #include "fsl_flexspi_nor_boot.h"
 
 
-__attribute__((section(".boot_hdr.ivt")))
+__attribute__((section(".boot_hdr.ivt"),used))
 /*************************************
  *  IVT Data
  *************************************/
@@ -25,7 +25,7 @@ const ivt image_vector_table = {
     IVT_RSVD                          /* Reserved = 0 */
 };
 
-__attribute__((section(".boot_hdr.boot_data")))
+__attribute__((section(".boot_hdr.boot_data"),used))
 /*************************************
  *  Boot Data
  *************************************/

ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c

@@ -118,7 +118,12 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction(
 
 void common_hal_digitalio_digitalinout_set_value(
     digitalio_digitalinout_obj_t *self, bool value) {
-    GPIO_PinWrite(self->pin->gpio, self->pin->number, value);
+    GPIO_Type *gpio = self->pin->gpio;
+    if (value) {
+        gpio->DR_SET = 1 << self->pin->number;
+    } else {
+        gpio->DR_CLEAR = 1 << self->pin->number;
+    }
 }
 
 bool common_hal_digitalio_digitalinout_get_value(

ports/mimxrt10xx/common-hal/microcontroller/__init__.c

@@ -36,21 +36,22 @@
 #include "shared-bindings/microcontroller/__init__.h"
 #include "shared-bindings/microcontroller/Pin.h"
 #include "shared-bindings/microcontroller/Processor.h"
+#include "supervisor/linker.h"
 #include "supervisor/shared/safe_mode.h"
 #include "supervisor/shared/translate/translate.h"
 
 void common_hal_mcu_delay_us(uint32_t delay) {
     mp_hal_delay_us(delay);
 }
 
-volatile uint32_t nesting_count = 0;
-void common_hal_mcu_disable_interrupts(void) {
+volatile uint32_t PLACE_IN_DTCM_BSS(nesting_count) = 0;
+void PLACE_IN_ITCM(common_hal_mcu_disable_interrupts)(void) {
     __disable_irq();
     __DMB();
     nesting_count++;
 }
 
-void common_hal_mcu_enable_interrupts(void) {
+void PLACE_IN_ITCM(common_hal_mcu_enable_interrupts)(void) {
     if (nesting_count == 0) {
         // This is very very bad because it means there was mismatched disable/enables
         reset_into_safe_mode(SAFE_MODE_INTERRUPT_ERROR);

ports/mimxrt10xx/common-hal/neopixel_write/__init__.c

@@ -64,9 +64,7 @@ void PLACE_IN_ITCM(common_hal_neopixel_write)(const digitalio_digitalinout_obj_t
     const uint32_t pin = digitalinout->pin->number;
 
     __disable_irq();
-    // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL
-    CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-    DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+    // Use DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL
     DWT->CYCCNT = 0;
 
     for (;;) {
@@ -88,12 +86,12 @@ void PLACE_IN_ITCM(common_hal_neopixel_write)(const digitalio_digitalinout_obj_t
             mask = 0x80;
         }
     }
+    // Enable interrupts again
+    __enable_irq();
 
     // Update the next start.
     next_start_raw_ticks = port_get_raw_ticks(NULL) + 4;
 
-    // Enable interrupts again
-    __enable_irq();
 }
 
 #pragma GCC pop_options

ports/mimxrt10xx/linking/common.ld

@@ -6,7 +6,7 @@ Boards can setup reserved flash with _ld_reserved_flash_size in board.ld. */
 
 ENTRY(Reset_Handler)
 
-code_size = 1M;
+code_size = _ld_flash_size >= 4M ? 2M : 1M;
 _ld_default_stack_size = 20K;
 
 /* Default reserved flash to nothing. */
@@ -22,9 +22,9 @@ MEMORY
     FLASH_IVT (rx)        : ORIGIN = 0x60001000, LENGTH = 4K
     /* Place the ISRs 48k in to leave room for the bootloader when it is available. */
     FLASH_FIRMWARE (rx)   : ORIGIN = 0x6000C000, LENGTH = code_size - 48K
-    FLASH_FATFS (r)       : ORIGIN = 0x60100000, LENGTH = _ld_flash_size - code_size - _ld_reserved_flash_size
+    FLASH_FATFS (r)       : ORIGIN = 0x60000000 + code_size, LENGTH = _ld_flash_size - code_size - _ld_reserved_flash_size
     /* Teensy uses the last bit of flash for recovery. */
-    RESERVED_FLASH        : ORIGIN = 0x60100000 + _ld_flash_size - _ld_reserved_flash_size, LENGTH = _ld_reserved_flash_size
+    RESERVED_FLASH        : ORIGIN = 0x60000000 + code_size + _ld_flash_size - _ld_reserved_flash_size, LENGTH = _ld_reserved_flash_size
     OCRAM (rwx)           : ORIGIN = 0x20200000, LENGTH = ram_size - 64K
     DTCM (x)              : ORIGIN = 0x20000000, LENGTH = 32K
     ITCM (x)              : ORIGIN = 0x00000000, LENGTH = 32K
@@ -52,24 +52,59 @@ SECTIONS
         . = ALIGN(4);
     } > FLASH_IVT
 
-    .text :
+    /* Align for 256 ISR entries and place first in flash. Otherwise the UF2
+       bootloader can't find it because it uses its own flash_config and ivt. */
+    .isr_vector : ALIGN(4 * 256)
     {
         . = ALIGN(4);
-        __VECTOR_TABLE = .;
-        __VECTOR_RAM = .;
-        _ld_isr_table = .;
-
         KEEP(*(.isr_vector))         /* Startup code */
+        . = ALIGN(4);
+    } > ITCM AT> FLASH_FIRMWARE
+    _ld_isr_destination = ADDR(.isr_vector);
+    _ld_isr_flash_copy = LOADADDR(.isr_vector);
+    _ld_isr_size = SIZEOF(.isr_vector);
+    /* Used by the bootloader to start user code. */
+    __VECTOR_TABLE = LOADADDR(.isr_vector);
+
+    .text :
+    {
+        . = ALIGN(4);
     *(EXCLUDE_FILE(
         *fsl_flexspi.o
+        *dcd_ci_hs.o
+        *tusb_fifo.o
+        *usbd.o
+        *string0.o
+        *py/nlr*.o
+        *py/obj.o
+        *py/gc.o
+        *py/map.o
+        *py/runtime.o
+        *py/objboundmeth.o
+        *py/objtype.o
     ) .text*)                /* .text* sections (code) */
-        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+
+        /* Keep USB processing functions out of RAM because we don't know which will be used.
+           We try to only keep USB interrupt related functions. */
+        *dcd_ci_hs.o(.text.process_*_request .text.dcd_edpt* .text.dcd_init .text.dcd_set_address)
+        *usbd.o(.text.process_*_request .text.process_[gs]et* .text.tud_* .text.usbd_* .text.configuration_reset .text.invoke_*)
+
+        /* Anything marked cold/unlikely should be in flash. */
+        *(.text.unlikely.*)
+
+    *(EXCLUDE_FILE(
+        *dcd_ci_hs.o
+        *py/objboundmeth.o
+        *py/objtype.o
+    ) .rodata*)        /* .rodata* sections (constants, strings, etc.) */
         . = ALIGN(4);
     } > FLASH_FIRMWARE
 
     .ARM.exidx :
     {
+        __exidx_start = .;
         *(.ARM.exidx*)
+        __exidx_end = .;
         *(.gnu.linkonce.armexidx.*)
         _etext = .;        /* define a global symbol at end of code */
         __etext = .;       /* define a global symbol at end of code */
@@ -81,7 +116,6 @@ SECTIONS
     {
         . = ALIGN(4);
         *(.data*)               /* .data* sections */
-        *fsl_flexspi.o(.text*)
         . = ALIGN(4);
     } > OCRAM AT> FLASH_FIRMWARE
     _ld_ocram_data_destination = ADDR(.data);
@@ -93,7 +127,7 @@ SECTIONS
     {
         . = ALIGN(4);
 
-        *(.bss*)
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
         *(COMMON)
 
         . = ALIGN(4);
@@ -103,11 +137,23 @@ SECTIONS
     _ld_heap_start = _ld_ocram_bss_start + _ld_ocram_bss_size;
     _ld_heap_end = ORIGIN(OCRAM) + LENGTH(OCRAM);
 
-    .itcm :
+
+    .itcm : ALIGN(4)
     {
         . = ALIGN(4);
         *(.itcm.*)
-
+        *fsl_flexspi.o(.text*)
+        *dcd_ci_hs.o(.text*)
+        *tusb_fifo.o(.text*)
+        *py/objboundmeth.o(.text*)
+        *py/objtype.o(.text*)
+        *py/obj.o(.text*)
+        *py/gc.o(.text*)
+        *py/map.o(.text*)
+        *py/nlr*.o(.text*)
+        *py/runtime.o(.text*)
+        *(.text.process_*_isr .text.dcd_event_* .text.osal_queue*)
+        *string0.o(.text*)
         . = ALIGN(4);
     } > ITCM AT> FLASH_FIRMWARE
     _ld_itcm_destination = ADDR(.itcm);
@@ -119,6 +165,9 @@ SECTIONS
         . = ALIGN(4);
 
         *(.dtcm_data.*)
+        *dcd_ci_hs.o(.rodata*)
+        *py/objboundmeth.o(.rodata*)
+        *py/objtype.o(.rodata*)
 
         . = ALIGN(4);
     } > DTCM AT> FLASH_FIRMWARE
@@ -139,7 +188,7 @@ SECTIONS
     _ld_dtcm_bss_start = ADDR(.dtcm_bss);
     _ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
 
-    .stack :
+    .stack (NOLOAD) :
     {
         . = ALIGN(8);
         _ld_stack_bottom = .;