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roishtar GFX ok
1 parent fd735ea commit a30a278

10 files changed

Lines changed: 10 additions & 5 deletions

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cores/thundr/cfg/mame2mra.toml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,7 @@
22
sourcefile=[ "namcos86.cpp" ]
33

44
debug = { machines=[
5-
# not booting
6-
"roishtar",
5+
# GFX problems
76
"genpeitd",
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]}
98

@@ -14,6 +13,7 @@ names=[
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{ machine="hopmappy",names="Fast" },
1514
{ machine="wndrmomo",names="Kick,Jump" },
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{ machine="roishtar",names="Cast Spell,Select Spell" },
16+
{ machine="genpeitd",names="Attack,Jump" },
1717
]
1818

1919
[header]

cores/thundr/hdl/jtthundr_busmux.v

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,8 @@ module jtthundr_busmux(
4242
output reg [7:0] mdin, sdin
4343
);
4444

45+
localparam [12:0] OBJMMR=13'h1FF4;
46+
4547
wire [7:0] bdin;
4648
wire mbank_cs, sbank_cs,
4749
scr0_cs, scr1_cs, oram_cs, vma;
@@ -53,7 +55,7 @@ assign sbank_cs = bsel ? ssbank_cs : msbank_cs;
5355
assign scr0_cs = bsel ? sscr0_cs : mscr0_cs;
5456
assign scr1_cs = bsel ? sscr1_cs : mscr1_cs;
5557
assign oram_cs = bsel ? soram_cs : moram_cs;
56-
assign ommr_cs = oram_cs && baddr>13'h7f4 && baddr<13'h7f8;
58+
assign ommr_cs = oram_cs && baddr[12:2]==OBJMMR[12:2];
5759
assign latch0_cs = bsel ? slatch0_cs : mlatch0_cs;
5860
assign latch1_cs = bsel ? slatch1_cs : mlatch1_cs;
5961

cores/thundr/hdl/jtthundr_objscan.v

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,8 +40,8 @@ module jtthundr_objscan(
4040
input [ 7:0] debug_bus
4141
);
4242

43-
localparam [8:0] XOS=9'h3b;
44-
localparam [7:0] YOS=8'h1f;
43+
localparam [8:0] XOS=9'h1f8;
44+
localparam [7:0] YOS=8'h0f;
4545
localparam [1:0] HLARGE=2'd2; // 32-pixel wide object
4646

4747
reg [7:0] y, vos_dr;
@@ -53,6 +53,9 @@ reg [1:0] hos, vos, hmsb_nx;
5353
reg [4:0] nx_ysub;
5454
reg inzone, wide=0;
5555
wire draw_step, hsub, cen, hcnt_nx;
56+
`ifdef SIMULATION
57+
wire [12:0] full_a = {ram_addr,1'b0};
58+
`endif
5659

5760
assign draw_step = st==3;
5861
assign objcnt = raw_addr[2+:7];
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