debugging CUS30 shared memory access

Author: jotego

cores/rthunder/hdl/jtrthunder_cenloop.v

@@ -21,7 +21,7 @@ module jtrthunder_cenloop(
     input             clk,
     input      [ 1:0] busy,
 
-    output            cen_main, cen_sub, cen_mcu,
+    output            cen_main, cen_sub, cen_mcu, mcu_seln,
 
     output     [15:0] fave, fworst // average cpu_cen frequency in kHz
 );
@@ -34,6 +34,7 @@ parameter FCLK = 49152,
 
 reg     [3:0] cpu_cen;
 reg     [1:0] clk4;
+reg           cen_main_l;
 wire          over;
 wire [  CW:0] cencnt_nx;
 reg  [CW-1:0] cencnt=0;
@@ -46,9 +47,11 @@ assign cencnt_nx = {1'b0,cencnt}+NUM[CW:0] -
 
 assign cen_main = cpu_cen[0];
 assign cen_sub  = cpu_cen[1];
-assign cen_mcu  =|cpu_cen[3:0];
+assign cen_mcu  =|cpu_cen[3:1];
+assign mcu_seln = (over&(clk4==0)) | cen_main | cen_main_l;
 
 always @(posedge clk) begin
+    cen_main_l <= cen_main;
     if( ~&blank ) blank <= blank + 1'd1 ;
     cencnt  <= cencnt_nx[CW] ? {CW{1'b1}} : cencnt_nx[CW-1:0];
     if( over && bsyg ) begin

cores/rthunder/hdl/jtrthunder_game.v

@@ -26,7 +26,7 @@ reg  [ 7:0] dbg_mux;
 wire [ 7:0] backcolor, st_main, mdout, c30_dout;
 wire [ 8:0] scr0x, scr0y, scr1x, scr1y;
 wire        cen_main, cen_sub, cen_mcu, flip, mmr0_cs, mmr1_cs, brnw, tile_bank,
-            mrnw, bsel, mc30_cs;
+            mrnw, bsel, mc30_cs, mcu_seln;
 // Configuration through MRA header
 wire        scr2bpp, sndext_en;
 
@@ -65,6 +65,7 @@ jtrthunder_cenloop u_cen(
     .cen_main   ( cen_main  ),
     .cen_sub    ( cen_sub   ),
     .cen_mcu    ( cen_mcu   ),
+    .mcu_seln   ( mcu_seln  ),
 
     .fave       ( fave      ),
     .fworst     (           )
@@ -142,7 +143,7 @@ jtrthunder_sound u_sound(
     .service    ( service   ),
 
     // sub 6809 connection to CUS30
-    .bsel       ( bsel      ),
+    .mcu_seln   ( mcu_seln  ),
     .c30_dout   ( c30_dout  ),
     .mc30_cs    ( mc30_cs   ),
     .mrnw       ( mrnw      ),

cores/rthunder/hdl/jtrthunder_sound.v

@@ -19,7 +19,7 @@
 module jtrthunder_sound(
     input               rst, clk,
                         cen_fm, cen_fm2, cen_mcu,
-                        lvbl, bsel,
+                        lvbl, mcu_seln,
 
     input        [15:0] dipsw,
     input        [ 6:0] joystick1, joystick2,
@@ -149,7 +149,7 @@ jtframe_6801mcu #(.ROMW(12),.SLOW_FRC(2),.MODEL("HD63701V")) u_63701(
 jtcus30 u_wav(
     .rst        ( rst           ),  // original does not have a reset pin
     .clk        ( clk           ),
-    .bsel       ( ~bsel         ),
+    .bsel       ( mcu_seln      ),
     .cen        ( cen_mcu       ),
 
     .xdin       ( c30_dout      ),

cores/shouse/hdl/jtcus30_mmr.v

@@ -214,11 +214,11 @@ initial begin
         if( fcnt!=SIZE ) begin
             $display("WARNING: Missing %d bytes for %m.mmr",SIZE-fcnt);
         end else begin
-            $display("\tlvol = %X",{  mmr[0][3:0], mmr[8][3:0], mmr[16][3:0], mmr[24][3:0], mmr[32][3:0], mmr[40][3:0], mmr[48][3:0], mmr[56][3:0],{0{1'b0}}});
-            $display("\trvol = %X",{  mmr[4][3:0], mmr[12][3:0], mmr[20][3:0], mmr[28][3:0], mmr[36][3:0], mmr[44][3:0], mmr[52][3:0], mmr[60][3:0],{0{1'b0}}});
-            $display("\tno_en = %X",{  mmr[60][7], mmr[4][7], mmr[12][7], mmr[20][7], mmr[28][7], mmr[36][7], mmr[44][7], mmr[52][7],{0{1'b0}}});
-            $display("\twsel = %X",{  mmr[1][7:4], mmr[9][7:4], mmr[17][7:4], mmr[25][7:4], mmr[33][7:4], mmr[41][7:4], mmr[49][7:4], mmr[57][7:4],{0{1'b0}}});
-            $display("\tfreq = %X",{  mmr[1][3:0], mmr[2][7:0], mmr[3][7:0], mmr[9][3:0], mmr[10][7:0], mmr[11][7:0], mmr[17][3:0], mmr[18][7:0], mmr[19][7:0], mmr[25][3:0], mmr[26][7:0], mmr[27][7:0], mmr[33][3:0], mmr[34][7:0], mmr[35][7:0], mmr[41][3:0], mmr[42][7:0], mmr[43][7:0], mmr[49][3:0], mmr[50][7:0], mmr[51][7:0], mmr[57][3:0], mmr[58][7:0], mmr[59][7:0],{0{1'b0}}});
+            $display("\tlvol = %X",{  mmr_init[0][3:0], mmr_init[8][3:0], mmr_init[16][3:0], mmr_init[24][3:0], mmr_init[32][3:0], mmr_init[40][3:0], mmr_init[48][3:0], mmr_init[56][3:0],{0{1'b0}}});
+            $display("\trvol = %X",{  mmr_init[4][3:0], mmr_init[12][3:0], mmr_init[20][3:0], mmr_init[28][3:0], mmr_init[36][3:0], mmr_init[44][3:0], mmr_init[52][3:0], mmr_init[60][3:0],{0{1'b0}}});
+            $display("\tno_en = %X",{  mmr_init[60][7], mmr_init[4][7], mmr_init[12][7], mmr_init[20][7], mmr_init[28][7], mmr_init[36][7], mmr_init[44][7], mmr_init[52][7],{0{1'b0}}});
+            $display("\twsel = %X",{  mmr_init[1][7:4], mmr_init[9][7:4], mmr_init[17][7:4], mmr_init[25][7:4], mmr_init[33][7:4], mmr_init[41][7:4], mmr_init[49][7:4], mmr_init[57][7:4],{0{1'b0}}});
+            $display("\tfreq = %X",{  mmr_init[1][3:0], mmr_init[2][7:0], mmr_init[3][7:0], mmr_init[9][3:0], mmr_init[10][7:0], mmr_init[11][7:0], mmr_init[17][3:0], mmr_init[18][7:0], mmr_init[19][7:0], mmr_init[25][3:0], mmr_init[26][7:0], mmr_init[27][7:0], mmr_init[33][3:0], mmr_init[34][7:0], mmr_init[35][7:0], mmr_init[41][3:0], mmr_init[42][7:0], mmr_init[43][7:0], mmr_init[49][3:0], mmr_init[50][7:0], mmr_init[51][7:0], mmr_init[57][3:0], mmr_init[58][7:0], mmr_init[59][7:0],{0{1'b0}}});
         end
     end
     $fclose(f);

modules/jt680x/ucode/680x.yaml

@@ -165,11 +165,14 @@ ucode:
   - name: psh16
     start: 2
     seq:
-      - s_rmux,    ld0_opnd, s_ea
-      - one_rmux,  ld1_opnd, s_ea
-      - sub_alu    s_ld, wr, s_ea
-      - s_rmux,    ld0_opnd, s_ea
-      - sub_alu,   s_ld, wr, s_ea, md_shift, ret_jsr
+      # both byte pushes take the same number of cycles: 3
+      # this makes easier to multiplex the memory with another CPU
+      - s_rmux,    ld0_opnd, wr, s_ea
+      - one_rmux,  ld1_opnd, wr, s_ea
+      - sub_alu    s_ld,     wr, s_ea
+      - s_rmux,    ld0_opnd, wr, s_ea, md_shift
+      -                      wr, s_ea, md_shift
+      - sub_alu,   s_ld,     wr, s_ea, md_shift, ret_jsr
   - name: pul8 # 1+11 ucode cycles = 3 bus cycles
     start: 3
     seq:
@@ -293,7 +296,8 @@ ucode:
       - imm_jsr
       - pc_rmux, ld1_opnd, branch
       -          ld0_opnd
-      - add_alu, pc_ld, idle4_jsr
+      - add_alu, pc_ld
+      -
       - fetch
       - # wait for the fetch
       - ni
@@ -383,7 +387,7 @@ ucode:
       - ni
   - mnemo: [ WAI ]
     seq: # 9*4 = 36 codes
-      - inc_pc, idle4_jsr
+      - inc_pc
       - pc_rmux, ld0_opnd
       - md_ld, psh16_jsr
 
@@ -415,5 +419,5 @@ ucode:
 
       - cc_rmux, ld0_opnd, s_ea
       - md_ld, psh8_jsr,   s_ea
-      - idle6_jsr
+      - idle4_jsr
       - swi, ivrd_jsr