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jerryz123jerryz123
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Merge pull request #2293 from ucb-bar/chisel7
Experimental chisel7 support
2 parents 90745a2 + 431744d commit feef6e0

20 files changed

+1102
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lines changed

‎.github/workflows/chipyard-chisel7.yml‎

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@@ -0,0 +1,44 @@
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name: chipyard-chisel7
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on:
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pull_request:
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branches:
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- main
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- '1.[0-9]*.x'
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workflow_dispatch:
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defaults:
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run:
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shell: bash -leo pipefail {0}
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jobs:
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chisel7-firrtl:
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name: chisel7-firrtl
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runs-on: ubuntu-latest
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steps:
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- name: Checkout
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uses: actions/checkout@v4
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- name: Install DTC (device-tree-compiler)
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run: |
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sudo apt-get update
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sudo apt-get install -y device-tree-compiler
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- name: Set up JDK 17 (Temurin)
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uses: actions/setup-java@v4
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with:
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distribution: 'temurin'
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java-version: '17'
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cache: 'sbt'
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- name: Init submodules (saturn only)
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run: |
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scripts/init-submodules-no-riscv-tools-nolog.sh --saturn
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- name: Run firrtl target with Chisel 7
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env:
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USE_CHISEL7: "1"
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run: |
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cd sims/verilator
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make firrtl
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‎build.sbt‎

Lines changed: 55 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
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import Tests._
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33
val chisel6Version = "6.7.0"
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val chisel7Version = "7.0.0-RC4"
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val chiselTestVersion = "6.0.0"
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val scalaVersionFromChisel = "2.13.16"
67

@@ -92,12 +93,17 @@ lazy val chisel6Settings = Seq(
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libraryDependencies ++= Seq("org.chipsalliance" %% "chisel" % chisel6Version),
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addCompilerPlugin("org.chipsalliance" % "chisel-plugin" % chisel6Version cross CrossVersion.full)
9495
)
96+
lazy val chisel7Settings = Seq(
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libraryDependencies ++= Seq("org.chipsalliance" %% "chisel" % chisel7Version),
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addCompilerPlugin("org.chipsalliance" % "chisel-plugin" % chisel7Version cross CrossVersion.full)
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)
95100
lazy val chisel3Settings = Seq(
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libraryDependencies ++= Seq("edu.berkeley.cs" %% "chisel3" % chisel3Version),
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addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % chisel3Version cross CrossVersion.full)
98103
)
99104

100-
lazy val chiselSettings = chisel6Settings ++ Seq(
105+
// Select Chisel 7 when USE_CHISEL7 is set in the environment; default to Chisel 6.
106+
lazy val chiselSettings = (if (sys.env.contains("USE_CHISEL7")) chisel7Settings else chisel6Settings) ++ Seq(
101107
libraryDependencies ++= Seq(
102108
"org.apache.commons" % "commons-lang3" % "3.12.0",
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"org.apache.commons" % "commons-text" % "1.9"
@@ -115,11 +121,17 @@ lazy val scalaTestSettings = Seq(
115121

116122
// -- Rocket Chip --
117123

118-
lazy val hardfloat = freshProject("hardfloat", file("generators/hardfloat/hardfloat"))
119-
.settings(chiselSettings)
120-
.settings(commonSettings)
121-
.dependsOn(midas_target_utils)
122-
.settings(scalaTestSettings)
124+
lazy val hardfloat = {
125+
val useChisel7 = sys.env.contains("USE_CHISEL7")
126+
var hf = freshProject("hardfloat", file("generators/hardfloat/hardfloat"))
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.settings(chiselSettings)
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.settings(commonSettings)
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.settings(scalaTestSettings)
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if (!useChisel7) {
131+
hf = hf.dependsOn(midas_target_utils)
132+
}
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hf
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}
123135

124136
lazy val rocketMacros = (project in rocketChipDir / "macros")
125137
.settings(commonSettings)
@@ -154,24 +166,55 @@ lazy val testchipip = withInitCheck((project in file("generators/testchipip")),
154166
.settings(commonSettings)
155167

156168
lazy val chipyard = {
169+
val useChisel7 = sys.env.contains("USE_CHISEL7")
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// Base chipyard project with always-on dependencies
158171
// Use explicit Project(...) so the project id remains 'chipyard'
159-
var cy = Project(id = "chipyard", base = file("generators/chipyard"))
160-
.dependsOn(
172+
val baseProjects: Seq[ProjectReference] =
173+
Seq(
161174
testchipip, rocketchip, boom, rocketchip_blocks, rocketchip_inclusive_cache,
162-
dsptools, rocket_dsp_utils,
163175
icenet, tracegen,
164176
constellation, barf, shuttle, rerocc,
165-
firrtl2_bridge
166-
)
177+
).map(sbt.Project.projectToRef) ++
178+
(if (useChisel7) Seq() else Seq(sbt.Project.projectToRef(firrtl2_bridge))) ++
179+
(if (useChisel7) Seq() else Seq(sbt.Project.projectToRef(dsptools), sbt.Project.projectToRef(rocket_dsp_utils)))
180+
181+
val baseDeps: Seq[sbt.ClasspathDep[sbt.ProjectReference]] =
182+
baseProjects.map(pr => sbt.ClasspathDependency(pr, None))
183+
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// Optional settings to exclude specific sources under Chisel 7
185+
val dspExcludeSettings: Seq[Def.Setting[_]] = if (useChisel7) Seq(
186+
Compile / unmanagedSources := {
187+
val files = (Compile / unmanagedSources).value
188+
val root = (ThisBuild / baseDirectory).value
189+
val excludeList = Seq(
190+
// Directories or files relative to repo root
191+
"generators/chipyard/src/main/scala/example/dsptools",
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"generators/chipyard/src/main/scala/config/MMIOAcceleratorConfigs.scala",
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"generators/chipyard/src/main/scala/config/TutorialConfigs.scala",
194+
"generators/chipyard/src/main/scala/upf"
195+
).map(p => (root / p).getCanonicalFile)
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val (excludeDirs, excludeFiles) = excludeList.partition(_.isDirectory)
197+
files.filterNot { f =>
198+
val cf = f.getCanonicalFile
199+
excludeFiles.contains(cf) || excludeDirs.exists(d => cf.toPath.startsWith(d.toPath))
200+
}
201+
}
202+
) else Seq.empty
203+
204+
var cy = Project(id = "chipyard", base = file("generators/chipyard"))
205+
.dependsOn(baseDeps: _*)
167206
.settings(libraryDependencies ++= rocketLibDeps.value)
168207
.settings(
169208
libraryDependencies ++= Seq(
170209
"org.reflections" % "reflections" % "0.10.2"
171210
)
172211
)
173212
.settings(commonSettings)
174-
.settings(Compile / unmanagedSourceDirectories += file("tools/stage/src/main/scala"))
213+
.settings(Compile / unmanagedSourceDirectories += {
214+
if (useChisel7) file("tools/stage-chisel7/src/main/scala")
215+
else file("tools/stage/src/main/scala")
216+
})
217+
.settings(dspExcludeSettings: _*)
175218

176219
// Optional modules discovered via initialized submodules (no env or manifest)
177220
val optionalModules: Seq[(String, ProjectReference)] = Seq(

‎common.mk‎

Lines changed: 51 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,21 @@ define require_cmd
1616
|| { echo "Error: $(1) not found in PATH. Set up your tool environment before building this target." >&2; exit 1; }
1717
endef
1818

19+
# Require minimum firtool version when building with Chisel 7
20+
define require_firtool_version
21+
@if [ -n "$(USE_CHISEL7)" ]; then \
22+
vline=`$(FIRTOOL_BIN) --version 2>/dev/null | grep -E 'CIRCT firtool-[0-9]+\.[0-9]+\.[0-9]+' | head -1`; \
23+
vstr=$${vline##*firtool-}; \
24+
if [ -z "$$vstr" ]; then \
25+
echo "Error: Unable to parse firtool version. Ensure '$(FIRTOOL_BIN) --version' prints 'CIRCT firtool-X.Y.Z'." >&2; exit 1; \
26+
fi; \
27+
maj=$${vstr%%.*}; rest=$${vstr#*.}; min=$${rest%%.*}; pat=$${rest#*.}; \
28+
if [ "$$maj" -lt 1 ] || { [ "$$maj" -eq 1 ] && [ "$$min" -lt 129 ]; }; then \
29+
echo "Error: USE_CHISEL7 requires firtool >= 1.129.0, found $$vstr. Please update CIRCT firtool." >&2; exit 1; \
30+
fi; \
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fi
32+
endef
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1934
#########################################################################################
2035
# specify user-interface variables
2136
#########################################################################################
@@ -68,7 +83,9 @@ HELP_COMMANDS += \
6883
" run-tests = run all assembly and benchmark tests" \
6984
" launch-sbt = start sbt terminal" \
7085
" find-configs = list Chipyard Config classes (eligible CONFIG=)" \
71-
" find-config-fragments = list all config. fragments"
86+
" find-config-fragments = list all config. fragments" \
87+
" run-firtool = run CIRCT firtool to emit Verilog/JSON/mem conf" \
88+
" run-uniquify = run uniquify-module-names on current elaboration outputs"
7289

7390
#########################################################################################
7491
# include additional subproject make fragments
@@ -159,6 +176,9 @@ export mfc_extra_anno_contents
159176
export sfc_extra_low_transforms_anno_contents
160177
$(FINAL_ANNO_FILE) $(MFC_EXTRA_ANNO_FILE) &: $(ANNO_FILE)
161178
echo "$$mfc_extra_anno_contents" > $(MFC_EXTRA_ANNO_FILE)
179+
ifdef USE_CHISEL7
180+
jq '. + [{"class":"firrtl.transforms.BlackBoxTargetDirAnno","targetDir":"$(GEN_COLLATERAL_DIR)/blackboxes"}]' $(MFC_EXTRA_ANNO_FILE) > $(MFC_EXTRA_ANNO_FILE).tmp && mv $(MFC_EXTRA_ANNO_FILE).tmp $(MFC_EXTRA_ANNO_FILE)
181+
endif
162182
jq -s '[.[][]]' $(ANNO_FILE) $(MFC_EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE)
163183

164184
.PHONY: firrtl
@@ -179,6 +199,12 @@ SFC_MFC_TARGETS = \
179199

180200
MFC_BASE_LOWERING_OPTIONS ?= emittedLineLength=2048,noAlwaysComb,disallowLocalVariables,verifLabels,disallowPortDeclSharing,locationInfoStyle=wrapInAtSquareBracket
181201

202+
# Extra firtool flags are only applied when building with Chisel 7
203+
FIRTOOL_EXTRA_FLAGS ?=
204+
ifdef USE_CHISEL7
205+
FIRTOOL_EXTRA_FLAGS += --verification-flavor=if-else-fatal --disable-layers=Verification.Assume,Verification.Cover
206+
endif
207+
182208
# DOC include start: FirrtlCompiler
183209
$(MFC_LOWERING_OPTIONS):
184210
mkdir -p $(dir $@)
@@ -190,6 +216,7 @@ endif
190216

191217
$(SFC_MFC_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(MFC_LOWERING_OPTIONS)
192218
$(call require_cmd,$(FIRTOOL_BIN))
219+
$(require_firtool_version)
193220
rm -rf $(GEN_COLLATERAL_DIR)
194221
(set -o pipefail && $(FIRTOOL_BIN) \
195222
--format=fir \
@@ -204,12 +231,34 @@ $(SFC_MFC_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(MFC_LOWERING_OPTIONS)
204231
--repl-seq-mem-file=$(MFC_SMEMS_CONF) \
205232
--annotation-file=$(FINAL_ANNO_FILE) \
206233
--split-verilog \
234+
$(FIRTOOL_EXTRA_FLAGS) \
207235
-o $(GEN_COLLATERAL_DIR) \
208236
$(FIRRTL_FILE) |& tee $(FIRTOOL_LOG_FILE))
209237
$(SED) $(SED_INPLACE) 's/.*/& /' $(MFC_SMEMS_CONF) # need trailing space for SFC macrocompiler
210-
touch $(MFC_BB_MODS_FILELIST) # if there are no BB's then the file might not be generated, instead always generate it
238+
ifdef USE_CHISEL7
239+
# Construct blackbox file list from files emitted into gen-collateral/blackboxes
240+
@if [ -d "$(GEN_COLLATERAL_DIR)/blackboxes" ]; then \
241+
find "$(GEN_COLLATERAL_DIR)/blackboxes" -type f \( -name '*.v' -o -name '*.sv' -o -name '*.cc' \) | \
242+
sed -e 's;^$(GEN_COLLATERAL_DIR)/;;' > "$(MFC_BB_MODS_FILELIST)"; \
243+
else \
244+
: > "$(MFC_BB_MODS_FILELIST)"; \
245+
fi
246+
else
247+
# If there are no BB's then the file might not be generated; ensure it exists
248+
touch $(MFC_BB_MODS_FILELIST)
249+
endif
211250
# DOC include end: FirrtlCompiler
212251

252+
.PHONY: run-firtool
253+
run-firtool: $(SFC_MFC_TARGETS)
254+
@echo "[run-firtool] Generated: $(SFC_MFC_TARGETS)"
255+
256+
# Convenience alias to re-run the uniquify step (module/filelist splitting)
257+
.PHONY: run-uniquify
258+
run-uniquify: $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILELIST) $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED)
259+
@echo "[run-uniquify] Updated filelists under $(GEN_COLLATERAL_DIR)"
260+
261+
213262
$(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILELIST) $(MFC_MODEL_HRCHY_JSON_UNIQUIFIED) &: $(MFC_MODEL_HRCHY_JSON) $(MFC_TOP_HRCHY_JSON) $(MFC_FILELIST) $(MFC_BB_MODS_FILELIST)
214263
$(base_dir)/scripts/uniquify-module-names.py \
215264
--model-hier-json $(MFC_MODEL_HRCHY_JSON) \

‎generators/rocket-chip‎

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