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Merged
anthonycanino merged 2 commits into from
Apr 7, 2023
Merged

Anthony eq #14

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27e46cd
Setting Resets_ZF to right value.
DeepakRajendrakumaran Apr 6, 2023
ea63007
Fixing extract.
DeepakRajendrakumaran Apr 7, 2023
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61 changes: 29 additions & 32 deletions src/coreclr/jit/instr.h
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Original file line number Diff line number Diff line change
Expand Up @@ -119,64 +119,61 @@ enum insFlags : uint64_t
// Resets
Resets_OF = 1ULL << 12,
Resets_SF = 1ULL << 13,
Resets_ZF = 1ULL << 39,
Resets_AF = 1ULL << 14,
Resets_PF = 1ULL << 15,
Resets_CF = 1ULL << 16,
Resets_ZF = 1ULL << 14,
Resets_AF = 1ULL << 15,
Resets_PF = 1ULL << 16,
Resets_CF = 1ULL << 17,

// Undefined
Undefined_OF = 1ULL << 17,
Undefined_SF = 1ULL << 18,
Undefined_ZF = 1ULL << 19,
Undefined_AF = 1ULL << 20,
Undefined_PF = 1ULL << 21,
Undefined_CF = 1ULL << 22,
Undefined_OF = 1ULL << 18,
Undefined_SF = 1ULL << 19,
Undefined_ZF = 1ULL << 20,
Undefined_AF = 1ULL << 21,
Undefined_PF = 1ULL << 22,
Undefined_CF = 1ULL << 23,

// Restore
Restore_SF_ZF_AF_PF_CF = 1ULL << 23,
Restore_SF_ZF_AF_PF_CF = 1ULL << 24,

// x87 instruction
INS_FLAGS_x87Instr = 1ULL << 24,
INS_FLAGS_x87Instr = 1ULL << 25,

// Avx
INS_Flags_IsDstDstSrcAVXInstruction = 1ULL << 25,
INS_Flags_IsDstSrcSrcAVXInstruction = 1ULL << 26,
INS_Flags_IsMskSrcSrcEvexInstruction = 1ULL << 27,
INS_Flags_IsDstDstSrcAVXInstruction = 1ULL << 26,
INS_Flags_IsDstSrcSrcAVXInstruction = 1ULL << 27,
INS_Flags_IsMskSrcSrcEvexInstruction = 1ULL << 28,
INS_Flags_Is3OperandInstructionMask = (INS_Flags_IsDstDstSrcAVXInstruction | INS_Flags_IsDstSrcSrcAVXInstruction | INS_Flags_IsMskSrcSrcEvexInstruction),

// w and s bits
INS_FLAGS_Has_Wbit = 1ULL << 28,
INS_FLAGS_Has_Sbit = 1ULL << 29,
INS_FLAGS_Has_Wbit = 1ULL << 29,
INS_FLAGS_Has_Sbit = 1ULL << 30,

// instruction input size
// if not input size is set, instruction defaults to using
// the emitAttr for size
Input_8Bit = 1ULL << 30,
Input_16Bit = 1ULL << 31,
Input_32Bit = 1ULL << 32,
Input_64Bit = 1ULL << 33,
Input_Mask = (0xFULL) << 30,
Input_8Bit = 1ULL << 31,
Input_16Bit = 1ULL << 32,
Input_32Bit = 1ULL << 33,
Input_64Bit = 1ULL << 34,
Input_Mask = (0xFULL) << 31,

// encoding of the REX.W-bit
REX_W0 = 1ULL << 34,
REX_W1 = 1ULL << 35,
REX_WX = 1ULL << 36,
REX_W0 = 1ULL << 35,
REX_W1 = 1ULL << 36,
REX_WX = 1ULL << 37,

// encoding of the REX.W-bit is considered for EVEX only and W0 or WIG otherwise
REX_W0_EVEX = REX_W0,
REX_W1_EVEX = 1ULL << 37,
REX_W1_EVEX = 1ULL << 38,

// encoding of the REX.W-bit is ignored
REX_WIG = REX_W0,

// whether VEX or EVEX encodings are directly supported
Encoding_VEX = 1ULL << 38,
Encoding_EVEX = 1ULL << 39,
Encoding_VEX = 1ULL << 39,
Encoding_EVEX = 1ULL << 40,

KInstruction = 1ULL << 40,

// Listed above so it is "inline" with the other Resets_* flags
// Resets_ZF = 1ULL << 39,
KInstruction = 1ULL << 41,

// TODO-Cleanup: Remove this flag and its usage from TARGET_XARCH
INS_FLAGS_DONT_CARE = 0x00ULL,
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8 changes: 4 additions & 4 deletions src/coreclr/jit/instrsxarch.h
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Expand Up @@ -609,8 +609,8 @@ INST3(kmovw_msk, "kmovw", IUM_WR, PCKFLT(0x91), BAD_CODE,
INST3(kortestw, "kortestw", IUM_WR, BAD_CODE, BAD_CODE, PCKFLT(0x98), INS_TT_NONE, REX_W0 | Encoding_VEX | Resets_OF | Resets_SF | Writes_ZF | Resets_AF | Resets_PF | Writes_CF | KInstruction)
INST3(vinsertf64x4, "insertf64x4", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x1A), INS_TT_TUPLE4, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Insert 256-bit packed double-precision floating point values
INST3(vinserti64x4, "inserti64x4", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x3A), INS_TT_TUPLE4, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Insert 256-bit packed quadword integer values
INST3(vextractf64x4, "extractf64x4", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x1B), INS_TT_TUPLE4, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Extract 256-bit packed double-precision floating point values
INST3(vextracti64x4, "extracti64x4", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x3B), INS_TT_TUPLE4, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Extract 256-bit packed quadword integer values
INST3(vextractf64x4, "extractf64x4", IUM_WR, SSE3A(0x1B), BAD_CODE, BAD_CODE, INS_TT_TUPLE4, Input_64Bit | REX_W1_EVEX | Encoding_EVEX) // Extract 256-bit packed double-precision floating point values
INST3(vextracti64x4, "extracti64x4", IUM_WR, SSE3A(0x3B), BAD_CODE, BAD_CODE, INS_TT_TUPLE4, Input_64Bit | REX_W1_EVEX | Encoding_EVEX) // Extract 256-bit packed quadword integer values
INST3(vmovdqa64, "movdqa64", IUM_WR, PCKDBL(0x7F), BAD_CODE, PCKDBL(0x6F), INS_TT_FULL_MEM, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_FLAGS_None)
INST3(vmovdqu64, "movdqu64", IUM_WR, SSEFLT(0x7F), BAD_CODE, SSEFLT(0x6F), INS_TT_FULL_MEM, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_FLAGS_None)
INST3(vpandq, "pandq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xDB), INS_TT_FULL, Input_64Bit | REX_W1_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Packed bit-wise AND of two xmm regs
Expand Down Expand Up @@ -642,8 +642,8 @@ INST3(kortestb, "kortestb", IUM_WR, BAD_CODE, BAD_CODE,
INST3(kmovb_gpr, "kmovb", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0x92), INS_TT_NONE, REX_W0 | Encoding_VEX | KInstruction)
INST3(kmovb_msk, "kmovb", IUM_WR, PCKDBL(0x91), BAD_CODE, PCKDBL(0x90), INS_TT_NONE, REX_W0 | Encoding_VEX | KInstruction)

INST3(vextractf32x8, "extractf32x8", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x1B), INS_TT_TUPLE8, Input_32Bit | REX_W0_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Extract 256-bit packed double-precision floating point values
INST3(vextracti32x8, "extracti32x8", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x3B), INS_TT_TUPLE8, Input_32Bit | REX_W0_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Extract 256-bit packed quadword integer values
INST3(vextractf32x8, "extractf32x8", IUM_WR, SSE3A(0x1B), BAD_CODE, BAD_CODE, INS_TT_TUPLE8, Input_32Bit | REX_W0_EVEX | Encoding_EVEX) // Extract 256-bit packed double-precision floating point values
INST3(vextracti32x8, "extracti32x8", IUM_WR, SSE3A(0x3B), BAD_CODE, BAD_CODE, INS_TT_TUPLE8, Input_32Bit | REX_W0_EVEX | Encoding_EVEX) // Extract 256-bit packed quadword integer values
INST3(vinsertf32x8, "insertf32x8", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x1A), INS_TT_TUPLE8, Input_32Bit | REX_W0_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Insert 256-bit packed double-precision floating point values
INST3(vinserti32x8, "inserti32x8", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x3A), INS_TT_TUPLE8, Input_32Bit | REX_W0_EVEX | Encoding_EVEX | INS_Flags_IsDstDstSrcAVXInstruction) // Insert 256-bit packed quadword integer values

Expand Down