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DA1469x: Clock time shifts on reboots #3321

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Merged
vrahane merged 6 commits into from
Oct 29, 2024
Merged

DA1469x: Clock time shifts on reboots #3321

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5f2b136
da1469x/clock: Add missing services
apc067 Oct 25, 2024
e818ba1
da1469x/clock: Eliminate magic numbers
apc067 Oct 25, 2024
b80af16
da1469x/clock: Streamline the LP clock API
apc067 Oct 25, 2024
914f3f7
da1469x/clock: Calculate the RTC dividers
apc067 Oct 25, 2024
217eeb1
da1469x/os-tick: Fix slightly incorrect time-keeping
apc067 Oct 25, 2024
f0cc564
da1469x/clock: Protect register bitfields
apc067 Oct 26, 2024
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da1469x/clock: Calculate the RTC dividers 
This commit adds the function that calculates the RTC divider registers, and
invokes it when the LP clock frequency changes.
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@apc067
apc067 committed Oct 29, 2024
commit 914f3f7f61a6c189b1d4e5cf989d796f90634ca3
5 changes: 5 additions & 0 deletions hw/mcu/dialog/da1469x/include/mcu/da1469x_clock.h
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Original file line number Diff line number Diff line change
Expand Up @@ -170,6 +170,11 @@ uint32_t da1469x_clock_sys_rc32m_freq_get(void);
*/
void da1469x_clock_lp_rcx_disable(void);

/**
* Set the RTC dividers
*/
void da1469x_clock_lp_set_rtc_divs(void);

/**
* Enable AMBA clock(s)
*
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24 changes: 24 additions & 0 deletions hw/mcu/dialog/da1469x/src/da1469x_clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,9 @@
#define XTALRDY_IRQ_DIV (RC32M_FREQ / XTALRDY_IRQ_FREQ)
#define XTALRDY_IRQ_FREQ_MAX (RC32M_FREQ_MAX / XTALRDY_IRQ_DIV)

#define RTC_IN_FREQ_HZ 100
#define RTC_DIV_FRAC_ADJ 10 /* For CLK_RTCDIV_REG::RTC_DIV_DENOM = 0 (1000) */

enum da1469x_sys_clk_sel {
DA1469X_SYS_XTAL32M = 0,
DA1469X_SYS_RC32M,
Expand Down Expand Up @@ -77,6 +80,12 @@ enum da1469x_calib_sel {
DA1469X_CALIB_RCOSC,
};

enum da1469x_rtc_div_denom_sel {
DA1469X_RTC_DIV_DENOM_1000 = 0,
DA1469X_RTC_DIV_DENOM_1024,
};
#define DA1469X_RTC_DIV_DENOM_SEL DA1469X_RTC_DIV_DENOM_1000

static uint32_t g_mcu_clock_rcx_freq;
static uint32_t g_mcu_clock_rc32k_freq;
static uint32_t g_mcu_clock_rc32m_freq = RC32M_FREQ;
Expand Down Expand Up @@ -466,6 +475,21 @@ da1469x_clock_lp_rcx_disable(void)
CRG_TOP->CLK_RCX_REG &= ~CRG_TOP_CLK_RCX_REG_RCX_ENABLE_Msk;
}

void
da1469x_clock_lp_set_rtc_divs(void)
{
/* Please see the DA1469x desig doc section 2.20.4 for details */
uint32_t reg;

reg = ((da1469x_clock_lp_freq_get() % RTC_IN_FREQ_HZ) * RTC_DIV_FRAC_ADJ) <<
CRG_TOP_CLK_RTCDIV_REG_RTC_DIV_FRAC_Pos;
reg |= ((da1469x_clock_lp_freq_get() / RTC_IN_FREQ_HZ)) <<
CRG_TOP_CLK_RTCDIV_REG_RTC_DIV_INT_Pos;
reg |= DA1469X_RTC_DIV_DENOM_SEL << CRG_TOP_CLK_RTCDIV_REG_RTC_DIV_DENOM_Pos;
reg |= CRG_TOP_CLK_RTCDIV_REG_RTC_DIV_ENABLE_Msk;
CRG_TOP->CLK_RTCDIV_REG = reg;
}

static void
da1469x_delay_us(uint32_t delay_us)
{
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2 changes: 2 additions & 0 deletions hw/mcu/dialog/da1469x/src/da1469x_lpclk.c
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Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,8 @@ da1469x_lpclk_notify(void)
if (g_da1469x_lpclk_cmac_cb && g_mcu_lpclk_available) {
g_da1469x_lpclk_cmac_cb(lp_curr_freq);
}

da1469x_clock_lp_set_rtc_divs();
}
}

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