AXI, AXI stream, Ethernet, and PCIe components in System Verilog

业界领先的开源自动化连线集成工具

An efficient fuzzy finder that helps to locate files, buffers, mrus, gtags, etc. on the fly for both vim and neovim.

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Must-have verilog systemverilog modules

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

🌸 A command-line fuzzy finder

FSM (Finite State Machine) tools for Verilog HDL.

SystemVerilog Development Environment

Package manager and build abstraction tool for FPGA/ASIC development

a little task queue for python

中国程序员容易发音错误的单词

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为推广RISC-V尽些薄力

This repository provides state of the art (SoTA) results for all machine learning problems. We do our best to keep this repository up to date. If you do find a problem's SoTA result is out of date …

Vim 从入门到精通

提供多款 Shadowrocket 规则，带广告过滤功能。用于 iOS 未越狱设备选择性地自动翻墙。

NVDLA Web Content

RTL, Cmodel, and testbench for NVDLA

Documentation for NVDLA.

A list of ICs and IPs for AI, Machine Learning and Deep Learning.

Chrome开发者工具中文手册

随着FCC中文社区的快速发展和更多小伙伴的崛起，此项目已从个人项目升级到团队项目。详情请移步：

freeCodeCamp.org's open-source codebase and curriculum. Learn math, programming, and computer science for free.

【编程随想】收藏的开源项目清单