Skip to content
This repository was archived by the owner on Jan 23, 2023. It is now read-only.

Expand GT_JCC/SETCC condition support #17733

Merged
briansull merged 10 commits into from
Jan 11, 2019
Merged

Expand GT_JCC/SETCC condition support #17733

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
10 commits
Select commit Hold shift + click to select a range
3b24ec2
Introduce GenCondition
mikedn Apr 23, 2018
47a636a
Change jpe/jpo to jp/jnp
mikedn Apr 23, 2018
5ec539e
Add support for floating point conditions
mikedn Apr 23, 2018
1db84a3
Reimplement genCodeForJumpTrue using GenCondition
mikedn Apr 23, 2018
16f868f
Move genCodeForSetcc to codegenlinear.cpp
mikedn Apr 23, 2018
c675d7b
Replace genSetRegToCond with inst_SETCC
mikedn Apr 23, 2018
10c66ee
Delete dead code
mikedn Apr 23, 2018
937389d
Remove genJumpKindForOper
mikedn Apr 23, 2018
326783e
Delete legacy code
mikedn May 22, 2018
12cfc7f
Fix conflicts
mikedn Sep 7, 2018
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Next Next commit
Delete dead code
  • Loading branch information
@mikedn
mikedn committed Nov 10, 2018
commit 10c66eeec065fa21c6a10a2dcef76479841f9890
9 changes: 0 additions & 9 deletions src/jit/codegen.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -100,15 +100,6 @@ class CodeGen : public CodeGenInterface
};
static emitJumpKind genJumpKindForOper(genTreeOps cmp, CompareKind compareKind);

// For a given compare oper tree, returns the conditions to use with jmp/set in 'jmpKind' array.
// The corresponding elements of jmpToTrueLabel indicate whether the target of the jump is to the
// 'true' label or a 'false' label.
//
// 'true' label corresponds to jump target of the current basic block i.e. the target to
// branch to on compare condition being true. 'false' label corresponds to the target to
// branch to on condition being false.
static void genJumpKindsForTree(GenTree* cmpTree, emitJumpKind jmpKind[2], bool jmpToTrueLabel[2]);

static bool genShouldRoundFP();

GenTreeIndir indirForm(var_types type, GenTree* base);
Expand Down
48 changes: 0 additions & 48 deletions src/jit/codegenarm.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1237,54 +1237,6 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
}
}

//------------------------------------------------------------------------
// genSetRegToCond: Generate code to materialize a condition into a register.
//
// Arguments:
// dstReg - The target register to set to 1 or 0
// tree - The GenTree Relop node that was used to set the Condition codes
//
// Return Value: none
//
// Preconditions:
// The condition codes must already have been appropriately set.
//
void CodeGen::genSetRegToCond(regNumber dstReg, GenTree* tree)
{
// Emit code like that:
// ...
// beq True
// bvs True ; this second branch is typically absent
// movs rD, #0
// b Next
// True:
// movs rD, #1
// Next:
// ...

emitJumpKind jumpKind[2];
bool branchToTrueLabel[2];
genJumpKindsForTree(tree, jumpKind, branchToTrueLabel);

BasicBlock* labelTrue = genCreateTempLabel();
getEmitter()->emitIns_J(emitter::emitJumpKindToIns(jumpKind[0]), labelTrue);

if (jumpKind[1] != EJ_NONE)
{
getEmitter()->emitIns_J(emitter::emitJumpKindToIns(jumpKind[1]), labelTrue);
}

getEmitter()->emitIns_R_I(INS_mov, emitActualTypeSize(tree->gtType), dstReg, 0);

BasicBlock* labelNext = genCreateTempLabel();
getEmitter()->emitIns_J(INS_b, labelNext);

genDefineTempLabel(labelTrue);
getEmitter()->emitIns_R_I(INS_mov, emitActualTypeSize(tree->gtType), dstReg, 1);
genDefineTempLabel(labelNext);
}

//------------------------------------------------------------------------
// genLongToIntCast: Generate code for long to int casts.
//
// Arguments:
Expand Down
57 changes: 0 additions & 57 deletions src/jit/codegenarm64.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3128,63 +3128,6 @@ void CodeGen::genCodeForSwap(GenTreeOp* tree)
gcInfo.gcMarkRegPtrVal(oldOp1Reg, type2);
}

//-------------------------------------------------------------------------------------------
// genSetRegToCond: Set a register 'dstReg' to the appropriate one or zero value
// corresponding to a binary Relational operator result.
//
// Arguments:
// dstReg - The target register to set to 1 or 0
// tree - The GenTree Relop node that was used to set the Condition codes
//
// Return Value: none
//
// Notes:
// A full 64-bit value of either 1 or 0 is setup in the 'dstReg'
//-------------------------------------------------------------------------------------------

void CodeGen::genSetRegToCond(regNumber dstReg, GenTree* tree)
{
emitJumpKind jumpKind[2];
bool branchToTrueLabel[2];
genJumpKindsForTree(tree, jumpKind, branchToTrueLabel);
assert(jumpKind[0] != EJ_NONE);

// Set the reg according to the flags
inst_SET(jumpKind[0], dstReg);

// Do we need to use two operation to set the flags?
//
if (jumpKind[1] != EJ_NONE)
{
emitter* emit = getEmitter();
bool ordered = ((tree->gtFlags & GTF_RELOP_NAN_UN) == 0);
insCond secondCond;

// The only ones that require two operations are the
// floating point compare operations of BEQ or BNE.UN
//
if (tree->gtOper == GT_EQ)
{
// This must be an ordered comparison.
assert(ordered);
assert(jumpKind[1] == EJ_vs); // We complement this value
secondCond = INS_COND_VC; // for the secondCond
}
else // gtOper == GT_NE
{
// This must be BNE.UN (unordered comparison)
assert((tree->gtOper == GT_NE) && !ordered);
assert(jumpKind[1] == EJ_lo); // We complement this value
secondCond = INS_COND_HS; // for the secondCond
}

// The second instruction is a 'csinc' instruction that either selects the previous dstReg
// or increments the ZR register, which produces a 1 result.

emit->emitIns_R_R_R_COND(INS_csinc, EA_8BYTE, dstReg, dstReg, REG_ZR, secondCond);
}
}

//------------------------------------------------------------------------
// genIntToFloatCast: Generate code to cast an int/long to float/double
//
Expand Down
123 changes: 0 additions & 123 deletions src/jit/codegenarmarch.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3156,129 +3156,6 @@ void CodeGen::genCreateAndStoreGCInfo(unsigned codeSize,
compiler->compInfoBlkSize = 0; // not exposed by the GCEncoder interface
}

//-------------------------------------------------------------------------------------------
// genJumpKindsForTree: Determine the number and kinds of conditional branches
// necessary to implement the given GT_CMP node
//
// Arguments:
// cmpTree - (input) The GenTree node that is used to set the Condition codes
// - The GenTree Relop node that was used to set the Condition codes
// jmpKind[2] - (output) One or two conditional branch instructions
// jmpToTrueLabel[2] - (output) On Arm64 both branches will always branch to the true label
//
// Return Value:
// Sets the proper values into the array elements of jmpKind[] and jmpToTrueLabel[]
//
// Assumptions:
// At least one conditional branch instruction will be returned.
// Typically only one conditional branch is needed
// and the second jmpKind[] value is set to EJ_NONE
//
void CodeGen::genJumpKindsForTree(GenTree* cmpTree, emitJumpKind jmpKind[2], bool jmpToTrueLabel[2])
{
// On ARM both branches will always branch to the true label
jmpToTrueLabel[0] = true;
jmpToTrueLabel[1] = true;

// For integer comparisons just use genJumpKindForOper
if (!varTypeIsFloating(cmpTree->gtOp.gtOp1))
{
CompareKind compareKind = ((cmpTree->gtFlags & GTF_UNSIGNED) != 0) ? CK_UNSIGNED : CK_SIGNED;
jmpKind[0] = genJumpKindForOper(cmpTree->gtOper, compareKind);
jmpKind[1] = EJ_NONE;
}
else // We have a Floating Point Compare operation
{
assert(cmpTree->OperIsCompare());

// For details on this mapping, see the ARM Condition Code table
// at section A8.3 in the ARMv7 architecture manual or
// at section C1.2.3 in the ARMV8 architecture manual.

// We must check the GTF_RELOP_NAN_UN to find out
// if we need to branch when we have a NaN operand.
//
if ((cmpTree->gtFlags & GTF_RELOP_NAN_UN) != 0)
{
// Must branch if we have an NaN, unordered
switch (cmpTree->gtOper)
{
case GT_EQ:
jmpKind[0] = EJ_eq; // branch or set when equal (and no NaN's)
jmpKind[1] = EJ_vs; // branch or set when we have a NaN
break;

case GT_NE:
jmpKind[0] = EJ_ne; // branch or set when not equal (or have NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_LT:
jmpKind[0] = EJ_lt; // branch or set when less than (or have NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_LE:
jmpKind[0] = EJ_le; // branch or set when less than or equal (or have NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_GT:
jmpKind[0] = EJ_hi; // branch or set when greater than (or have NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_GE:
jmpKind[0] = EJ_hs; // branch or set when greater than or equal (or have NaN's)
jmpKind[1] = EJ_NONE;
break;

default:
unreached();
}
}
else // ((cmpTree->gtFlags & GTF_RELOP_NAN_UN) == 0)
{
// Do not branch if we have an NaN, unordered
switch (cmpTree->gtOper)
{
case GT_EQ:
jmpKind[0] = EJ_eq; // branch or set when equal (and no NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_NE:
jmpKind[0] = EJ_gt; // branch or set when greater than (and no NaN's)
jmpKind[1] = EJ_lo; // branch or set when less than (and no NaN's)
break;

case GT_LT:
jmpKind[0] = EJ_lo; // branch or set when less than (and no NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_LE:
jmpKind[0] = EJ_ls; // branch or set when less than or equal (and no NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_GT:
jmpKind[0] = EJ_gt; // branch or set when greater than (and no NaN's)
jmpKind[1] = EJ_NONE;
break;

case GT_GE:
jmpKind[0] = EJ_ge; // branch or set when greater than or equal (and no NaN's)
jmpKind[1] = EJ_NONE;
break;

default:
unreached();
}
}
}
}

// clang-format off
const CodeGen::GenConditionDesc CodeGen::GenConditionDesc::map[32]
{
Expand Down
1 change: 0 additions & 1 deletion src/jit/codegenlinear.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,6 @@ void genCodeForDivMod(GenTreeOp* treeNode);
void genCodeForMul(GenTreeOp* treeNode);
void genCodeForMulHi(GenTreeOp* treeNode);
void genLeaInstruction(GenTreeAddrMode* lea);
void genSetRegToCond(regNumber dstReg, GenTree* tree);

#if defined(_TARGET_ARMARCH_)
void genScaledAdd(emitAttr attr, regNumber targetReg, regNumber baseReg, regNumber indexReg, int scale);
Expand Down
Loading