[Arm64] ASIMD Implement widening, narrowing, saturating instructions#35379

Merged

echesakov merged 46 commits intodotnet:masterfrom

echesakov:Arm64-ASIMD-Widening-Narrowing-Saturating-Instructions

Apr 29, 2020

Commits on Apr 23, 2020

Add sadalp, uadalp in instrsarm64.h
echesakov
committed
Add sabal{2}, uabal{2} in instrsarm64.h
echesakov
committed
Add sabdl{2}, uabdl{2} in instrsarm64.h
echesakov
committed
Add addhn{2}, raddhn{2}, rsubhn{2}, subhn{2} in instrsarm64.h
echesakov
committed
Add shadd, shsub, uhadd, uhsub in instrsarm64.h
echesakov
committed
Add srhadd, urhadd in instrsarm64.h
echesakov
committed
Add saddl{2}, uaddl{2} in instrsarm64.h
echesakov
committed
Add ssubl{2}, usubl{2} in instrsarm64.h
echesakov
committed
Add saddw{2}, uaddw{2} in instrsarm64.h
echesakov
committed
Add ssubw{2}, usubw{2} in instrsarm64.h
echesakov
committed
Add saddlp, uaddlp in instrsarm64.h
echesakov
committed
Add pmull{2} in instrsarm64.h
echesakov
committed
Add sqadd, sqsub, uqadd, uqsub in instrsarm64.h
echesakov
committed
Add smlal{2}, umlal{2} in instrsarm64.h
echesakov
committed
Add smlsl{2}, umlsl{2} in instrsarm64.h
echesakov
committed
Add smull2, umull2 in instrsarm64.h
echesakov
committed
Update smull,umull in instrsarm64.h
echesakov
committed
Extend scalar encoding IF_DV_3E to support size != 11 in emitarm64.cpp emitfmtsarm64.h
echesakov
committed
Remove giant sequence of case-s and replace them with simple check (fmt == insFmt) in emitarm64.cpp
echesakov
committed
Formatting in emitfmtsarm64.h
echesakov
committed
Add IF_DV_3H and IF_DV_3HI in emitfmtsarm64.h
echesakov
committed
Add EN3K and EN2R in emitarm64.cpp emitfmtsarm64.h
echesakov
committed
Add emitter::optWidenDstArrangement in emitarm64.cpp emitarm64.h
echesakov
committed
Extend encoding IF_DV_2T to support Long Pairwise in emitarm64.cpp
echesakov
committed
Implement emitter::emitInsSanityCheck for IF_DV_3H and IF_DV_3HI in emitarm64.cpp
echesakov
committed
Implement emitter::emitOutputInstr for IF_DV_3H and IF_DV_3HI in emitarm64.cpp
echesakov
committed
Implement emitter::emitDispIns for IF_DV_3H and IF_DV_3HI in emitarm64.cpp
echesakov
committed
Mark IF_DV_3F, IF_DV_3H and IF_DV_3HI as not-writing to GC registers in emitarm64.cpp
echesakov
committed
Implement sqadd, sqsub, uqadd, uqsub in emitter::emitIns_R_R_R in emitarm64.cpp
echesakov
committed
Implement sadalp, saddlp, uadalp and uaddlp in emitter::emitIns_R_R in emitarm64.cpp
echesakov
committed
Implement addhn{2}, raddhn{2}, subhn{2}, rsubhn{2} in emitter::emitIns_R_R_R in emitarm64.cpp
echesakov
committed
Implement sabal{2}, sabdl{2}, saddl{2}, saddw{2}, smlal{2}, smlsl{2}, ssubl{2}, ssubw{2}, uabal{2}, uabdl{2}, uaddl{2}, uaddw{2}, umlal{2}, umlsl{2}, usubl{2}, usubw{2} in emitarm64.cpp
echesakov
committed
Implement pmull{2} in emitter::emitIns_R_R_R in emitarm64.cpp
echesakov
committed
Implement smlal{2}, smlsl{2}, smull{2}, umlal{2}, umlsl{2}, umull{2} in emitter::emitIns_R_R_R_I in emitarm64.cpp
echesakov
committed
Update mul, pmul, smull, umull in emitter::emitIns_R_R_R in emitarm64.cpp
echesakov
committed
Refactor emitter::emitIns_R_R_R in emitarm64.cpp
echesakov
committed
Implement shadd, shsub, srhadd, uhadd, uhsub, urhadd in emitter::emitIns_R_R_R in emitarm64.cpp
echesakov
committed
Add Arm64 emitter unit tests in codegenarm64.cpp
echesakov
committed
Add PerfScore for the new instructions in emitarm64.cpp
echesakov
committed
Add PerfScore for ssra,srsra,usra,ursra in emitarm64.cpp
echesakov
committed
Why "No point doing this in a "real" JIT."? in codegenarm64.cpp
echesakov
committed
Fix disassembly for sxtb, sxth, sxtb, uxtb and uxth in emitarm64.cpp
echesakov
committed
Support "Crypto polynomial (64x64) multiply long" pmull{2} in codegenarm64.cpp emitarm64.cpp emitfmtsarm64.h
echesakov
committed

Commits on Apr 29, 2020