Skip to content
Merged
Show file tree
Hide file tree
Changes from 1 commit
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Next Next commit
Try to zero-extend if it is possible
  • Loading branch information
TIHan committed Apr 12, 2023
commit 14ce0f96e0f32a2bc4b945a9a535784f92b8d26e
11 changes: 10 additions & 1 deletion src/coreclr/jit/codegenarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2964,7 +2964,16 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* lclNode)
else // store into register (i.e move into register)
{
// Assign into targetReg when dataReg (from op1) is not the same register
inst_Mov(targetType, targetReg, dataReg, /* canSkip */ true);
if (!data->isUsedFromReg())
{
inst_Mov(targetType, targetReg, dataReg, /* canSkip */ true);
}
else
{
// We use 'emitActualTypeSize' as ARM64 instructions require 8BYTE or 4BYTE.
inst_Mov_Extend(targetType, true, targetReg, dataReg, /* canSkip */ true,
emitActualTypeSize(targetType));
}
}
genUpdateLifeStore(lclNode, targetReg, varDsc);
}
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/emitarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4185,7 +4185,7 @@ void emitter::emitIns_Mov(

case INS_sxtw:
{
assert(size == EA_8BYTE);
assert((size == EA_8BYTE) || (size == EA_4BYTE));
FALLTHROUGH;
}

Expand Down