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@kunalspathak kunalspathak commented Apr 30, 2023

In #84824, I started marking the previous register assigned during copyReg as live. However, the previous register could be part of the consecutive registers that we are about to assign and marking it "live at this location" will make it unavailable to be assigned to the relevant subsequent RefPosition. Start tracking the consecutive refpositions in use and do not mark such refpositions as live. Alternatively, I could delay this decision until the assignment of the particular Refposition, however, at that point we want to make sure that we are not randomly unmarking a register that was marked as "live" and hide any other unseen problem.

Also fixed a AV that was hitting for JitDump because recently we also started doing copyReg for upperVectorRestore and when we print the interval name, we hit AV because interval->relatedInterval is set to nullptr during register assignment.

Fixes: #85426

@ghost ghost assigned kunalspathak Apr 30, 2023
@ghost ghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 30, 2023
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ghost commented Apr 30, 2023

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Author: kunalspathak
Assignees: kunalspathak
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area-CodeGen-coreclr

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/azp run runtime-coreclr jitstress, runtime-coreclr libraries-jitstress, runtime-coreclr jitstress2-jitstressregs,
runtime-coreclr libraries-jitstress2-jitstressregs, runtime-coreclr jitstressregs, runtime-coreclr libraries-jitstressregs

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@kunalspathak kunalspathak marked this pull request as ready for review May 1, 2023 12:21
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@dotnet/jit-contrib

@kunalspathak kunalspathak merged commit 049acec into dotnet:main May 1, 2023
@kunalspathak kunalspathak deleted the consecutive_and_busy branch May 1, 2023 12:29
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JIT: Assertion failed '(refPosition->refType == RefTypeUpperVectorRestore) || (genCountBits(candidates) == 1)' during 'LSRA build intervals'

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