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Merged
jessebraham merged 3 commits into from
Sep 2, 2024
Merged

QSPI tests #2015

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b5ed0e8
Add QSPI tests
bjoernQ Aug 28, 2024
04c9d72
Simplify
bjoernQ Aug 28, 2024
61d6b0f
Add qspi_write_read test
bjoernQ Aug 28, 2024
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Simplify
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@bjoernQ
bjoernQ committed Aug 28, 2024
commit 04c9d72151f6b5ff3d81842c489b7e3d5c27d2e6
22 changes: 6 additions & 16 deletions hil-test/tests/qspi_read.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ use esp_hal::{
peripherals::Peripherals,
prelude::*,
spi::{
master::{dma::SpiDma, Address, Command, Spi},
master::{Address, Command, Spi, SpiDma},
HalfDuplexMode,
SpiDataMode,
SpiMode,
Expand All @@ -41,21 +41,12 @@ cfg_if::cfg_if! {
}
}

macro_rules! mk_static {
($t:ty,$val:expr) => {{
static STATIC_CELL: static_cell::StaticCell<$t> = static_cell::StaticCell::new();
#[deny(unused_attributes)]
let x = STATIC_CELL.uninit().write(($val));
x
}};
}

struct Context {
spi: esp_hal::peripherals::SPI2,
dma_channel: Channel<'static, DmaChannel0, Blocking>,
miso: esp_hal::gpio::GpioPin<2>,
miso_mirror: Output<'static, GpioPin<3>>,
clocks: &'static Clocks<'static>,
clocks: Clocks<'static>,
}

fn execute(
Expand Down Expand Up @@ -131,7 +122,6 @@ mod tests {

let dma_channel = dma_channel.configure(false, DmaPriority::Priority0);

let clocks = mk_static!(Clocks, clocks);
Context {
spi: peripherals.SPI2,
dma_channel,
Expand All @@ -144,7 +134,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_reads_correctly_from_gpio_pin_0(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
Some(ctx.miso),
Expand All @@ -162,7 +152,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_reads_correctly_from_gpio_pin_1(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
esp_hal::gpio::NO_PIN,
Expand All @@ -180,7 +170,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_reads_correctly_from_gpio_pin_2(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
esp_hal::gpio::NO_PIN,
Expand All @@ -198,7 +188,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_reads_correctly_from_gpio_pin_3(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
esp_hal::gpio::NO_PIN,
Expand Down
24 changes: 7 additions & 17 deletions hil-test/tests/qspi_write.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
//!
//! Connect MOSI (GPIO2) and PCNT (GPIO3) pins.

//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
//% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3

#![no_std]
#![no_main]
Expand All @@ -27,7 +27,7 @@ use esp_hal::{
peripherals::Peripherals,
prelude::*,
spi::{
master::{dma::SpiDma, Address, Command, Spi},
master::{Address, Command, Spi, SpiDma},
HalfDuplexMode,
SpiDataMode,
SpiMode,
Expand All @@ -48,22 +48,13 @@ cfg_if::cfg_if! {
}
}

macro_rules! mk_static {
($t:ty,$val:expr) => {{
static STATIC_CELL: static_cell::StaticCell<$t> = static_cell::StaticCell::new();
#[deny(unused_attributes)]
let x = STATIC_CELL.uninit().write(($val));
x
}};
}

struct Context {
spi: esp_hal::peripherals::SPI2,
pcnt: esp_hal::peripherals::PCNT,
dma_channel: Channel<'static, DmaChannel0, Blocking>,
mosi: esp_hal::gpio::GpioPin<2>,
mosi_mirror: esp_hal::gpio::GpioPin<3>,
clocks: &'static Clocks<'static>,
clocks: Clocks<'static>,
}

fn execute(
Expand Down Expand Up @@ -141,7 +132,6 @@ mod tests {

let dma_channel = dma_channel.configure(false, DmaPriority::Priority0);

let clocks = mk_static!(Clocks, clocks);
Context {
spi: peripherals.SPI2,
pcnt: peripherals.PCNT,
Expand All @@ -155,7 +145,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_writes_correctly_to_pin_0(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
Some(ctx.mosi),
Expand All @@ -182,7 +172,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_writes_correctly_to_pin_1(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
esp_hal::gpio::NO_PIN,
Expand All @@ -209,7 +199,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_writes_correctly_to_pin_2(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
esp_hal::gpio::NO_PIN,
Expand All @@ -236,7 +226,7 @@ mod tests {
#[test]
#[timeout(3)]
fn test_spi_writes_correctly_to_pin_3(ctx: Context) {
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, ctx.clocks)
let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0, &ctx.clocks)
.with_pins(
esp_hal::gpio::NO_PIN,
esp_hal::gpio::NO_PIN,
Expand Down