deep sleep api for esp32

CHANGELOG.md

@@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ### Added
 
 - Add initial LP-IO support for ESP32-C6 (#639)
+- Implement sleep with some wakeup methods for `esp32` (#574)
 
 ### Changed
 

esp-hal-common/Cargo.toml

@@ -13,6 +13,7 @@ license      = "MIT OR Apache-2.0"
 
 [dependencies]
 bitflags             = "2.3.3"
+bitfield             = "0.14.0"
 cfg-if               = "1.0.0"
 critical-section     = "1.1.1"
 embedded-can         = { version = "0.4.1", optional = true }
@@ -64,12 +65,12 @@ basic-toml = "0.1.2"
 serde      = { version = "1.0.164", features = ["derive"] }
 
 [features]
-esp32   = ["esp32/rt"  , "xtensa", "xtensa-lx/esp32",   "xtensa-lx-rt/esp32",   "lock_api", "procmacros/esp32"]
+esp32   = ["esp32/rt",   "xtensa", "xtensa-lx/esp32", "xtensa-lx-rt/esp32", "lock_api", "procmacros/esp32"]
 esp32c2 = ["esp32c2/rt", "riscv",  "procmacros/esp32c2"]
 esp32c3 = ["esp32c3/rt", "riscv",  "procmacros/esp32c3"]
 esp32c6 = ["esp32c6/rt", "riscv",  "procmacros/esp32c6"]
 esp32h2 = ["esp32h2/rt", "riscv",  "procmacros/esp32h2"]
-esp32s2 = ["esp32s2/rt", "xtensa", "xtensa-lx/esp32s2", "xtensa-lx-rt/esp32s2",             "esp-synopsys-usb-otg", "usb-device", "procmacros/esp32s2"]
+esp32s2 = ["esp32s2/rt", "xtensa", "xtensa-lx/esp32s2", "xtensa-lx-rt/esp32s2", "esp-synopsys-usb-otg", "usb-device", "procmacros/esp32s2"]
 esp32s3 = ["esp32s3/rt", "xtensa", "xtensa-lx/esp32s3", "xtensa-lx-rt/esp32s3", "lock_api", "esp-synopsys-usb-otg", "usb-device", "procmacros/esp32s3"]
 
 esp32_40mhz = []

esp-hal-common/src/gpio.rs

@@ -11,6 +11,8 @@
 use core::{convert::Infallible, marker::PhantomData};
 
 use crate::peripherals::{GPIO, IO_MUX};
+#[cfg(xtensa)]
+pub(crate) use crate::rtc_pins;
 pub use crate::soc::gpio::*;
 pub(crate) use crate::{analog, gpio};
 
@@ -89,7 +91,13 @@ pub enum AlternateFunction {
     Function5 = 5,
 }
 
-pub trait RTCPin {}
+pub trait RTCPin {
+    fn rtc_number(&self) -> u8;
+    fn rtc_set_config(&mut self, input_enable: bool, mux: bool, func: u8);
+}
+
+pub trait RTCInputPin: RTCPin {}
+pub trait RTCOutputPin: RTCPin {}
 
 pub trait AnalogPin {}
 
@@ -1397,6 +1405,51 @@ macro_rules! gpio {
     };
 }
 
+#[cfg(xtensa)]
+#[doc(hidden)]
+#[macro_export]
+macro_rules! rtc_pins {
+    (
+        $( ( $pin_num:expr, $rtc_pin:expr, $pin_reg:expr, $prefix:pat ) )+
+    ) => {
+        impl<MODE, const GPIONUM: u8> crate::gpio::RTCPin for GpioPin<MODE, GPIONUM>
+        where
+            Self: crate::gpio::GpioProperties,
+            <Self as crate::gpio::GpioProperties>::PinType: crate::gpio::IsAnalogPin,
+        {
+            fn rtc_number(&self) -> u8 {
+                match GPIONUM {
+                    $(
+                        $pin_num => $rtc_pin,
+                    )+
+                    _ => unreachable!(),
+                }
+            }
+            /// Set the RTC properties of the pin. If `mux` is true then then pin is
+            /// routed to RTC, when false it is routed to IO_MUX.
+            fn rtc_set_config(&mut self, input_enable: bool, mux: bool, func: u8) {
+                use crate::peripherals::RTC_IO;
+                let rtcio = unsafe{ &*RTC_IO::ptr() };
+                match GPIONUM {
+                    $(
+                        $pin_num => {
+                            // disable input
+                            paste::paste!{
+                                rtcio.$pin_reg.modify(|_,w| unsafe {w
+                                    .[<$prefix fun_ie>]().bit(input_enable)
+                                    .[<$prefix mux_sel>]().bit(mux)
+                                    .[<$prefix fun_sel>]().bits(func)
+                                });
+                            }
+                        }
+                    )+
+                        _ => unreachable!(),
+                }
+            }
+        }
+    };
+}
+
 // Following code enables `into_analog`
 
 #[doc(hidden)]

esp-hal-common/src/reset.rs

@@ -2,6 +2,7 @@
 
 use crate::rtc_cntl::SocResetReason;
 
+#[derive(Debug, Copy, Clone)]
 pub enum SleepSource {
     /// In case of deep sleep, reset was not caused by exit from deep sleep
     Undefined = 0,

esp-hal-common/src/rtc_cntl/mod.rs

@@ -14,12 +14,17 @@ use crate::efuse::Efuse;
 use crate::peripherals::{LP_TIMER, LP_WDT};
 #[cfg(not(any(esp32c6, esp32h2)))]
 use crate::peripherals::{RTC_CNTL, TIMG0};
+#[cfg(any(esp32))]
+use crate::rtc_cntl::sleep::{RtcSleepConfig, WakeSource, WakeTriggers};
 use crate::{
     clock::Clock,
     peripheral::{Peripheral, PeripheralRef},
     reset::{SleepSource, WakeupReason},
     Cpu,
 };
+// only include sleep where its been implemented
+#[cfg(any(esp32))]
+pub mod sleep;
 
 #[cfg(any(esp32c6, esp32h2))]
 type RtcCntl = crate::peripherals::LP_CLKRST;
@@ -191,6 +196,64 @@ impl<'d> Rtc<'d> {
     pub fn get_time_ms(&self) -> u64 {
         self.get_time_raw() * 1_000 / RtcClock::get_slow_freq().frequency().to_Hz() as u64
     }
+
+    /// enter deep sleep and wake with the provided `wake_sources`
+    #[cfg(esp32)]
+    pub fn sleep_deep<'a>(
+        &mut self,
+        wake_sources: &[&'a dyn WakeSource],
+        delay: &mut crate::Delay,
+    ) -> ! {
+        let config = RtcSleepConfig::deep();
+        self.sleep(&config, wake_sources, delay);
+        unreachable!();
+    }
+
+    /// enter light sleep and wake with the provided `wake_sources`
+    #[cfg(esp32)]
+    pub fn sleep_light<'a>(
+        &mut self,
+        wake_sources: &[&'a dyn WakeSource],
+        delay: &mut crate::Delay,
+    ) {
+        let config = RtcSleepConfig::default();
+        self.sleep(&config, wake_sources, delay)
+    }
+
+    /// enter sleep wthe the provided `config` and wake with the provided
+    /// `wake_sources`
+    #[cfg(esp32)]
+    pub fn sleep<'a>(
+        &mut self,
+        config: &RtcSleepConfig,
+        wake_sources: &[&'a dyn WakeSource],
+        delay: &mut crate::Delay,
+    ) {
+        let mut config = config.clone();
+        let mut wakeup_triggers = WakeTriggers::default();
+        for wake_source in wake_sources {
+            wake_source.apply(self, &mut wakeup_triggers, &mut config)
+        }
+        config.apply(self);
+        use embedded_hal::blocking::delay::DelayMs;
+        delay.delay_ms(100u32);
+        unsafe {
+            let rtc_cntl = &*RTC_CNTL::ptr();
+
+            rtc_cntl
+                .reset_state
+                .modify(|_, w| w.procpu_stat_vector_sel().set_bit());
+
+            // set bits for what can wake us up
+            rtc_cntl
+                .wakeup_state
+                .modify(|_, w| w.wakeup_ena().bits(wakeup_triggers.0.into()));
+
+            rtc_cntl
+                .state0
+                .write(|w| w.sleep_en().set_bit().slp_wakeup().set_bit());
+        }
+    }
 }
 
 #[cfg(not(any(esp32c6, esp32h2)))]