Skip to content

Conversation

@AnthonyGrondin
Copy link
Contributor

Thank you!

Thank you for your contribution.
Please make sure that your submission includes the following:

Must

  • The code compiles without errors or warnings.
  • All examples work.
  • cargo fmt was run.
  • Your changes were added to the CHANGELOG.md in the proper section.
  • You updated existing examples or added examples (if applicable).
  • Added examples are checked in CI

Nice to have

  • You add a description of your work to this PR.
  • You added proper docs for your newly added features and code.

This PR splits up #465, as suggested in #465 (comment) to move the alignment helper and SHA module refactor into it's own PR to be more easily reviewable.

Code mostly taken from:

I have tested on esp32s3, but not on the other architectures as I don't have them on hand.

@bjoernQ
Copy link
Contributor

bjoernQ commented Aug 24, 2023

Looks good! Just one small thing

@jessebraham
Copy link
Member

Something is not quite right here, running on an ESP32 produces the following output:

Took 26941 cycles
SHA512 Hash output [15, 0e, 8d, ee, c8, d8, dc, de, b1, ef, a2, 86, cf, 49, 6a, ac, 65, 67, 3f, d8, ce, 00, b3, 64, ce, 5e, 51, 48, 10, ee, 4b, 5f, c2, 89, 1d, e1, 53, 81, 21, 1c, ab, 31, b2, c3, c9, ed, ca, 77, e5, d7, 24, 6c, 80, 86, 94, 9a, 1a, 00, 51, e1, 80, ec, 8c, e1]
Took 1595586 cycles
SHA512 Hash output [ee, 8d, 0e, 15, de, dc, d8, c8, 86, a2, ef, b1, ac, 6a, 49, cf, d8, 3f, 67, 65, 64, b3, 00, ce, 48, 51, 5e, ce, 5f, 4b, ee, 10, e1, 1d, 89, c2, 1c, 21, 81, 53, c3, b2, 31, ab, 77, ca, ed, c9, 6c, 24, d7, e5, 9a, 94, 86, 80, e1, 51, 00, 1a, e1, 8c, ec, 80]
HW SHA is 59x faster

I confirmed that the hashes match when running against the main branch.

@AnthonyGrondin
Copy link
Contributor Author

Something is not quite right here, running on an ESP32 produces the following output:

Took 26941 cycles
SHA512 Hash output [15, 0e, 8d, ee, c8, d8, dc, de, b1, ef, a2, 86, cf, 49, 6a, ac, 65, 67, 3f, d8, ce, 00, b3, 64, ce, 5e, 51, 48, 10, ee, 4b, 5f, c2, 89, 1d, e1, 53, 81, 21, 1c, ab, 31, b2, c3, c9, ed, ca, 77, e5, d7, 24, 6c, 80, 86, 94, 9a, 1a, 00, 51, e1, 80, ec, 8c, e1]
Took 1595586 cycles
SHA512 Hash output [ee, 8d, 0e, 15, de, dc, d8, c8, 86, a2, ef, b1, ac, 6a, 49, cf, d8, 3f, 67, 65, 64, b3, 00, ce, 48, 51, 5e, ce, 5f, 4b, ee, 10, e1, 1d, 89, c2, 1c, 21, 81, 53, c3, b2, 31, ab, 77, ca, ed, c9, 6c, 24, d7, e5, 9a, 94, 86, 80, e1, 51, 00, 1a, e1, 8c, ec, 80]
HW SHA is 59x faster

I confirmed that the hashes match when running against the main branch.

I did change the following from the original code, based on what was originally in sha.rs. Did it introduce this bug? I don't have an ESP32 on hand yet to test:
Original:

const U32_FROM_BYTES: fn([u8; 4]) -> u32 = u32::from_ne_bytes;

Updated (This PR):
// ESP32 does reversed order
#[cfg(esp32)]
const U32_FROM_BYTES: fn([u8; 4]) -> u32 = u32::from_be_bytes;
#[cfg(not(esp32))]
const U32_FROM_BYTES: fn([u8; 4]) -> u32 = u32::from_ne_bytes;

- Add CHANGELOG.md entry
- Change reg_access module visibility
Copy link
Member

@jessebraham jessebraham left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM, thanks for taking care of this!

@jessebraham jessebraham merged commit 5a8be30 into esp-rs:main Aug 24, 2023
playfulFence pushed a commit to playfulFence/esp-hal that referenced this pull request Sep 26, 2023
…esp-rs#753)

* Move alignment helper to its own module.

* fix wrong endian on ESP32

- Add CHANGELOG.md entry
- Change reg_access module visibility
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants