No longer publicly expose the PeripheralClockControl struct

CHANGELOG.md

@@ -46,6 +46,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - `Uart::new_with_config` takes an `Config` instead of `Option<Config>`. (#808)
 - `Alarm::set_period` takes a period (duration) instead of a frequency (#812)
 - `Alarm::interrupt_clear` is now `Alarm::clear_interrupt` to be consistent (#812)
+- The `PeripheralClockControl` struct is no longer public, drivers no longer take this as a parameter (#817)
 
 ## [0.12.0]
 

esp-hal-common/src/aes/esp32.rs

@@ -4,8 +4,8 @@ use crate::{
 };
 
 impl<'d> Aes<'d> {
-    pub(super) fn init(&mut self, peripheral_clock_control: &mut PeripheralClockControl) {
-        peripheral_clock_control.enable(PeripheralEnable::Aes);
+    pub(super) fn init(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Aes);
         self.write_endianness(
             Endianness::BigEndian,
             Endianness::BigEndian,

esp-hal-common/src/aes/esp32cX.rs

@@ -4,8 +4,8 @@ use crate::{
 };
 
 impl<'d> Aes<'d> {
-    pub(super) fn init(&mut self, peripheral_clock_control: &mut PeripheralClockControl) {
-        peripheral_clock_control.enable(PeripheralEnable::Aes);
+    pub(super) fn init(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Aes);
         self.write_dma(false);
     }
 

esp-hal-common/src/aes/esp32s2.rs

@@ -4,8 +4,8 @@ use crate::{
 };
 
 impl<'d> Aes<'d> {
-    pub(super) fn init(&mut self, peripheral_clock_control: &mut PeripheralClockControl) {
-        peripheral_clock_control.enable(PeripheralEnable::Aes);
+    pub(super) fn init(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Aes);
         self.write_dma(false);
         self.write_endianness(
             Endianness::BigEndian,

esp-hal-common/src/aes/esp32s3.rs

@@ -4,8 +4,8 @@ use crate::{
 };
 
 impl<'d> Aes<'d> {
-    pub(super) fn init(&mut self, peripheral_clock_control: &mut PeripheralClockControl) {
-        peripheral_clock_control.enable(PeripheralEnable::Aes);
+    pub(super) fn init(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Aes);
         self.write_dma(false);
     }
 

esp-hal-common/src/aes/mod.rs

@@ -11,7 +11,7 @@
 //! ## Example
 //! ### Initialization
 //! ```no_run
-//! let mut aes = Aes::new(peripherals.AES, &mut system.peripheral_clock_control);
+//! let mut aes = Aes::new(peripherals.AES);
 //! ```
 //! ### Creating key and block Buffer
 //! ```no_run
@@ -65,7 +65,6 @@ use crate::{
         generic::{Readable, Reg, RegisterSpec, Resettable, Writable},
         AES,
     },
-    system::PeripheralClockControl,
 };
 
 #[cfg_attr(esp32, path = "esp32.rs")]
@@ -84,13 +83,12 @@ pub struct Aes<'d> {
 }
 
 impl<'d> Aes<'d> {
-    pub fn new(
-        aes: impl Peripheral<P = AES> + 'd,
-        peripheral_clock_control: &mut PeripheralClockControl,
-    ) -> Self {
+    pub fn new(aes: impl Peripheral<P = AES> + 'd) -> Self {
         crate::into_ref!(aes);
-        let mut ret = Self { aes: aes };
-        ret.init(peripheral_clock_control);
+
+        let mut ret = Self { aes };
+        ret.init();
+
         ret
     }
 

esp-hal-common/src/analog/adc/riscv.rs

@@ -556,11 +556,10 @@ where
     ADCI: RegisterAccess + 'd,
 {
     pub fn adc(
-        peripheral_clock_controller: &mut PeripheralClockControl,
         adc_instance: impl crate::peripheral::Peripheral<P = ADCI> + 'd,
         config: AdcConfig<ADCI>,
     ) -> Result<Self, ()> {
-        peripheral_clock_controller.enable(Peripheral::ApbSarAdc);
+        PeripheralClockControl::enable(Peripheral::ApbSarAdc);
 
         let sar_adc = unsafe { &*APB_SARADC::PTR };
         sar_adc.ctrl.modify(|_, w| unsafe {
@@ -718,12 +717,7 @@ mod implementation {
     //!
     //! let mut pin = adc1_config.enable_pin(io.pins.gpio2.into_analog(), Attenuation::Attenuation11dB);
     //!
-    //! let mut adc1 = ADC::<ADC1>::adc(
-    //!     &mut system.peripheral_clock_control,
-    //!     analog.adc1,
-    //!     adc1_config,
-    //! )
-    //! .unwrap();
+    //! let mut adc1 = ADC::<ADC1>::adc(analog.adc1, adc1_config).unwrap();
     //!
     //! let mut delay = Delay::new(&clocks);
     //!
@@ -770,12 +764,7 @@ mod implementation {
     //!
     //! let mut pin = adc1_config.enable_pin(io.pins.gpio2.into_analog(), Attenuation::Attenuation11dB);
     //!
-    //! let mut adc1 = ADC::<ADC1>::adc(
-    //!     &mut system.peripheral_clock_control,
-    //!     analog.adc1,
-    //!     adc1_config,
-    //! )
-    //! .unwrap();
+    //! let mut adc1 = ADC::<ADC1>::adc(analog.adc1, adc1_config).unwrap();
     //!
     //! let mut delay = Delay::new(&clocks);
     //!
@@ -827,12 +816,7 @@ mod implementation {
     //!
     //! let mut pin = adc1_config.enable_pin(io.pins.gpio2.into_analog(), Attenuation::Attenuation11dB);
     //!
-    //! let mut adc1 = ADC::<ADC1>::adc(
-    //!     &mut system.peripheral_clock_control,
-    //!     analog.adc1,
-    //!     adc1_config,
-    //! )
-    //! .unwrap();
+    //! let mut adc1 = ADC::<ADC1>::adc(analog.adc1, adc1_config).unwrap();
     //!
     //! let mut delay = Delay::new(&clocks);
     //!
@@ -880,12 +864,7 @@ mod implementation {
     //!
     //! let mut pin = adc1_config.enable_pin(io.pins.gpio2.into_analog(), Attenuation::Attenuation11dB);
     //!
-    //! let mut adc1 = ADC::<ADC1>::adc(
-    //!     &mut system.peripheral_clock_control,
-    //!     analog.adc1,
-    //!     adc1_config,
-    //! )
-    //! .unwrap();
+    //! let mut adc1 = ADC::<ADC1>::adc(analog.adc1, adc1_config).unwrap();
     //!
     //! let mut delay = Delay::new(&clocks);
     //!

esp-hal-common/src/analog/mod.rs

@@ -46,12 +46,7 @@
 //!
 //! let mut pin = adc1_config.enable_pin(io.pins.gpio2.into_analog(), Attenuation::Attenuation11dB);
 //!
-//! let mut adc1 = ADC::<ADC1>::adc(
-//!     &mut system.peripheral_clock_control,
-//!     analog.adc1,
-//!     adc1_config,
-//! )
-//! .unwrap();
+//! let mut adc1 = ADC::<ADC1>::adc(analog.adc1, adc1_config).unwrap();
 //!
 //! let mut delay = Delay::new(&clocks);
 //!

esp-hal-common/src/assist_debug.rs

@@ -18,22 +18,19 @@
 
 use crate::{
     peripheral::{Peripheral, PeripheralRef},
-    system::PeripheralClockControl,
+    peripherals::ASSIST_DEBUG,
 };
 
 pub struct DebugAssist<'d> {
-    debug_assist: PeripheralRef<'d, crate::peripherals::ASSIST_DEBUG>,
+    debug_assist: PeripheralRef<'d, ASSIST_DEBUG>,
 }
 
 impl<'d> DebugAssist<'d> {
-    pub fn new(
-        debug_assist: impl Peripheral<P = crate::peripherals::ASSIST_DEBUG> + 'd,
-        _peripheral_clock_control: &mut PeripheralClockControl,
-    ) -> Self {
+    pub fn new(debug_assist: impl Peripheral<P = ASSIST_DEBUG> + 'd) -> Self {
         crate::into_ref!(debug_assist);
 
-        // we should use peripheral clock control to enable the debug assist however
-        // it's always enabled in ROM code already
+        // NOTE: We should enable the debug assist, however, it's always enabled in ROM
+        //       code already.
 
         DebugAssist { debug_assist }
     }

esp-hal-common/src/dma/gdma.rs

@@ -16,7 +16,7 @@
 //!
 //! GDMA peripheral can be initializes using the `new` function, which requires
 //! a DMA peripheral instance and a clock control reference. ```no_run
-//! let dma = Gdma::new(peripherals.DMA, &mut system.peripheral_clock_control);
+//! let dma = Gdma::new(peripherals.DMA);
 //! ```
 //! 
 //! <em>PS: Note that the number of DMA channels is chip-specific.</em>
@@ -643,11 +643,10 @@ impl<'d> Gdma<'d> {
     /// Create a DMA instance.
     pub fn new(
         dma: impl crate::peripheral::Peripheral<P = crate::peripherals::DMA> + 'd,
-        peripheral_clock_control: &mut PeripheralClockControl,
     ) -> Gdma<'d> {
         crate::into_ref!(dma);
 
-        peripheral_clock_control.enable(Peripheral::Gdma);
+        PeripheralClockControl::enable(Peripheral::Gdma);
         dma.misc_conf.modify(|_, w| w.ahbm_rst_inter().set_bit());
         dma.misc_conf.modify(|_, w| w.ahbm_rst_inter().clear_bit());
         dma.misc_conf.modify(|_, w| w.clk_en().set_bit());

esp-hal-common/src/dma/mod.rs

@@ -36,11 +36,11 @@
 //! ## Example
 //! #### Initialize and utilize DMA controller in `SPI`
 //! ```no_run
-//! let dma = Gdma::new(peripherals.DMA, &mut system.peripheral_clock_control);
+//! let dma = Gdma::new(peripherals.DMA);
 //! let dma_channel = dma.channel0;
 //!
 //! // For `ESP32` and `ESP32-S2` chips use `Pdma` controller instead:
-//! // let dma = Dma::new(system.dma, &mut system.peripheral_clock_control);
+//! // let dma = Dma::new(system.dma);
 //! // let dma_channel = dma.spi2channel;
 //!
 //! let mut descriptors = [0u32; 8 * 3];
@@ -54,7 +54,6 @@
 //!     cs,
 //!     100u32.kHz(),
 //!     SpiMode::Mode0,
-//!     &mut system.peripheral_clock_control,
 //!     &clocks,
 //! )
 //! .with_dma(dma_channel.configure(

esp-hal-common/src/dma/pdma.rs

@@ -711,11 +711,8 @@ pub struct Dma<'d> {
 
 impl<'d> Dma<'d> {
     /// Create a DMA instance.
-    pub fn new(
-        dma: impl crate::peripheral::Peripheral<P = crate::system::Dma> + 'd,
-        peripheral_clock_control: &mut PeripheralClockControl,
-    ) -> Dma<'d> {
-        peripheral_clock_control.enable(Peripheral::Dma);
+    pub fn new(dma: impl crate::peripheral::Peripheral<P = crate::system::Dma> + 'd) -> Dma<'d> {
+        PeripheralClockControl::enable(Peripheral::Dma);
 
         Dma {
             _inner: dma.into_ref(),

esp-hal-common/src/ecc.rs

@@ -77,13 +77,10 @@ pub enum WorkMode {
 }
 
 impl<'d> Ecc<'d> {
-    pub fn new(
-        ecc: impl Peripheral<P = ECC> + 'd,
-        peripheral_clock_control: &mut PeripheralClockControl,
-    ) -> Self {
+    pub fn new(ecc: impl Peripheral<P = ECC> + 'd) -> Self {
         crate::into_ref!(ecc);
 
-        peripheral_clock_control.enable(PeripheralEnable::Ecc);
+        PeripheralClockControl::enable(PeripheralEnable::Ecc);
 
         Self {
             ecc,

esp-hal-common/src/etm.rs

@@ -31,7 +31,7 @@
 //! let led_task = gpio_ext.channel0_task.toggle(&mut led);
 //! let button_event = gpio_ext.channel0_event.falling_edge(button);
 //!
-//! let etm = Etm::new(peripherals.SOC_ETM, &mut system.peripheral_clock_control);
+//! let etm = Etm::new(peripherals.SOC_ETM);
 //! let channel0 = etm.channel0;
 //!
 //! // make sure the configured channel doesn't get dropped - dropping it will
@@ -241,12 +241,10 @@ macro_rules! create_etm_constructor {
     ($($num:literal),+) => {
         paste::paste! {
             impl<'d> Etm<'d> {
-                pub fn new(
-                    peripheral: impl Peripheral<P = crate::peripherals::SOC_ETM> + 'd,
-                    peripheral_clock_control: &mut PeripheralClockControl,
-                ) -> Self {
+                pub fn new(peripheral: impl Peripheral<P = crate::peripherals::SOC_ETM> + 'd) -> Self {
                     crate::into_ref!(peripheral);
-                    peripheral_clock_control.enable(crate::system::Peripheral::Etm);
+
+                    PeripheralClockControl::enable(crate::system::Peripheral::Etm);
 
                     Self {
                         _peripheral: peripheral,

esp-hal-common/src/hmac.rs

@@ -93,14 +93,11 @@ enum NextCommand {
 }
 
 impl<'d> Hmac<'d> {
-    pub fn new(
-        hmac: impl Peripheral<P = HMAC> + 'd,
-        peripheral_clock_control: &mut PeripheralClockControl,
-    ) -> Self {
+    pub fn new(hmac: impl Peripheral<P = HMAC> + 'd) -> Self {
         crate::into_ref!(hmac);
 
-        peripheral_clock_control.enable(PeripheralEnable::Sha);
-        peripheral_clock_control.enable(PeripheralEnable::Hmac);
+        PeripheralClockControl::enable(PeripheralEnable::Sha);
+        PeripheralClockControl::enable(PeripheralEnable::Hmac);
 
         Self {
             hmac,

esp-hal-common/src/i2c.rs

@@ -22,7 +22,6 @@
 //!     io.pins.gpio1,
 //!     io.pins.gpio2,
 //!     100u32.kHz(),
-//!     &mut system.peripheral_clock_control,
 //!     &clocks,
 //! );
 //! loop {
@@ -274,11 +273,16 @@ where
         sda: impl Peripheral<P = SDA> + 'd,
         scl: impl Peripheral<P = SCL> + 'd,
         frequency: HertzU32,
-        peripheral_clock_control: &mut PeripheralClockControl,
         clocks: &Clocks,
     ) -> Self {
         crate::into_ref!(i2c, sda, scl);
-        enable_peripheral(&i2c, peripheral_clock_control);
+
+        PeripheralClockControl::enable(match i2c.i2c_number() {
+            0 => crate::system::Peripheral::I2cExt0,
+            #[cfg(i2c1)]
+            1 => crate::system::Peripheral::I2cExt1,
+            _ => unreachable!(), // will never happen
+        });
 
         let mut i2c = I2C { peripheral: i2c };
 
@@ -623,21 +627,6 @@ mod asynch {
     }
 }
 
-fn enable_peripheral<'d, T>(
-    i2c: &PeripheralRef<'d, T>,
-    peripheral_clock_control: &mut PeripheralClockControl,
-) where
-    T: Instance,
-{
-    // enable peripheral
-    match i2c.i2c_number() {
-        0 => peripheral_clock_control.enable(crate::system::Peripheral::I2cExt0),
-        #[cfg(i2c1)]
-        1 => peripheral_clock_control.enable(crate::system::Peripheral::I2cExt1),
-        _ => unreachable!(), // will never happen
-    }
-}
-
 /// I2C Peripheral Instance
 pub trait Instance {
     fn scl_output_signal(&self) -> OutputSignal;