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10 changes: 5 additions & 5 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ jobs:
run: cd esp-hal-smartled/ && cargo +nightly check --features=esp32h2
# Check all Xtensa targets:
- name: check (esp32)
run: cd esp-hal-smartled/ && cargo +esp check --features=esp32,xtal_40mhz
run: cd esp-hal-smartled/ && cargo +esp check --features=esp32,xtal-40mhz
- name: check (esp32s2)
run: cd esp-hal-smartled/ && cargo +esp check --features=esp32s2
- name: check (esp32s3)
Expand Down Expand Up @@ -110,7 +110,7 @@ jobs:
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,defmt
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
- name: check esp32-hal (psram)
run: cd esp32-hal/ && cargo check --example=psram --features=psram_2m --release # This example requires release!
run: cd esp32-hal/ && cargo check --example=psram --features=psram-2m --release # This example requires release!
# Ensure documentation can be built
- name: rustdoc
run: cd esp32-hal/ && cargo doc --features=eh1
Expand Down Expand Up @@ -398,7 +398,7 @@ jobs:
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,defmt
cargo check --examples --features=embassy,embassy-time-timg0,embassy-executor-interrupt,embassy-executor-thread,log
- name: check esp32s2-hal (psram)
run: cd esp32s2-hal/ && cargo check --example=psram --features=psram_2m --release # This example requires release!
run: cd esp32s2-hal/ && cargo check --example=psram --features=psram-2m --release # This example requires release!
# Ensure documentation can be built
- name: rustdoc
run: cd esp32s2-hal/ && cargo doc --features=eh1
Expand Down Expand Up @@ -465,8 +465,8 @@ jobs:
- name: check esp32s3-hal (octal psram and psram)
run: | # This examples require release!
cd esp32s3-hal/
cargo check --example=octal_psram --features=opsram_2m --release
cargo check --example=psram --features=psram_2m --release
cargo check --example=octal_psram --features=opsram-2m --release
cargo check --example=psram --features=psram-2m --release
- name: check esp32s3-hal (embassy, log/defmt)
run: |
cd esp32s3-hal/
Expand Down
3 changes: 2 additions & 1 deletion CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

- Bumped MSRV to 1.67 (#798)
- Optimised multi-core critical section implementation (#797)
- Unified the ESP32's and ESP32-C2's xtal frequency features (#831)

### Fixed

Expand All @@ -54,6 +53,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- `Alarm::interrupt_clear` is now `Alarm::clear_interrupt` to be consistent (#812)
- The `PeripheralClockControl` struct is no longer public, drivers no longer take this as a parameter (#817)
- Unify the system peripheral, `SYSTEM`, `DPORT` and `PCR` are now all exposed as `SYSTEM` (#832).
- Unified the ESP32's and ESP32-C2's xtal frequency features (#831)
- Replace any underscores in feature names with dashes (#833)

## [0.12.0]

Expand Down
16 changes: 8 additions & 8 deletions esp-hal-common/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -77,18 +77,18 @@ esp32s2 = ["xtensa", "esp32s2/rt", "procmacros/esp32s2", "xtensa-lx/esp32s2", "x
esp32s3 = ["xtensa", "esp32s3/rt", "procmacros/esp32s3", "xtensa-lx/esp32s3", "xtensa-lx-rt/esp32s3", "usb-otg"]

# Crystal frequency selection (ESP32 and ESP32-C2 only!)
xtal_26mhz = []
xtal_40mhz = []
xtal-26mhz = []
xtal-40mhz = []

# PSRAM support
psram_2m = []
psram_4m = []
psram_8m = []
psram-2m = []
psram-4m = []
psram-8m = []

# Octal RAM support
opsram_2m = []
opsram_4m = []
opsram_8m = []
opsram-2m = []
opsram-4m = []
opsram-8m = []

# USB OTG support (ESP32-S2 and ESP32-S3 only! Enabled by default)
usb-otg = ["esp-synopsys-usb-otg", "usb-device"]
Expand Down
4 changes: 2 additions & 2 deletions esp-hal-common/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,7 @@ fn main() {
// frequencies:
#[cfg(any(feature = "esp32", feature = "esp32c2"))]
{
assert_unique_used_features!("xtal_26mhz", "xtal_40mhz");
assert_unique_used_features!("xtal-26mhz", "xtal-40mhz");
}

// NOTE: update when adding new device support!
Expand Down Expand Up @@ -152,7 +152,7 @@ fn main() {

// Check PSRAM features are only given if the target supports PSRAM
if !&device.symbols.contains(&String::from("psram"))
&& (cfg!(feature = "psram_2m") || cfg!(feature = "psram_4m") || cfg!(feature = "psram_8m"))
&& (cfg!(feature = "psram-2m") || cfg!(feature = "psram-4m") || cfg!(feature = "psram-8m"))
{
panic!("The target does not support PSRAM");
}
Expand Down
16 changes: 8 additions & 8 deletions esp-hal-common/src/clock/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -294,7 +294,7 @@ impl<'d> ClockControl<'d> {
pub fn boot_defaults(
clock_control: impl Peripheral<P = SystemClockControl> + 'd,
) -> ClockControl<'d> {
#[cfg(feature = "xtal_40mhz")]
#[cfg(feature = "xtal-40mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
Expand All @@ -306,7 +306,7 @@ impl<'d> ClockControl<'d> {
},
};

#[cfg(feature = "xtal_26mhz")]
#[cfg(feature = "xtal-26mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
Expand All @@ -326,9 +326,9 @@ impl<'d> ClockControl<'d> {
) -> ClockControl<'d> {
// like NuttX use 40M hardcoded - if it turns out to be a problem
// we will take care then
#[cfg(feature = "xtal_40mhz")]
#[cfg(feature = "xtal-40mhz")]
let xtal_freq = XtalClock::RtcXtalFreq40M;
#[cfg(feature = "xtal_26mhz")]
#[cfg(feature = "xtal-26mhz")]
let xtal_freq = XtalClock::RtcXtalFreq26M;
let pll_freq = match cpu_clock_speed {
CpuClock::Clock80MHz => PllClock::Pll320MHz,
Expand Down Expand Up @@ -368,7 +368,7 @@ impl<'d> ClockControl<'d> {
pub fn boot_defaults(
clock_control: impl Peripheral<P = SystemClockControl> + 'd,
) -> ClockControl<'d> {
#[cfg(feature = "xtal_40mhz")]
#[cfg(feature = "xtal-40mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
Expand All @@ -378,7 +378,7 @@ impl<'d> ClockControl<'d> {
},
};

#[cfg(feature = "xtal_26mhz")]
#[cfg(feature = "xtal-26mhz")]
return ClockControl {
_private: clock_control.into_ref(),
desired_rates: RawClocks {
Expand All @@ -395,9 +395,9 @@ impl<'d> ClockControl<'d> {
cpu_clock_speed: CpuClock,
) -> ClockControl<'d> {
let apb_freq;
#[cfg(feature = "xtal_40mhz")]
#[cfg(feature = "xtal-40mhz")]
let xtal_freq = XtalClock::RtcXtalFreq40M;
#[cfg(feature = "xtal_26mhz")]
#[cfg(feature = "xtal-26mhz")]
let xtal_freq = XtalClock::RtcXtalFreq26M;
let pll_freq = PllClock::Pll480MHz;

Expand Down
4 changes: 2 additions & 2 deletions esp-hal-common/src/rtc_cntl/rtc/esp32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,12 @@ use crate::{
pub(crate) fn init() {}

pub(crate) fn configure_clock() {
#[cfg(feature = "xtal_40mhz")]
#[cfg(feature = "xtal-40mhz")]
assert!(matches!(
RtcClock::get_xtal_freq(),
XtalClock::RtcXtalFreq40M
));
#[cfg(feature = "xtal_26mhz")]
#[cfg(feature = "xtal-26mhz")]
assert!(
matches!(RtcClock::get_xtal_freq(), XtalClock::RtcXtalFreq26M),
"Did you flash the right bootloader configured for 26Mhz xtal?"
Expand Down
4 changes: 2 additions & 2 deletions esp-hal-common/src/rtc_cntl/rtc/esp32c2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -56,12 +56,12 @@ pub(crate) fn init() {
}

pub(crate) fn configure_clock() {
#[cfg(feature = "xtal_40mhz")]
#[cfg(feature = "xtal-40mhz")]
assert!(matches!(
RtcClock::get_xtal_freq(),
XtalClock::RtcXtalFreq40M
));
#[cfg(feature = "xtal_26mhz")]
#[cfg(feature = "xtal-26mhz")]
assert!(
matches!(RtcClock::get_xtal_freq(), XtalClock::RtcXtalFreq26M),
"Did you flash the right bootloader configured for 26MHz xtal?"
Expand Down
10 changes: 5 additions & 5 deletions esp-hal-common/src/soc/esp32/psram.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,11 +26,11 @@ pub fn psram_vaddr_start() -> usize {
}

cfg_if::cfg_if! {
if #[cfg(feature = "psram_2m")] {
if #[cfg(feature = "psram-2m")] {
const PSRAM_SIZE: u32 = 2;
} else if #[cfg(feature = "psram_4m")] {
} else if #[cfg(feature = "psram-4m")] {
const PSRAM_SIZE: u32 = 4;
} else if #[cfg(feature = "psram_8m")] {
} else if #[cfg(feature = "psram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else {
const PSRAM_SIZE: u32 = 0;
Expand All @@ -41,13 +41,13 @@ pub const PSRAM_BYTES: usize = PSRAM_SIZE as usize * 1024 * 1024;

pub const PSRAM_VADDR_START: usize = PSRAM_VADDR as usize;

#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral<P = crate::peripherals::PSRAM>) {
utils::psram_init();
utils::s_mapping(PSRAM_VADDR, PSRAM_BYTES as u32);
}

#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub(crate) mod utils {
use procmacros::ram;

Expand Down
10 changes: 5 additions & 5 deletions esp-hal-common/src/soc/esp32s2/psram.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,11 +22,11 @@ pub fn psram_vaddr_start() -> usize {
}

cfg_if::cfg_if! {
if #[cfg(feature = "psram_2m")] {
if #[cfg(feature = "psram-2m")] {
const PSRAM_SIZE: u32 = 2;
} else if #[cfg(feature = "psram_4m")] {
} else if #[cfg(feature = "psram-4m")] {
const PSRAM_SIZE: u32 = 4;
} else if #[cfg(feature = "psram_8m")] {
} else if #[cfg(feature = "psram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else {
const PSRAM_SIZE: u32 = 0;
Expand All @@ -37,7 +37,7 @@ pub const PSRAM_BYTES: usize = PSRAM_SIZE as usize * 1024 * 1024;

pub const PSRAM_VADDR_START: usize = PSRAM_VADDR as usize;

#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral<P = crate::peripherals::PSRAM>) {
#[allow(unused)]
enum CacheLayout {
Expand Down Expand Up @@ -138,7 +138,7 @@ pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral<P = crate::per
}
}

#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub(crate) mod utils {
// Function initializes the PSRAM by configuring GPIO pins, resetting the PSRAM,
// and enabling Quad I/O (QIO) mode. It also calls the psram_cache_init
Expand Down
28 changes: 14 additions & 14 deletions esp-hal-common/src/soc/esp32s3/psram.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,17 +23,17 @@ pub fn psram_vaddr_start() -> usize {
}

cfg_if::cfg_if! {
if #[cfg(feature = "psram_2m")] {
if #[cfg(feature = "psram-2m")] {
const PSRAM_SIZE: u32 = 2;
} else if #[cfg(feature = "psram_4m")] {
} else if #[cfg(feature = "psram-4m")] {
const PSRAM_SIZE: u32 = 4;
} else if #[cfg(feature = "psram_8m")] {
} else if #[cfg(feature = "psram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else if #[cfg(feature = "opsram_2m")] {
} else if #[cfg(feature = "opsram-2m")] {
const PSRAM_SIZE: u32 = 2;
} else if #[cfg(feature = "opsram_4m")] {
} else if #[cfg(feature = "opsram-4m")] {
const PSRAM_SIZE: u32 = 4;
} else if #[cfg(feature = "opsram_8m")] {
} else if #[cfg(feature = "opsram-8m")] {
const PSRAM_SIZE: u32 = 8;
} else {
const PSRAM_SIZE: u32 = 0;
Expand All @@ -46,12 +46,12 @@ pub const PSRAM_BYTES: usize = PSRAM_SIZE as usize * 1024 * 1024;
///
/// Currently only QSPI is supported.
#[cfg(any(
feature = "psram_2m",
feature = "psram_4m",
feature = "psram_8m",
feature = "opsram_2m",
feature = "opsram_4m",
feature = "opsram_8m"
feature = "psram-2m",
feature = "psram-4m",
feature = "psram-8m",
feature = "opsram-2m",
feature = "opsram-4m",
feature = "opsram-8m"
))]
pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral<P = crate::peripherals::PSRAM>) {
const CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE: u32 = 0x4000;
Expand Down Expand Up @@ -160,7 +160,7 @@ pub fn init_psram(_peripheral: impl crate::peripheral::Peripheral<P = crate::per
utils::psram_init();
}

#[cfg(any(feature = "psram_2m", feature = "psram_4m", feature = "psram_8m"))]
#[cfg(any(feature = "psram-2m", feature = "psram-4m", feature = "psram-8m"))]
pub(crate) mod utils {
use procmacros::ram;

Expand Down Expand Up @@ -779,7 +779,7 @@ pub(crate) mod utils {
}
}

#[cfg(any(feature = "opsram_2m", feature = "opsram_4m", feature = "opsram_8m"))]
#[cfg(any(feature = "opsram-2m", feature = "opsram-4m", feature = "opsram-8m"))]
pub(crate) mod utils {
use procmacros::ram;

Expand Down
4 changes: 2 additions & 2 deletions esp-hal-smartled/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -23,5 +23,5 @@ esp32h2 = ["esp-hal-common/esp32h2"]
esp32s2 = ["esp-hal-common/esp32s2"]
esp32s3 = ["esp-hal-common/esp32s3"]

xtal_26mhz = ["esp-hal-common/xtal_26mhz"]
xtal_40mhz = ["esp-hal-common/xtal_40mhz"]
xtal-26mhz = ["esp-hal-common/xtal-26mhz"]
xtal-40mhz = ["esp-hal-common/xtal-40mhz"]
14 changes: 7 additions & 7 deletions esp32-hal/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ ssd1306 = "0.8.1"
static_cell = { version = "1.2.0", features = ["nightly"] }

[features]
default = ["rt", "vectored", "xtal_40mhz"]
default = ["rt", "vectored", "xtal-40mhz"]
async = ["esp-hal-common/async"]
bluetooth = []
debug = ["esp-hal-common/debug"]
Expand All @@ -60,8 +60,8 @@ log = ["esp-hal-common/log"]
rt = []
ufmt = ["esp-hal-common/ufmt"]
vectored = ["esp-hal-common/vectored"]
xtal_26mhz = ["esp-hal-common/xtal_26mhz"]
xtal_40mhz = ["esp-hal-common/xtal_40mhz"]
xtal-26mhz = ["esp-hal-common/xtal-26mhz"]
xtal-40mhz = ["esp-hal-common/xtal-40mhz"]

# Embassy support
embassy = ["esp-hal-common/embassy"]
Expand All @@ -71,9 +71,9 @@ embassy-executor-interrupt = ["esp-hal-common/embassy-executor-interrupt"]

# PSRAM support
psram = []
psram_2m = ["esp-hal-common/psram_2m", "psram"]
psram_4m = ["esp-hal-common/psram_4m", "psram"]
psram_8m = ["esp-hal-common/psram_8m", "psram"]
psram-2m = ["esp-hal-common/psram-2m", "psram"]
psram-4m = ["esp-hal-common/psram-4m", "psram"]
psram-8m = ["esp-hal-common/psram-8m", "psram"]

[profile.release]
debug = true
Expand Down Expand Up @@ -112,7 +112,7 @@ required-features = ["embassy", "embassy-executor-thread", "async"]

[[example]]
name = "psram"
required-features = ["psram_2m"]
required-features = ["psram-2m"]

[[example]]
name = "embassy_serial"
Expand Down
2 changes: 1 addition & 1 deletion esp32-hal/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ fn generate_memory_extras() -> Vec<u8> {
}

fn check_features() {
if cfg!(feature = "xtal_40mhz") && cfg!(feature = "xtal_26mhz") {
if cfg!(feature = "xtal-40mhz") && cfg!(feature = "xtal-26mhz") {
panic!("Only one xtal speed feature can be selected");
}
}
12 changes: 6 additions & 6 deletions esp32-hal/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,18 +26,18 @@
//! - `embassy-time-timg0` - Enable the [embassy] time driver using the `TIMG0`
//! peripheral
//! - `log` - enable log output using the `log` crate
//! - `psram_2m` - Use externally connected PSRAM (2MB)
//! - `psram_4m` - Use externally connected PSRAM (4MB)
//! - `psram_8m` - Use externally connected PSRAM (8MB)
//! - `psram-2m` - Use externally connected PSRAM (2MB)
//! - `psram-4m` - Use externally connected PSRAM (4MB)
//! - `psram-8m` - Use externally connected PSRAM (8MB)
//! - `rt` - Runtime support
//! - `ufmt` - Implement the [`ufmt_write::uWrite`] trait for the UART driver
//! - `vectored` - Enable interrupt vectoring
//! - `xtal_26mhz` - The target device uses a 26MHz crystal
//! - `xtal_40mhz` - The target device uses a 40MHz crystal
//! - `xtal-26mhz` - The target device uses a 26MHz crystal
//! - `xtal-40mhz` - The target device uses a 40MHz crystal
//!
//! #### Default Features
//!
//! The `rt`, `vectored`, and `xtal_40mhz` features are enabled by default.
//! The `rt`, `vectored`, and `xtal-40mhz` features are enabled by default.
//!
//! [embedded-hal-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-hal-async
//! [embedded-io-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-io-async
Expand Down
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