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@matoro matoro commented Oct 23, 2023

CPU name is in "cpu model" field on MIPS. Also, /proc/cpuinfo contains an "isa" field, but rather than being a single string like RISC-V it is instead a space-separated list of every ISA flavor that the chip is compatible with. Since these are mostly incremental, just make the cpuISA value set to the last one.

Before:

$ fastfetch --structure "cpu" --logo none
CPU: mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2 (16)

After:

$ fastfetch --structure "cpu" --logo none
CPU: Cavium Octeon II V0.10 mips64r2 (16)

CPU name is in "cpu model" field on MIPS.  Also, /proc/cpuinfo contains
an "isa" field, but rather than being a single string like RISC-V it is
instead a space-separated list of every ISA flavor that the chip is
compatible with.  Since these are mostly incremental, just make the
cpuISA value set to the last one.

Before:
```
$ fastfetch --structure "cpu" --logo none
CPU: mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2 (16)
```

After:
```
$ fastfetch --structure "cpu" --logo none
CPU: Cavium Octeon II V0.10 mips64r2 (16)
```
@CarterLi
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LGTM. Thanks for contribution

@CarterLi CarterLi merged commit 40d6d0b into fastfetch-cli:dev Oct 23, 2023
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2 participants