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Modular hardware build system

Python 1,133 123 Updated Mar 20, 2026

Modern dev tools for Tcl • includes a linter, formatter, and editor integration.

Python 92 12 Updated Feb 19, 2026

KLayout Main Sources

C++ 1,066 265 Updated Mar 18, 2026

An Open-source FPGA IP Generator

Verilog 1,060 192 Updated Mar 19, 2026

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Verilog 2,513 843 Updated Mar 20, 2026