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[CIR][CIRGen][Builtin][Neon] Lower vqrshrun_n and add getAArch64SIMDIntrinsicString #899

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Merged
merged 2 commits into from
Sep 30, 2024
Merged

[CIR][CIRGen][Builtin][Neon] Lower vqrshrun_n and add getAArch64SIMDIntrinsicString #899

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60e5cfd
add getAArch64SIMDIntrinsicString
ghehg Sep 28, 2024
447d1af
Lower vqrshrun_n
ghehg Sep 30, 2024
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22 changes: 22 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenBuilder.h
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Original file line number Diff line number Diff line change
Expand Up @@ -372,6 +372,28 @@ class CIRGenBuilderTy : public CIRBaseBuilderTy {
}
bool isInt(mlir::Type i) { return mlir::isa<mlir::cir::IntType>(i); }

mlir::cir::IntType getExtendedIntTy(mlir::cir::IntType ty, bool isSigned) {
if (isInt8Ty(ty)) {
return isSigned ? getSInt16Ty() : getUInt16Ty();
}
if (isInt16Ty(ty)) {
return isSigned ? getSInt32Ty() : getUInt32Ty();
}
if (isInt32Ty(ty)) {
return isSigned ? getSInt64Ty() : getUInt64Ty();
}
llvm_unreachable("NYI");
}

mlir::cir::VectorType getExtendedElementVectorType(mlir::cir::VectorType vt,
bool isSigned = false) {
auto elementTy =
mlir::dyn_cast_or_null<mlir::cir::IntType>(vt.getEltType());
assert(elementTy && "expected int vector");
return mlir::cir::VectorType::get(
getContext(), getExtendedIntTy(elementTy, isSigned), vt.getSize());
}

mlir::cir::LongDoubleType
getLongDoubleTy(const llvm::fltSemantics &format) const {
if (&format == &llvm::APFloat::IEEEdouble())
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