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ThunderScope Public
Forked from EEVengers/ThunderScopeThunderScope GitHub Repo
ANTLR MIT License UpdatedJan 16, 2025 -
usb-raw-gadget Public
Forked from xairy/raw-gadgetUSB Raw Gadget — a low-level interface for the Linux USB Gadget subsystem
C UpdatedAug 30, 2024 -
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fpga-drive-aximm-pcie Public
Forked from fpgadeveloper/fpga-drive-aximm-pcieExample designs for FPGA Drive FMC
Tcl MIT License UpdatedMar 22, 2024 -
verilog-axis Public
Forked from alexforencich/verilog-axisVerilog AXI stream components for FPGA implementation
Python MIT License UpdatedJan 5, 2024 -
reliability Public
Forked from MatthewReid854/reliabilityReliability engineering toolkit for Python - https://reliability.readthedocs.io/en/latest/
Python GNU Lesser General Public License v3.0 UpdatedDec 27, 2023 -
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vu13p-uhd Public
Forked from EttusResearch/uhdThe USRP™ Hardware Driver Repository
Verilog Other UpdatedDec 1, 2023 -
hdl Public
Forked from analogdevicesinc/hdlHDL libraries and projects
Verilog Other UpdatedNov 30, 2023 -
firesim Public
Forked from firesim/firesimFireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
Scala Other UpdatedNov 21, 2023 -
Makefile-Templates Public
Forked from TheNetAdmin/Makefile-TemplatesSome makefile templates for different sized projects
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aff3ct Public
Forked from aff3ct/aff3ctA fast simulator and a library dedicated to the channel coding.
C++ MIT License UpdatedNov 16, 2023 -
multic Public
一个乘以常数的Verilog自动代码生成器
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PeakRDL Public
Forked from SystemRDL/PeakRDLControl and status register code generator toolchain
Python GNU General Public License v3.0 UpdatedNov 8, 2023 -
fpga-network-stack Public
Forked from fpgasystems/fpga-network-stackScalable Network Stack for FPGAs (TCP/IP, RoCEv2)
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pyftdi Public
Forked from eblot/pyftdiFTDI device driver written in pure Python
Python Other UpdatedSep 17, 2023 -
SerialTool Public
Forked from skiars/SerialToolA cross platform Serial-Port/TCP/UDP debugging tool.
C++ GNU General Public License v3.0 UpdatedSep 13, 2023 -
pcileech-fpga Public
Forked from ufrisk/pcileech-fpgaFPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software
SystemVerilog UpdatedSep 3, 2023 -
verilog-i2c Public
Forked from alexforencich/verilog-i2cVerilog I2C interface for FPGA implementation
Verilog MIT License UpdatedAug 20, 2023 -
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OpenTSN3.4 Public
Forked from fast-codesign/OpenTSN3.4OpenTSN3.4开源项目的新特性：（1）交换平面深度解耦，硬件代码由TSS（时间敏感交换），HCP（硬件控制点）和OSMAC（Opensync MAC）实现。（2）集成了Opensync开源实现，支持802.1AS和AS6802两种时间同步协议；（3）集成了TSN硬件仿真工具OpenEmulator，用户可在仿真环境下运行OpenTSN3.4交换机、网卡、控制器和opensync同步软件
Verilog Other UpdatedAug 13, 2022 -
OpenTSN2.0 Public
Forked from fast-codesign/OpenTSN2.0an opensource project to enable TSN research, including distributed and centralized version.
Verilog UpdatedMay 26, 2022 -
usb3_pipe Public
Forked from enjoy-digital/usb3_pipeUSB3 PIPE interface for Xilinx 7-Series
Verilog BSD 2-Clause "Simplified" License UpdatedMay 3, 2022