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schmatic.md: UART_TX and UART_RX pins are falsely labled #402

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microbit-carlos merged 4 commits into from
Jul 2, 2025
Merged

schmatic.md: UART_TX and UART_RX pins are falsely labled #402

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f5ce25d
schmatic.md: UART_TX and UART_RX pins are falsy labled
jkoeppeler Jan 30, 2025
3838f84
fixup! clarify description
Jul 2, 2025
b9f4d6b
fixup! use proper footnote
Jul 2, 2025
42f4bc4
fixup! change footnote to *
Jul 2, 2025
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fixup! change footnote to *
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Jonas Köppeler committed Jul 2, 2025
commit 42f4bc4f1ffefd4791dd8f77f6cf8982e629854a
6 changes: 3 additions & 3 deletions hardware/schematic.md
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Expand Up @@ -47,8 +47,8 @@ Below is the pinmap and allocation of the nRF52833, more information is availabl
| P0.03 | RING1 | N | P1 |
| P0.04 | RING2 | N | P2 |
| P0.05 | MIC_IN | N | |
| P0.06 | UART_INT_RX[^*] | PTA18 / P0.03 | |
| P1.08 | UART_INT_TX[^*] | PTA19 / P0.02 | |
| P0.06 | UART_INT_RX`*` | PTA18 / P0.03 | |
| P1.08 | UART_INT_TX`*` | PTA19 / P0.02 | |
| P0.08 | I2C_INT_SCL | PTC1 / P0.29 | |
| P0.10 | GPIO1 | N | P8 |
| P0.09 | GPIO2 | N | P9 |
Expand All @@ -75,7 +75,7 @@ Below is the pinmap and allocation of the nRF52833, more information is availabl
| P0.31 | COL3 | N | P3 |
| P0.30 | COL5 | N | P10 |

[^*]: These names follow the schematic's naming convention, labeled from the interface's perspective, not the target MCU's. So, UART_INT_TX corresponds to the MCU's RX pin, and UART_INT_RX to the MCU's TX pin.
`*`: These names follow the schematic's naming convention, labeled from the interface's perspective, not the target MCU's. So, UART_INT_TX corresponds to the MCU's RX pin, and UART_INT_RX to the MCU's TX pin.

## Key Features

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