Hello! I'm Fahim, a BSc student in Electrical and Electronic Engineering (EEE) at Khulna University of Engineering & Technology (KUET).
Bachelor of Science in Electrical and Electronics Engineering
Khulna University of Engineering & Technology
- Relevant Coursework: Semiconductor Physics and Devices, VLSI Design and Technology, Analog VLSI Design, Digital VLSI Design, Advanced Semiconductor Devices, VLSI CAD Tools and Simulation, High-Speed Digital Circuit Design, System-on-Chip (SoC) Design
- [VLSI Design and Architecture]
- [System-on-Chip (SoC) Design]
- [Machine Learning and AI for VLSI Design Automation]
- [Formal Verification, Model Checking & Design Validation]
- [Emerging Memory Technologies]
- [Computational Nanomaterials]
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VLSI (Digital Focus):
- Design & RTL: RTL Design, Digital IC Design, Gate-Level Design, AI Accelerator Design
- ASIC/SoC Flow: ASIC Design Flow, SoC-Level Design, Floorplanning, Placement & Routing, Clock Tree Synthesis (CTS)
- Optimization & Analysis: Logic Optimization, Timing Analysis, Power Analysis, Low-Power Design Techniques
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Verification: Formal Verification, SystemVerilog Assertions (SVA), Testbench Development
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Analog & AMS: Basic Analog IC Design, Circuit Simulation
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Programming Languages: SystemVerilog, Verilog, VHDL, Python, C++, C
OpenROAD • LibreLane • OpenLane • Yosys • ModelSim • Magic • LTspice/Ngspice • Intel Quartus Prime • Xilinx Vivado
| Project 1: [Will be updated soon] |
| Description: [Brief description of the project] |
| Technologies Used: [List of technologies] |
| Project 2: [Will be updated soon] |
| Description: [Brief description of the project] |
| Technologies Used: [List of technologies] |
Thank you for visiting my profile!
Feel free to explore my repositories and reach out if you have any questions or collaboration ideas.
