This repository includes FPGA IP Blocks compatible with the Arduino Vidor family of products and is aimed to users already familiar with FPGA development process. FPGA development using native tools, although encouraged, is not supported by Arduino as it is quite complex difficult to support. If you feel this challenge is for you please know that we can only provide very limited support as our main efforts will be targeted at providing a smooth experience within Arduino IDE and Arduino Create through precompiled libraries and with the web tool that will provde an easy way to assemble IP blocks.
directory structure is summarized in the following table:
| Directory | Contents |
|---|---|
| ip | source code for IP blocks |
| projects | sample project files for the various boards |
| constraints | constraint files for the various boards. includes pinout and timings |
| TOOLS | scripts and tools needed to generate FPGA images |
Once again this repository is intended only for people already familiar with FPGA programming. At the moment the primary intent is to disclose IP block functionality and present the infrastructure we created so that potantial contributors can start to evaluate it. As of today this repository does not contain full source code required to compile the released libraries as parts of it requires some more polishing both in terms of code and in terms of licensing (in some cases from third parties). Full examples of working FPGAs, along with instructions to create a library and access the FPGA, will be posted here but will not necessarily reflect the official images we are publishing.
NOTE depending on Quartus II version used (lite or standard) scripts will compile different versions. The reason is that standard edition, which requires licensing, takes advantage of IP blocks included in Quartus and in particular NIOS II/f which adds cache and allows much faster code execution from flash memory. Of course precompiled images from Arduino are compiled with standard edition so they will be much faster than the ones compiled with lite edition. Right now some APIs, especially the ones related to gfx, are too slow with lite edition so you may experience timeouts in jtag communication
The prerequisite to compile MKRVIDOR4000 board FPGA images is Quartus II 18.1 Lite or Standard which can be downloaded from Altera/Intel web site. Once Quartus is installed you need to patch it as we had to modify some IP blocks to optimize their functionality. In order to do it you need to open NIOS II Command shell, move to the TOOLS/scripts directory and launch the apply_quartus_patches.sh. Download the Go Programming Language and compile MakeCompositeBinary, move to TOOLS/makeCompositeBinary and build make_composite_binary.go with go build -o MakeCompositeBinary make_composite_binary.go.
NOTE This step is required only once
Once setup is complete you can open a NIOS II Command shell, add the TOOLS/scripts directory to your PATH environment variable and you're ready to compile a project. To compile a project you simply have to change to its directory and run the build_all.sh script.
NOTE that the script has to be run from the project directory.
Quartus will produce a set of files under the output_files directory in the project folder. In order to incorporate the FPGA in the Arduino code you need to create a library and preprocess the ttf file generated by Quartus so that it contains the appropriate headers required by the software infrastructure. Details of this process will be disclosed as soon as the flow is stable.
Programming the FPGA is possible in various ways:
- flashing the image along with Arduino code creating a library which incorporates the ttf file
- programming the image in RAM through USB Blaster (this requires mounting the FPGA JTAG header). this can be done safely only when SAM D21 is in bootloader mode as in other conditions it may access JTAG and cause a contention
- programming the image in RAM through the emulated USB Blaster via SAM D21 (use USBBlaster library and SAMD core >= 1.6.25)
Other useful scripts are:
| Script | Description |
|---|---|
| build_sw.sh | builds all the nios software components |
| build_all.sh | builds everything from scratch and produces app.ttf and signature.h under output_files |
| build_launcher.sh | builds the launcher image to be embedded in FPGA image |
| create_image.sh | creates app.ttf and signature.h from existing precompiled image and binary files |
| update_fw.sh | updates nios firmware, embeds it in FPGA and creates app.ttf and signature.h without recompiling FPGA |
| assemble_library.sh | creates the Arduino library, using generated app.ttf, signature.h and relevant code from arduino subfolders (under ip) |
NOTE To allow preparing a library without installing Quartus, the build script will try to use the precompiled bitstream located in ${PROJECT_FOLDER}/software/arduino/src