posts/writing-a-risc-v-cpu/

[utterances-bot]

Writing a RISC-V CPU! | Pyjama Brah!

Reasoning from first principles, everything from AI down to the transistor.

https://pyjamabrah.com/posts/writing-a-risc-v-cpu/

[dhanush-271]

Hi sir,
I have some understanding on using verilog to design a digital module and implement on basys3 fpga. But how do you design a assembler and compiler to integrate with the CPU which is designed using verilog.

[streetdogg]

You can write on in Python or C++. If you want to go hardcore, explore how to use lex and yacc.