Fix undefined order of volatile accesses

IAR generates warning Pa082 'undefined behavior: the order of volatile
accesses is undefined in this statement'.

flash/cache_perfctr/flash_cache_perfctr.c

@@ -79,7 +79,9 @@ int main() {
     printf("Hit rate so far: %.1f%%\n", hit * 100.f / access);
 
     printf("Calculate 25th fibonacci number: %d\n", recursive_fibonacci(25));
-    printf("New hit rate after printf and fibonacci: %.1f%%\n", xip_ctrl_hw->ctr_hit * 100.f / xip_ctrl_hw->ctr_acc);
+    uint32_t ctr_hit = xip_ctrl_hw->ctr_hit;
+    uint32_t ctr_acc = xip_ctrl_hw->ctr_acc;
+    printf("New hit rate after printf and fibonacci: %.1f%%\n", ctr_hit * 100.f / ctr_acc);
 
     check_hit_miss_invalidate();
 

i2c/mpl3115a2_i2c/mpl3115a2_i2c.c

@@ -148,12 +148,15 @@ void mpl3115a2_convert_fifo_batch(uint8_t start, volatile uint8_t buf[], struct
 
     // 3 altitude registers: MSB (8 bits), CSB (8 bits) and LSB (4 bits, starting from MSB)
     // first two are integer bits (2's complement) and LSB is fractional bits -> makes 20 bit signed integer
-    int32_t h = (int32_t) ((uint32_t) buf[start] << 24 | buf[start + 1] << 16 | buf[start + 2] << 8);
+    int32_t h = (int32_t) buf[start] << 24;
+    h |= (int32_t) buf[start + 1] << 16;
+    h |= (int32_t) buf[start + 2] << 8;
     data->altitude = ((float)h) / 65536.f;
 
     // 2 temperature registers: MSB (8 bits) and LSB (4 bits, starting from MSB)
     // first 8 are integer bits with sign and LSB is fractional bits -> 12 bit signed integer
-    int16_t t = (int16_t) (((uint16_t) buf[start + 3]) << 8 | buf[start + 4]);
+    int16_t t = (int16_t) buf[start + 3] << 8;
+    t |= (int16_t) buf[start + 4];
     data->temperature = ((float)t) / 256.f;
 }
 

interp/hello_interp/hello_interp.c

@@ -58,8 +58,11 @@ void cross_lanes() {
     interp0->base[0] = 1;
     interp0->base[1] = 0;
     puts("Lane result crossover:");
-    for (int i = 0; i < 10; ++i)
-        printf("PEEK0, POP1: %d, %d\n", interp0->peek[0], interp0->pop[1]);
+    for (int i = 0; i < 10; ++i) {
+        uint32_t peek0 = interp0->peek[0];
+        uint32_t pop1 = interp0->pop[1];
+        printf("PEEK0, POP1: %d, %d\n", peek0, pop1);
+    }
 }
 
 void simple_blend1() {
@@ -178,8 +181,10 @@ void linear_interpolation() {
         int16_t *sample_pair = (int16_t *) interp0->peek[2];
         interp0->base[0] = sample_pair[0];
         interp0->base[1] = sample_pair[1];
-        printf("%d\t(%d%% between %d and %d)\n", (int) interp0->peek[1],
-               100 * (interp0->add_raw[1] & 0xff) / 0xff,
+        uint32_t peek1 = interp0->peek[1];
+        uint32_t add_raw1 = interp0->add_raw[1];
+        printf("%d\t(%d%% between %d and %d)\n", (int) peek1,
+               100 * (add_raw1 & 0xff) / 0xff,
                sample_pair[0], sample_pair[1]);
         interp0->add_raw[0] = step;
     }

system/narrow_io_write/narrow_io_write.c

@@ -37,8 +37,10 @@ int main() {
     // on transfer size and address LSBs
     printf("\nReading back 1 byte at a time\n");
     // Little-endian!
-    printf("Should be ef be ad de: %02x %02x %02x %02x\n",
-           scratch8[0], scratch8[1], scratch8[2], scratch8[3]);
+    printf("Should be ef be ad de: %02x ", scratch8[0]);
+    printf("%02x ", scratch8[1]);
+    printf("%02x ", scratch8[2]);
+    printf("%02x\n", scratch8[3]);
 
     // The Cortex-M0+ and the RP2040 DMA replicate byte writes across the bus,
     // and IO registers will sample the entire write bus always.