Add support for xip_sram binaries on RP2040 and RP2350

On RP2040 they are copy to xip sram, as the bootrom doesn't support direct entry into xip sram

src/rp2_common/pico_crt0/crt0.S

@@ -11,6 +11,7 @@
 
 #include "hardware/regs/addressmap.h"
 #include "hardware/regs/sio.h"
+#include "hardware/regs/xip.h"
 #include "pico/binary_info/defs.h"
 #include "boot/picobin.h"
 #include "pico/bootrom.h"
@@ -462,6 +463,14 @@ hold_non_core0_in_bootrom:
     b _enter_vtable_in_r0
 1:
 
+#if PICO_RP2040 && PICO_USE_XIP_CACHE_AS_RAM
+_disable_xip_cache:
+    // Disable the XIP cache on RP2040 making its SRAM available for use
+    ldr r0, =(REG_ALIAS_CLR_BITS + XIP_CTRL_BASE + XIP_CTRL_OFFSET)
+    movs r1, #XIP_CTRL_EN_BITS
+    str r1, [r0]
+#endif
+
 #if !PICO_RP2040 && PICO_EMBED_XIP_SETUP && !PICO_NO_FLASH
     // Execute boot2 on the core 0 stack (it also gets copied into BOOTRAM due
     // to inclusion in the data copy table below). Note the reference

src/rp2_common/pico_crt0/embedded_start_block.inc.S

@@ -12,6 +12,10 @@
 #endif
 #endif
 
+#ifndef PICO_CRT0_PIN_XIP_SRAM
+#define PICO_CRT0_PIN_XIP_SRAM PICO_USE_XIP_CACHE_AS_RAM
+#endif
+
 #ifndef PICO_CRT0_INCLUDE_PICOBIN_ENTRY_POINT_ITEM
 // On RISC-V the default entry point from bootrom is the start of the binary, but
 // we have our vtable at the start, so we must include an entry point
@@ -104,6 +108,16 @@ embedded_block:
 .word __vectors
 #endif
 
+#if PICO_CRT0_PIN_XIP_SRAM
+.byte PICOBIN_BLOCK_ITEM_LOAD_MAP
+.byte 0x04 // word size
+.byte 0 // pad
+.byte 0x01 // number of entries
+.word 0 // clear
+.word XIP_SRAM_BASE
+.word 0 // size
+#endif
+
 .byte PICOBIN_BLOCK_ITEM_2BS_LAST
 .hword (embedded_block_end - embedded_block - 16 ) / 4 // total size of all
 .byte 0

src/rp2_common/pico_standard_link/CMakeLists.txt

@@ -77,9 +77,14 @@ if (NOT TARGET pico_standard_link)
     function(pico_set_binary_type TARGET TYPE)
         # catch special cases
         if (TYPE STREQUAL "xip_sram")
-            if (PICO_RP2350)
+            if (PICO_RP2040)
+                # Use copy_flash_sram, as RP2040 bootrom cannot directly access XIP SRAM
+                pico_set_modified_binary_type(${TARGET} copy_flash_sram RAM 0x15000000 12k SCRATCH_X 0x15003000 2k SCRATCH_Y 0x15003800 2k)
+                target_compile_definitions(${TARGET} PRIVATE PICO_USE_XIP_CACHE_AS_RAM=1)
+            elseif (PICO_RP2350)
                 pico_set_modified_binary_type(${TARGET} sram RAM 0x13ffc000 12k SCRATCH_X 0x13fff000 2k SCRATCH_Y 0x13fff800 2k)
-                target_compile_definitions(${TARGET} PRIVATE PICO_USE_SW_SPIN_LOCKS=0 PICO_USE_XIP_SRAM=1) # exclusives only work in main SRAM on RP2350
+                # Exclusives only work in main SRAM on RP2350, so cannot use software spin locks
+                target_compile_definitions(${TARGET} PRIVATE PICO_USE_XIP_CACHE_AS_RAM=1 PICO_USE_SW_SPIN_LOCKS=0)
             else()
                 message(FATAL_ERROR "xip_sram binary type is only supported on RP2350")
             endif()

test/pico_xip_sram_test/CMakeLists.txt

@@ -1,7 +1,6 @@
-if (NOT PICO_RP2040)
-    add_executable(pico_xip_sram_test pico_xip_sram_test.c)
-    target_link_libraries(pico_xip_sram_test PRIVATE pico_stdlib)
-    pico_set_binary_type(pico_xip_sram_test xip_sram)
-    pico_package_uf2_output(pico_xip_sram_test)
-    pico_add_extra_outputs(pico_xip_sram_test)
-endif()
+add_executable(pico_xip_sram_test pico_xip_sram_test.c)
+target_link_libraries(pico_xip_sram_test PRIVATE pico_stdlib)
+pico_set_binary_type(pico_xip_sram_test xip_sram)
+pico_minimize_runtime(pico_xip_sram_test INCLUDE PRINTF PRINTF_MINIMAL DEFAULT_ALARM_POOL PANIC)
+target_compile_definitions(pico_xip_sram_test PRIVATE PICO_HEAP_SIZE=0x400)
+pico_add_extra_outputs(pico_xip_sram_test)

test/pico_xip_sram_test/pico_xip_sram_test.c

@@ -5,4 +5,12 @@
 int main(void) {
     stdio_init_all();
     printf("pico_xip_sram_test begins\n");
+
+    for (int i = 0; i < 5; i++) {
+        printf("running... %d\n", i);
+        sleep_ms(500);
+    }
+
+    printf("pico_xip_sram_test ends\n");
+    return 0;
 }