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Add the V (vector) extension to the riscv64-linux-android target spec #116618

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Merged
merged 3 commits into from
Oct 14, 2023
Merged

Add the V (vector) extension to the riscv64-linux-android target spec #116618

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6efc71c
Add the V (vector) extension to the riscv64-linux-android target spec
chriswailes Oct 10, 2023
899f81f
Add documentation for the riscv64-android-linux target
chriswailes Oct 12, 2023
166c353
Lowercase the feature flags for riscv64-linux-android
chriswailes Oct 13, 2023
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2 changes: 1 addition & 1 deletion compiler/rustc_target/src/spec/riscv64_linux_android.rs
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Expand Up @@ -9,7 +9,7 @@ pub fn target() -> Target {
options: TargetOptions {
code_model: Some(CodeModel::Medium),
cpu: "generic-rv64".into(),
features: "+m,+a,+f,+d,+c,+Zba,+Zbb,+Zbs".into(),
features: "+m,+a,+f,+d,+c,+zba,+zbb,+zbs,+v".into(),
llvm_abiname: "lp64d".into(),
supported_sanitizers: SanitizerSet::ADDRESS,
max_atomic_width: Some(64),
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16 changes: 16 additions & 0 deletions src/doc/rustc/src/platform-support/android.md
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Expand Up @@ -45,3 +45,19 @@ The riscv64-linux-android target is supported as a Tier 3 target.

A list of all supported targets can be found
[here](../platform-support.html)

## Architecture Notes

### riscv64-linux-android

Currently the `riscv64-linux-android` target requires the following architecture features/extensions:

* `a` (atomics)
* `d` (double-precision floating-point)
* `c` (compressed instruction set)
* `f` (single-precision floating-point)
* `m` (multiplication and division)
* `v` (vector)
* `Zba` (address calculation instructions)
* `Zbb` (base instructions)
* `Zbs` (single-bit instructions)