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[mono] Implement AdvSimd #49260

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Merged
imhameed merged 58 commits into from
Mar 12, 2021
Merged

[mono] Implement AdvSimd #49260

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0848153
Checkpoint
imhameed Feb 17, 2021
706cf0e
Add some shifts
imhameed Mar 5, 2021
79514da
Implement rounding
imhameed Mar 5, 2021
6cc2596
Implement ReverseElement{Bits,8,16,32}
imhameed Mar 5, 2021
f0e2e41
Add reciprocal fp/u32 operations
imhameed Mar 5, 2021
cca921b
Add some bitwise operations
imhameed Mar 5, 2021
dad5fed
Add negation
imhameed Mar 5, 2021
6341449
Add every AdvSimd symbol name
imhameed Mar 5, 2021
8580569
Minor cleanup
imhameed Mar 6, 2021
a9bc75e
Checkpoint
imhameed Mar 6, 2021
8d16907
Implement some multiplication ops
imhameed Mar 6, 2021
e5a6b06
Fix amd64
imhameed Mar 6, 2021
19cbca8
More multiplication
imhameed Mar 6, 2021
6a88dc7
Implement min/max
imhameed Mar 6, 2021
a82ad4d
Add load ops
imhameed Mar 6, 2021
5203566
Add clz/cls
imhameed Mar 6, 2021
da21e6f
Implement insert/insertscalar
imhameed Mar 6, 2021
94b7396
Add fused ops
imhameed Mar 6, 2021
0c5047c
Add extract
imhameed Mar 7, 2021
fabeff7
Add duplicate
imhameed Mar 7, 2021
8d5e824
Add divide
imhameed Mar 7, 2021
030032a
Add f32->{u32,i32}
imhameed Mar 7, 2021
069bebb
Add fp64->{u64,i64}
imhameed Mar 7, 2021
9788f4a
arm64 fp conversions
imhameed Mar 7, 2021
fc6f373
Add comparisons
imhameed Mar 7, 2021
07a7bff
Implement ceiling
imhameed Mar 7, 2021
f8594f7
Revert some stray unrelated changes
imhameed Mar 7, 2021
f37685d
Implement more bitwise operations
imhameed Mar 7, 2021
e666083
More arithmetic
imhameed Mar 7, 2021
5ebdb81
Implement Abs.*, Absolute.*
imhameed Mar 7, 2021
b20631f
Implement AbsoluteCompare.*
imhameed Mar 7, 2021
4a78abe
Misc fixes to shifts, math
imhameed Mar 7, 2021
d5ab5ec
Implement missing stuff from AdvSimd.Arm64
imhameed Mar 8, 2021
9e9adab
Implement the AdvSimd.Arm64 parts of fma
imhameed Mar 8, 2021
6560bd2
More AdvSimd.Arm64
imhameed Mar 8, 2021
5c60c8f
Implement ExtractVector64/ExtractVector128
imhameed Mar 8, 2021
16a4f7c
Unroll instructions with immediate constants and no fallback support …
imhameed Mar 8, 2021
643d6a4
... Fix MinPairwiseScalar/MinAcross/MaxPairwiseScalar/MaxAcross
imhameed Mar 9, 2021
76d24b6
Fix brain-os for ld1/st1
imhameed Mar 9, 2021
aa657a8
???
imhameed Mar 9, 2021
e526dc6
Fix floating point Add/Subtract
imhameed Mar 9, 2021
e95199d
Fix CompareEqualScalar/CompareGreaterThanOrEqualScalar/CompareGreater…
imhameed Mar 9, 2021
c94c07b
Fix ShiftRightArithmeticRounded, ShiftRightArithmeticRoundedScalar, S…
imhameed Mar 9, 2021
3d81808
Fix MultiplyDoublingWideningLowerAndSubtractSaturate, FusedMultiplySu…
imhameed Mar 9, 2021
d81b1f0
Fix ShiftLogicalSaturateScalar, ShiftArithmeticRoundedSaturateScalar,…
imhameed Mar 9, 2021
e69386d
Fix ShiftLeftLogicalSaturateUnsignedScalar, ShiftLogicalRoundedSatura…
imhameed Mar 9, 2021
5b49456
Fix PopCount
imhameed Mar 9, 2021
f31aec1
Fix ReverseElement8, ReverseElement16, ReverseElement32
imhameed Mar 9, 2021
12fd7c9
Fix ExtractNarrowingSaturateScalar, ExtractNarrowingSaturateUnsignedS…
imhameed Mar 9, 2021
d229944
More test fixes:
imhameed Mar 10, 2021
5baa928
LoadAndReplicateToVector: coerce the source pointer to the element ty…
imhameed Mar 10, 2021
0d67d57
Move OP_INSERT_* and OP_XCAST to a shared arm64/amd64 region
imhameed Mar 10, 2021
b14fc9a
Address feedback: move IntrinsicId (and another LLVM-only anonymous e…
imhameed Mar 10, 2021
059bce5
Don't attempt to scalarize a non-scalar sqshlu
imhameed Mar 10, 2021
bd2e5b2
MultiplyDoublingWideningSaturateScalar etc.: consistently place the s…
imhameed Mar 10, 2021
ca728df
Explicitly zero out the unused bits in scalar ops built out of vector…
imhameed Mar 10, 2021
24a89e1
Fix the vector concatenation overloads of Vector128/256
imhameed Mar 10, 2021
14602df
Sha1.FixedRotate is a scalar-in-vector op. TODO: refactor to use XOP_…
imhameed Mar 11, 2021
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Move OP_INSERT_* and OP_XCAST to a shared arm64/amd64 region
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@imhameed
imhameed committed Mar 10, 2021
commit 0d67d57b88a1bc3dad826e76cf5e1559a8a0d65c
48 changes: 24 additions & 24 deletions src/mono/mono/mini/mini-llvm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -7532,6 +7532,30 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
values [ins->dreg] = LLVMBuildInsertElement (builder, vector, val, const_int32 (0), "");
break;
}
case OP_INSERT_I1:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt8Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_I2:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt16Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_I4:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt32Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_I8:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt64Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_R4:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMFloatType ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_R8:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMDoubleType ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_XCAST: {
LLVMTypeRef t = simd_class_to_llvm_type (ctx, ins->klass);

values [ins->dreg] = LLVMBuildBitCast (builder, lhs, t, "");
break;
}
#endif // defined(TARGET_X86) || defined(TARGET_AMD64) || defined(TARGET_ARM64) || defined(TARGET_WASM)

#if defined(TARGET_X86) || defined(TARGET_AMD64) || defined(TARGET_WASM)
Expand Down Expand Up @@ -7769,24 +7793,6 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
values [ins->dreg] = LLVMBuildZExt (builder, values [ins->dreg], LLVMInt32Type (), "");
break;
}
case OP_INSERT_I1:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt8Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_I2:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt16Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_I4:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt32Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_I8:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMInt64Type ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_R4:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMFloatType ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_INSERT_R8:
values [ins->dreg] = LLVMBuildInsertElement (builder, values [ins->sreg1], convert (ctx, values [ins->sreg2], LLVMDoubleType ()), LLVMConstInt (LLVMInt32Type (), ins->inst_c0, FALSE), dname);
break;
case OP_XINSERT_I2: {
LLVMBasicBlockRef bbs [64];
LLVMValueRef switch_ins;
Expand Down Expand Up @@ -9294,12 +9300,6 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
}
#endif

case OP_XCAST: {
LLVMTypeRef t = simd_class_to_llvm_type (ctx, ins->klass);

values [ins->dreg] = LLVMBuildBitCast (builder, lhs, t, "");
break;
}
case OP_XCOMPARE_FP: {
LLVMRealPredicate pred = fpcond_to_llvm_cond [ins->inst_c0];
LLVMValueRef cmp = LLVMBuildFCmp (builder, pred, lhs, rhs, "");
Expand Down