Remove lvSpillAtSingleDef from some asserts

src/coreclr/jit/compiler.hpp

@@ -2017,7 +2017,7 @@ inline
 #ifdef TARGET_AMD64
 #ifndef UNIX_AMD64_ABI
             // On amd64, every param has a stack location, except on Unix-like systems.
-            assert(varDsc->lvIsParam || varDsc->lvSingleDefRegCandidate || varDsc->lvSpillAtSingleDef);
+            assert(varDsc->lvIsParam);
 #endif // UNIX_AMD64_ABI
 #else  // !TARGET_AMD64
             // For other targets, a stack parameter that is enregistered or prespilled

src/coreclr/jit/emitxarch.cpp

@@ -2159,16 +2159,15 @@ inline UNATIVE_OFFSET emitter::emitInsSizeSV(code_t code, int var, int dsp)
                     // Dev10 804810 - failing this assert can lead to bad codegen and runtime crashes
                     CLANG_FORMAT_COMMENT_ANCHOR;
 
-                    LclVarDsc* varDsc = emitComp->lvaTable + var;
-
 #ifdef UNIX_AMD64_ABI
+                    LclVarDsc* varDsc = emitComp->lvaTable + var;
                     bool isRegPassedArg = varDsc->lvIsParam && varDsc->lvIsRegArg;
                     // Register passed args could have a stack offset of 0.
                     noway_assert((int)offs < 0 || isRegPassedArg || emitComp->opts.IsOSR());
 #else  // !UNIX_AMD64_ABI
-                    bool isSingleDefSpill = varDsc->lvSpillAtSingleDef;
+
                     // OSR transitioning to RBP frame currently can have mid-frame FP
-                    noway_assert(((int)offs < 0) || isSingleDefSpill || emitComp->opts.IsOSR());
+                    noway_assert(((int)offs < 0) || emitComp->opts.IsOSR());
 #endif // !UNIX_AMD64_ABI
                 }