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[JIT] [Issue: 61620] Optimizing ARM64 for *x = dblCns; #61847

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Merged
echesakov merged 10 commits into from
Nov 30, 2021
Merged

[JIT] [Issue: 61620] Optimizing ARM64 for *x = dblCns; #61847

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b91555e
[Issue: 61620] Optimizing ARM64 for *x = 0;
SeanWoo Nov 19, 2021
ee617c7
Update src/coreclr/jit/lower.cpp
SeanWoo Nov 19, 2021
36bc6b4
Fixed bug with * x = dConst if dConst is not 0
SeanWoo Nov 19, 2021
0596430
remove extra printf
SeanWoo Nov 19, 2021
b9b0f55
Replacing IsFPZero with IsCnsNonZeroFltOrDbl for STOREIND Minor edits…
SeanWoo Nov 20, 2021
9a2a2d5
fixed ARM codegen for STOREIND
SeanWoo Nov 21, 2021
25f047e
Update src/coreclr/jit/lower.cpp
SeanWoo Nov 21, 2021
153fd39
Update src/coreclr/jit/lower.cpp
SeanWoo Nov 21, 2021
d5dd56b
fix formatting
SeanWoo Nov 30, 2021
ec0f188
Merge branch 'issue-61620-ARM64' of https://github.com/SeanWoo/runtim…
SeanWoo Nov 30, 2021
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8 changes: 7 additions & 1 deletion src/coreclr/jit/lower.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6794,11 +6794,17 @@ void Lowering::LowerStoreIndirCommon(GenTreeStoreInd* ind)
{
if (varTypeIsFloating(ind) && ind->Data()->IsCnsFltOrDbl())
{
// Optimize *x = DCON to *x = ICON which is slightly faster on xarch
// Optimize *x = DCON to *x = ICON which can be slightly faster and/or smaller.
GenTree* data = ind->Data();
double dblCns = data->AsDblCon()->gtDconVal;
ssize_t intCns = 0;
var_types type = TYP_UNKNOWN;
// XARCH: we can always contain the immediates.
// ARM64: zero can always be contained, other cases will use immediates from the data
// section and it is not a clear win to switch them to inline integers.
// ARM: FP constants are assembled from integral ones, so it is always profitable
// to directly use the integers as it avoids the int -> float conversion.
CLANG_FORMAT_COMMENT_ANCHOR;

#if defined(TARGET_XARCH) || defined(TARGET_ARM)
bool shouldSwitchToInteger = true;
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