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JIT: Faster vector == Vector128.Zero on arm64 #65632

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Merged
EgorBo merged 11 commits into from
Feb 23, 2022
Merged

JIT: Faster vector == Vector128.Zero on arm64 #65632

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466afe6
Optimize vec == Vector.Zero for arm64
EgorBo Feb 20, 2022
3139218
Clean up
EgorBo Feb 20, 2022
a4143c4
Update lowerarmarch.cpp
EgorBo Feb 20, 2022
f9d45e0
Update lowerarmarch.cpp
EgorBo Feb 20, 2022
51f727f
Update lowerarmarch.cpp
EgorBo Feb 20, 2022
70e18b7
Apply Zoltan's patch
EgorBo Feb 21, 2022
1550865
Merge branch 'main' of https://github.com/dotnet/runtime into arm-fas…
EgorBo Feb 21, 2022
c1c7831
Address feedback
EgorBo Feb 21, 2022
5c1a77e
Merge branch 'main' of https://github.com/dotnet/runtime into arm-fas…
EgorBo Feb 22, 2022
59609c4
Address feedback
EgorBo Feb 22, 2022
bc9220b
use UINT for V128
EgorBo Feb 22, 2022
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@EgorBo
EgorBo committed Feb 22, 2022
commit 59609c447faa659675d0852a406399cc5ecf986e
11 changes: 6 additions & 5 deletions src/coreclr/jit/lowerarmarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -874,7 +874,7 @@ void Lowering::LowerHWIntrinsicCmpOp(GenTreeHWIntrinsic* node, genTreeOps cmpOp)
//
// to:
//
// bool eq = AdvSimd.Arm64.MaxAcross(v.AsByte()).ToScalar() == 0;
// bool eq = AdvSimd.Arm64.MaxAcross(v.AsUInt16()).ToScalar() == 0;
//
GenTree* op = nullptr;
GenTree* opZero = nullptr;
Expand All @@ -891,8 +891,9 @@ void Lowering::LowerHWIntrinsicCmpOp(GenTreeHWIntrinsic* node, genTreeOps cmpOp)

if (!varTypeIsFloating(simdBaseType) && (op != nullptr))
{
// Use USHORT variant as it has better latency/throughput on some CPUs than UBYTE
GenTree* cmp =
comp->gtNewSimdHWIntrinsicNode(simdType, op, NI_AdvSimd_Arm64_MaxAcross, CORINFO_TYPE_UBYTE, simdSize);
comp->gtNewSimdHWIntrinsicNode(simdType, op, NI_AdvSimd_Arm64_MaxAcross, CORINFO_TYPE_USHORT, simdSize);
BlockRange().InsertBefore(node, cmp);
LowerNode(cmp);
BlockRange().Remove(opZero);
Expand All @@ -901,13 +902,13 @@ void Lowering::LowerHWIntrinsicCmpOp(GenTreeHWIntrinsic* node, genTreeOps cmpOp)
BlockRange().InsertAfter(cmp, val);
LowerNode(val);

GenTree* cmpZroCns = comp->gtNewIconNode(0, TYP_INT);
BlockRange().InsertAfter(val, cmpZroCns);
GenTree* cmpZeroCns = comp->gtNewIconNode(0, TYP_INT);
BlockRange().InsertAfter(val, cmpZeroCns);

node->ChangeOper(cmpOp);
node->gtType = TYP_INT;
node->AsOp()->gtOp1 = val;
node->AsOp()->gtOp2 = cmpZroCns;
node->AsOp()->gtOp2 = cmpZeroCns;
LowerNodeCC(node, (cmpOp == GT_EQ) ? GenCondition::EQ : GenCondition::NE);
node->gtType = TYP_VOID;
node->ClearUnusedValue();
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2 changes: 0 additions & 2 deletions src/mono/mono/mini/simd-intrinsics.c
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Expand Up @@ -776,8 +776,6 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi
}
case SN_Create: {
MonoType *etype = get_vector_t_elem_type (fsig->ret);
if (!MONO_TYPE_IS_INTRINSICS_VECTOR_PRIMITIVE (etype))
return NULL;
if (fsig->param_count == 1 && mono_metadata_type_equal (fsig->params [0], etype))
return emit_simd_ins (cfg, klass, type_to_expand_op (etype), args [0]->dreg, -1);
else if (is_create_from_half_vectors_overload (fsig))
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4 changes: 4 additions & 0 deletions src/tests/issues.targets
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Expand Up @@ -1449,6 +1449,10 @@
<Issue>Crashes during LLVM AOT compilation.</Issue>
</ExcludeList>

<ExcludeList Include="$(XunitTestBinBase)/JIT/HardwareIntrinsics/General/HwiOp/CompareVectorWithZero/**">
<Issue>https://github.com/dotnet/runtime/pull/65632#issuecomment-1046294324</Issue>
</ExcludeList>

<ExcludeList Include="$(XunitTestBinBase)/JIT/opt/InstructionCombining/DivToMul/**">
<Issue>Doesn't pass after LLVM AOT compilation.</Issue>
</ExcludeList>
Expand Down