Ensure morph and rationalize check OBJ(ADDR(CNS_VEC))

src/coreclr/jit/morph.cpp

@@ -935,10 +935,20 @@ void CallArgs::ArgsComplete(Compiler* comp, GenTreeCall* call)
 #if defined(FEATURE_SIMD) && defined(TARGET_ARM64)
                 else if (isMultiRegArg && varTypeIsSIMD(argx->TypeGet()))
                 {
+                    GenTree* nodeToCheck = argx;
+
+                    if (nodeToCheck->OperIs(GT_OBJ))
+                    {
+                        nodeToCheck = nodeToCheck->AsObj()->gtOp1;
+
+                        if (nodeToCheck->OperIs(GT_ADDR))
+                        {
+                            nodeToCheck = nodeToCheck->AsOp()->gtOp1;
+                        }
+                    }
+
                     // SIMD types do not need the optimization below due to their sizes
-                    if (argx->OperIsSimdOrHWintrinsic() || argx->IsCnsVec() ||
-                        (argx->OperIs(GT_OBJ) && argx->AsObj()->gtOp1->OperIs(GT_ADDR) &&
-                         argx->AsObj()->gtOp1->AsOp()->gtOp1->OperIsSimdOrHWintrinsic()))
+                    if (nodeToCheck->OperIsSimdOrHWintrinsic() || nodeToCheck->IsCnsVec())
                     {
                         SetNeedsTemp(&arg);
                     }

src/coreclr/jit/rationalize.cpp

@@ -138,7 +138,7 @@ void Rationalizer::RewriteSIMDIndir(LIR::Use& use)
     {
         GenTree* location = addr->AsUnOp()->gtGetOp1();
 
-        if (location->OperIsSimdOrHWintrinsic())
+        if (location->OperIsSimdOrHWintrinsic() || location->IsCnsVec())
         {
             // If we have IND(ADDR(SIMD)) then we can keep only the SIMD node.
             // This is a special tree created by impNormStructVal to preserve the class layout