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Minor fixes to write barriers #75478

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Merged
VSadov merged 2 commits into from
Apr 11, 2023
Merged

Minor fixes to write barriers #75478

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cb1509d
Minor fixes to write barriers
AntonLapounov Sep 12, 2022
da811d6
use the same predicated compare as on Unix when checking ephemeral lo…
VSadov Apr 10, 2023
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2 changes: 1 addition & 1 deletion src/coreclr/vm/amd64/JitHelpers_Fast.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -279,7 +279,7 @@ ifdef WRITE_BARRIER_CHECK
; Check that our adjusted destination is somewhere in the shadow gc
add r10, [g_GCShadow]
cmp r10, [g_GCShadowEnd]
ja NoShadow
jnb NoShadow

; Write ref into real GC
mov [rdi], rcx
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2 changes: 1 addition & 1 deletion src/coreclr/vm/amd64/JitHelpers_Slow.asm
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Expand Up @@ -81,7 +81,7 @@ ifdef WRITE_BARRIER_CHECK
; Check that our adjusted destination is somewhere in the shadow gc
add r10, [g_GCShadow]
cmp r10, [g_GCShadowEnd]
ja NoShadow
jnb NoShadow

; Write ref into real GC; see comment below about possibility of AV
mov [rcx], rdx
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2 changes: 1 addition & 1 deletion src/coreclr/vm/amd64/jithelpers_fast.S
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Original file line number Diff line number Diff line change
Expand Up @@ -300,7 +300,7 @@ LEAF_ENTRY JIT_ByRefWriteBarrier, _TEXT
add r10, [rax]
PREPARE_EXTERNAL_VAR g_GCShadowEnd, rax
cmp r10, [rax]
ja NoShadow_ByRefWriteBarrier
jnb NoShadow_ByRefWriteBarrier

// Write ref into real GC
mov [rdi], rcx
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2 changes: 1 addition & 1 deletion src/coreclr/vm/amd64/jithelpers_slow.S
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Expand Up @@ -28,7 +28,7 @@ LEAF_ENTRY JIT_WriteBarrier_Debug, _TEXT
add r10, [rax]
PREPARE_EXTERNAL_VAR g_GCShadowEnd, r11
cmp r10, [r11]
ja NoShadow
jnb NoShadow

// Write ref into real GC// see comment below about possibility of AV
mov [rdi], rsi
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2 changes: 1 addition & 1 deletion src/coreclr/vm/arm64/asmhelpers.S
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Expand Up @@ -420,7 +420,7 @@ LOCAL_LABEL(CheckCardTable):
// branch to exit is taken.
ccmp x15, x12, #0x2, hs

bhi LOCAL_LABEL(Exit)
bhs LOCAL_LABEL(Exit)

LOCAL_LABEL(SkipEphemeralCheck):
// Check if we need to update the card table
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9 changes: 4 additions & 5 deletions src/coreclr/vm/arm64/asmhelpers.asm
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Expand Up @@ -473,15 +473,14 @@ ShadowUpdateDisabled
CheckCardTable
; Branch to Exit if the reference is not in the Gen0 heap
;
adr x12, wbs_ephemeral_low
ldp x12, x16, [x12]
ldr x12, wbs_ephemeral_low
cbz x12, SkipEphemeralCheck

cmp x15, x12
blo Exit

cmp x15, x16
bhi Exit
ldr x12, wbs_ephemeral_high
cmp x15, x12
bhs Exit
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@VSadov VSadov Sep 14, 2022

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The .S version is using ccmp here. I think we should use the same pattern in both cases.

I wonder which would be better though. In theory the ephemeral check should more often fail than pass, statistically. In a large heap most objects are tenured. Ephemeral set is supposed to be small.

On the other hand both patterns probably work the same on a speculative CPU, but the predicated pattern is shorter by one instruction.

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@VSadov VSadov Sep 14, 2022

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And on server GC ephemeral check will always pass. I think, since we are touching this, it should be switched to the predicated form like in .S


SkipEphemeralCheck
; Check if we need to update the card table
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4 changes: 2 additions & 2 deletions src/coreclr/vm/i386/jithelp.S
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Expand Up @@ -109,7 +109,7 @@ PATCH_LABEL JIT_DebugWriteBarrier\rg
mov [edx], edx
cmp ecx, [edx]
pop edx
ja LOCAL_LABEL(WriteBarrier_NoShadow_\rg)
jae LOCAL_LABEL(WriteBarrier_NoShadow_\rg)

// TODO: In Orcas timeframe if we move to P4+ only on X86 we should enable
// mfence barriers on either side of these two writes to make sure that
Expand Down Expand Up @@ -281,7 +281,7 @@ LEAF_ENTRY JIT_ByRefWriteBarrier, _TEXT
mov eax, [eax]
cmp edx, [eax]
pop eax
ja LOCAL_LABEL(ByRefWriteBarrier_NoShadow)
jae LOCAL_LABEL(ByRefWriteBarrier_NoShadow)

// TODO: In Orcas timeframe if we move to P4+ only on X86 we should enable
// mfence barriers on either side of these two writes to make sure that
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4 changes: 2 additions & 2 deletions src/coreclr/vm/i386/jithelp.asm
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Expand Up @@ -193,7 +193,7 @@ ifdef WRITE_BARRIER_CHECK
jb WriteBarrier_NoShadow_&rg
add ecx, [g_GCShadow]
cmp ecx, [g_GCShadowEnd]
ja WriteBarrier_NoShadow_&rg
jae WriteBarrier_NoShadow_&rg

; TODO: In Orcas timeframe if we move to P4+ only on X86 we should enable
; mfence barriers on either side of these two writes to make sure that
Expand Down Expand Up @@ -330,7 +330,7 @@ ifdef WRITE_BARRIER_CHECK
jb ByRefWriteBarrier_NoShadow
add edx, [g_GCShadow]
cmp edx, [g_GCShadowEnd]
ja ByRefWriteBarrier_NoShadow
jae ByRefWriteBarrier_NoShadow

; TODO: In Orcas timeframe if we move to P4+ only on X86 we should enable
; mfence barriers on either side of these two writes to make sure that
Expand Down