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Merged
AndyAyersMS merged 11 commits into from
Apr 10, 2023
Merged

Delete gtGetStructHandle and friends #84212

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46eb1f6
Delete gtGetStructHandle[IfPresent]
SingleAccretion Apr 1, 2023
0a91d91
Delete the canonical handle logic
SingleAccretion Apr 1, 2023
ef0795b
Delete handle handling from fgMakeMultiUse
SingleAccretion Apr 1, 2023
f59480b
Delete gtGetStructHandleForSIMD and friends
SingleAccretion Apr 1, 2023
e629e10
Delete now-unused SIMD cache entries
SingleAccretion Apr 1, 2023
8772e61
Fix SIMD
SingleAccretion Apr 1, 2023
63172e2
Fix fgMakeMultiUse
SingleAccretion Apr 1, 2023
c47f0fd
Delete the IsSimdAsHWIntrinsic logic
SingleAccretion Apr 1, 2023
77e4dde
Merge branch 'main' of https://github.com/dotnet/runtime into No-Get-…
SingleAccretion Apr 6, 2023
7249352
Merge branch 'main' of https://github.com/dotnet/runtime into No-Get-…
SingleAccretion Apr 9, 2023
b0374b7
Fix formatting
SingleAccretion Apr 9, 2023
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Delete gtGetStructHandleForSIMD and friends
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@SingleAccretion
SingleAccretion committed Apr 1, 2023
commit f59480bd2b073c75ca39a773b3ce42dc6e7281da
159 changes: 0 additions & 159 deletions src/coreclr/jit/compiler.h
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Original file line number Diff line number Diff line change
Expand Up @@ -8448,165 +8448,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

SIMDHandlesCache* m_simdHandleCache;

#if defined(FEATURE_HW_INTRINSICS)
CORINFO_CLASS_HANDLE gtGetStructHandleForSIMD(var_types simdType, CorInfoType simdBaseJitType)
{
assert(varTypeIsSIMD(simdType));
assert((simdBaseJitType >= CORINFO_TYPE_BYTE) && (simdBaseJitType <= CORINFO_TYPE_DOUBLE));

// We should only be called from gtGetStructHandleForSimdOrHW and this should've been checked already
assert(m_simdHandleCache != nullptr);

if (simdBaseJitType == CORINFO_TYPE_FLOAT)
{
switch (simdType)
{
case TYP_SIMD8:
{
return m_simdHandleCache->Vector2Handle;
}

case TYP_SIMD12:
{
return m_simdHandleCache->Vector3Handle;
}

case TYP_SIMD16:
{
// We order the checks roughly by expected hit count so early exits are possible

if (m_simdHandleCache->Vector4Handle != NO_CLASS_HANDLE)
{
return m_simdHandleCache->Vector4Handle;
}

if (m_simdHandleCache->QuaternionHandle != NO_CLASS_HANDLE)
{
return m_simdHandleCache->QuaternionHandle;
}

if (m_simdHandleCache->PlaneHandle != NO_CLASS_HANDLE)
{
return m_simdHandleCache->PlaneHandle;
}

break;
}

#if defined(TARGET_XARCH)
case TYP_SIMD32:
case TYP_SIMD64:
{
// This should be handled by the Vector<T> path below
break;
}
#endif // TARGET_XARCH

default:
{
unreached();
}
}
}

if (emitTypeSize(simdType) != getSIMDVectorRegisterByteLength())
{
// We have scenarios, such as shifting Vector<T> by a non-constant
// which may introduce different sized vectors that are marked as
// isSimdAsHWIntrinsic.

return NO_CLASS_HANDLE;
}

uint32_t handleIndex = static_cast<uint32_t>(simdBaseJitType - CORINFO_TYPE_BYTE);
assert(handleIndex < SIMDHandlesCache::SupportedTypeCount);

return m_simdHandleCache->VectorTHandles[handleIndex];
}

CORINFO_CLASS_HANDLE gtGetStructHandleForHWSIMD(var_types simdType, CorInfoType simdBaseJitType)
{
assert(varTypeIsSIMD(simdType));
assert((simdBaseJitType >= CORINFO_TYPE_BYTE) && (simdBaseJitType <= CORINFO_TYPE_DOUBLE));

// We should only be called from gtGetStructHandleForSimdOrHW and this should've been checked already
assert(m_simdHandleCache != nullptr);

uint32_t handleIndex = static_cast<uint32_t>(simdBaseJitType - CORINFO_TYPE_BYTE);
assert(handleIndex < SIMDHandlesCache::SupportedTypeCount);

switch (simdType)
{
case TYP_SIMD8:
{
#if defined(TARGET_ARM64)
return m_simdHandleCache->Vector64THandles[handleIndex];
#else
// This can only be Vector2 and should've been handled by gtGetStructHandleForSIMD
return NO_CLASS_HANDLE;
#endif
}

case TYP_SIMD12:
{
// This can only be Vector3 and should've been handled by gtGetStructHandleForSIMD
return NO_CLASS_HANDLE;
}

case TYP_SIMD16:
{
return m_simdHandleCache->Vector128THandles[handleIndex];
}

#if defined(TARGET_XARCH)
case TYP_SIMD32:
{
return m_simdHandleCache->Vector256THandles[handleIndex];
}

case TYP_SIMD64:
{
return m_simdHandleCache->Vector512THandles[handleIndex];
}
#endif // TARGET_XARCH

default:
{
unreached();
}
}
}

CORINFO_CLASS_HANDLE gtGetStructHandleForSimdOrHW(var_types simdType,
CorInfoType simdBaseJitType,
bool isSimdAsHWIntrinsic = false)
{
assert(varTypeIsSIMD(simdType));
assert((simdBaseJitType >= CORINFO_TYPE_BYTE) && (simdBaseJitType <= CORINFO_TYPE_DOUBLE));

if (m_simdHandleCache == nullptr)
{
// This may happen if the JIT generates SIMD node on its own, without importing them.
// Otherwise getBaseJitTypeAndSizeOfSIMDType should have created the cache.
return NO_CLASS_HANDLE;
}

CORINFO_CLASS_HANDLE clsHnd = NO_CLASS_HANDLE;

if (isSimdAsHWIntrinsic)
{
clsHnd = gtGetStructHandleForSIMD(simdType, simdBaseJitType);
}

if (clsHnd == NO_CLASS_HANDLE)
{
clsHnd = gtGetStructHandleForHWSIMD(simdType, simdBaseJitType);
}

return clsHnd;
}
#endif // FEATURE_HW_INTRINSICS

// Returns true if this is a SIMD type that should be considered an opaque
// vector type (i.e. do not analyze or promote its fields).
// Note that all but the fixed vector types are opaque, even though they may
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